gpio_ebus.c revision 1.1.4.2 1 1.1.4.2 rmind /* $NetBSD: gpio_ebus.c,v 1.1.4.2 2011/03/05 20:49:54 rmind Exp $ */
2 1.1.4.2 rmind
3 1.1.4.2 rmind /*-
4 1.1.4.2 rmind * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 1.1.4.2 rmind * All rights reserved.
6 1.1.4.2 rmind *
7 1.1.4.2 rmind * This code was written by Alessandro Forin and Neil Pittman
8 1.1.4.2 rmind * at Microsoft Research and contributed to The NetBSD Foundation
9 1.1.4.2 rmind * by Microsoft Corporation.
10 1.1.4.2 rmind *
11 1.1.4.2 rmind * Redistribution and use in source and binary forms, with or without
12 1.1.4.2 rmind * modification, are permitted provided that the following conditions
13 1.1.4.2 rmind * are met:
14 1.1.4.2 rmind * 1. Redistributions of source code must retain the above copyright
15 1.1.4.2 rmind * notice, this list of conditions and the following disclaimer.
16 1.1.4.2 rmind * 2. Redistributions in binary form must reproduce the above copyright
17 1.1.4.2 rmind * notice, this list of conditions and the following disclaimer in the
18 1.1.4.2 rmind * documentation and/or other materials provided with the distribution.
19 1.1.4.2 rmind *
20 1.1.4.2 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1.4.2 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1.4.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1.4.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1.4.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1.4.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1.4.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1.4.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1.4.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1.4.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1.4.2 rmind * POSSIBILITY OF SUCH DAMAGE.
31 1.1.4.2 rmind */
32 1.1.4.2 rmind
33 1.1.4.2 rmind #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
34 1.1.4.2 rmind __KERNEL_RCSID(0, "$NetBSD: gpio_ebus.c,v 1.1.4.2 2011/03/05 20:49:54 rmind Exp $");
35 1.1.4.2 rmind
36 1.1.4.2 rmind #include <sys/param.h>
37 1.1.4.2 rmind #include <sys/device.h>
38 1.1.4.2 rmind #include <sys/systm.h>
39 1.1.4.2 rmind #include <sys/gpio.h>
40 1.1.4.2 rmind #include <dev/gpio/gpiovar.h>
41 1.1.4.2 rmind
42 1.1.4.2 rmind #include <emips/ebus/ebusvar.h>
43 1.1.4.2 rmind #include <emips/emips/machdep.h>
44 1.1.4.2 rmind #include <machine/emipsreg.h>
45 1.1.4.2 rmind
46 1.1.4.2 rmind /*
47 1.1.4.2 rmind * Device softc
48 1.1.4.2 rmind */
49 1.1.4.2 rmind #define GPIO_NPINS 32
50 1.1.4.2 rmind
51 1.1.4.2 rmind struct epio_softc {
52 1.1.4.2 rmind struct device sc_dev;
53 1.1.4.2 rmind struct _Pio *sc_dp;
54 1.1.4.2 rmind struct gpio_chipset_tag sc_gpio_gc;
55 1.1.4.2 rmind gpio_pin_t sc_gpio_pins[GPIO_NPINS];
56 1.1.4.2 rmind };
57 1.1.4.2 rmind
58 1.1.4.2 rmind static int epio_ebus_match (struct device *, struct cfdata *, void *);
59 1.1.4.2 rmind static void epio_ebus_attach (struct device *, struct device *, void *);
60 1.1.4.2 rmind
61 1.1.4.2 rmind CFATTACH_DECL(epio, sizeof (struct epio_softc),
62 1.1.4.2 rmind epio_ebus_match, epio_ebus_attach, NULL, NULL);
63 1.1.4.2 rmind
64 1.1.4.2 rmind static int epio_pin_read(void *, int);
65 1.1.4.2 rmind static void epio_pin_write(void *, int, int);
66 1.1.4.2 rmind static void epio_pin_ctl(void *, int, int);
67 1.1.4.2 rmind
68 1.1.4.2 rmind static int
69 1.1.4.2 rmind epio_ebus_match(struct device *parent, struct cfdata *match, void *aux)
70 1.1.4.2 rmind {
71 1.1.4.2 rmind struct ebus_attach_args *ia = aux;
72 1.1.4.2 rmind struct _Pio *f = (struct _Pio *)ia->ia_vaddr;
73 1.1.4.2 rmind
74 1.1.4.2 rmind if (strcmp("gpio", ia->ia_name) != 0)
75 1.1.4.2 rmind return (0);
76 1.1.4.2 rmind if ((f == NULL) ||
77 1.1.4.2 rmind (f->Tag != PMTTAG_GPIO))
78 1.1.4.2 rmind return (0);
79 1.1.4.2 rmind
80 1.1.4.2 rmind return (1);
81 1.1.4.2 rmind }
82 1.1.4.2 rmind
83 1.1.4.2 rmind static void
84 1.1.4.2 rmind epio_ebus_attach(struct device *parent, struct device *self, void *aux)
85 1.1.4.2 rmind {
86 1.1.4.2 rmind struct ebus_attach_args *ia =aux;
87 1.1.4.2 rmind struct epio_softc *sc = (struct epio_softc *)self;
88 1.1.4.2 rmind struct gpiobus_attach_args gba;
89 1.1.4.2 rmind int i;
90 1.1.4.2 rmind uint32_t data;
91 1.1.4.2 rmind
92 1.1.4.2 rmind sc->sc_dp = (struct _Pio*)ia->ia_vaddr;
93 1.1.4.2 rmind data = sc->sc_dp->PinData;
94 1.1.4.2 rmind
95 1.1.4.2 rmind #if DEBUG
96 1.1.4.2 rmind printf(" virt=%p data=%zx", (void*)sc->sc_dp, data);
97 1.1.4.2 rmind #endif
98 1.1.4.2 rmind printf(": GPIO controller\n");
99 1.1.4.2 rmind
100 1.1.4.2 rmind /* BUGBUG Initialize pins properly */
101 1.1.4.2 rmind for (i = 0 ; i < GPIO_NPINS ; i++) {
102 1.1.4.2 rmind sc->sc_gpio_pins[i].pin_num = i;
103 1.1.4.2 rmind sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INOUT
104 1.1.4.2 rmind | GPIO_PIN_OPENDRAIN
105 1.1.4.2 rmind | GPIO_PIN_TRISTATE;
106 1.1.4.2 rmind
107 1.1.4.2 rmind /* current defaults */
108 1.1.4.2 rmind sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_INOUT;
109 1.1.4.2 rmind sc->sc_gpio_pins[i].pin_state = (data & (1 << i)) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
110 1.1.4.2 rmind sc->sc_gpio_pins[i].pin_mapped = 0;
111 1.1.4.2 rmind }
112 1.1.4.2 rmind
113 1.1.4.2 rmind /* Create controller tag */
114 1.1.4.2 rmind sc->sc_gpio_gc.gp_cookie = sc;
115 1.1.4.2 rmind sc->sc_gpio_gc.gp_pin_read = epio_pin_read;
116 1.1.4.2 rmind sc->sc_gpio_gc.gp_pin_write = epio_pin_write;
117 1.1.4.2 rmind sc->sc_gpio_gc.gp_pin_ctl = epio_pin_ctl;
118 1.1.4.2 rmind
119 1.1.4.2 rmind gba.gba_gc = &sc->sc_gpio_gc;
120 1.1.4.2 rmind gba.gba_pins = sc->sc_gpio_pins;
121 1.1.4.2 rmind gba.gba_npins = GPIO_NPINS;
122 1.1.4.2 rmind
123 1.1.4.2 rmind /* Attach GPIO framework */
124 1.1.4.2 rmind (void) config_found(&sc->sc_dev, &gba, gpiobus_print);
125 1.1.4.2 rmind }
126 1.1.4.2 rmind
127 1.1.4.2 rmind static int
128 1.1.4.2 rmind epio_pin_read(void *arg, int pin)
129 1.1.4.2 rmind {
130 1.1.4.2 rmind struct epio_softc *sc = arg;
131 1.1.4.2 rmind uint32_t data = sc->sc_dp->PinData;
132 1.1.4.2 rmind int p;
133 1.1.4.2 rmind
134 1.1.4.2 rmind p = pin % GPIO_NPINS;
135 1.1.4.2 rmind return (data >> p) & 0x01;
136 1.1.4.2 rmind }
137 1.1.4.2 rmind
138 1.1.4.2 rmind static void
139 1.1.4.2 rmind epio_pin_write(void *arg, int pin, int value)
140 1.1.4.2 rmind {
141 1.1.4.2 rmind struct epio_softc *sc = arg;
142 1.1.4.2 rmind uint32_t data;
143 1.1.4.2 rmind int p;
144 1.1.4.2 rmind
145 1.1.4.2 rmind p = pin % GPIO_NPINS;
146 1.1.4.2 rmind data = 1 << p;
147 1.1.4.2 rmind if (value)
148 1.1.4.2 rmind sc->sc_dp->PinData = data;
149 1.1.4.2 rmind else
150 1.1.4.2 rmind sc->sc_dp->ClearData = data;
151 1.1.4.2 rmind }
152 1.1.4.2 rmind
153 1.1.4.2 rmind static void
154 1.1.4.2 rmind epio_pin_ctl(void *arg, int pin, int flags)
155 1.1.4.2 rmind {
156 1.1.4.2 rmind struct epio_softc *sc = arg;
157 1.1.4.2 rmind uint32_t data;
158 1.1.4.2 rmind int p;
159 1.1.4.2 rmind
160 1.1.4.2 rmind p = pin % GPIO_NPINS;
161 1.1.4.2 rmind data = (1 << p);
162 1.1.4.2 rmind
163 1.1.4.2 rmind if (flags & GPIO_PIN_INOUT) {
164 1.1.4.2 rmind sc->sc_dp->Direction = data;
165 1.1.4.2 rmind }
166 1.1.4.2 rmind
167 1.1.4.2 rmind if (flags & GPIO_PIN_TRISTATE) {
168 1.1.4.2 rmind sc->sc_dp->OutDisable = data;
169 1.1.4.2 rmind }
170 1.1.4.2 rmind
171 1.1.4.2 rmind if (flags & GPIO_PIN_OPENDRAIN) {
172 1.1.4.2 rmind sc->sc_dp->Enable = data;
173 1.1.4.2 rmind }
174 1.1.4.2 rmind }
175