bus.h revision 1.1.14.1
1 /* $NetBSD: bus.h,v 1.1.14.1 2012/02/18 07:31:45 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _EMIPS_BUS_H_ 34 #define _EMIPS_BUS_H_ 35 36 #include <mips/locore.h> 37 38 /* 39 * Utility macros; do not use outside this file. 40 */ 41 #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS) 42 #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t) 43 44 /* 45 * Bus address and size types 46 */ 47 typedef u_long bus_addr_t; 48 typedef u_long bus_size_t; 49 50 /* 51 * Access methods for bus resources and address space. 52 */ 53 typedef int bus_space_tag_t; 54 typedef u_long bus_space_handle_t; 55 56 /* 57 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 58 * bus_size_t size, int flags, bus_space_handle_t *bshp); 59 * 60 * Map a region of bus space. 61 */ 62 63 #define BUS_SPACE_MAP_CACHEABLE 0x01 64 #define BUS_SPACE_MAP_LINEAR 0x02 65 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 66 67 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 68 int, bus_space_handle_t *); 69 70 /* 71 * void bus_space_unmap(bus_space_tag_t t, 72 * bus_space_handle_t bsh, bus_size_t size); 73 * 74 * Unmap a region of bus space. 75 */ 76 77 void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 78 79 /* 80 * int bus_space_subregion(bus_space_tag_t t, 81 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 82 * bus_space_handle_t *nbshp); 83 * 84 * Get a new handle for a subregion of an already-mapped area of bus space. 85 */ 86 87 int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, 88 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 89 90 /* 91 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 92 * bus_addr_t rend, bus_size_t size, bus_size_t align, 93 * bus_size_t boundary, int flags, bus_addr_t *addrp, 94 * bus_space_handle_t *bshp); 95 * 96 * Allocate a region of bus space. 97 */ 98 99 int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 100 bus_addr_t rend, bus_size_t size, bus_size_t align, 101 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 102 bus_space_handle_t *bshp); 103 104 /* 105 * int bus_space_free(bus_space_tag_t t, 106 * bus_space_handle_t bsh, bus_size_t size); 107 * 108 * Free a region of bus space. 109 */ 110 111 void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 112 bus_size_t size); 113 114 /* 115 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t); 116 * 117 * Get the kernel virtual address for the mapped bus space. 118 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR. 119 * (XXX not enforced) 120 */ 121 #define bus_space_vaddr(t, h) \ 122 ((void *)(h)) 123 124 /* 125 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 126 * bus_space_handle_t bsh, bus_size_t offset); 127 * 128 * Read a 1, 2, 4, or 8 byte quantity from bus space 129 * described by tag/handle/offset. 130 */ 131 132 #define bus_space_read_1(t, h, o) \ 133 ((void) t, (*(volatile u_int8_t *)((h) + (o)))) 134 135 #define bus_space_read_2(t, h, o) \ 136 ((void) t, (*(volatile u_int16_t *)((h) + (o)))) 137 138 #define bus_space_read_4(t, h, o) \ 139 ((void) t, (*(volatile u_int32_t *)((h) + (o)))) 140 141 #if 0 /* Cause a link error for bus_space_read_8 */ 142 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 143 #endif 144 145 /* 146 * void bus_space_read_multi_N(bus_space_tag_t tag, 147 * bus_space_handle_t bsh, bus_size_t offset, 148 * u_intN_t *addr, size_t count); 149 * 150 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 151 * described by tag/handle/offset and copy into buffer provided. 152 */ 153 154 #define __EMIPS_bus_space_read_multi(BYTES,BITS) \ 155 static __inline void __CONCAT(bus_space_read_multi_,BYTES) \ 156 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 157 __PB_TYPENAME(BITS) *, size_t); \ 158 \ 159 static __inline void \ 160 __CONCAT(bus_space_read_multi_,BYTES)( \ 161 bus_space_tag_t t, \ 162 bus_space_handle_t h, \ 163 bus_size_t o, \ 164 __PB_TYPENAME(BITS) *a, \ 165 size_t c) \ 166 { \ 167 \ 168 while (c--) \ 169 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 170 } 171 172 __EMIPS_bus_space_read_multi(1,8) 173 __EMIPS_bus_space_read_multi(2,16) 174 __EMIPS_bus_space_read_multi(4,32) 175 176 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 177 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 178 #endif 179 180 #undef __EMIPS_bus_space_read_multi 181 182 /* 183 * void bus_space_read_region_N(bus_space_tag_t tag, 184 * bus_space_handle_t bsh, bus_size_t offset, 185 * u_intN_t *addr, size_t count); 186 * 187 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 188 * described by tag/handle and starting at `offset' and copy into 189 * buffer provided. 190 */ 191 192 #define __EMIPS_bus_space_read_region(BYTES,BITS) \ 193 static __inline void __CONCAT(bus_space_read_region_,BYTES) \ 194 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 195 __PB_TYPENAME(BITS) *, size_t); \ 196 \ 197 static __inline void \ 198 __CONCAT(bus_space_read_region_,BYTES)( \ 199 bus_space_tag_t t, \ 200 bus_space_handle_t h, \ 201 bus_size_t o, \ 202 __PB_TYPENAME(BITS) *a, \ 203 size_t c) \ 204 { \ 205 \ 206 while (c--) { \ 207 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 208 o += BYTES; \ 209 } \ 210 } 211 212 __EMIPS_bus_space_read_region(1,8) 213 __EMIPS_bus_space_read_region(2,16) 214 __EMIPS_bus_space_read_region(4,32) 215 216 #if 0 /* Cause a link error for bus_space_read_region_8 */ 217 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 218 #endif 219 220 #undef __EMIPS_bus_space_read_region 221 222 /* 223 * void bus_space_write_N(bus_space_tag_t tag, 224 * bus_space_handle_t bsh, bus_size_t offset, 225 * u_intN_t value); 226 * 227 * Write the 1, 2, 4, or 8 byte value `value' to bus space 228 * described by tag/handle/offset. 229 */ 230 231 #define bus_space_write_1(t, h, o, v) \ 232 do { \ 233 (void) t; \ 234 *(volatile u_int8_t *)((h) + (o)) = (v); \ 235 wbflush(); /* XXX */ \ 236 } while (0) 237 238 #define bus_space_write_2(t, h, o, v) \ 239 do { \ 240 (void) t; \ 241 *(volatile u_int16_t *)((h) + (o)) = (v); \ 242 wbflush(); /* XXX */ \ 243 } while (0) 244 245 #define bus_space_write_4(t, h, o, v) \ 246 do { \ 247 (void) t; \ 248 *(volatile u_int32_t *)((h) + (o)) = (v); \ 249 wbflush(); /* XXX */ \ 250 } while (0) 251 252 #if 0 /* Cause a link error for bus_space_write_8 */ 253 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 254 #endif 255 256 /* 257 * void bus_space_write_multi_N(bus_space_tag_t tag, 258 * bus_space_handle_t bsh, bus_size_t offset, 259 * const u_intN_t *addr, size_t count); 260 * 261 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 262 * provided to bus space described by tag/handle/offset. 263 */ 264 265 #define __EMIPS_bus_space_write_multi(BYTES,BITS) \ 266 static __inline void __CONCAT(bus_space_write_multi_,BYTES) \ 267 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 268 __PB_TYPENAME(BITS) *, size_t); \ 269 \ 270 static __inline void \ 271 __CONCAT(bus_space_write_multi_,BYTES)( \ 272 bus_space_tag_t t, \ 273 bus_space_handle_t h, \ 274 bus_size_t o, \ 275 __PB_TYPENAME(BITS) *a, \ 276 size_t c) \ 277 { \ 278 \ 279 while (c--) \ 280 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 281 } 282 283 __EMIPS_bus_space_write_multi(1,8) 284 __EMIPS_bus_space_write_multi(2,16) 285 __EMIPS_bus_space_write_multi(4,32) 286 287 #if 0 /* Cause a link error for bus_space_write_8 */ 288 #define bus_space_write_multi_8(t, h, o, a, c) \ 289 !!! bus_space_write_multi_8 unimplimented !!! 290 #endif 291 292 #undef __EMIPS_bus_space_write_multi 293 294 /* 295 * void bus_space_write_region_N(bus_space_tag_t tag, 296 * bus_space_handle_t bsh, bus_size_t offset, 297 * const u_intN_t *addr, size_t count); 298 * 299 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 300 * to bus space described by tag/handle starting at `offset'. 301 */ 302 303 #define __EMIPS_bus_space_write_region(BYTES,BITS) \ 304 static __inline void __CONCAT(bus_space_write_region_,BYTES) \ 305 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 306 __PB_TYPENAME(BITS) *, size_t); \ 307 \ 308 static __inline void \ 309 __CONCAT(bus_space_write_region_,BYTES)( \ 310 bus_space_tag_t t, \ 311 bus_space_handle_t h, \ 312 bus_size_t o, \ 313 __PB_TYPENAME(BITS) *a, \ 314 size_t c) \ 315 { \ 316 \ 317 while (c--) { \ 318 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 319 o += BYTES; \ 320 } \ 321 } 322 323 __EMIPS_bus_space_write_region(1,8) 324 __EMIPS_bus_space_write_region(2,16) 325 __EMIPS_bus_space_write_region(4,32) 326 327 #if 0 /* Cause a link error for bus_space_write_region_8 */ 328 #define bus_space_write_region_8 \ 329 !!! bus_space_write_region_8 unimplemented !!! 330 #endif 331 332 #undef __EMIPS_bus_space_write_region 333 334 /* 335 * void bus_space_set_multi_N(bus_space_tag_t tag, 336 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 337 * size_t count); 338 * 339 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 340 * by tag/handle/offset `count' times. 341 */ 342 343 #define __EMIPS_bus_space_set_multi(BYTES,BITS) \ 344 static __inline void __CONCAT(bus_space_set_multi_,BYTES) \ 345 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 346 __PB_TYPENAME(BITS), size_t); \ 347 \ 348 static __inline void \ 349 __CONCAT(bus_space_set_multi_,BYTES)( \ 350 bus_space_tag_t t, \ 351 bus_space_handle_t h, \ 352 bus_size_t o, \ 353 __PB_TYPENAME(BITS) v, \ 354 size_t c) \ 355 { \ 356 \ 357 while (c--) \ 358 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 359 } 360 361 __EMIPS_bus_space_set_multi(1,8) 362 __EMIPS_bus_space_set_multi(2,16) 363 __EMIPS_bus_space_set_multi(4,32) 364 365 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 366 #define bus_space_set_multi_8 \ 367 !!! bus_space_set_multi_8 unimplemented !!! 368 #endif 369 370 #undef __EMIPS_bus_space_set_multi 371 372 /* 373 * void bus_space_set_region_N(bus_space_tag_t tag, 374 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 375 * size_t count); 376 * 377 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 378 * by tag/handle starting at `offset'. 379 */ 380 381 #define __EMIPS_bus_space_set_region(BYTES,BITS) \ 382 static __inline void __CONCAT(bus_space_set_region_,BYTES) \ 383 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 384 __PB_TYPENAME(BITS), size_t); \ 385 \ 386 static __inline void \ 387 __CONCAT(bus_space_set_region_,BYTES)( \ 388 bus_space_tag_t t, \ 389 bus_space_handle_t h, \ 390 bus_size_t o, \ 391 __PB_TYPENAME(BITS) v, \ 392 size_t c) \ 393 { \ 394 \ 395 while (c--) { \ 396 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 397 o += BYTES; \ 398 } \ 399 } 400 401 __EMIPS_bus_space_set_region(1,8) 402 __EMIPS_bus_space_set_region(2,16) 403 __EMIPS_bus_space_set_region(4,32) 404 405 #if 0 /* Cause a link error for bus_space_set_region_8 */ 406 #define bus_space_set_region_8 \ 407 !!! bus_space_set_region_8 unimplemented !!! 408 #endif 409 410 #undef __EMIPS_bus_space_set_region 411 412 /* 413 * void bus_space_copy_region_N(bus_space_tag_t tag, 414 * bus_space_handle_t bsh1, bus_size_t off1, 415 * bus_space_handle_t bsh2, bus_size_t off2, 416 * bus_size_t count); 417 * 418 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 419 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 420 */ 421 422 #define __EMIPS_copy_region(BYTES) \ 423 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 424 (bus_space_tag_t, \ 425 bus_space_handle_t bsh1, bus_size_t off1, \ 426 bus_space_handle_t bsh2, bus_size_t off2, \ 427 bus_size_t count); \ 428 \ 429 static __inline void \ 430 __CONCAT(bus_space_copy_region_,BYTES)( \ 431 bus_space_tag_t t, \ 432 bus_space_handle_t h1, \ 433 bus_size_t o1, \ 434 bus_space_handle_t h2, \ 435 bus_size_t o2, \ 436 bus_size_t c) \ 437 { \ 438 bus_size_t o; \ 439 \ 440 if ((h1 + o1) >= (h2 + o2)) { \ 441 /* src after dest: copy forward */ \ 442 for (o = 0; c != 0; c--, o += BYTES) \ 443 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 444 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 445 } else { \ 446 /* dest after src: copy backwards */ \ 447 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 448 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 449 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 450 } \ 451 } 452 453 __EMIPS_copy_region(1) 454 __EMIPS_copy_region(2) 455 __EMIPS_copy_region(4) 456 457 #if 0 /* Cause a link error for bus_space_copy_region_8 */ 458 #define bus_space_copy_region_8 \ 459 !!! bus_space_copy_region_8 unimplemented !!! 460 #endif 461 462 #undef __EMIPS_copy_region 463 464 /* 465 * Bus read/write barrier methods. 466 * 467 * void bus_space_barrier(bus_space_tag_t tag, 468 * bus_space_handle_t bsh, bus_size_t offset, 469 * bus_size_t len, int flags); 470 * 471 * On the MIPS, we just flush the write buffer. 472 */ 473 #define bus_space_barrier(t, h, o, l, f) \ 474 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \ 475 wbflush())) 476 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 477 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 478 479 #undef __PB_TYPENAME_PREFIX 480 #undef __PB_TYPENAME 481 482 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 483 484 /* 485 * Flags used in various bus DMA methods. 486 */ 487 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 488 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 489 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 490 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 491 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 492 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 493 #define BUS_DMA_BUS2 0x020 494 #define BUS_DMA_BUS3 0x040 495 #define BUS_DMA_BUS4 0x080 496 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 497 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 498 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 499 500 #define EMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 501 502 /* Forwards needed by prototypes below. */ 503 struct mbuf; 504 struct uio; 505 506 /* 507 * Operations performed by bus_dmamap_sync(). 508 */ 509 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 510 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 511 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 512 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 513 514 typedef struct emips_bus_dma_tag *bus_dma_tag_t; 515 typedef struct emips_bus_dmamap *bus_dmamap_t; 516 517 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 518 519 /* 520 * bus_dma_segment_t 521 * 522 * Describes a single contiguous DMA transaction. Values 523 * are suitable for programming into DMA registers. 524 */ 525 struct emips_bus_dma_segment { 526 bus_addr_t ds_addr; /* DMA address */ 527 bus_size_t ds_len; /* length of transfer */ 528 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 529 }; 530 typedef struct emips_bus_dma_segment bus_dma_segment_t; 531 532 /* 533 * bus_dma_tag_t 534 * 535 * A machine-dependent opaque type describing the implementation of 536 * DMA for a given bus. 537 */ 538 539 struct emips_bus_dma_tag { 540 /* 541 * DMA mapping methods. 542 */ 543 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 544 bus_size_t, bus_size_t, int, bus_dmamap_t *); 545 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 546 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 547 bus_size_t, struct proc *, int); 548 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 549 struct mbuf *, int); 550 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 551 struct uio *, int); 552 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 553 bus_dma_segment_t *, int, bus_size_t, int); 554 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 555 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 556 bus_addr_t, bus_size_t, int); 557 558 /* 559 * DMA memory utility functions. 560 */ 561 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 562 bus_size_t, bus_dma_segment_t *, int, int *, int); 563 void (*_dmamem_free)(bus_dma_tag_t, 564 bus_dma_segment_t *, int); 565 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 566 int, size_t, void **, int); 567 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 568 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 569 int, off_t, int, int); 570 }; 571 572 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 573 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 574 #define bus_dmamap_destroy(t, p) \ 575 (*(t)->_dmamap_destroy)((t), (p)) 576 #define bus_dmamap_load(t, m, b, s, p, f) \ 577 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 578 #define bus_dmamap_load_mbuf(t, m, b, f) \ 579 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 580 #define bus_dmamap_load_uio(t, m, u, f) \ 581 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 582 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 583 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 584 #define bus_dmamap_unload(t, p) \ 585 (*(t)->_dmamap_unload)((t), (p)) 586 #define bus_dmamap_sync(t, p, o, l, ops) \ 587 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 588 589 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 590 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 591 #define bus_dmamem_free(t, sg, n) \ 592 (*(t)->_dmamem_free)((t), (sg), (n)) 593 #define bus_dmamem_map(t, sg, n, s, k, f) \ 594 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 595 #define bus_dmamem_unmap(t, k, s) \ 596 (*(t)->_dmamem_unmap)((t), (k), (s)) 597 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 598 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 599 600 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 601 #define bus_dmatag_destroy(t) 602 603 /* 604 * bus_dmamap_t 605 * 606 * Describes a DMA mapping. 607 */ 608 struct emips_bus_dmamap { 609 /* 610 * PRIVATE MEMBERS: not for use my machine-independent code. 611 */ 612 bus_size_t _dm_size; /* largest DMA transfer mappable */ 613 int _dm_segcnt; /* number of segs this map can map */ 614 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 615 bus_size_t _dm_boundary; /* don't cross this */ 616 int _dm_flags; /* misc. flags */ 617 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 618 619 /* 620 * PUBLIC MEMBERS: these are used by machine-independent code. 621 */ 622 bus_size_t dm_maxsegsz; /* largest possible segment */ 623 bus_size_t dm_mapsize; /* size of the mapping */ 624 int dm_nsegs; /* # valid segments in mapping */ 625 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 626 }; 627 628 #ifdef _EMIPS_BUS_DMA_PRIVATE 629 void emips_bus_dma_init(void); 630 631 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 632 bus_size_t, int, bus_dmamap_t *); 633 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 634 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 635 bus_size_t, struct proc *, int); 636 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 637 struct mbuf *, int); 638 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 639 struct uio *, int); 640 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 641 bus_dma_segment_t *, int, bus_size_t, int); 642 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 643 void _bus_dmamap_sync_r3k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 644 bus_size_t, int); 645 void _bus_dmamap_sync_r4k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 646 bus_size_t, int); 647 648 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 649 bus_size_t alignment, bus_size_t boundary, 650 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 651 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 652 int nsegs); 653 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 654 int nsegs, size_t size, void **kvap, int flags); 655 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 656 size_t size); 657 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 658 int nsegs, off_t off, int prot, int flags); 659 660 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 661 bus_size_t alignment, bus_size_t boundary, 662 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 663 vaddr_t low, vaddr_t high); 664 665 extern struct emips_bus_dma_tag emips_default_bus_dma_tag; 666 #endif /* _EMIPS_BUS_DMA_PRIVATE */ 667 668 #endif /* !_EMIPS_BUS_H_ */ 669
Indexes created Sat Oct 25 16:10:12 GMT 2025