bus.h revision 1.2.48.2
1 /* $NetBSD: bus.h,v 1.2.48.2 2020/04/13 08:03:41 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _EMIPS_BUS_H_ 34 #define _EMIPS_BUS_H_ 35 36 #include <mips/locore.h> 37 38 /* 39 * Utility macros; do not use outside this file. 40 */ 41 #define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS) 42 #define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t) 43 44 /* 45 * Bus address and size types 46 */ 47 typedef u_long bus_addr_t; 48 typedef u_long bus_size_t; 49 50 #define PRIxBUSADDR "lx" 51 #define PRIxBUSSIZE "lx" 52 #define PRIuBUSSIZE "lu" 53 /* 54 * Access methods for bus resources and address space. 55 */ 56 typedef int bus_space_tag_t; 57 typedef u_long bus_space_handle_t; 58 59 #define PRIxBSH "lx" 60 61 /* 62 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr, 63 * bus_size_t size, int flags, bus_space_handle_t *bshp); 64 * 65 * Map a region of bus space. 66 */ 67 68 #define BUS_SPACE_MAP_CACHEABLE 0x01 69 #define BUS_SPACE_MAP_LINEAR 0x02 70 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 71 72 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, 73 int, bus_space_handle_t *); 74 75 /* 76 * void bus_space_unmap(bus_space_tag_t t, 77 * bus_space_handle_t bsh, bus_size_t size); 78 * 79 * Unmap a region of bus space. 80 */ 81 82 void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 83 84 /* 85 * int bus_space_subregion(bus_space_tag_t t, 86 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, 87 * bus_space_handle_t *nbshp); 88 * 89 * Get a new handle for a subregion of an already-mapped area of bus space. 90 */ 91 92 int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh, 93 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 94 95 /* 96 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart, 97 * bus_addr_t rend, bus_size_t size, bus_size_t align, 98 * bus_size_t boundary, int flags, bus_addr_t *addrp, 99 * bus_space_handle_t *bshp); 100 * 101 * Allocate a region of bus space. 102 */ 103 104 int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart, 105 bus_addr_t rend, bus_size_t size, bus_size_t align, 106 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 107 bus_space_handle_t *bshp); 108 109 /* 110 * int bus_space_free(bus_space_tag_t t, 111 * bus_space_handle_t bsh, bus_size_t size); 112 * 113 * Free a region of bus space. 114 */ 115 116 void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh, 117 bus_size_t size); 118 119 /* 120 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t); 121 * 122 * Get the kernel virtual address for the mapped bus space. 123 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR. 124 * (XXX not enforced) 125 */ 126 #define bus_space_vaddr(t, h) \ 127 ((void *)(h)) 128 129 /* 130 * u_intN_t bus_space_read_N(bus_space_tag_t tag, 131 * bus_space_handle_t bsh, bus_size_t offset); 132 * 133 * Read a 1, 2, 4, or 8 byte quantity from bus space 134 * described by tag/handle/offset. 135 */ 136 137 #define bus_space_read_1(t, h, o) \ 138 ((void) t, (*(volatile u_int8_t *)((h) + (o)))) 139 140 #define bus_space_read_2(t, h, o) \ 141 ((void) t, (*(volatile u_int16_t *)((h) + (o)))) 142 143 #define bus_space_read_4(t, h, o) \ 144 ((void) t, (*(volatile u_int32_t *)((h) + (o)))) 145 146 #if 0 /* Cause a link error for bus_space_read_8 */ 147 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 148 #endif 149 150 /* 151 * void bus_space_read_multi_N(bus_space_tag_t tag, 152 * bus_space_handle_t bsh, bus_size_t offset, 153 * u_intN_t *addr, size_t count); 154 * 155 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 156 * described by tag/handle/offset and copy into buffer provided. 157 */ 158 159 #define __EMIPS_bus_space_read_multi(BYTES,BITS) \ 160 static __inline void __CONCAT(bus_space_read_multi_,BYTES) \ 161 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 162 __PB_TYPENAME(BITS) *, size_t); \ 163 \ 164 static __inline void \ 165 __CONCAT(bus_space_read_multi_,BYTES)( \ 166 bus_space_tag_t t, \ 167 bus_space_handle_t h, \ 168 bus_size_t o, \ 169 __PB_TYPENAME(BITS) *a, \ 170 size_t c) \ 171 { \ 172 \ 173 while (c--) \ 174 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 175 } 176 177 __EMIPS_bus_space_read_multi(1,8) 178 __EMIPS_bus_space_read_multi(2,16) 179 __EMIPS_bus_space_read_multi(4,32) 180 181 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 182 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 183 #endif 184 185 #undef __EMIPS_bus_space_read_multi 186 187 /* 188 * void bus_space_read_region_N(bus_space_tag_t tag, 189 * bus_space_handle_t bsh, bus_size_t offset, 190 * u_intN_t *addr, size_t count); 191 * 192 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 193 * described by tag/handle and starting at `offset' and copy into 194 * buffer provided. 195 */ 196 197 #define __EMIPS_bus_space_read_region(BYTES,BITS) \ 198 static __inline void __CONCAT(bus_space_read_region_,BYTES) \ 199 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 200 __PB_TYPENAME(BITS) *, size_t); \ 201 \ 202 static __inline void \ 203 __CONCAT(bus_space_read_region_,BYTES)( \ 204 bus_space_tag_t t, \ 205 bus_space_handle_t h, \ 206 bus_size_t o, \ 207 __PB_TYPENAME(BITS) *a, \ 208 size_t c) \ 209 { \ 210 \ 211 while (c--) { \ 212 *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \ 213 o += BYTES; \ 214 } \ 215 } 216 217 __EMIPS_bus_space_read_region(1,8) 218 __EMIPS_bus_space_read_region(2,16) 219 __EMIPS_bus_space_read_region(4,32) 220 221 #if 0 /* Cause a link error for bus_space_read_region_8 */ 222 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 223 #endif 224 225 #undef __EMIPS_bus_space_read_region 226 227 /* 228 * void bus_space_write_N(bus_space_tag_t tag, 229 * bus_space_handle_t bsh, bus_size_t offset, 230 * u_intN_t value); 231 * 232 * Write the 1, 2, 4, or 8 byte value `value' to bus space 233 * described by tag/handle/offset. 234 */ 235 236 #define bus_space_write_1(t, h, o, v) \ 237 do { \ 238 (void) t; \ 239 *(volatile u_int8_t *)((h) + (o)) = (v); \ 240 wbflush(); /* XXX */ \ 241 } while (0) 242 243 #define bus_space_write_2(t, h, o, v) \ 244 do { \ 245 (void) t; \ 246 *(volatile u_int16_t *)((h) + (o)) = (v); \ 247 wbflush(); /* XXX */ \ 248 } while (0) 249 250 #define bus_space_write_4(t, h, o, v) \ 251 do { \ 252 (void) t; \ 253 *(volatile u_int32_t *)((h) + (o)) = (v); \ 254 wbflush(); /* XXX */ \ 255 } while (0) 256 257 #if 0 /* Cause a link error for bus_space_write_8 */ 258 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 259 #endif 260 261 /* 262 * void bus_space_write_multi_N(bus_space_tag_t tag, 263 * bus_space_handle_t bsh, bus_size_t offset, 264 * const u_intN_t *addr, size_t count); 265 * 266 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 267 * provided to bus space described by tag/handle/offset. 268 */ 269 270 #define __EMIPS_bus_space_write_multi(BYTES,BITS) \ 271 static __inline void __CONCAT(bus_space_write_multi_,BYTES) \ 272 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 273 __PB_TYPENAME(BITS) *, size_t); \ 274 \ 275 static __inline void \ 276 __CONCAT(bus_space_write_multi_,BYTES)( \ 277 bus_space_tag_t t, \ 278 bus_space_handle_t h, \ 279 bus_size_t o, \ 280 __PB_TYPENAME(BITS) *a, \ 281 size_t c) \ 282 { \ 283 \ 284 while (c--) \ 285 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 286 } 287 288 __EMIPS_bus_space_write_multi(1,8) 289 __EMIPS_bus_space_write_multi(2,16) 290 __EMIPS_bus_space_write_multi(4,32) 291 292 #if 0 /* Cause a link error for bus_space_write_8 */ 293 #define bus_space_write_multi_8(t, h, o, a, c) \ 294 !!! bus_space_write_multi_8 unimplemented !!! 295 #endif 296 297 #undef __EMIPS_bus_space_write_multi 298 299 /* 300 * void bus_space_write_region_N(bus_space_tag_t tag, 301 * bus_space_handle_t bsh, bus_size_t offset, 302 * const u_intN_t *addr, size_t count); 303 * 304 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 305 * to bus space described by tag/handle starting at `offset'. 306 */ 307 308 #define __EMIPS_bus_space_write_region(BYTES,BITS) \ 309 static __inline void __CONCAT(bus_space_write_region_,BYTES) \ 310 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 311 __PB_TYPENAME(BITS) *, size_t); \ 312 \ 313 static __inline void \ 314 __CONCAT(bus_space_write_region_,BYTES)( \ 315 bus_space_tag_t t, \ 316 bus_space_handle_t h, \ 317 bus_size_t o, \ 318 __PB_TYPENAME(BITS) *a, \ 319 size_t c) \ 320 { \ 321 \ 322 while (c--) { \ 323 __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \ 324 o += BYTES; \ 325 } \ 326 } 327 328 __EMIPS_bus_space_write_region(1,8) 329 __EMIPS_bus_space_write_region(2,16) 330 __EMIPS_bus_space_write_region(4,32) 331 332 #if 0 /* Cause a link error for bus_space_write_region_8 */ 333 #define bus_space_write_region_8 \ 334 !!! bus_space_write_region_8 unimplemented !!! 335 #endif 336 337 #undef __EMIPS_bus_space_write_region 338 339 /* 340 * void bus_space_set_multi_N(bus_space_tag_t tag, 341 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 342 * size_t count); 343 * 344 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 345 * by tag/handle/offset `count' times. 346 */ 347 348 #define __EMIPS_bus_space_set_multi(BYTES,BITS) \ 349 static __inline void __CONCAT(bus_space_set_multi_,BYTES) \ 350 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 351 __PB_TYPENAME(BITS), size_t); \ 352 \ 353 static __inline void \ 354 __CONCAT(bus_space_set_multi_,BYTES)( \ 355 bus_space_tag_t t, \ 356 bus_space_handle_t h, \ 357 bus_size_t o, \ 358 __PB_TYPENAME(BITS) v, \ 359 size_t c) \ 360 { \ 361 \ 362 while (c--) \ 363 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 364 } 365 366 __EMIPS_bus_space_set_multi(1,8) 367 __EMIPS_bus_space_set_multi(2,16) 368 __EMIPS_bus_space_set_multi(4,32) 369 370 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 371 #define bus_space_set_multi_8 \ 372 !!! bus_space_set_multi_8 unimplemented !!! 373 #endif 374 375 #undef __EMIPS_bus_space_set_multi 376 377 /* 378 * void bus_space_set_region_N(bus_space_tag_t tag, 379 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 380 * size_t count); 381 * 382 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 383 * by tag/handle starting at `offset'. 384 */ 385 386 #define __EMIPS_bus_space_set_region(BYTES,BITS) \ 387 static __inline void __CONCAT(bus_space_set_region_,BYTES) \ 388 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \ 389 __PB_TYPENAME(BITS), size_t); \ 390 \ 391 static __inline void \ 392 __CONCAT(bus_space_set_region_,BYTES)( \ 393 bus_space_tag_t t, \ 394 bus_space_handle_t h, \ 395 bus_size_t o, \ 396 __PB_TYPENAME(BITS) v, \ 397 size_t c) \ 398 { \ 399 \ 400 while (c--) { \ 401 __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \ 402 o += BYTES; \ 403 } \ 404 } 405 406 __EMIPS_bus_space_set_region(1,8) 407 __EMIPS_bus_space_set_region(2,16) 408 __EMIPS_bus_space_set_region(4,32) 409 410 #if 0 /* Cause a link error for bus_space_set_region_8 */ 411 #define bus_space_set_region_8 \ 412 !!! bus_space_set_region_8 unimplemented !!! 413 #endif 414 415 #undef __EMIPS_bus_space_set_region 416 417 /* 418 * void bus_space_copy_region_N(bus_space_tag_t tag, 419 * bus_space_handle_t bsh1, bus_size_t off1, 420 * bus_space_handle_t bsh2, bus_size_t off2, 421 * bus_size_t count); 422 * 423 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 424 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 425 */ 426 427 #define __EMIPS_copy_region(BYTES) \ 428 static __inline void __CONCAT(bus_space_copy_region_,BYTES) \ 429 (bus_space_tag_t, \ 430 bus_space_handle_t bsh1, bus_size_t off1, \ 431 bus_space_handle_t bsh2, bus_size_t off2, \ 432 bus_size_t count); \ 433 \ 434 static __inline void \ 435 __CONCAT(bus_space_copy_region_,BYTES)( \ 436 bus_space_tag_t t, \ 437 bus_space_handle_t h1, \ 438 bus_size_t o1, \ 439 bus_space_handle_t h2, \ 440 bus_size_t o2, \ 441 bus_size_t c) \ 442 { \ 443 bus_size_t o; \ 444 \ 445 if ((h1 + o1) >= (h2 + o2)) { \ 446 /* src after dest: copy forward */ \ 447 for (o = 0; c != 0; c--, o += BYTES) \ 448 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 449 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 450 } else { \ 451 /* dest after src: copy backwards */ \ 452 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \ 453 __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \ 454 __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \ 455 } \ 456 } 457 458 __EMIPS_copy_region(1) 459 __EMIPS_copy_region(2) 460 __EMIPS_copy_region(4) 461 462 #if 0 /* Cause a link error for bus_space_copy_region_8 */ 463 #define bus_space_copy_region_8 \ 464 !!! bus_space_copy_region_8 unimplemented !!! 465 #endif 466 467 #undef __EMIPS_copy_region 468 469 /* 470 * Bus read/write barrier methods. 471 * 472 * void bus_space_barrier(bus_space_tag_t tag, 473 * bus_space_handle_t bsh, bus_size_t offset, 474 * bus_size_t len, int flags); 475 * 476 * On the MIPS, we just flush the write buffer. 477 */ 478 #define bus_space_barrier(t, h, o, l, f) \ 479 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \ 480 wbflush())) 481 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 482 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 483 484 #undef __PB_TYPENAME_PREFIX 485 #undef __PB_TYPENAME 486 487 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 488 489 /* 490 * Flags used in various bus DMA methods. 491 */ 492 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 493 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 494 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 495 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 496 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 497 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 498 #define BUS_DMA_BUS2 0x020 499 #define BUS_DMA_BUS3 0x040 500 #define BUS_DMA_BUS4 0x080 501 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 502 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 503 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 504 505 #define EMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 506 507 /* Forwards needed by prototypes below. */ 508 struct mbuf; 509 struct uio; 510 511 /* 512 * Operations performed by bus_dmamap_sync(). 513 */ 514 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 515 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 516 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 517 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 518 519 typedef struct emips_bus_dma_tag *bus_dma_tag_t; 520 typedef struct emips_bus_dmamap *bus_dmamap_t; 521 522 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 523 524 /* 525 * bus_dma_segment_t 526 * 527 * Describes a single contiguous DMA transaction. Values 528 * are suitable for programming into DMA registers. 529 */ 530 struct emips_bus_dma_segment { 531 bus_addr_t ds_addr; /* DMA address */ 532 bus_size_t ds_len; /* length of transfer */ 533 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 534 }; 535 typedef struct emips_bus_dma_segment bus_dma_segment_t; 536 537 /* 538 * bus_dma_tag_t 539 * 540 * A machine-dependent opaque type describing the implementation of 541 * DMA for a given bus. 542 */ 543 544 struct emips_bus_dma_tag { 545 /* 546 * DMA mapping methods. 547 */ 548 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 549 bus_size_t, bus_size_t, int, bus_dmamap_t *); 550 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 551 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 552 bus_size_t, struct proc *, int); 553 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 554 struct mbuf *, int); 555 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 556 struct uio *, int); 557 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 558 bus_dma_segment_t *, int, bus_size_t, int); 559 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 560 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 561 bus_addr_t, bus_size_t, int); 562 563 /* 564 * DMA memory utility functions. 565 */ 566 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 567 bus_size_t, bus_dma_segment_t *, int, int *, int); 568 void (*_dmamem_free)(bus_dma_tag_t, 569 bus_dma_segment_t *, int); 570 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 571 int, size_t, void **, int); 572 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 573 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 574 int, off_t, int, int); 575 }; 576 577 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 578 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 579 #define bus_dmamap_destroy(t, p) \ 580 (*(t)->_dmamap_destroy)((t), (p)) 581 #define bus_dmamap_load(t, m, b, s, p, f) \ 582 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 583 #define bus_dmamap_load_mbuf(t, m, b, f) \ 584 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 585 #define bus_dmamap_load_uio(t, m, u, f) \ 586 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 587 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 588 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 589 #define bus_dmamap_unload(t, p) \ 590 (*(t)->_dmamap_unload)((t), (p)) 591 #define bus_dmamap_sync(t, p, o, l, ops) \ 592 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 593 594 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 595 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 596 #define bus_dmamem_free(t, sg, n) \ 597 (*(t)->_dmamem_free)((t), (sg), (n)) 598 #define bus_dmamem_map(t, sg, n, s, k, f) \ 599 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 600 #define bus_dmamem_unmap(t, k, s) \ 601 (*(t)->_dmamem_unmap)((t), (k), (s)) 602 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 603 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 604 605 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 606 #define bus_dmatag_destroy(t) 607 608 /* 609 * bus_dmamap_t 610 * 611 * Describes a DMA mapping. 612 */ 613 struct emips_bus_dmamap { 614 /* 615 * PRIVATE MEMBERS: not for use my machine-independent code. 616 */ 617 bus_size_t _dm_size; /* largest DMA transfer mappable */ 618 int _dm_segcnt; /* number of segs this map can map */ 619 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 620 bus_size_t _dm_boundary; /* don't cross this */ 621 int _dm_flags; /* misc. flags */ 622 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 623 624 /* 625 * PUBLIC MEMBERS: these are used by machine-independent code. 626 */ 627 bus_size_t dm_maxsegsz; /* largest possible segment */ 628 bus_size_t dm_mapsize; /* size of the mapping */ 629 int dm_nsegs; /* # valid segments in mapping */ 630 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 631 }; 632 633 #ifdef _EMIPS_BUS_DMA_PRIVATE 634 void emips_bus_dma_init(void); 635 636 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 637 bus_size_t, int, bus_dmamap_t *); 638 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 639 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 640 bus_size_t, struct proc *, int); 641 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 642 struct mbuf *, int); 643 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 644 struct uio *, int); 645 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 646 bus_dma_segment_t *, int, bus_size_t, int); 647 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 648 void _bus_dmamap_sync_r3k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 649 bus_size_t, int); 650 void _bus_dmamap_sync_r4k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 651 bus_size_t, int); 652 653 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 654 bus_size_t alignment, bus_size_t boundary, 655 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 656 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 657 int nsegs); 658 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 659 int nsegs, size_t size, void **kvap, int flags); 660 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 661 size_t size); 662 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 663 int nsegs, off_t off, int prot, int flags); 664 665 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 666 bus_size_t alignment, bus_size_t boundary, 667 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 668 vaddr_t low, vaddr_t high); 669 670 extern struct emips_bus_dma_tag emips_default_bus_dma_tag; 671 #endif /* _EMIPS_BUS_DMA_PRIVATE */ 672 673 #endif /* !_EMIPS_BUS_H_ */ 674
Indexes created Sat Oct 25 10:09:55 GMT 2025