Home | History | Annotate | Line # | Download | only in ldd
cpu.h revision 1.1.4.2
      1  1.1.4.2  tls /*	$NetBSD: cpu.h,v 1.1.4.2 2013/06/23 06:20:03 tls Exp $	*/
      2  1.1.4.2  tls /*
      3  1.1.4.2  tls  * Copyright (c) 2013 KIYOHARA Takashi
      4  1.1.4.2  tls  * All rights reserved.
      5  1.1.4.2  tls  *
      6  1.1.4.2  tls  * Redistribution and use in source and binary forms, with or without
      7  1.1.4.2  tls  * modification, are permitted provided that the following conditions
      8  1.1.4.2  tls  * are met:
      9  1.1.4.2  tls  * 1. Redistributions of source code must retain the above copyright
     10  1.1.4.2  tls  *    notice, this list of conditions and the following disclaimer.
     11  1.1.4.2  tls  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1.4.2  tls  *    notice, this list of conditions and the following disclaimer in the
     13  1.1.4.2  tls  *    documentation and/or other materials provided with the distribution.
     14  1.1.4.2  tls  *
     15  1.1.4.2  tls  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  1.1.4.2  tls  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     17  1.1.4.2  tls  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     18  1.1.4.2  tls  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     19  1.1.4.2  tls  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     20  1.1.4.2  tls  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     21  1.1.4.2  tls  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  1.1.4.2  tls  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     23  1.1.4.2  tls  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     24  1.1.4.2  tls  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     25  1.1.4.2  tls  * POSSIBILITY OF SUCH DAMAGE.
     26  1.1.4.2  tls  */
     27  1.1.4.2  tls 
     28  1.1.4.2  tls class CPU {
     29  1.1.4.2  tls public:
     30  1.1.4.2  tls 	virtual void cacheFlush(void);
     31  1.1.4.2  tls 	virtual void tlbFlush(void);
     32  1.1.4.2  tls };
     33  1.1.4.2  tls 
     34  1.1.4.2  tls class ARM7 : public CPU {
     35  1.1.4.2  tls public:
     36  1.1.4.2  tls 	void cacheFlush(void);
     37  1.1.4.2  tls 	void tlbFlush(void);
     38  1.1.4.2  tls };
     39  1.1.4.2  tls 
     40  1.1.4.2  tls class ARM7TDMI : public CPU {
     41  1.1.4.2  tls public:
     42  1.1.4.2  tls 	void cacheFlush(void);
     43  1.1.4.2  tls 	void tlbFlush(void);
     44  1.1.4.2  tls };
     45  1.1.4.2  tls 
     46  1.1.4.2  tls class SA1100 : public CPU {
     47  1.1.4.2  tls 	void cacheFlush(void);
     48  1.1.4.2  tls 	void tlbFlush(void);
     49  1.1.4.2  tls };
     50