brh_machdep.c revision 1.10 1 /* $NetBSD: brh_machdep.c,v 1.10 2003/05/03 18:25:31 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for the ADI Engineering
72 * BRH i80200 evaluation platform.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88
89 #include <uvm/uvm_extern.h>
90
91 #include <dev/cons.h>
92
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102
103 #include <arm/arm32/machdep.h>
104
105 #include <arm/xscale/i80200reg.h>
106 #include <arm/xscale/i80200var.h>
107
108 #include <dev/pci/ppbreg.h>
109
110 #include <arm/xscale/beccreg.h>
111 #include <arm/xscale/beccvar.h>
112
113 #include <evbarm/adi_brh/brhreg.h>
114 #include <evbarm/adi_brh/brhvar.h>
115 #include <evbarm/adi_brh/obiovar.h>
116
117 #include "opt_ipkdb.h"
118 #include "ksyms.h"
119
120 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
121 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
122
123 /*
124 * Address to call from cpu_reset() to reset the machine.
125 * This is machine architecture dependant as it varies depending
126 * on where the ROM appears when you turn the MMU off.
127 */
128
129 u_int cpu_reset_address = 0x00000000;
130
131 /* Define various stack sizes in pages */
132 #define IRQ_STACK_SIZE 1
133 #define ABT_STACK_SIZE 1
134 #ifdef IPKDB
135 #define UND_STACK_SIZE 2
136 #else
137 #define UND_STACK_SIZE 1
138 #endif
139
140 BootConfig bootconfig; /* Boot config storage */
141 char *boot_args = NULL;
142 char *boot_file = NULL;
143
144 vm_offset_t physical_start;
145 vm_offset_t physical_freestart;
146 vm_offset_t physical_freeend;
147 vm_offset_t physical_end;
148 u_int free_pages;
149 vm_offset_t pagetables_start;
150 int physmem = 0;
151
152 /*int debug_flags;*/
153 #ifndef PMAP_STATIC_L1S
154 int max_processes = 64; /* Default number */
155 #endif /* !PMAP_STATIC_L1S */
156
157 /* Physical and virtual addresses for some global pages */
158 pv_addr_t systempage;
159 pv_addr_t irqstack;
160 pv_addr_t undstack;
161 pv_addr_t abtstack;
162 pv_addr_t kernelstack;
163 pv_addr_t minidataclean;
164
165 vm_offset_t msgbufphys;
166
167 extern u_int data_abort_handler_address;
168 extern u_int prefetch_abort_handler_address;
169 extern u_int undefined_handler_address;
170
171 #ifdef PMAP_DEBUG
172 extern int pmap_debug_level;
173 #endif
174
175 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
176
177 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
178 #define KERNEL_PT_KERNEL_NUM 2
179
180 /* L2 tables for mapping kernel VM */
181 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
182 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
183 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
184
185 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
186
187 struct user *proc0paddr;
188
189 /* Prototypes */
190
191 void consinit(void);
192
193 #include "com.h"
194 #if NCOM > 0
195 #include <dev/ic/comreg.h>
196 #include <dev/ic/comvar.h>
197 #endif
198
199 /*
200 * Define the default console speed for the board. This is generally
201 * what the firmware provided with the board defaults to.
202 */
203 #ifndef CONSPEED
204 #define CONSPEED B57600
205 #endif /* ! CONSPEED */
206
207 #ifndef CONUNIT
208 #define CONUNIT 0
209 #endif
210
211 #ifndef CONMODE
212 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
213 #endif
214
215 int comcnspeed = CONSPEED;
216 int comcnmode = CONMODE;
217 int comcnunit = CONUNIT;
218
219 /*
220 * void cpu_reboot(int howto, char *bootstr)
221 *
222 * Reboots the system
223 *
224 * Deal with any syncing, unmounting, dumping and shutdown hooks,
225 * then reset the CPU.
226 */
227 void
228 cpu_reboot(int howto, char *bootstr)
229 {
230 #ifdef DIAGNOSTIC
231 /* info */
232 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
233 #endif
234
235 /*
236 * If we are still cold then hit the air brakes
237 * and crash to earth fast
238 */
239 if (cold) {
240 doshutdownhooks();
241 printf("The operating system has halted.\n");
242 printf("Please press any key to reboot.\n\n");
243 cngetc();
244 printf("rebooting...\n");
245 goto reset;
246 }
247
248 /* Disable console buffering */
249
250 /*
251 * If RB_NOSYNC was not specified sync the discs.
252 * Note: Unless cold is set to 1 here, syslogd will die during the
253 * unmount. It looks like syslogd is getting woken up only to find
254 * that it cannot page part of the binary in as the filesystem has
255 * been unmounted.
256 */
257 if (!(howto & RB_NOSYNC))
258 bootsync();
259
260 /* Say NO to interrupts */
261 splhigh();
262
263 /* Do a dump if requested. */
264 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
265 dumpsys();
266
267 /* Run any shutdown hooks */
268 doshutdownhooks();
269
270 /* Make sure IRQ's are disabled */
271 IRQdisable;
272
273 if (howto & RB_HALT) {
274 brh_7seg('8');
275 printf("The operating system has halted.\n");
276 printf("Please press any key to reboot.\n\n");
277 cngetc();
278 }
279
280 printf("rebooting...\n\r");
281 reset:
282 cpu_reset();
283 }
284
285 /*
286 * Mapping table for core kernel memory. This memory is mapped at init
287 * time with section mappings.
288 */
289 struct l1_sec_map {
290 vaddr_t va;
291 vaddr_t pa;
292 vsize_t size;
293 vm_prot_t prot;
294 int cache;
295 } l1_sec_table[] = {
296 {
297 BRH_PCI_CONF_VBASE,
298 BECC_PCI_CONF_BASE,
299 BRH_PCI_CONF_VSIZE,
300 VM_PROT_READ|VM_PROT_WRITE,
301 PTE_NOCACHE,
302 },
303 {
304 BRH_PCI_MEM1_VBASE,
305 BECC_PCI_MEM1_BASE,
306 BRH_PCI_MEM1_VSIZE,
307 VM_PROT_READ|VM_PROT_WRITE,
308 PTE_NOCACHE,
309 },
310 {
311 BRH_PCI_MEM2_VBASE,
312 BECC_PCI_MEM2_BASE,
313 BRH_PCI_MEM2_VSIZE,
314 VM_PROT_READ|VM_PROT_WRITE,
315 PTE_NOCACHE,
316 },
317 {
318 BRH_UART1_VBASE,
319 BRH_UART1_BASE,
320 BRH_UART1_VSIZE,
321 VM_PROT_READ|VM_PROT_WRITE,
322 PTE_NOCACHE,
323 },
324 {
325 BRH_UART2_VBASE,
326 BRH_UART2_BASE,
327 BRH_UART2_VSIZE,
328 VM_PROT_READ|VM_PROT_WRITE,
329 PTE_NOCACHE,
330 },
331 {
332 BRH_LED_VBASE,
333 BRH_LED_BASE,
334 BRH_LED_VSIZE,
335 VM_PROT_READ|VM_PROT_WRITE,
336 PTE_NOCACHE,
337 },
338 {
339 BRH_PCI_IO_VBASE,
340 BECC_PCI_IO_BASE,
341 BRH_PCI_IO_VSIZE,
342 VM_PROT_READ|VM_PROT_WRITE,
343 PTE_NOCACHE,
344 },
345 {
346 BRH_BECC_VBASE,
347 BECC_REG_BASE,
348 BRH_BECC_VSIZE,
349 VM_PROT_READ|VM_PROT_WRITE,
350 PTE_NOCACHE,
351 },
352 {
353 0,
354 0,
355 0,
356 0,
357 0,
358 }
359 };
360
361 static void
362 brh_hardclock_hook(void)
363 {
364 static int snakefreq;
365
366 if ((snakefreq++ & 15) == 0)
367 brh_7seg_snake();
368 }
369
370 /*
371 * u_int initarm(...)
372 *
373 * Initial entry point on startup. This gets called before main() is
374 * entered.
375 * It should be responsible for setting up everything that must be
376 * in place when main is called.
377 * This includes
378 * Taking a copy of the boot configuration structure.
379 * Initialising the physical console so characters can be printed.
380 * Setting up page tables for the kernel
381 * Relocating the kernel to the bottom of physical memory
382 */
383 u_int
384 initarm(void *arg)
385 {
386 extern vaddr_t xscale_cache_clean_addr;
387 #ifdef DIAGNOSTIC
388 extern vsize_t xscale_minidata_clean_size;
389 #endif
390 int loop;
391 int loop1;
392 u_int l1pagetable;
393 pv_addr_t kernel_l1pt;
394 paddr_t memstart;
395 psize_t memsize;
396
397 /*
398 * Clear out the 7-segment display. Whee, the first visual
399 * indication that we're running kernel code.
400 */
401 brh_7seg(' ');
402
403 /*
404 * Since we have mapped the on-board devices at their permanent
405 * locations already, it is possible for us to initialize
406 * the console now.
407 */
408 consinit();
409
410 /* Talk to the user */
411 printf("\nNetBSD/evbarm (ADI BRH) booting ...\n");
412
413 /* Calibrate the delay loop. */
414 becc_calibrate_delay();
415 becc_hardclock_hook = brh_hardclock_hook;
416
417 /*
418 * Heads up ... Setup the CPU / MMU / TLB functions
419 */
420 if (set_cpufuncs())
421 panic("cpu not recognized!");
422
423 /*
424 * We are currently running with the MMU enabled and the
425 * entire address space mapped VA==PA. Memory conveniently
426 * starts at 0xc0000000, which is where we want it. Certain
427 * on-board devices have already been mapped where we want
428 * them to be. There is an L1 page table at 0xc0004000.
429 */
430
431 becc_icu_init();
432
433 /*
434 * Memory always starts at 0xc0000000 on a BRH, and the
435 * memory size is always 128M.
436 */
437 memstart = 0xc0000000UL;
438 memsize = (128UL * 1024 * 1024);
439
440 printf("initarm: Configuring system ...\n");
441
442 /* Fake bootconfig structure for the benefit of pmap.c */
443 /* XXX must make the memory description h/w independant */
444 bootconfig.dramblocks = 1;
445 bootconfig.dram[0].address = memstart;
446 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
447
448 /*
449 * Set up the variables that define the availablilty of
450 * physical memory. For now, we're going to set
451 * physical_freestart to 0xc0200000 (where the kernel
452 * was loaded), and allocate the memory we need downwards.
453 * If we get too close to the L1 table that we set up, we
454 * will panic. We will update physical_freestart and
455 * physical_freeend later to reflect what pmap_bootstrap()
456 * wants to see.
457 *
458 * XXX pmap_bootstrap() needs an enema.
459 */
460 physical_start = bootconfig.dram[0].address;
461 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
462
463 physical_freestart = 0xc0009000UL;
464 physical_freeend = 0xc0200000UL;
465
466 /* Tell the user about the memory */
467 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
468 physical_start, physical_end - 1);
469
470 /*
471 * Okay, the kernel starts 2MB in from the bottom of physical
472 * memory. We are going to allocate our bootstrap pages downwards
473 * from there.
474 *
475 * We need to allocate some fixed page tables to get the kernel
476 * going. We allocate one page directory and a number of page
477 * tables and store the physical addresses in the kernel_pt_table
478 * array.
479 *
480 * The kernel page directory must be on a 16K boundary. The page
481 * tables must be on 4K bounaries. What we do is allocate the
482 * page directory on the first 16K boundary that we encounter, and
483 * the page tables on 4K boundaries otherwise. Since we allocate
484 * at least 3 L2 page tables, we are guaranteed to encounter at
485 * least one 16K aligned region.
486 */
487
488 #ifdef VERBOSE_INIT_ARM
489 printf("Allocating page tables\n");
490 #endif
491
492 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
493
494 #ifdef VERBOSE_INIT_ARM
495 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
496 physical_freestart, free_pages, free_pages);
497 #endif
498
499 /* Define a macro to simplify memory allocation */
500 #define valloc_pages(var, np) \
501 alloc_pages((var).pv_pa, (np)); \
502 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
503
504 #define alloc_pages(var, np) \
505 physical_freeend -= ((np) * PAGE_SIZE); \
506 if (physical_freeend < physical_freestart) \
507 panic("initarm: out of memory"); \
508 (var) = physical_freeend; \
509 free_pages -= (np); \
510 memset((char *)(var), 0, ((np) * PAGE_SIZE));
511
512 loop1 = 0;
513 kernel_l1pt.pv_pa = 0;
514 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
515 /* Are we 16KB aligned for an L1 ? */
516 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
517 && kernel_l1pt.pv_pa == 0) {
518 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
519 } else {
520 valloc_pages(kernel_pt_table[loop1],
521 L2_TABLE_SIZE / PAGE_SIZE);
522 ++loop1;
523 }
524 }
525
526 /* This should never be able to happen but better confirm that. */
527 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
528 panic("initarm: Failed to align the kernel page directory\n");
529
530 /*
531 * Allocate a page for the system page mapped to V0x00000000
532 * This page will just contain the system vectors and can be
533 * shared by all processes.
534 */
535 alloc_pages(systempage.pv_pa, 1);
536
537 /* Allocate stacks for all modes */
538 valloc_pages(irqstack, IRQ_STACK_SIZE);
539 valloc_pages(abtstack, ABT_STACK_SIZE);
540 valloc_pages(undstack, UND_STACK_SIZE);
541 valloc_pages(kernelstack, UPAGES);
542
543 /* Allocate enough pages for cleaning the Mini-Data cache. */
544 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
545 valloc_pages(minidataclean, 1);
546
547 #ifdef VERBOSE_INIT_ARM
548 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
549 irqstack.pv_va);
550 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
551 abtstack.pv_va);
552 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
553 undstack.pv_va);
554 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
555 kernelstack.pv_va);
556 #endif
557
558 /*
559 * XXX Defer this to later so that we can reclaim the memory
560 * XXX used by the RedBoot page tables.
561 */
562 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
563
564 /*
565 * Ok we have allocated physical pages for the primary kernel
566 * page tables
567 */
568
569 #ifdef VERBOSE_INIT_ARM
570 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
571 #endif
572
573 /*
574 * Now we start construction of the L1 page table
575 * We start by mapping the L2 page tables into the L1.
576 * This means that we can replace L1 mappings later on if necessary
577 */
578 l1pagetable = kernel_l1pt.pv_pa;
579
580 /* Map the L2 pages tables in the L1 page table */
581 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
582 &kernel_pt_table[KERNEL_PT_SYS]);
583 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
584 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
585 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
586 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
587 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
588 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
589
590 /* update the top of the kernel VM */
591 pmap_curmaxkvaddr =
592 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
593
594 #ifdef VERBOSE_INIT_ARM
595 printf("Mapping kernel\n");
596 #endif
597
598 /* Now we fill in the L2 pagetable for the kernel static code/data */
599 {
600 extern char etext[], _end[];
601 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
602 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
603 u_int logical;
604
605 textsize = (textsize + PGOFSET) & ~PGOFSET;
606 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
607
608 logical = 0x00200000; /* offset of kernel in RAM */
609
610 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
611 physical_start + logical, textsize,
612 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
613 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
614 physical_start + logical, totalsize - textsize,
615 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
616 }
617
618 #ifdef VERBOSE_INIT_ARM
619 printf("Constructing L2 page tables\n");
620 #endif
621
622 /* Map the stack pages */
623 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
624 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
625 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
626 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
627 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
628 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
629 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
630 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
631
632 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
633 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
634
635 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
636 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
637 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
638 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
639 }
640
641 /* Map the Mini-Data cache clean area. */
642 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
643 minidataclean.pv_pa);
644
645 /* Map the vector page. */
646 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
647 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
648
649 /*
650 * Map devices we can map w/ section mappings.
651 */
652 loop = 0;
653 while (l1_sec_table[loop].size) {
654 vm_size_t sz;
655
656 #ifdef VERBOSE_INIT_ARM
657 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
658 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
659 l1_sec_table[loop].va);
660 #endif
661 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
662 pmap_map_section(l1pagetable,
663 l1_sec_table[loop].va + sz,
664 l1_sec_table[loop].pa + sz,
665 l1_sec_table[loop].prot,
666 l1_sec_table[loop].cache);
667 ++loop;
668 }
669
670 /*
671 * Give the XScale global cache clean code an appropriately
672 * sized chunk of unmapped VA space starting at 0xff500000
673 * (our device mappings end before this address).
674 */
675 xscale_cache_clean_addr = 0xff500000U;
676
677 /*
678 * Now we have the real page tables in place so we can switch to them.
679 * Once this is done we will be running with the REAL kernel page
680 * tables.
681 */
682
683 /* Switch tables */
684 #ifdef VERBOSE_INIT_ARM
685 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
686 #endif
687 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
688 setttb(kernel_l1pt.pv_pa);
689 cpu_tlb_flushID();
690 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
691
692 /*
693 * Move from cpu_startup() as data_abort_handler() references
694 * this during uvm init
695 */
696 proc0paddr = (struct user *)kernelstack.pv_va;
697 lwp0.l_addr = proc0paddr;
698
699 #ifdef VERBOSE_INIT_ARM
700 printf("done!\n");
701 #endif
702
703 #ifdef VERBOSE_INIT_ARM
704 printf("bootstrap done.\n");
705 #endif
706
707 /*
708 * Inform the BECC code where the BECC is mapped.
709 */
710 becc_vaddr = BRH_BECC_VBASE;
711
712 /*
713 * BECC <= Rev7 can only address 64M through the inbound
714 * PCI windows. Limit memory to 64M on those revs. (This
715 * problem was fixed in Rev8 of the BECC; get an FPGA upgrade.)
716 */
717 {
718 vaddr_t va = BRH_PCI_CONF_VBASE | (1U << BECC_IDSEL_BIT) |
719 PCI_CLASS_REG;
720 uint32_t reg;
721
722 reg = *(__volatile uint32_t *) va;
723 becc_rev = PCI_REVISION(reg);
724 if (becc_rev <= BECC_REV_V7 &&
725 memsize > (64UL * 1024 * 1024)) {
726 memsize = (64UL * 1024 * 1024);
727 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
728 physical_end = physical_start +
729 (bootconfig.dram[0].pages * PAGE_SIZE);
730 printf("BECC <= Rev7: memory truncated to 64M\n");
731 }
732 }
733
734 /*
735 * Update the physical_freestart/physical_freeend/free_pages
736 * variables.
737 */
738 {
739 extern char _end[];
740
741 physical_freestart = physical_start +
742 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
743 KERNEL_BASE);
744 physical_freeend = physical_end;
745 free_pages =
746 (physical_freeend - physical_freestart) / PAGE_SIZE;
747 }
748 #ifdef VERBOSE_INIT_ARM
749 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
750 physical_freestart, free_pages, free_pages);
751 #endif
752
753 physmem = (physical_end - physical_start) / PAGE_SIZE;
754
755 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
756
757 /*
758 * Pages were allocated during the secondary bootstrap for the
759 * stacks for different CPU modes.
760 * We must now set the r13 registers in the different CPU modes to
761 * point to these stacks.
762 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
763 * of the stack memory.
764 */
765 printf("init subsystems: stacks ");
766
767 set_stackptr(PSR_IRQ32_MODE,
768 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
769 set_stackptr(PSR_ABT32_MODE,
770 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
771 set_stackptr(PSR_UND32_MODE,
772 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
773
774 /*
775 * Well we should set a data abort handler.
776 * Once things get going this will change as we will need a proper
777 * handler.
778 * Until then we will use a handler that just panics but tells us
779 * why.
780 * Initialisation of the vectors will just panic on a data abort.
781 * This just fills in a slighly better one.
782 */
783 printf("vectors ");
784 data_abort_handler_address = (u_int)data_abort_handler;
785 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
786 undefined_handler_address = (u_int)undefinedinstruction_bounce;
787
788 /* Initialise the undefined instruction handlers */
789 printf("undefined ");
790 undefined_init();
791
792 /* Load memory into UVM. */
793 printf("page ");
794 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
795 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
796 atop(physical_freestart), atop(physical_freeend),
797 VM_FREELIST_DEFAULT);
798
799 /* Boot strap pmap telling it where the kernel page table is */
800 printf("pmap ");
801 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
802 KERNEL_VM_BASE + KERNEL_VM_SIZE);
803
804 /* Setup the IRQ system */
805 printf("irq ");
806 becc_intr_init();
807 printf("done.\n");
808
809 #ifdef IPKDB
810 /* Initialise ipkdb */
811 ipkdb_init();
812 if (boothowto & RB_KDB)
813 ipkdb_connect(0);
814 #endif
815
816
817 #if NKSYMS || defined(DDB) || defined(LKM)
818 /* Firmware doesn't load symbols. */
819 ksyms_init(0, NULL, NULL);
820 #endif
821
822 #ifdef DDB
823 db_machine_init();
824 if (boothowto & RB_KDB)
825 Debugger();
826 #endif
827
828 /* We return the new stack pointer address */
829 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
830 }
831
832 void
833 consinit(void)
834 {
835 static const bus_addr_t comcnaddrs[] = {
836 BRH_UART1_BASE, /* com0 */
837 BRH_UART2_BASE, /* com1 */
838 };
839 static int consinit_called;
840
841 if (consinit_called != 0)
842 return;
843
844 consinit_called = 1;
845
846 #if NCOM > 0
847 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
848 BECC_PERIPH_CLOCK, comcnmode))
849 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
850 #else
851 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
852 #endif
853 }
854