brh_machdep.c revision 1.11 1 /* $NetBSD: brh_machdep.c,v 1.11 2003/05/17 23:46:59 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for the ADI Engineering
72 * BRH i80200 evaluation platform.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88
89 #include <uvm/uvm_extern.h>
90
91 #include <dev/cons.h>
92
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102
103 #include <arm/arm32/machdep.h>
104
105 #include <arm/xscale/i80200reg.h>
106 #include <arm/xscale/i80200var.h>
107
108 #include <dev/pci/ppbreg.h>
109
110 #include <arm/xscale/beccreg.h>
111 #include <arm/xscale/beccvar.h>
112
113 #include <evbarm/adi_brh/brhreg.h>
114 #include <evbarm/adi_brh/brhvar.h>
115 #include <evbarm/adi_brh/obiovar.h>
116
117 #include "opt_ipkdb.h"
118 #include "ksyms.h"
119
120 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
121 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
122
123 /*
124 * Address to call from cpu_reset() to reset the machine.
125 * This is machine architecture dependant as it varies depending
126 * on where the ROM appears when you turn the MMU off.
127 */
128
129 u_int cpu_reset_address = 0x00000000;
130
131 /* Define various stack sizes in pages */
132 #define IRQ_STACK_SIZE 1
133 #define ABT_STACK_SIZE 1
134 #ifdef IPKDB
135 #define UND_STACK_SIZE 2
136 #else
137 #define UND_STACK_SIZE 1
138 #endif
139
140 BootConfig bootconfig; /* Boot config storage */
141 char *boot_args = NULL;
142 char *boot_file = NULL;
143
144 vm_offset_t physical_start;
145 vm_offset_t physical_freestart;
146 vm_offset_t physical_freeend;
147 vm_offset_t physical_end;
148 u_int free_pages;
149 vm_offset_t pagetables_start;
150 int physmem = 0;
151
152 /*int debug_flags;*/
153 #ifndef PMAP_STATIC_L1S
154 int max_processes = 64; /* Default number */
155 #endif /* !PMAP_STATIC_L1S */
156
157 /* Physical and virtual addresses for some global pages */
158 pv_addr_t systempage;
159 pv_addr_t irqstack;
160 pv_addr_t undstack;
161 pv_addr_t abtstack;
162 pv_addr_t kernelstack;
163 pv_addr_t minidataclean;
164
165 vm_offset_t msgbufphys;
166
167 extern u_int data_abort_handler_address;
168 extern u_int prefetch_abort_handler_address;
169 extern u_int undefined_handler_address;
170
171 #ifdef PMAP_DEBUG
172 extern int pmap_debug_level;
173 #endif
174
175 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
176
177 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
178 #define KERNEL_PT_KERNEL_NUM 2
179
180 /* L2 tables for mapping kernel VM */
181 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
182 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
183 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
184
185 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
186
187 struct user *proc0paddr;
188
189 /* Prototypes */
190
191 void consinit(void);
192
193 #include "com.h"
194 #if NCOM > 0
195 #include <dev/ic/comreg.h>
196 #include <dev/ic/comvar.h>
197 #endif
198
199 /*
200 * Define the default console speed for the board. This is generally
201 * what the firmware provided with the board defaults to.
202 */
203 #ifndef CONSPEED
204 #define CONSPEED B57600
205 #endif /* ! CONSPEED */
206
207 #ifndef CONUNIT
208 #define CONUNIT 0
209 #endif
210
211 #ifndef CONMODE
212 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
213 #endif
214
215 int comcnspeed = CONSPEED;
216 int comcnmode = CONMODE;
217 int comcnunit = CONUNIT;
218
219 /*
220 * void cpu_reboot(int howto, char *bootstr)
221 *
222 * Reboots the system
223 *
224 * Deal with any syncing, unmounting, dumping and shutdown hooks,
225 * then reset the CPU.
226 */
227 void
228 cpu_reboot(int howto, char *bootstr)
229 {
230
231 /*
232 * If we are still cold then hit the air brakes
233 * and crash to earth fast
234 */
235 if (cold) {
236 doshutdownhooks();
237 printf("The operating system has halted.\n");
238 printf("Please press any key to reboot.\n\n");
239 cngetc();
240 printf("rebooting...\n");
241 goto reset;
242 }
243
244 /* Disable console buffering */
245
246 /*
247 * If RB_NOSYNC was not specified sync the discs.
248 * Note: Unless cold is set to 1 here, syslogd will die during the
249 * unmount. It looks like syslogd is getting woken up only to find
250 * that it cannot page part of the binary in as the filesystem has
251 * been unmounted.
252 */
253 if (!(howto & RB_NOSYNC))
254 bootsync();
255
256 /* Say NO to interrupts */
257 splhigh();
258
259 /* Do a dump if requested. */
260 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
261 dumpsys();
262
263 /* Run any shutdown hooks */
264 doshutdownhooks();
265
266 /* Make sure IRQ's are disabled */
267 IRQdisable;
268
269 if (howto & RB_HALT) {
270 brh_7seg('8');
271 printf("The operating system has halted.\n");
272 printf("Please press any key to reboot.\n\n");
273 cngetc();
274 }
275
276 printf("rebooting...\n\r");
277 reset:
278 cpu_reset();
279 }
280
281 /*
282 * Mapping table for core kernel memory. This memory is mapped at init
283 * time with section mappings.
284 */
285 struct l1_sec_map {
286 vaddr_t va;
287 vaddr_t pa;
288 vsize_t size;
289 vm_prot_t prot;
290 int cache;
291 } l1_sec_table[] = {
292 {
293 BRH_PCI_CONF_VBASE,
294 BECC_PCI_CONF_BASE,
295 BRH_PCI_CONF_VSIZE,
296 VM_PROT_READ|VM_PROT_WRITE,
297 PTE_NOCACHE,
298 },
299 {
300 BRH_PCI_MEM1_VBASE,
301 BECC_PCI_MEM1_BASE,
302 BRH_PCI_MEM1_VSIZE,
303 VM_PROT_READ|VM_PROT_WRITE,
304 PTE_NOCACHE,
305 },
306 {
307 BRH_PCI_MEM2_VBASE,
308 BECC_PCI_MEM2_BASE,
309 BRH_PCI_MEM2_VSIZE,
310 VM_PROT_READ|VM_PROT_WRITE,
311 PTE_NOCACHE,
312 },
313 {
314 BRH_UART1_VBASE,
315 BRH_UART1_BASE,
316 BRH_UART1_VSIZE,
317 VM_PROT_READ|VM_PROT_WRITE,
318 PTE_NOCACHE,
319 },
320 {
321 BRH_UART2_VBASE,
322 BRH_UART2_BASE,
323 BRH_UART2_VSIZE,
324 VM_PROT_READ|VM_PROT_WRITE,
325 PTE_NOCACHE,
326 },
327 {
328 BRH_LED_VBASE,
329 BRH_LED_BASE,
330 BRH_LED_VSIZE,
331 VM_PROT_READ|VM_PROT_WRITE,
332 PTE_NOCACHE,
333 },
334 {
335 BRH_PCI_IO_VBASE,
336 BECC_PCI_IO_BASE,
337 BRH_PCI_IO_VSIZE,
338 VM_PROT_READ|VM_PROT_WRITE,
339 PTE_NOCACHE,
340 },
341 {
342 BRH_BECC_VBASE,
343 BECC_REG_BASE,
344 BRH_BECC_VSIZE,
345 VM_PROT_READ|VM_PROT_WRITE,
346 PTE_NOCACHE,
347 },
348 {
349 0,
350 0,
351 0,
352 0,
353 0,
354 }
355 };
356
357 static void
358 brh_hardclock_hook(void)
359 {
360 static int snakefreq;
361
362 if ((snakefreq++ & 15) == 0)
363 brh_7seg_snake();
364 }
365
366 /*
367 * u_int initarm(...)
368 *
369 * Initial entry point on startup. This gets called before main() is
370 * entered.
371 * It should be responsible for setting up everything that must be
372 * in place when main is called.
373 * This includes
374 * Taking a copy of the boot configuration structure.
375 * Initialising the physical console so characters can be printed.
376 * Setting up page tables for the kernel
377 * Relocating the kernel to the bottom of physical memory
378 */
379 u_int
380 initarm(void *arg)
381 {
382 extern vaddr_t xscale_cache_clean_addr;
383 #ifdef DIAGNOSTIC
384 extern vsize_t xscale_minidata_clean_size;
385 #endif
386 int loop;
387 int loop1;
388 u_int l1pagetable;
389 pv_addr_t kernel_l1pt;
390 paddr_t memstart;
391 psize_t memsize;
392
393 /*
394 * Clear out the 7-segment display. Whee, the first visual
395 * indication that we're running kernel code.
396 */
397 brh_7seg(' ');
398
399 /*
400 * Since we have mapped the on-board devices at their permanent
401 * locations already, it is possible for us to initialize
402 * the console now.
403 */
404 consinit();
405
406 #ifdef VERBOSE_INIT_ARM
407 /* Talk to the user */
408 printf("\nNetBSD/evbarm (ADI BRH) booting ...\n");
409 #endif
410
411 /* Calibrate the delay loop. */
412 becc_calibrate_delay();
413 becc_hardclock_hook = brh_hardclock_hook;
414
415 /*
416 * Heads up ... Setup the CPU / MMU / TLB functions
417 */
418 if (set_cpufuncs())
419 panic("cpu not recognized!");
420
421 /*
422 * We are currently running with the MMU enabled and the
423 * entire address space mapped VA==PA. Memory conveniently
424 * starts at 0xc0000000, which is where we want it. Certain
425 * on-board devices have already been mapped where we want
426 * them to be. There is an L1 page table at 0xc0004000.
427 */
428
429 becc_icu_init();
430
431 /*
432 * Memory always starts at 0xc0000000 on a BRH, and the
433 * memory size is always 128M.
434 */
435 memstart = 0xc0000000UL;
436 memsize = (128UL * 1024 * 1024);
437
438 #ifdef VERBOSE_INIT_ARM
439 printf("initarm: Configuring system ...\n");
440 #endif
441
442 /* Fake bootconfig structure for the benefit of pmap.c */
443 /* XXX must make the memory description h/w independant */
444 bootconfig.dramblocks = 1;
445 bootconfig.dram[0].address = memstart;
446 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
447
448 /*
449 * Set up the variables that define the availablilty of
450 * physical memory. For now, we're going to set
451 * physical_freestart to 0xc0200000 (where the kernel
452 * was loaded), and allocate the memory we need downwards.
453 * If we get too close to the L1 table that we set up, we
454 * will panic. We will update physical_freestart and
455 * physical_freeend later to reflect what pmap_bootstrap()
456 * wants to see.
457 *
458 * XXX pmap_bootstrap() needs an enema.
459 */
460 physical_start = bootconfig.dram[0].address;
461 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
462
463 physical_freestart = 0xc0009000UL;
464 physical_freeend = 0xc0200000UL;
465
466 #ifdef VERBOSE_INIT_ARM
467 /* Tell the user about the memory */
468 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
469 physical_start, physical_end - 1);
470 #endif
471
472 /*
473 * Okay, the kernel starts 2MB in from the bottom of physical
474 * memory. We are going to allocate our bootstrap pages downwards
475 * from there.
476 *
477 * We need to allocate some fixed page tables to get the kernel
478 * going. We allocate one page directory and a number of page
479 * tables and store the physical addresses in the kernel_pt_table
480 * array.
481 *
482 * The kernel page directory must be on a 16K boundary. The page
483 * tables must be on 4K bounaries. What we do is allocate the
484 * page directory on the first 16K boundary that we encounter, and
485 * the page tables on 4K boundaries otherwise. Since we allocate
486 * at least 3 L2 page tables, we are guaranteed to encounter at
487 * least one 16K aligned region.
488 */
489
490 #ifdef VERBOSE_INIT_ARM
491 printf("Allocating page tables\n");
492 #endif
493
494 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
495
496 #ifdef VERBOSE_INIT_ARM
497 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
498 physical_freestart, free_pages, free_pages);
499 #endif
500
501 /* Define a macro to simplify memory allocation */
502 #define valloc_pages(var, np) \
503 alloc_pages((var).pv_pa, (np)); \
504 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
505
506 #define alloc_pages(var, np) \
507 physical_freeend -= ((np) * PAGE_SIZE); \
508 if (physical_freeend < physical_freestart) \
509 panic("initarm: out of memory"); \
510 (var) = physical_freeend; \
511 free_pages -= (np); \
512 memset((char *)(var), 0, ((np) * PAGE_SIZE));
513
514 loop1 = 0;
515 kernel_l1pt.pv_pa = 0;
516 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
517 /* Are we 16KB aligned for an L1 ? */
518 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
519 && kernel_l1pt.pv_pa == 0) {
520 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
521 } else {
522 valloc_pages(kernel_pt_table[loop1],
523 L2_TABLE_SIZE / PAGE_SIZE);
524 ++loop1;
525 }
526 }
527
528 /* This should never be able to happen but better confirm that. */
529 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
530 panic("initarm: Failed to align the kernel page directory\n");
531
532 /*
533 * Allocate a page for the system page mapped to V0x00000000
534 * This page will just contain the system vectors and can be
535 * shared by all processes.
536 */
537 alloc_pages(systempage.pv_pa, 1);
538
539 /* Allocate stacks for all modes */
540 valloc_pages(irqstack, IRQ_STACK_SIZE);
541 valloc_pages(abtstack, ABT_STACK_SIZE);
542 valloc_pages(undstack, UND_STACK_SIZE);
543 valloc_pages(kernelstack, UPAGES);
544
545 /* Allocate enough pages for cleaning the Mini-Data cache. */
546 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
547 valloc_pages(minidataclean, 1);
548
549 #ifdef VERBOSE_INIT_ARM
550 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
551 irqstack.pv_va);
552 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
553 abtstack.pv_va);
554 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
555 undstack.pv_va);
556 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
557 kernelstack.pv_va);
558 #endif
559
560 /*
561 * XXX Defer this to later so that we can reclaim the memory
562 * XXX used by the RedBoot page tables.
563 */
564 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
565
566 /*
567 * Ok we have allocated physical pages for the primary kernel
568 * page tables
569 */
570
571 #ifdef VERBOSE_INIT_ARM
572 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
573 #endif
574
575 /*
576 * Now we start construction of the L1 page table
577 * We start by mapping the L2 page tables into the L1.
578 * This means that we can replace L1 mappings later on if necessary
579 */
580 l1pagetable = kernel_l1pt.pv_pa;
581
582 /* Map the L2 pages tables in the L1 page table */
583 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
584 &kernel_pt_table[KERNEL_PT_SYS]);
585 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
586 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
587 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
588 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
589 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
590 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
591
592 /* update the top of the kernel VM */
593 pmap_curmaxkvaddr =
594 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
595
596 #ifdef VERBOSE_INIT_ARM
597 printf("Mapping kernel\n");
598 #endif
599
600 /* Now we fill in the L2 pagetable for the kernel static code/data */
601 {
602 extern char etext[], _end[];
603 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
604 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
605 u_int logical;
606
607 textsize = (textsize + PGOFSET) & ~PGOFSET;
608 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
609
610 logical = 0x00200000; /* offset of kernel in RAM */
611
612 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
613 physical_start + logical, textsize,
614 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
615 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
616 physical_start + logical, totalsize - textsize,
617 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
618 }
619
620 #ifdef VERBOSE_INIT_ARM
621 printf("Constructing L2 page tables\n");
622 #endif
623
624 /* Map the stack pages */
625 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
626 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
627 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
628 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
629 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
630 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
631 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
632 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
633
634 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
635 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
636
637 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
638 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
639 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
640 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
641 }
642
643 /* Map the Mini-Data cache clean area. */
644 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
645 minidataclean.pv_pa);
646
647 /* Map the vector page. */
648 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
649 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
650
651 /*
652 * Map devices we can map w/ section mappings.
653 */
654 loop = 0;
655 while (l1_sec_table[loop].size) {
656 vm_size_t sz;
657
658 #ifdef VERBOSE_INIT_ARM
659 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
660 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
661 l1_sec_table[loop].va);
662 #endif
663 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
664 pmap_map_section(l1pagetable,
665 l1_sec_table[loop].va + sz,
666 l1_sec_table[loop].pa + sz,
667 l1_sec_table[loop].prot,
668 l1_sec_table[loop].cache);
669 ++loop;
670 }
671
672 /*
673 * Give the XScale global cache clean code an appropriately
674 * sized chunk of unmapped VA space starting at 0xff500000
675 * (our device mappings end before this address).
676 */
677 xscale_cache_clean_addr = 0xff500000U;
678
679 /*
680 * Now we have the real page tables in place so we can switch to them.
681 * Once this is done we will be running with the REAL kernel page
682 * tables.
683 */
684
685 /* Switch tables */
686 #ifdef VERBOSE_INIT_ARM
687 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
688 #endif
689 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
690 setttb(kernel_l1pt.pv_pa);
691 cpu_tlb_flushID();
692 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
693
694 /*
695 * Move from cpu_startup() as data_abort_handler() references
696 * this during uvm init
697 */
698 proc0paddr = (struct user *)kernelstack.pv_va;
699 lwp0.l_addr = proc0paddr;
700
701 #ifdef VERBOSE_INIT_ARM
702 printf("done!\n");
703 #endif
704
705 #ifdef VERBOSE_INIT_ARM
706 printf("bootstrap done.\n");
707 #endif
708
709 /*
710 * Inform the BECC code where the BECC is mapped.
711 */
712 becc_vaddr = BRH_BECC_VBASE;
713
714 /*
715 * BECC <= Rev7 can only address 64M through the inbound
716 * PCI windows. Limit memory to 64M on those revs. (This
717 * problem was fixed in Rev8 of the BECC; get an FPGA upgrade.)
718 */
719 {
720 vaddr_t va = BRH_PCI_CONF_VBASE | (1U << BECC_IDSEL_BIT) |
721 PCI_CLASS_REG;
722 uint32_t reg;
723
724 reg = *(__volatile uint32_t *) va;
725 becc_rev = PCI_REVISION(reg);
726 if (becc_rev <= BECC_REV_V7 &&
727 memsize > (64UL * 1024 * 1024)) {
728 memsize = (64UL * 1024 * 1024);
729 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
730 physical_end = physical_start +
731 (bootconfig.dram[0].pages * PAGE_SIZE);
732 printf("BECC <= Rev7: memory truncated to 64M\n");
733 }
734 }
735
736 /*
737 * Update the physical_freestart/physical_freeend/free_pages
738 * variables.
739 */
740 {
741 extern char _end[];
742
743 physical_freestart = physical_start +
744 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
745 KERNEL_BASE);
746 physical_freeend = physical_end;
747 free_pages =
748 (physical_freeend - physical_freestart) / PAGE_SIZE;
749 }
750 #ifdef VERBOSE_INIT_ARM
751 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
752 physical_freestart, free_pages, free_pages);
753 #endif
754
755 physmem = (physical_end - physical_start) / PAGE_SIZE;
756
757 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
758
759 /*
760 * Pages were allocated during the secondary bootstrap for the
761 * stacks for different CPU modes.
762 * We must now set the r13 registers in the different CPU modes to
763 * point to these stacks.
764 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
765 * of the stack memory.
766 */
767 #ifdef VERBOSE_INIT_ARM
768 printf("init subsystems: stacks ");
769 #endif
770
771 set_stackptr(PSR_IRQ32_MODE,
772 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
773 set_stackptr(PSR_ABT32_MODE,
774 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
775 set_stackptr(PSR_UND32_MODE,
776 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
777
778 /*
779 * Well we should set a data abort handler.
780 * Once things get going this will change as we will need a proper
781 * handler.
782 * Until then we will use a handler that just panics but tells us
783 * why.
784 * Initialisation of the vectors will just panic on a data abort.
785 * This just fills in a slighly better one.
786 */
787 #ifdef VERBOSE_INIT_ARM
788 printf("vectors ");
789 #endif
790 data_abort_handler_address = (u_int)data_abort_handler;
791 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
792 undefined_handler_address = (u_int)undefinedinstruction_bounce;
793
794 /* Initialise the undefined instruction handlers */
795 #ifdef VERBOSE_INIT_ARM
796 printf("undefined ");
797 #endif
798 undefined_init();
799
800 /* Load memory into UVM. */
801 #ifdef VERBOSE_INIT_ARM
802 printf("page ");
803 #endif
804 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
805 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
806 atop(physical_freestart), atop(physical_freeend),
807 VM_FREELIST_DEFAULT);
808
809 /* Boot strap pmap telling it where the kernel page table is */
810 #ifdef VERBOSE_INIT_ARM
811 printf("pmap ");
812 #endif
813 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
814 KERNEL_VM_BASE + KERNEL_VM_SIZE);
815
816 /* Setup the IRQ system */
817 #ifdef VERBOSE_INIT_ARM
818 printf("irq ");
819 #endif
820 becc_intr_init();
821 #ifdef VERBOSE_INIT_ARM
822 printf("done.\n");
823 #endif
824
825 #ifdef IPKDB
826 /* Initialise ipkdb */
827 ipkdb_init();
828 if (boothowto & RB_KDB)
829 ipkdb_connect(0);
830 #endif
831
832
833 #if NKSYMS || defined(DDB) || defined(LKM)
834 /* Firmware doesn't load symbols. */
835 ksyms_init(0, NULL, NULL);
836 #endif
837
838 #ifdef DDB
839 db_machine_init();
840 if (boothowto & RB_KDB)
841 Debugger();
842 #endif
843
844 /* We return the new stack pointer address */
845 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
846 }
847
848 void
849 consinit(void)
850 {
851 static const bus_addr_t comcnaddrs[] = {
852 BRH_UART1_BASE, /* com0 */
853 BRH_UART2_BASE, /* com1 */
854 };
855 static int consinit_called;
856
857 if (consinit_called != 0)
858 return;
859
860 consinit_called = 1;
861
862 #if NCOM > 0
863 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
864 BECC_PERIPH_CLOCK, comcnmode))
865 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
866 #else
867 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
868 #endif
869 }
870