brh_machdep.c revision 1.15 1 /* $NetBSD: brh_machdep.c,v 1.15 2003/06/14 17:01:09 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for the ADI Engineering
72 * BRH i80200 evaluation platform.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88
89 #include <uvm/uvm_extern.h>
90
91 #include <dev/cons.h>
92
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102
103 #include <arm/arm32/machdep.h>
104
105 #include <arm/xscale/i80200reg.h>
106 #include <arm/xscale/i80200var.h>
107
108 #include <dev/pci/ppbreg.h>
109
110 #include <arm/xscale/beccreg.h>
111 #include <arm/xscale/beccvar.h>
112
113 #include <evbarm/adi_brh/brhreg.h>
114 #include <evbarm/adi_brh/brhvar.h>
115 #include <evbarm/adi_brh/obiovar.h>
116
117 #include "opt_ipkdb.h"
118 #include "ksyms.h"
119
120 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
121 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
122 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
123
124 /*
125 * The range 0xc1000000 - 0xccffffff is available for kernel VM space
126 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
127 */
128 #define KERNEL_VM_SIZE 0x0C000000
129
130 /*
131 * Address to call from cpu_reset() to reset the machine.
132 * This is machine architecture dependant as it varies depending
133 * on where the ROM appears when you turn the MMU off.
134 */
135
136 u_int cpu_reset_address = 0x00000000;
137
138 /* Define various stack sizes in pages */
139 #define IRQ_STACK_SIZE 1
140 #define ABT_STACK_SIZE 1
141 #ifdef IPKDB
142 #define UND_STACK_SIZE 2
143 #else
144 #define UND_STACK_SIZE 1
145 #endif
146
147 BootConfig bootconfig; /* Boot config storage */
148 char *boot_args = NULL;
149 char *boot_file = NULL;
150
151 vm_offset_t physical_start;
152 vm_offset_t physical_freestart;
153 vm_offset_t physical_freeend;
154 vm_offset_t physical_end;
155 u_int free_pages;
156 vm_offset_t pagetables_start;
157 int physmem = 0;
158
159 /*int debug_flags;*/
160 #ifndef PMAP_STATIC_L1S
161 int max_processes = 64; /* Default number */
162 #endif /* !PMAP_STATIC_L1S */
163
164 /* Physical and virtual addresses for some global pages */
165 pv_addr_t systempage;
166 pv_addr_t irqstack;
167 pv_addr_t undstack;
168 pv_addr_t abtstack;
169 pv_addr_t kernelstack;
170 pv_addr_t minidataclean;
171
172 vm_offset_t msgbufphys;
173
174 extern u_int data_abort_handler_address;
175 extern u_int prefetch_abort_handler_address;
176 extern u_int undefined_handler_address;
177
178 #ifdef PMAP_DEBUG
179 extern int pmap_debug_level;
180 #endif
181
182 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
183
184 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
185 #define KERNEL_PT_KERNEL_NUM 2
186
187 /* L2 tables for mapping kernel VM */
188 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
189 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
190 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
191
192 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
193
194 struct user *proc0paddr;
195
196 /* Prototypes */
197
198 void consinit(void);
199
200 #include "com.h"
201 #if NCOM > 0
202 #include <dev/ic/comreg.h>
203 #include <dev/ic/comvar.h>
204 #endif
205
206 /*
207 * Define the default console speed for the board. This is generally
208 * what the firmware provided with the board defaults to.
209 */
210 #ifndef CONSPEED
211 #define CONSPEED B57600
212 #endif /* ! CONSPEED */
213
214 #ifndef CONUNIT
215 #define CONUNIT 0
216 #endif
217
218 #ifndef CONMODE
219 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
220 #endif
221
222 int comcnspeed = CONSPEED;
223 int comcnmode = CONMODE;
224 int comcnunit = CONUNIT;
225
226 /*
227 * void cpu_reboot(int howto, char *bootstr)
228 *
229 * Reboots the system
230 *
231 * Deal with any syncing, unmounting, dumping and shutdown hooks,
232 * then reset the CPU.
233 */
234 void
235 cpu_reboot(int howto, char *bootstr)
236 {
237
238 /*
239 * If we are still cold then hit the air brakes
240 * and crash to earth fast
241 */
242 if (cold) {
243 doshutdownhooks();
244 printf("The operating system has halted.\n");
245 printf("Please press any key to reboot.\n\n");
246 cngetc();
247 printf("rebooting...\n");
248 goto reset;
249 }
250
251 /* Disable console buffering */
252
253 /*
254 * If RB_NOSYNC was not specified sync the discs.
255 * Note: Unless cold is set to 1 here, syslogd will die during the
256 * unmount. It looks like syslogd is getting woken up only to find
257 * that it cannot page part of the binary in as the filesystem has
258 * been unmounted.
259 */
260 if (!(howto & RB_NOSYNC))
261 bootsync();
262
263 /* Say NO to interrupts */
264 splhigh();
265
266 /* Do a dump if requested. */
267 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
268 dumpsys();
269
270 /* Run any shutdown hooks */
271 doshutdownhooks();
272
273 /* Make sure IRQ's are disabled */
274 IRQdisable;
275
276 if (howto & RB_HALT) {
277 brh_7seg('8');
278 printf("The operating system has halted.\n");
279 printf("Please press any key to reboot.\n\n");
280 cngetc();
281 }
282
283 printf("rebooting...\n\r");
284 reset:
285 cpu_reset();
286 }
287
288 /*
289 * Mapping table for core kernel memory. This memory is mapped at init
290 * time with section mappings.
291 */
292 struct l1_sec_map {
293 vaddr_t va;
294 vaddr_t pa;
295 vsize_t size;
296 vm_prot_t prot;
297 int cache;
298 } l1_sec_table[] = {
299 {
300 BRH_PCI_CONF_VBASE,
301 BECC_PCI_CONF_BASE,
302 BRH_PCI_CONF_VSIZE,
303 VM_PROT_READ|VM_PROT_WRITE,
304 PTE_NOCACHE,
305 },
306 {
307 BRH_PCI_MEM1_VBASE,
308 BECC_PCI_MEM1_BASE,
309 BRH_PCI_MEM1_VSIZE,
310 VM_PROT_READ|VM_PROT_WRITE,
311 PTE_NOCACHE,
312 },
313 {
314 BRH_PCI_MEM2_VBASE,
315 BECC_PCI_MEM2_BASE,
316 BRH_PCI_MEM2_VSIZE,
317 VM_PROT_READ|VM_PROT_WRITE,
318 PTE_NOCACHE,
319 },
320 {
321 BRH_UART1_VBASE,
322 BRH_UART1_BASE,
323 BRH_UART1_VSIZE,
324 VM_PROT_READ|VM_PROT_WRITE,
325 PTE_NOCACHE,
326 },
327 {
328 BRH_UART2_VBASE,
329 BRH_UART2_BASE,
330 BRH_UART2_VSIZE,
331 VM_PROT_READ|VM_PROT_WRITE,
332 PTE_NOCACHE,
333 },
334 {
335 BRH_LED_VBASE,
336 BRH_LED_BASE,
337 BRH_LED_VSIZE,
338 VM_PROT_READ|VM_PROT_WRITE,
339 PTE_NOCACHE,
340 },
341 {
342 BRH_PCI_IO_VBASE,
343 BECC_PCI_IO_BASE,
344 BRH_PCI_IO_VSIZE,
345 VM_PROT_READ|VM_PROT_WRITE,
346 PTE_NOCACHE,
347 },
348 {
349 BRH_BECC_VBASE,
350 BECC_REG_BASE,
351 BRH_BECC_VSIZE,
352 VM_PROT_READ|VM_PROT_WRITE,
353 PTE_NOCACHE,
354 },
355 {
356 0,
357 0,
358 0,
359 0,
360 0,
361 }
362 };
363
364 static void
365 brh_hardclock_hook(void)
366 {
367 static int snakefreq;
368
369 if ((snakefreq++ & 15) == 0)
370 brh_7seg_snake();
371 }
372
373 /*
374 * u_int initarm(...)
375 *
376 * Initial entry point on startup. This gets called before main() is
377 * entered.
378 * It should be responsible for setting up everything that must be
379 * in place when main is called.
380 * This includes
381 * Taking a copy of the boot configuration structure.
382 * Initialising the physical console so characters can be printed.
383 * Setting up page tables for the kernel
384 * Relocating the kernel to the bottom of physical memory
385 */
386 u_int
387 initarm(void *arg)
388 {
389 extern vaddr_t xscale_cache_clean_addr;
390 #ifdef DIAGNOSTIC
391 extern vsize_t xscale_minidata_clean_size;
392 #endif
393 int loop;
394 int loop1;
395 u_int l1pagetable;
396 pv_addr_t kernel_l1pt;
397 paddr_t memstart;
398 psize_t memsize;
399
400 /*
401 * Clear out the 7-segment display. Whee, the first visual
402 * indication that we're running kernel code.
403 */
404 brh_7seg(' ');
405
406 /*
407 * Since we have mapped the on-board devices at their permanent
408 * locations already, it is possible for us to initialize
409 * the console now.
410 */
411 consinit();
412
413 #ifdef VERBOSE_INIT_ARM
414 /* Talk to the user */
415 printf("\nNetBSD/evbarm (ADI BRH) booting ...\n");
416 #endif
417
418 /* Calibrate the delay loop. */
419 becc_hardclock_hook = brh_hardclock_hook;
420
421 /*
422 * Heads up ... Setup the CPU / MMU / TLB functions
423 */
424 if (set_cpufuncs())
425 panic("cpu not recognized!");
426
427 /*
428 * We are currently running with the MMU enabled and the
429 * entire address space mapped VA==PA. Memory conveniently
430 * starts at 0xc0000000, which is where we want it. Certain
431 * on-board devices have already been mapped where we want
432 * them to be. There is an L1 page table at 0xc0004000.
433 */
434
435 becc_icu_init();
436
437 /*
438 * Memory always starts at 0xc0000000 on a BRH, and the
439 * memory size is always 128M.
440 */
441 memstart = 0xc0000000UL;
442 memsize = (128UL * 1024 * 1024);
443
444 #ifdef VERBOSE_INIT_ARM
445 printf("initarm: Configuring system ...\n");
446 #endif
447
448 /* Fake bootconfig structure for the benefit of pmap.c */
449 /* XXX must make the memory description h/w independant */
450 bootconfig.dramblocks = 1;
451 bootconfig.dram[0].address = memstart;
452 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
453
454 /*
455 * Set up the variables that define the availablilty of
456 * physical memory. For now, we're going to set
457 * physical_freestart to 0xc0200000 (where the kernel
458 * was loaded), and allocate the memory we need downwards.
459 * If we get too close to the L1 table that we set up, we
460 * will panic. We will update physical_freestart and
461 * physical_freeend later to reflect what pmap_bootstrap()
462 * wants to see.
463 *
464 * XXX pmap_bootstrap() needs an enema.
465 */
466 physical_start = bootconfig.dram[0].address;
467 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
468
469 physical_freestart = 0xc0009000UL;
470 physical_freeend = 0xc0200000UL;
471
472 #ifdef VERBOSE_INIT_ARM
473 /* Tell the user about the memory */
474 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
475 physical_start, physical_end - 1);
476 #endif
477
478 /*
479 * Okay, the kernel starts 2MB in from the bottom of physical
480 * memory. We are going to allocate our bootstrap pages downwards
481 * from there.
482 *
483 * We need to allocate some fixed page tables to get the kernel
484 * going. We allocate one page directory and a number of page
485 * tables and store the physical addresses in the kernel_pt_table
486 * array.
487 *
488 * The kernel page directory must be on a 16K boundary. The page
489 * tables must be on 4K bounaries. What we do is allocate the
490 * page directory on the first 16K boundary that we encounter, and
491 * the page tables on 4K boundaries otherwise. Since we allocate
492 * at least 3 L2 page tables, we are guaranteed to encounter at
493 * least one 16K aligned region.
494 */
495
496 #ifdef VERBOSE_INIT_ARM
497 printf("Allocating page tables\n");
498 #endif
499
500 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
501
502 #ifdef VERBOSE_INIT_ARM
503 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
504 physical_freestart, free_pages, free_pages);
505 #endif
506
507 /* Define a macro to simplify memory allocation */
508 #define valloc_pages(var, np) \
509 alloc_pages((var).pv_pa, (np)); \
510 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
511
512 #define alloc_pages(var, np) \
513 physical_freeend -= ((np) * PAGE_SIZE); \
514 if (physical_freeend < physical_freestart) \
515 panic("initarm: out of memory"); \
516 (var) = physical_freeend; \
517 free_pages -= (np); \
518 memset((char *)(var), 0, ((np) * PAGE_SIZE));
519
520 loop1 = 0;
521 kernel_l1pt.pv_pa = 0;
522 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
523 /* Are we 16KB aligned for an L1 ? */
524 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
525 && kernel_l1pt.pv_pa == 0) {
526 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
527 } else {
528 valloc_pages(kernel_pt_table[loop1],
529 L2_TABLE_SIZE / PAGE_SIZE);
530 ++loop1;
531 }
532 }
533
534 /* This should never be able to happen but better confirm that. */
535 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
536 panic("initarm: Failed to align the kernel page directory\n");
537
538 /*
539 * Allocate a page for the system page mapped to V0x00000000
540 * This page will just contain the system vectors and can be
541 * shared by all processes.
542 */
543 alloc_pages(systempage.pv_pa, 1);
544
545 /* Allocate stacks for all modes */
546 valloc_pages(irqstack, IRQ_STACK_SIZE);
547 valloc_pages(abtstack, ABT_STACK_SIZE);
548 valloc_pages(undstack, UND_STACK_SIZE);
549 valloc_pages(kernelstack, UPAGES);
550
551 /* Allocate enough pages for cleaning the Mini-Data cache. */
552 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
553 valloc_pages(minidataclean, 1);
554
555 #ifdef VERBOSE_INIT_ARM
556 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
557 irqstack.pv_va);
558 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
559 abtstack.pv_va);
560 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
561 undstack.pv_va);
562 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
563 kernelstack.pv_va);
564 #endif
565
566 /*
567 * XXX Defer this to later so that we can reclaim the memory
568 * XXX used by the RedBoot page tables.
569 */
570 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
571
572 /*
573 * Ok we have allocated physical pages for the primary kernel
574 * page tables
575 */
576
577 #ifdef VERBOSE_INIT_ARM
578 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
579 #endif
580
581 /*
582 * Now we start construction of the L1 page table
583 * We start by mapping the L2 page tables into the L1.
584 * This means that we can replace L1 mappings later on if necessary
585 */
586 l1pagetable = kernel_l1pt.pv_pa;
587
588 /* Map the L2 pages tables in the L1 page table */
589 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
590 &kernel_pt_table[KERNEL_PT_SYS]);
591 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
592 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
593 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
594 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
595 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
596 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
597
598 /* update the top of the kernel VM */
599 pmap_curmaxkvaddr =
600 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
601
602 #ifdef VERBOSE_INIT_ARM
603 printf("Mapping kernel\n");
604 #endif
605
606 /* Now we fill in the L2 pagetable for the kernel static code/data */
607 {
608 extern char etext[], _end[];
609 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
610 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
611 u_int logical;
612
613 textsize = (textsize + PGOFSET) & ~PGOFSET;
614 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
615
616 logical = 0x00200000; /* offset of kernel in RAM */
617
618 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
619 physical_start + logical, textsize,
620 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
621 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
622 physical_start + logical, totalsize - textsize,
623 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
624 }
625
626 #ifdef VERBOSE_INIT_ARM
627 printf("Constructing L2 page tables\n");
628 #endif
629
630 /* Map the stack pages */
631 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
632 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
633 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
634 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
635 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
636 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
637 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
638 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
639
640 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
641 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
642
643 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
644 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
645 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
646 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
647 }
648
649 /* Map the Mini-Data cache clean area. */
650 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
651 minidataclean.pv_pa);
652
653 /* Map the vector page. */
654 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
655 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
656
657 /*
658 * Map devices we can map w/ section mappings.
659 */
660 loop = 0;
661 while (l1_sec_table[loop].size) {
662 vm_size_t sz;
663
664 #ifdef VERBOSE_INIT_ARM
665 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
666 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
667 l1_sec_table[loop].va);
668 #endif
669 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
670 pmap_map_section(l1pagetable,
671 l1_sec_table[loop].va + sz,
672 l1_sec_table[loop].pa + sz,
673 l1_sec_table[loop].prot,
674 l1_sec_table[loop].cache);
675 ++loop;
676 }
677
678 /*
679 * Give the XScale global cache clean code an appropriately
680 * sized chunk of unmapped VA space starting at 0xff500000
681 * (our device mappings end before this address).
682 */
683 xscale_cache_clean_addr = 0xff500000U;
684
685 /*
686 * Now we have the real page tables in place so we can switch to them.
687 * Once this is done we will be running with the REAL kernel page
688 * tables.
689 */
690
691 /* Switch tables */
692 #ifdef VERBOSE_INIT_ARM
693 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
694 #endif
695 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
696 setttb(kernel_l1pt.pv_pa);
697 cpu_tlb_flushID();
698 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
699
700 /*
701 * Move from cpu_startup() as data_abort_handler() references
702 * this during uvm init
703 */
704 proc0paddr = (struct user *)kernelstack.pv_va;
705 lwp0.l_addr = proc0paddr;
706
707 #ifdef VERBOSE_INIT_ARM
708 printf("done!\n");
709 #endif
710
711 #ifdef VERBOSE_INIT_ARM
712 printf("bootstrap done.\n");
713 #endif
714
715 /*
716 * Inform the BECC code where the BECC is mapped.
717 */
718 becc_vaddr = BRH_BECC_VBASE;
719
720 /*
721 * Now that we have becc_vaddr set, calibrate delay.
722 */
723 becc_calibrate_delay();
724
725 /*
726 * BECC <= Rev7 can only address 64M through the inbound
727 * PCI windows. Limit memory to 64M on those revs. (This
728 * problem was fixed in Rev8 of the BECC; get an FPGA upgrade.)
729 */
730 {
731 vaddr_t va = BRH_PCI_CONF_VBASE | (1U << BECC_IDSEL_BIT) |
732 PCI_CLASS_REG;
733 uint32_t reg;
734
735 reg = *(__volatile uint32_t *) va;
736 becc_rev = PCI_REVISION(reg);
737 if (becc_rev <= BECC_REV_V7 &&
738 memsize > (64UL * 1024 * 1024)) {
739 memsize = (64UL * 1024 * 1024);
740 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
741 physical_end = physical_start +
742 (bootconfig.dram[0].pages * PAGE_SIZE);
743 printf("BECC <= Rev7: memory truncated to 64M\n");
744 }
745 }
746
747 /*
748 * Update the physical_freestart/physical_freeend/free_pages
749 * variables.
750 */
751 {
752 extern char _end[];
753
754 physical_freestart = physical_start +
755 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
756 KERNEL_BASE);
757 physical_freeend = physical_end;
758 free_pages =
759 (physical_freeend - physical_freestart) / PAGE_SIZE;
760 }
761 #ifdef VERBOSE_INIT_ARM
762 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
763 physical_freestart, free_pages, free_pages);
764 #endif
765
766 physmem = (physical_end - physical_start) / PAGE_SIZE;
767
768 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
769
770 /*
771 * Pages were allocated during the secondary bootstrap for the
772 * stacks for different CPU modes.
773 * We must now set the r13 registers in the different CPU modes to
774 * point to these stacks.
775 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
776 * of the stack memory.
777 */
778 #ifdef VERBOSE_INIT_ARM
779 printf("init subsystems: stacks ");
780 #endif
781
782 set_stackptr(PSR_IRQ32_MODE,
783 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
784 set_stackptr(PSR_ABT32_MODE,
785 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
786 set_stackptr(PSR_UND32_MODE,
787 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
788
789 /*
790 * Well we should set a data abort handler.
791 * Once things get going this will change as we will need a proper
792 * handler.
793 * Until then we will use a handler that just panics but tells us
794 * why.
795 * Initialisation of the vectors will just panic on a data abort.
796 * This just fills in a slighly better one.
797 */
798 #ifdef VERBOSE_INIT_ARM
799 printf("vectors ");
800 #endif
801 data_abort_handler_address = (u_int)data_abort_handler;
802 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
803 undefined_handler_address = (u_int)undefinedinstruction_bounce;
804
805 /* Initialise the undefined instruction handlers */
806 #ifdef VERBOSE_INIT_ARM
807 printf("undefined ");
808 #endif
809 undefined_init();
810
811 /* Load memory into UVM. */
812 #ifdef VERBOSE_INIT_ARM
813 printf("page ");
814 #endif
815 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
816 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
817 atop(physical_freestart), atop(physical_freeend),
818 VM_FREELIST_DEFAULT);
819
820 /* Boot strap pmap telling it where the kernel page table is */
821 #ifdef VERBOSE_INIT_ARM
822 printf("pmap ");
823 #endif
824 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
825 KERNEL_VM_BASE + KERNEL_VM_SIZE);
826
827 /* Setup the IRQ system */
828 #ifdef VERBOSE_INIT_ARM
829 printf("irq ");
830 #endif
831 becc_intr_init();
832 #ifdef VERBOSE_INIT_ARM
833 printf("done.\n");
834 #endif
835
836 #ifdef IPKDB
837 /* Initialise ipkdb */
838 ipkdb_init();
839 if (boothowto & RB_KDB)
840 ipkdb_connect(0);
841 #endif
842
843
844 #if NKSYMS || defined(DDB) || defined(LKM)
845 /* Firmware doesn't load symbols. */
846 ksyms_init(0, NULL, NULL);
847 #endif
848
849 #ifdef DDB
850 db_machine_init();
851 if (boothowto & RB_KDB)
852 Debugger();
853 #endif
854
855 /* We return the new stack pointer address */
856 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
857 }
858
859 void
860 consinit(void)
861 {
862 static const bus_addr_t comcnaddrs[] = {
863 BRH_UART1_BASE, /* com0 */
864 BRH_UART2_BASE, /* com1 */
865 };
866 static int consinit_called;
867
868 if (consinit_called != 0)
869 return;
870
871 consinit_called = 1;
872
873 #if NCOM > 0
874 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
875 BECC_PERIPH_CLOCK, COM_TYPE_NORMAL, comcnmode))
876 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
877 #else
878 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
879 #endif
880 }
881