brh_machdep.c revision 1.2 1 /* $NetBSD: brh_machdep.c,v 1.2 2003/01/29 20:44:48 briggs Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for the ADI Engineering
72 * BRH i80200 evaluation platform.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87
88 #include <dev/cons.h>
89
90 #include <machine/db_machdep.h>
91 #include <ddb/db_sym.h>
92 #include <ddb/db_extern.h>
93
94 #include <machine/bootconfig.h>
95 #include <machine/bus.h>
96 #include <machine/cpu.h>
97 #include <machine/frame.h>
98 #include <arm/undefined.h>
99
100 #include <arm/arm32/machdep.h>
101
102 #include <arm/xscale/i80200reg.h>
103 #include <arm/xscale/i80200var.h>
104
105 #include <dev/pci/ppbreg.h>
106
107 #include <arm/xscale/beccreg.h>
108 #include <arm/xscale/beccvar.h>
109
110 #include <evbarm/adi_brh/brhreg.h>
111 #include <evbarm/adi_brh/brhvar.h>
112 #include <evbarm/adi_brh/obiovar.h>
113
114 #include "opt_ipkdb.h"
115
116 /*
117 * Address to call from cpu_reset() to reset the machine.
118 * This is machine architecture dependant as it varies depending
119 * on where the ROM appears when you turn the MMU off.
120 */
121
122 u_int cpu_reset_address = 0x00000000;
123
124 /* Define various stack sizes in pages */
125 #define IRQ_STACK_SIZE 1
126 #define ABT_STACK_SIZE 1
127 #ifdef IPKDB
128 #define UND_STACK_SIZE 2
129 #else
130 #define UND_STACK_SIZE 1
131 #endif
132
133 BootConfig bootconfig; /* Boot config storage */
134 char *boot_args = NULL;
135 char *boot_file = NULL;
136
137 vm_offset_t physical_start;
138 vm_offset_t physical_freestart;
139 vm_offset_t physical_freeend;
140 vm_offset_t physical_end;
141 u_int free_pages;
142 vm_offset_t pagetables_start;
143 int physmem = 0;
144
145 /*int debug_flags;*/
146 #ifndef PMAP_STATIC_L1S
147 int max_processes = 64; /* Default number */
148 #endif /* !PMAP_STATIC_L1S */
149
150 /* Physical and virtual addresses for some global pages */
151 pv_addr_t systempage;
152 pv_addr_t irqstack;
153 pv_addr_t undstack;
154 pv_addr_t abtstack;
155 pv_addr_t kernelstack;
156 pv_addr_t minidataclean;
157
158 vm_offset_t msgbufphys;
159
160 extern u_int data_abort_handler_address;
161 extern u_int prefetch_abort_handler_address;
162 extern u_int undefined_handler_address;
163
164 #ifdef PMAP_DEBUG
165 extern int pmap_debug_level;
166 #endif
167
168 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
169
170 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
171 #define KERNEL_PT_KERNEL_NUM 2
172
173 /* L2 tables for mapping kernel VM */
174 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
175 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
176 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
177
178 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
179
180 struct user *proc0paddr;
181
182 /* Prototypes */
183
184 void consinit(void);
185
186 #include "com.h"
187 #if NCOM > 0
188 #include <dev/ic/comreg.h>
189 #include <dev/ic/comvar.h>
190 #endif
191
192 /*
193 * Define the default console speed for the board. This is generally
194 * what the firmware provided with the board defaults to.
195 */
196 #ifndef CONSPEED
197 #define CONSPEED B57600
198 #endif /* ! CONSPEED */
199
200 #ifndef CONUNIT
201 #define CONUNIT 0
202 #endif
203
204 #ifndef CONMODE
205 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
206 #endif
207
208 int comcnspeed = CONSPEED;
209 int comcnmode = CONMODE;
210 int comcnunit = CONUNIT;
211
212 /*
213 * void cpu_reboot(int howto, char *bootstr)
214 *
215 * Reboots the system
216 *
217 * Deal with any syncing, unmounting, dumping and shutdown hooks,
218 * then reset the CPU.
219 */
220 void
221 cpu_reboot(int howto, char *bootstr)
222 {
223 #ifdef DIAGNOSTIC
224 /* info */
225 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
226 #endif
227
228 /*
229 * If we are still cold then hit the air brakes
230 * and crash to earth fast
231 */
232 if (cold) {
233 doshutdownhooks();
234 printf("The operating system has halted.\n");
235 printf("Please press any key to reboot.\n\n");
236 cngetc();
237 printf("rebooting...\n");
238 goto reset;
239 }
240
241 /* Disable console buffering */
242
243 /*
244 * If RB_NOSYNC was not specified sync the discs.
245 * Note: Unless cold is set to 1 here, syslogd will die during the
246 * unmount. It looks like syslogd is getting woken up only to find
247 * that it cannot page part of the binary in as the filesystem has
248 * been unmounted.
249 */
250 if (!(howto & RB_NOSYNC))
251 bootsync();
252
253 /* Say NO to interrupts */
254 splhigh();
255
256 /* Do a dump if requested. */
257 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
258 dumpsys();
259
260 /* Run any shutdown hooks */
261 doshutdownhooks();
262
263 /* Make sure IRQ's are disabled */
264 IRQdisable;
265
266 if (howto & RB_HALT) {
267 brh_7seg('8');
268 printf("The operating system has halted.\n");
269 printf("Please press any key to reboot.\n\n");
270 cngetc();
271 }
272
273 printf("rebooting...\n\r");
274 reset:
275 cpu_reset();
276 }
277
278 /*
279 * Mapping table for core kernel memory. This memory is mapped at init
280 * time with section mappings.
281 */
282 struct l1_sec_map {
283 vaddr_t va;
284 vaddr_t pa;
285 vsize_t size;
286 vm_prot_t prot;
287 int cache;
288 } l1_sec_table[] = {
289 {
290 BRH_PCI_CONF_VBASE,
291 BECC_PCI_CONF_BASE,
292 BRH_PCI_CONF_VSIZE,
293 VM_PROT_READ|VM_PROT_WRITE,
294 PTE_NOCACHE,
295 },
296 {
297 BRH_PCI_MEM1_VBASE,
298 BECC_PCI_MEM1_BASE,
299 BRH_PCI_MEM1_VSIZE,
300 VM_PROT_READ|VM_PROT_WRITE,
301 PTE_NOCACHE,
302 },
303 {
304 BRH_PCI_MEM2_VBASE,
305 BECC_PCI_MEM2_BASE,
306 BRH_PCI_MEM2_VSIZE,
307 VM_PROT_READ|VM_PROT_WRITE,
308 PTE_NOCACHE,
309 },
310 {
311 BRH_UART1_VBASE,
312 BRH_UART1_BASE,
313 BRH_UART1_VSIZE,
314 VM_PROT_READ|VM_PROT_WRITE,
315 PTE_NOCACHE,
316 },
317 {
318 BRH_UART2_VBASE,
319 BRH_UART2_BASE,
320 BRH_UART2_VSIZE,
321 VM_PROT_READ|VM_PROT_WRITE,
322 PTE_NOCACHE,
323 },
324 {
325 BRH_LED_VBASE,
326 BRH_LED_BASE,
327 BRH_LED_VSIZE,
328 VM_PROT_READ|VM_PROT_WRITE,
329 PTE_NOCACHE,
330 },
331 {
332 BRH_PCI_IO_VBASE,
333 BECC_PCI_IO_BASE,
334 BRH_PCI_IO_VSIZE,
335 VM_PROT_READ|VM_PROT_WRITE,
336 PTE_NOCACHE,
337 },
338 {
339 BRH_BECC_VBASE,
340 BECC_REG_BASE,
341 BRH_BECC_VSIZE,
342 VM_PROT_READ|VM_PROT_WRITE,
343 PTE_NOCACHE,
344 },
345 {
346 0,
347 0,
348 0,
349 0,
350 0,
351 }
352 };
353
354 static void
355 brh_hardclock_hook(void)
356 {
357 static int snakefreq;
358
359 if ((snakefreq++ & 15) == 0)
360 brh_7seg_snake();
361 }
362
363 /*
364 * u_int initarm(...)
365 *
366 * Initial entry point on startup. This gets called before main() is
367 * entered.
368 * It should be responsible for setting up everything that must be
369 * in place when main is called.
370 * This includes
371 * Taking a copy of the boot configuration structure.
372 * Initialising the physical console so characters can be printed.
373 * Setting up page tables for the kernel
374 * Relocating the kernel to the bottom of physical memory
375 */
376 u_int
377 initarm(void *arg)
378 {
379 extern vaddr_t xscale_cache_clean_addr;
380 #ifdef DIAGNOSTIC
381 extern vsize_t xscale_minidata_clean_size;
382 #endif
383 int loop;
384 int loop1;
385 u_int l1pagetable;
386 pv_addr_t kernel_l1pt;
387 pv_addr_t kernel_ptpt;
388 paddr_t memstart;
389 psize_t memsize;
390
391 /*
392 * Clear out the 7-segment display. Whee, the first visual
393 * indication that we're running kernel code.
394 */
395 brh_7seg(' ');
396
397 /*
398 * Since we have mapped the on-board devices at their permanent
399 * locations already, it is possible for us to initialize
400 * the console now.
401 */
402 consinit();
403
404 /* Talk to the user */
405 printf("\nNetBSD/evbarm (ADI BRH) booting ...\n");
406
407 /* Calibrate the delay loop. */
408 becc_calibrate_delay();
409 becc_hardclock_hook = brh_hardclock_hook;
410
411 /*
412 * Heads up ... Setup the CPU / MMU / TLB functions
413 */
414 if (set_cpufuncs())
415 panic("cpu not recognized!");
416
417 /*
418 * We are currently running with the MMU enabled and the
419 * entire address space mapped VA==PA. Memory conveniently
420 * starts at 0xc0000000, which is where we want it. Certain
421 * on-board devices have already been mapped where we want
422 * them to be. There is an L1 page table at 0xc0004000.
423 */
424
425 becc_icu_init();
426
427 /*
428 * Memory always starts at 0xc0000000 on a BRH, and the
429 * memory size is always 128M.
430 */
431 memstart = 0xc0000000UL;
432 memsize = (128UL * 1024 * 1024);
433
434 printf("initarm: Configuring system ...\n");
435
436 /* Fake bootconfig structure for the benefit of pmap.c */
437 /* XXX must make the memory description h/w independant */
438 bootconfig.dramblocks = 1;
439 bootconfig.dram[0].address = memstart;
440 bootconfig.dram[0].pages = memsize / NBPG;
441
442 /*
443 * Set up the variables that define the availablilty of
444 * physical memory. For now, we're going to set
445 * physical_freestart to 0xc0200000 (where the kernel
446 * was loaded), and allocate the memory we need downwards.
447 * If we get too close to the L1 table that we set up, we
448 * will panic. We will update physical_freestart and
449 * physical_freeend later to reflect what pmap_bootstrap()
450 * wants to see.
451 *
452 * XXX pmap_bootstrap() needs an enema.
453 */
454 physical_start = bootconfig.dram[0].address;
455 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
456
457 physical_freestart = 0xc0009000UL;
458 physical_freeend = 0xc0200000UL;
459
460 /* Tell the user about the memory */
461 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
462 physical_start, physical_end - 1);
463
464 /*
465 * Okay, the kernel starts 2MB in from the bottom of physical
466 * memory. We are going to allocate our bootstrap pages downwards
467 * from there.
468 *
469 * We need to allocate some fixed page tables to get the kernel
470 * going. We allocate one page directory and a number of page
471 * tables and store the physical addresses in the kernel_pt_table
472 * array.
473 *
474 * The kernel page directory must be on a 16K boundary. The page
475 * tables must be on 4K bounaries. What we do is allocate the
476 * page directory on the first 16K boundary that we encounter, and
477 * the page tables on 4K boundaries otherwise. Since we allocate
478 * at least 3 L2 page tables, we are guaranteed to encounter at
479 * least one 16K aligned region.
480 */
481
482 #ifdef VERBOSE_INIT_ARM
483 printf("Allocating page tables\n");
484 #endif
485
486 free_pages = (physical_freeend - physical_freestart) / NBPG;
487
488 #ifdef VERBOSE_INIT_ARM
489 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
490 physical_freestart, free_pages, free_pages);
491 #endif
492
493 /* Define a macro to simplify memory allocation */
494 #define valloc_pages(var, np) \
495 alloc_pages((var).pv_pa, (np)); \
496 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
497
498 #define alloc_pages(var, np) \
499 physical_freeend -= ((np) * NBPG); \
500 if (physical_freeend < physical_freestart) \
501 panic("initarm: out of memory"); \
502 (var) = physical_freeend; \
503 free_pages -= (np); \
504 memset((char *)(var), 0, ((np) * NBPG));
505
506 loop1 = 0;
507 kernel_l1pt.pv_pa = 0;
508 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
509 /* Are we 16KB aligned for an L1 ? */
510 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
511 && kernel_l1pt.pv_pa == 0) {
512 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG);
513 } else {
514 alloc_pages(kernel_pt_table[loop1].pv_pa,
515 L2_TABLE_SIZE / NBPG);
516 kernel_pt_table[loop1].pv_va =
517 kernel_pt_table[loop1].pv_pa;
518 ++loop1;
519 }
520 }
521
522 /* This should never be able to happen but better confirm that. */
523 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
524 panic("initarm: Failed to align the kernel page directory\n");
525
526 /*
527 * Allocate a page for the system page mapped to V0x00000000
528 * This page will just contain the system vectors and can be
529 * shared by all processes.
530 */
531 alloc_pages(systempage.pv_pa, 1);
532
533 /* Allocate a page for the page table to map kernel page tables. */
534 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG);
535
536 /* Allocate stacks for all modes */
537 valloc_pages(irqstack, IRQ_STACK_SIZE);
538 valloc_pages(abtstack, ABT_STACK_SIZE);
539 valloc_pages(undstack, UND_STACK_SIZE);
540 valloc_pages(kernelstack, UPAGES);
541
542 /* Allocate enough pages for cleaning the Mini-Data cache. */
543 KASSERT(xscale_minidata_clean_size <= NBPG);
544 valloc_pages(minidataclean, 1);
545
546 #ifdef VERBOSE_INIT_ARM
547 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
548 irqstack.pv_va);
549 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
550 abtstack.pv_va);
551 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
552 undstack.pv_va);
553 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
554 kernelstack.pv_va);
555 #endif
556
557 /*
558 * XXX Defer this to later so that we can reclaim the memory
559 * XXX used by the RedBoot page tables.
560 */
561 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
562
563 /*
564 * Ok we have allocated physical pages for the primary kernel
565 * page tables
566 */
567
568 #ifdef VERBOSE_INIT_ARM
569 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
570 #endif
571
572 /*
573 * Now we start construction of the L1 page table
574 * We start by mapping the L2 page tables into the L1.
575 * This means that we can replace L1 mappings later on if necessary
576 */
577 l1pagetable = kernel_l1pt.pv_pa;
578
579 /* Map the L2 pages tables in the L1 page table */
580 pmap_link_l2pt(l1pagetable, 0x00000000,
581 &kernel_pt_table[KERNEL_PT_SYS]);
582 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
583 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
584 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
585 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
586 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
587 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
588 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
589
590 /* update the top of the kernel VM */
591 pmap_curmaxkvaddr =
592 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
593
594 #ifdef VERBOSE_INIT_ARM
595 printf("Mapping kernel\n");
596 #endif
597
598 /* Now we fill in the L2 pagetable for the kernel static code/data */
599 {
600 extern char etext[], _end[];
601 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
602 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
603 u_int logical;
604
605 textsize = (textsize + PGOFSET) & ~PGOFSET;
606 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
607
608 logical = 0x00200000; /* offset of kernel in RAM */
609
610 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
611 physical_start + logical, textsize,
612 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
613 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
614 physical_start + logical, totalsize - textsize,
615 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
616 }
617
618 #ifdef VERBOSE_INIT_ARM
619 printf("Constructing L2 page tables\n");
620 #endif
621
622 /* Map the stack pages */
623 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
624 IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
625 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
626 ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
627 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
628 UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
629 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
630 UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
631
632 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
633 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
634
635 /* Map the Mini-Data cache clean area. */
636 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
637 minidataclean.pv_pa);
638
639 /* Map the page table that maps the kernel pages */
640 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
641 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
642
643 /*
644 * Map entries in the page table used to map PTE's
645 * Basically every kernel page table gets mapped here
646 */
647 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
648 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
649 pmap_map_entry(l1pagetable,
650 PTE_BASE + ((KERNEL_BASE +
651 (loop * 0x00400000)) >> (PGSHIFT-2)),
652 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
653 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
654 }
655 pmap_map_entry(l1pagetable,
656 PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
657 kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
658 pmap_map_entry(l1pagetable,
659 PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
660 kernel_pt_table[KERNEL_PT_SYS].pv_pa,
661 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
662 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
663 pmap_map_entry(l1pagetable,
664 PTE_BASE + ((KERNEL_VM_BASE +
665 (loop * 0x00400000)) >> (PGSHIFT-2)),
666 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
667 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
668
669 /* Map the vector page. */
670 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
671 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
672
673 /*
674 * Map devices we can map w/ section mappings.
675 */
676 loop = 0;
677 while (l1_sec_table[loop].size) {
678 vm_size_t sz;
679
680 #ifdef VERBOSE_INIT_ARM
681 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
682 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
683 l1_sec_table[loop].va);
684 #endif
685 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
686 pmap_map_section(l1pagetable,
687 l1_sec_table[loop].va + sz,
688 l1_sec_table[loop].pa + sz,
689 l1_sec_table[loop].prot,
690 l1_sec_table[loop].cache);
691 ++loop;
692 }
693
694 /*
695 * Give the XScale global cache clean code an appropriately
696 * sized chunk of unmapped VA space starting at 0xff500000
697 * (our device mappings end before this address).
698 */
699 xscale_cache_clean_addr = 0xff500000U;
700
701 /*
702 * Now we have the real page tables in place so we can switch to them.
703 * Once this is done we will be running with the REAL kernel page
704 * tables.
705 */
706
707 /* Switch tables */
708 #ifdef VERBOSE_INIT_ARM
709 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
710 #endif
711 setttb(kernel_l1pt.pv_pa);
712 cpu_tlb_flushID();
713
714 #ifdef VERBOSE_INIT_ARM
715 printf("done!\n");
716 #endif
717
718 #ifdef VERBOSE_INIT_ARM
719 printf("bootstrap done.\n");
720 #endif
721
722 /*
723 * Inform the BECC code where the BECC is mapped.
724 */
725 becc_vaddr = BRH_BECC_VBASE;
726
727 /*
728 * BECC <= Rev7 can only address 64M through the inbound
729 * PCI windows. Limit memory to 64M on those revs. (This
730 * problem was fixed in Rev8 of the BECC; get an FPGA upgrade.)
731 */
732 {
733 vaddr_t va = BRH_PCI_CONF_VBASE | (1U << BECC_IDSEL_BIT) |
734 PCI_CLASS_REG;
735 uint32_t reg;
736
737 reg = *(__volatile uint32_t *) va;
738 becc_rev = PCI_REVISION(reg);
739 if (becc_rev <= BECC_REV_V7 &&
740 memsize > (64UL * 1024 * 1024)) {
741 memsize = (64UL * 1024 * 1024);
742 bootconfig.dram[0].pages = memsize / NBPG;
743 physical_end = physical_start +
744 (bootconfig.dram[0].pages * NBPG);
745 printf("BECC <= Rev7: memory truncated to 64M\n");
746 }
747 }
748
749 /*
750 * Update the physical_freestart/physical_freeend/free_pages
751 * variables.
752 */
753 {
754 extern char _end[];
755
756 physical_freestart = physical_start +
757 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
758 KERNEL_BASE);
759 physical_freeend = physical_end;
760 free_pages = (physical_freeend - physical_freestart) / NBPG;
761 }
762 #ifdef VERBOSE_INIT_ARM
763 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
764 physical_freestart, free_pages, free_pages);
765 #endif
766
767 physmem = (physical_end - physical_start) / NBPG;
768
769 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
770
771 /*
772 * Pages were allocated during the secondary bootstrap for the
773 * stacks for different CPU modes.
774 * We must now set the r13 registers in the different CPU modes to
775 * point to these stacks.
776 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
777 * of the stack memory.
778 */
779 printf("init subsystems: stacks ");
780
781 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
782 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
783 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
784
785 /*
786 * Well we should set a data abort handler.
787 * Once things get going this will change as we will need a proper
788 * handler.
789 * Until then we will use a handler that just panics but tells us
790 * why.
791 * Initialisation of the vectors will just panic on a data abort.
792 * This just fills in a slighly better one.
793 */
794 printf("vectors ");
795 data_abort_handler_address = (u_int)data_abort_handler;
796 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
797 undefined_handler_address = (u_int)undefinedinstruction_bounce;
798
799 /* Initialise the undefined instruction handlers */
800 printf("undefined ");
801 undefined_init();
802
803 /* Load memory into UVM. */
804 printf("page ");
805 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
806 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
807 atop(physical_freestart), atop(physical_freeend),
808 VM_FREELIST_DEFAULT);
809
810 /* Boot strap pmap telling it where the kernel page table is */
811 printf("pmap ");
812 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
813
814 /* Setup the IRQ system */
815 printf("irq ");
816 becc_intr_init();
817 printf("done.\n");
818
819 #ifdef IPKDB
820 /* Initialise ipkdb */
821 ipkdb_init();
822 if (boothowto & RB_KDB)
823 ipkdb_connect(0);
824 #endif
825
826 #ifdef DDB
827 db_machine_init();
828
829 /* Firmware doesn't load symbols. */
830 ddb_init(0, NULL, NULL);
831
832 if (boothowto & RB_KDB)
833 Debugger();
834 #endif
835
836 /* We return the new stack pointer address */
837 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
838 }
839
840 void
841 consinit(void)
842 {
843 static const bus_addr_t comcnaddrs[] = {
844 BRH_UART1_BASE, /* com0 */
845 BRH_UART2_BASE, /* com1 */
846 };
847 static int consinit_called;
848
849 if (consinit_called != 0)
850 return;
851
852 consinit_called = 1;
853
854 #if NCOM > 0
855 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
856 BECC_PERIPH_CLOCK, comcnmode))
857 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
858 #else
859 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
860 #endif
861 }
862