armadillo9_start.S revision 1.1.6.1
1 /* $NetBSD: armadillo9_start.S,v 1.1.6.1 2006/02/18 15:38:32 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2003 5 * Ichiro FUKUHARA <ichiro (at) ichiro.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Ichiro FUKUHARA. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <machine/asm.h> 37 #include <arm/armreg.h> 38 #include <arm/arm32/pte.h> 39 #include "epcom.h" 40 41 .section .start,"ax",%progbits 42 43 .global _C_LABEL(armadillo9_start) 44 _C_LABEL(armadillo9_start): 45 46 /* make sure svc mode and all fiqs&irqs disabled */ 47 mov r0, #(PSR_SVC32_MODE | I32_bit | F32_bit) 48 msr cpsr_c, r0 49 50 /* 51 * We will go ahead and disable the MMU here so that we don't 52 * have to worry about flushing caches, etc. 53 * 54 * Note that we may not currently be running VA==PA, which means 55 * we'll need to leap to the next insn after disabing the MMU. 56 */ 57 adr r8, Lunmapped 58 bic r8, r8, #0xff000000 /* clear upper 8 bits */ 59 orr r8, r8, #0xc0000000 /* OR in physical base address */ 60 61 /* 62 * Setup coprocessor 15. 63 */ 64 mrc p15, 0, r2, c1, c0, 0 65 bic r2, r2, #CPU_CONTROL_MMU_ENABLE 66 bic r2, r2, #CPU_CONTROL_DC_ENABLE 67 bic r2, r2, #CPU_CONTROL_IC_ENABLE 68 mcr p15, 0, r2, c1, c0, 0 69 70 nop 71 nop 72 nop 73 mov pc, r8 /* Heave-ho! */ 74 75 Lunmapped: 76 /* set temporary stack pointer */ 77 ldr sp, Ltable 78 79 #ifdef VERBOSE_INIT_ARM 80 /* initialize UART */ 81 bl init_UART 82 #endif 83 /* copy bootparam */ 84 bl copy_bootparam 85 86 /* copy myself to virtual address */ 87 bl copy_myself 88 89 /* 90 * We want to construct a memory map that maps us 91 * VA==PA (SDRAM at 0xc0000000). We create these 92 * mappings uncached and unbuffered to be safe. 93 */ 94 /* 95 * Step 1: Map the entire address space VA==PA. 96 */ 97 adr r4, Ltable 98 ldr r0, [r4] /* r0 = &l1table */ 99 mov r1, #(L1_TABLE_SIZE / 4) /* 4096 entry */ 100 mov r2, #(L1_S_SIZE) /* 1MB / section */ 101 mov r3, #(L1_S_AP(AP_KRW)) /* kernel read/write */ 102 orr r3, r3, #(L1_TYPE_S) /* L1 entry is section */ 103 1: 104 str r3, [r0], #0x04 105 add r3, r3, r2 106 subs r1, r1, #1 107 bgt 1b 108 109 /* 110 * Step 2: Map VA 0xf0000000->0xf00fffff to PA 0x80000000->0x800fffff. 111 */ 112 ldr r0, [r4] 113 add r0, r0, #(0xf00 * 4) /* offset to 0xf0000000 */ 114 mov r3, #(L1_S_AP(AP_KRW)) /* kernel read/write */ 115 orr r3, r3, #(L1_TYPE_S) /* L1 entry is section */ 116 orr r3, r3, #0x80000000 117 str r3, [r0], #4 118 119 /* 120 * Step 3: Map VA 0xf0100000->0xf02fffff to PA 0x80800000->0x809fffff. 121 */ 122 mov r3, #(L1_S_AP(AP_KRW)) /* kernel read/write */ 123 orr r3, r3, #(L1_TYPE_S) /* L1 entry is section */ 124 orr r3, r3, #0x80000000 125 orr r3, r3, #0x00800000 126 str r3, [r0], #0x4 127 add r3, r3, r2 128 str r3, [r0], #0x4 129 130 /* OK! Page table is set up. Give it to the CPU. */ 131 adr r0, Ltable 132 ldr r0, [r0] 133 mcr p15, 0, r0, c2, c0, 0 134 135 /* Flush the old TLBs, just in case. */ 136 mcr p15, 0, r0, c8, c7, 0 137 138 /* Set the Domain Access register. Very important! */ 139 mov r0, #1 140 mcr p15, 0, r0, c3, c0, 0 141 142 /* Get ready to jump to the "real" kernel entry point... */ 143 ldr r1, Lstart 144 mov r1, r1 /* Make sure the load completes! */ 145 146 /* OK, let's enable the MMU. */ 147 mrc p15, 0, r2, c1, c0, 0 148 orr r2, r2, #CPU_CONTROL_MMU_ENABLE 149 mcr p15, 0, r2, c1, c0, 0 150 151 nop 152 nop 153 nop 154 155 /* CPWAIT sequence to make sure the MMU is on... */ 156 mrc p15, 0, r2, c2, c0, 0 /* arbitrary read of CP15 */ 157 mov r2, r2 /* force it to complete */ 158 mov pc, r1 /* leap to kernel entry point! */ 159 160 #define BOOTPARAM_ADDRESS 0xc0000100 161 #define BOOTPARAM_SIZE 0x0f00 162 163 Ltable: 164 .word armadillo9_start - L1_TABLE_SIZE 165 Lstart: 166 .word start 167 168 Lsection: 169 .word .start 170 .word 0xc0200000 171 .word __bss_start 172 173 Lbootparam_address: 174 .word BOOTPARAM_ADDRESS 175 176 copy_myself: 177 stmfd sp!, {r0-r5, lr} 178 adr r0, Lsection 179 ldmia r0, {r1, r2, r4} /* r1: kernel(load) start address */ 180 /* r2: kernel(virtual) start address */ 181 /* r3: kernel size */ 182 sub r3, r4, r2 /* r4: kernel(virtual) end address */ 183 add r5, r1, r3 /* r5: kernel(load) end address */ 184 #ifdef VERBOSE_INIT_ARM 185 adr r0, Lmsg1 /* "copy kernel from " */ 186 bl print_str 187 bl print_r1 188 adr r0, Lmsg2 /* " to " */ 189 bl print_str 190 bl print_r2 191 adr r0, Lmsg3 /* " size " */ 192 bl print_str 193 bl print_r3 194 bl print_cr 195 #endif 196 1: 197 ldr r0, [r5], #-4 198 str r0, [r4], #-4 199 cmp r5, r1 200 bge 1b 201 ldmfd sp!, {r0-r5, pc} 202 203 copy_bootparam: 204 stmfd sp!, {r0-r3, lr} 205 mov r1, #BOOTPARAM_SIZE 206 ldr r2, Lbootparam_address 207 adr r3, _C_LABEL(bootparam) 208 #ifdef VERBOSE_INIT_ARM 209 adr r0, Lmsg0 /* "copy bootparam from " */ 210 bl print_str 211 bl print_r2 212 adr r0, Lmsg2 /* " to " */ 213 bl print_str 214 bl print_r3 215 adr r0, Lmsg3 /* " size " */ 216 bl print_str 217 bl print_r1 218 bl print_cr 219 #endif 220 1: 221 ldr r0, [r2], #4 222 str r0, [r3], #4 223 subs r1, r1, #4 224 bne 1b 225 ldmfd sp!, {r0-r3, pc} 226 227 #ifdef VERBOSE_INIT_ARM 228 Lmsg0: 229 .asciz "copy bootparam from " 230 .align 0 231 Lmsg1: 232 .asciz "copy kernel from " 233 .align 0 234 Lmsg2: 235 .asciz " to " 236 .align 0 237 Lmsg3: 238 .asciz " size " 239 .align 0 240 241 #if NEPCOM > 0 242 #define EP93XX_APB_UART1 0x808c0000 243 #define EP93XX_APB_UART2 0x808d0000 244 245 #ifndef CONUNIT 246 #define CONUNIT 0 247 #endif 248 249 Lcomaddr: 250 .word EP93XX_APB_UART1 251 .word EP93XX_APB_UART2 252 #endif 253 254 init_UART: 255 stmfd sp!, {r4-r5, lr} 256 #if NEPCOM > 0 257 ldr r4, Lcomaddr+(CONUNIT*4) 258 ldr r5, [r4, #0x08] 259 orr r5, r5, #0x10 260 str r5, [r4, #0x08] /* enable FIFO */ 261 mov r5, #0x01 262 str r5, [r4, #0x14] /* disable interrupt */ 263 #endif 264 ldmfd sp!, {r4-r5, pc} 265 266 print_char: /* char = r0 */ 267 stmfd sp!, {r4-r5, lr} 268 #if NEPCOM > 0 269 ldr r4, Lcomaddr+(CONUNIT*4) 270 1: 271 ldr r5, [r4, #0x18] 272 tst r5, #0x20 /* check TXFF */ 273 bne 1b 274 str r0, [r4, #0x00] 275 #endif 276 ldmfd sp!, {r4-r5, pc} 277 278 print_cr: 279 stmfd sp!, {r0, lr} 280 #if NEPCOM > 0 281 mov r0, #0x0d /* cr */ 282 bl print_char 283 mov r0, #0x0a /* lf */ 284 bl print_char 285 #endif 286 ldmfd sp!, {r0, pc} 287 288 print_str: 289 stmfd sp!, {r0, r4, lr} 290 #if NEPCOM > 0 291 mov r4, r0 292 1: 293 ldrb r0, [r4], #1 294 cmp r0, #0 295 beq 2f 296 bl print_char 297 b 1b 298 2: 299 #endif 300 ldmfd sp!, {r0, r4, pc} 301 302 print_r3: 303 stmfd sp!, {r0, r3-r6, lr} 304 #if NEPCOM > 0 305 mov r4, #28 306 mov r5, #0xf 307 1: 308 and r6, r5, r3, ROR r4 309 cmp r6, #10 310 addlt r0, r6, #'0' 311 addge r0, r6, #('a' - 0x0a) 312 bl print_char 313 subs r4, r4, #4 314 bge 1b 315 #endif 316 ldmfd sp!, {r0, r3-r6, pc} 317 318 #define print_register(reg) \ 319 stmfd sp!, {r3, lr} ;\ 320 mov r3, reg ;\ 321 bl print_r3 ;\ 322 ldmfd sp!, {r3, pc} 323 324 print_r0: 325 print_register(r0) 326 327 print_r1: 328 print_register(r1) 329 330 print_r2: 331 print_register(r2) 332 #endif 333 334 .global _C_LABEL(bootparam) 335 _C_LABEL(bootparam): 336 .space BOOTPARAM_SIZE 337
Indexes created Sun Oct 19 19:09:49 GMT 2025