bcm53xx_machdep.c revision 1.7.4.2 1 1.7.4.2 matt /* $NetBSD: bcm53xx_machdep.c,v 1.7.4.2 2014/02/15 16:18:37 matt Exp $ */
2 1.7.4.2 matt
3 1.7.4.2 matt /*-
4 1.7.4.2 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 1.7.4.2 matt * All rights reserved.
6 1.7.4.2 matt *
7 1.7.4.2 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.7.4.2 matt * by Matt Thomas of 3am Software Foundry.
9 1.7.4.2 matt *
10 1.7.4.2 matt * Redistribution and use in source and binary forms, with or without
11 1.7.4.2 matt * modification, are permitted provided that the following conditions
12 1.7.4.2 matt * are met:
13 1.7.4.2 matt * 1. Redistributions of source code must retain the above copyright
14 1.7.4.2 matt * notice, this list of conditions and the following disclaimer.
15 1.7.4.2 matt * 2. Redistributions in binary form must reproduce the above copyright
16 1.7.4.2 matt * notice, this list of conditions and the following disclaimer in the
17 1.7.4.2 matt * documentation and/or other materials provided with the distribution.
18 1.7.4.2 matt *
19 1.7.4.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.7.4.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.7.4.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.7.4.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.7.4.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.7.4.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.7.4.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.7.4.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.7.4.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.7.4.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.7.4.2 matt * POSSIBILITY OF SUCH DAMAGE.
30 1.7.4.2 matt */
31 1.7.4.2 matt
32 1.7.4.2 matt #define CCA_PRIVATE
33 1.7.4.2 matt #define IDM_PRIVATE
34 1.7.4.2 matt
35 1.7.4.2 matt #include <sys/cdefs.h>
36 1.7.4.2 matt __KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.7.4.2 2014/02/15 16:18:37 matt Exp $");
37 1.7.4.2 matt
38 1.7.4.2 matt #include "opt_evbarm_boardtype.h"
39 1.7.4.2 matt #include "opt_broadcom.h"
40 1.7.4.2 matt #include "opt_kgdb.h"
41 1.7.4.2 matt #include "com.h"
42 1.7.4.2 matt #include "pci.h"
43 1.7.4.2 matt #include "bcmrng_ccb.h"
44 1.7.4.2 matt
45 1.7.4.2 matt #include <sys/param.h>
46 1.7.4.2 matt #include <sys/bus.h>
47 1.7.4.2 matt #include <sys/atomic.h>
48 1.7.4.2 matt #include <sys/device.h>
49 1.7.4.2 matt #include <sys/kernel.h>
50 1.7.4.2 matt #include <sys/reboot.h>
51 1.7.4.2 matt #include <sys/termios.h>
52 1.7.4.2 matt
53 1.7.4.2 matt #include <dev/cons.h>
54 1.7.4.2 matt
55 1.7.4.2 matt #include <uvm/uvm_extern.h>
56 1.7.4.2 matt
57 1.7.4.2 matt #include <arm/db_machdep.h>
58 1.7.4.2 matt #include <arm/undefined.h>
59 1.7.4.2 matt #include <arm/arm32/machdep.h>
60 1.7.4.2 matt
61 1.7.4.2 matt #include <machine/autoconf.h>
62 1.7.4.2 matt #include <machine/bootconfig.h>
63 1.7.4.2 matt
64 1.7.4.2 matt #define CCA_PRIVATE
65 1.7.4.2 matt
66 1.7.4.2 matt #include <arm/cortex/scu_reg.h>
67 1.7.4.2 matt #include <arm/broadcom/bcm53xx_var.h>
68 1.7.4.2 matt
69 1.7.4.2 matt #include <evbarm/bcm53xx/platform.h>
70 1.7.4.2 matt
71 1.7.4.2 matt #if NCOM == 0
72 1.7.4.2 matt #error missing COM device for console
73 1.7.4.2 matt #endif
74 1.7.4.2 matt
75 1.7.4.2 matt #include <dev/ic/comreg.h>
76 1.7.4.2 matt #include <dev/ic/comvar.h>
77 1.7.4.2 matt
78 1.7.4.2 matt extern int _end[];
79 1.7.4.2 matt extern int KERNEL_BASE_phys[];
80 1.7.4.2 matt extern int KERNEL_BASE_virt[];
81 1.7.4.2 matt
82 1.7.4.2 matt BootConfig bootconfig;
83 1.7.4.2 matt static char bootargs[MAX_BOOT_STRING];
84 1.7.4.2 matt char *boot_args = NULL;
85 1.7.4.2 matt
86 1.7.4.2 matt int physmem;
87 1.7.4.2 matt
88 1.7.4.2 matt u_int uboot_args[4] = { 0 };
89 1.7.4.2 matt
90 1.7.4.2 matt static void bcm53xx_system_reset(void);
91 1.7.4.2 matt static size_t bcm53xx_page_to_pggroup(struct vm_page *, size_t);
92 1.7.4.2 matt
93 1.7.4.2 matt /*
94 1.7.4.2 matt * Macros to translate between physical and virtual for a subset of the
95 1.7.4.2 matt * kernel address space. *Not* for general use.
96 1.7.4.2 matt */
97 1.7.4.2 matt #define KERN_VTOPDIFF ((vaddr_t)KERNEL_BASE_phys - (vaddr_t)KERNEL_BASE_virt)
98 1.7.4.2 matt #define KERN_VTOPHYS(va) ((paddr_t)((vaddr_t)va + KERN_VTOPDIFF))
99 1.7.4.2 matt #define KERN_PHYSTOV(pa) ((vaddr_t)((paddr_t)pa - KERN_VTOPDIFF))
100 1.7.4.2 matt
101 1.7.4.2 matt #ifndef CONADDR
102 1.7.4.2 matt #define CONADDR (BCM53XX_IOREG_PBASE + CCA_UART0_BASE)
103 1.7.4.2 matt #endif
104 1.7.4.2 matt #ifndef CONSPEED
105 1.7.4.2 matt #define CONSPEED B115200
106 1.7.4.2 matt #endif
107 1.7.4.2 matt #ifndef CONMODE
108 1.7.4.2 matt #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
109 1.7.4.2 matt #endif
110 1.7.4.2 matt
111 1.7.4.2 matt #if (NCOM > 0)
112 1.7.4.2 matt static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
113 1.7.4.2 matt
114 1.7.4.2 matt int comcnspeed = CONSPEED;
115 1.7.4.2 matt int comcnmode = CONMODE | CLOCAL;
116 1.7.4.2 matt #endif
117 1.7.4.2 matt
118 1.7.4.2 matt #ifdef KGDB
119 1.7.4.2 matt #include <sys/kgdb.h>
120 1.7.4.2 matt #endif
121 1.7.4.2 matt
122 1.7.4.2 matt /*
123 1.7.4.2 matt * Static device mappings. These peripheral registers are mapped at
124 1.7.4.2 matt * fixed virtual addresses very early in initarm() so that we can use
125 1.7.4.2 matt * them while booting the kernel, and stay at the same address
126 1.7.4.2 matt * throughout whole kernel's life time.
127 1.7.4.2 matt *
128 1.7.4.2 matt * We use this table twice; once with bootstrap page table, and once
129 1.7.4.2 matt * with kernel's page table which we build up in initarm().
130 1.7.4.2 matt *
131 1.7.4.2 matt * Since we map these registers into the bootstrap page table using
132 1.7.4.2 matt * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
133 1.7.4.2 matt * registers segment-aligned and segment-rounded in order to avoid
134 1.7.4.2 matt * using the 2nd page tables.
135 1.7.4.2 matt */
136 1.7.4.2 matt
137 1.7.4.2 matt static const struct pmap_devmap devmap[] = {
138 1.7.4.2 matt {
139 1.7.4.2 matt KERNEL_IO_IOREG_VBASE,
140 1.7.4.2 matt BCM53XX_IOREG_PBASE, /* 0x18000000 */
141 1.7.4.2 matt BCM53XX_IOREG_SIZE, /* 2MB */
142 1.7.4.2 matt VM_PROT_READ|VM_PROT_WRITE,
143 1.7.4.2 matt PTE_NOCACHE,
144 1.7.4.2 matt },
145 1.7.4.2 matt {
146 1.7.4.2 matt KERNEL_IO_ARMCORE_VBASE,
147 1.7.4.2 matt BCM53XX_ARMCORE_PBASE, /* 0x19000000 */
148 1.7.4.2 matt BCM53XX_ARMCORE_SIZE, /* 1MB */
149 1.7.4.2 matt VM_PROT_READ|VM_PROT_WRITE,
150 1.7.4.2 matt PTE_NOCACHE,
151 1.7.4.2 matt },
152 1.7.4.2 matt #if NPCI > 0
153 1.7.4.2 matt {
154 1.7.4.2 matt KERNEL_IO_PCIE0_OWIN_VBASE,
155 1.7.4.2 matt BCM53XX_PCIE0_OWIN_PBASE, /* 0x08000000 */
156 1.7.4.2 matt BCM53XX_PCIE0_OWIN_SIZE, /* 4MB */
157 1.7.4.2 matt VM_PROT_READ|VM_PROT_WRITE,
158 1.7.4.2 matt PTE_NOCACHE,
159 1.7.4.2 matt },
160 1.7.4.2 matt {
161 1.7.4.2 matt KERNEL_IO_PCIE1_OWIN_VBASE,
162 1.7.4.2 matt BCM53XX_PCIE1_OWIN_PBASE, /* 0x40000000 */
163 1.7.4.2 matt BCM53XX_PCIE1_OWIN_SIZE, /* 4MB */
164 1.7.4.2 matt VM_PROT_READ|VM_PROT_WRITE,
165 1.7.4.2 matt PTE_NOCACHE,
166 1.7.4.2 matt },
167 1.7.4.2 matt {
168 1.7.4.2 matt KERNEL_IO_PCIE2_OWIN_VBASE,
169 1.7.4.2 matt BCM53XX_PCIE2_OWIN_PBASE, /* 0x48000000 */
170 1.7.4.2 matt BCM53XX_PCIE2_OWIN_SIZE, /* 4MB */
171 1.7.4.2 matt VM_PROT_READ|VM_PROT_WRITE,
172 1.7.4.2 matt PTE_NOCACHE,
173 1.7.4.2 matt },
174 1.7.4.2 matt #endif /* NPCI > 0 */
175 1.7.4.2 matt { 0, 0, 0, 0, 0 }
176 1.7.4.2 matt };
177 1.7.4.2 matt
178 1.7.4.2 matt static const struct boot_physmem bp_first256 = {
179 1.7.4.2 matt #ifdef BCM5301X
180 1.7.4.2 matt .bp_start = 0x80000000 / NBPG,
181 1.7.4.2 matt .bp_pages = 0x10000000 / NBPG,
182 1.7.4.2 matt #elif defined(BCM563XX)
183 1.7.4.2 matt .bp_start = 0x60000000 / NBPG,
184 1.7.4.2 matt .bp_pages = 0x20000000 / NBPG,
185 1.7.4.2 matt #endif
186 1.7.4.2 matt .bp_freelist = VM_FREELIST_ISADMA,
187 1.7.4.2 matt .bp_flags = 0,
188 1.7.4.2 matt };
189 1.7.4.2 matt
190 1.7.4.2 matt /*
191 1.7.4.2 matt * u_int initarm(...)
192 1.7.4.2 matt *
193 1.7.4.2 matt * Initial entry point on startup. This gets called before main() is
194 1.7.4.2 matt * entered.
195 1.7.4.2 matt * It should be responsible for setting up everything that must be
196 1.7.4.2 matt * in place when main is called.
197 1.7.4.2 matt * This includes
198 1.7.4.2 matt * Taking a copy of the boot configuration structure.
199 1.7.4.2 matt * Initialising the physical console so characters can be printed.
200 1.7.4.2 matt * Setting up page tables for the kernel
201 1.7.4.2 matt */
202 1.7.4.2 matt u_int
203 1.7.4.2 matt initarm(void *arg)
204 1.7.4.2 matt {
205 1.7.4.2 matt pmap_devmap_register(devmap);
206 1.7.4.2 matt bcm53xx_bootstrap(KERNEL_IO_IOREG_VBASE);
207 1.7.4.2 matt
208 1.7.4.2 matt #ifdef MULTIPROCESSOR
209 1.7.4.2 matt uint32_t scu_cfg = bus_space_read_4(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
210 1.7.4.2 matt ARMCORE_SCU_BASE + SCU_CFG);
211 1.7.4.2 matt arm_cpu_max = scu_cfg & SCU_CFG_CPUMAX;
212 1.7.4.2 matt membar_producer();
213 1.7.4.2 matt #endif
214 1.7.4.2 matt /*
215 1.7.4.2 matt * Heads up ... Setup the CPU / MMU / TLB functions
216 1.7.4.2 matt */
217 1.7.4.2 matt if (set_cpufuncs()) // starts PMC counter
218 1.7.4.2 matt panic("cpu not recognized!");
219 1.7.4.2 matt
220 1.7.4.2 matt cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
221 1.7.4.2 matt
222 1.7.4.2 matt consinit();
223 1.7.4.2 matt
224 1.7.4.2 matt bcm53xx_cpu_softc_init(curcpu());
225 1.7.4.2 matt bcm53xx_print_clocks();
226 1.7.4.2 matt
227 1.7.4.2 matt #if NBCMRNG_CCB > 0
228 1.7.4.2 matt /*
229 1.7.4.2 matt * Start this early since it takes a while to startup up.
230 1.7.4.2 matt */
231 1.7.4.2 matt bcm53xx_rng_start(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
232 1.7.4.2 matt #endif
233 1.7.4.2 matt
234 1.7.4.2 matt printf("uboot arg = %#x, %#x, %#x, %#x\n",
235 1.7.4.2 matt uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
236 1.7.4.2 matt
237 1.7.4.2 matt /* Talk to the user */
238 1.7.4.2 matt printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
239 1.7.4.2 matt
240 1.7.4.2 matt bootargs[0] = '\0';
241 1.7.4.2 matt
242 1.7.4.2 matt #if defined(VERBOSE_INIT_ARM) || 1
243 1.7.4.2 matt printf("initarm: Configuring system");
244 1.7.4.2 matt #ifdef MULTIPROCESSOR
245 1.7.4.2 matt printf(" (%u cpu%s, hatched %#x)",
246 1.7.4.2 matt arm_cpu_max + 1, arm_cpu_max + 1 ? "s" : "",
247 1.7.4.2 matt arm_cpu_hatched);
248 1.7.4.2 matt #endif
249 1.7.4.2 matt printf(", CLIDR=%010o CTR=%#x PMUSERSR=%#x",
250 1.7.4.2 matt armreg_clidr_read(), armreg_ctr_read(), armreg_pmuserenr_read());
251 1.7.4.2 matt printf("\n");
252 1.7.4.2 matt #endif
253 1.7.4.2 matt
254 1.7.4.2 matt psize_t memsize = bcm53xx_memprobe();
255 1.7.4.2 matt #ifdef MEMSIZE
256 1.7.4.2 matt if ((memsize >> 20) > MEMSIZE)
257 1.7.4.2 matt memsize = MEMSIZE*1024*1024;
258 1.7.4.2 matt #endif
259 1.7.4.2 matt const bool bigmem_p = (memsize >> PGSHIFT) > bp_first256.bp_pages;
260 1.7.4.2 matt
261 1.7.4.2 matt arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
262 1.7.4.2 matt (paddr_t)KERNEL_BASE_phys);
263 1.7.4.2 matt
264 1.7.4.2 matt bcm53xx_dma_bootstrap(memsize);
265 1.7.4.2 matt
266 1.7.4.2 matt /*
267 1.7.4.2 matt * This is going to do all the hard work of setting up the first and
268 1.7.4.2 matt * and second level page tables. Pages of memory will be allocated
269 1.7.4.2 matt * and mapped for other structures that are required for system
270 1.7.4.2 matt * operation. When it returns, physical_freestart and free_pages will
271 1.7.4.2 matt * have been updated to reflect the allocations that were made. In
272 1.7.4.2 matt * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
273 1.7.4.2 matt * abtstack, undstack, kernelstack, msgbufphys will be set to point to
274 1.7.4.2 matt * the memory that was allocated for them.
275 1.7.4.2 matt */
276 1.7.4.2 matt arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, true);
277 1.7.4.2 matt
278 1.7.4.2 matt cpu_reset_address = bcm53xx_system_reset;
279 1.7.4.2 matt /* we've a specific device_register routine */
280 1.7.4.2 matt evbarm_device_register = bcm53xx_device_register;
281 1.7.4.2 matt if (bigmem_p) {
282 1.7.4.2 matt /*
283 1.7.4.2 matt * If we have more than 256MB
284 1.7.4.2 matt */
285 1.7.4.2 matt arm_poolpage_vmfreelist = bp_first256.bp_freelist;
286 1.7.4.2 matt arm_page_to_pggroup = bcm53xx_page_to_pggroup;
287 1.7.4.2 matt }
288 1.7.4.2 matt
289 1.7.4.2 matt /*
290 1.7.4.2 matt * If we have more than 256MB of RAM, set aside the first 256MB for
291 1.7.4.2 matt * non-default VM allocations.
292 1.7.4.2 matt */
293 1.7.4.2 matt return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
294 1.7.4.2 matt (bigmem_p ? &bp_first256 : NULL), (bigmem_p ? 1 : 0));
295 1.7.4.2 matt }
296 1.7.4.2 matt
297 1.7.4.2 matt static size_t
298 1.7.4.2 matt bcm53xx_page_to_pggroup(struct vm_page *pg, size_t ncolors)
299 1.7.4.2 matt {
300 1.7.4.2 matt const struct boot_physmem * const bp = &bp_first256;
301 1.7.4.2 matt const paddr_t pfn = VM_PAGE_TO_PHYS(pg) >> PGSHIFT;
302 1.7.4.2 matt const u_int color = VM_PGCOLOR_BUCKET(pg);
303 1.7.4.2 matt
304 1.7.4.2 matt if (arm_poolpage_vmfreelist != VM_FREELIST_DEFAULT
305 1.7.4.2 matt && bp->bp_start <= pfn && pfn < bp->bp_start + bp->bp_pages)
306 1.7.4.2 matt return VM_FREELIST_ISADMA * ncolors + color;
307 1.7.4.2 matt
308 1.7.4.2 matt return VM_FREELIST_DEFAULT * ncolors + color;
309 1.7.4.2 matt }
310 1.7.4.2 matt
311 1.7.4.2 matt void
312 1.7.4.2 matt consinit(void)
313 1.7.4.2 matt {
314 1.7.4.2 matt static bool consinit_called = false;
315 1.7.4.2 matt uint32_t v;
316 1.7.4.2 matt if (consinit_called)
317 1.7.4.2 matt return;
318 1.7.4.2 matt
319 1.7.4.2 matt consinit_called = true;
320 1.7.4.2 matt
321 1.7.4.2 matt /*
322 1.7.4.2 matt * Force UART clock to the reference clock
323 1.7.4.2 matt */
324 1.7.4.2 matt v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
325 1.7.4.2 matt IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT);
326 1.7.4.2 matt v &= ~IO_CONTROL_DIRECT_UARTCLKSEL;
327 1.7.4.2 matt bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
328 1.7.4.2 matt IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT, v);
329 1.7.4.2 matt
330 1.7.4.2 matt /*
331 1.7.4.2 matt * Switch to the reference clock
332 1.7.4.2 matt */
333 1.7.4.2 matt v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
334 1.7.4.2 matt CCA_MISC_BASE + MISC_CORECTL);
335 1.7.4.2 matt v &= ~CORECTL_UART_CLK_OVERRIDE;
336 1.7.4.2 matt bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
337 1.7.4.2 matt CCA_MISC_BASE + MISC_CORECTL, v);
338 1.7.4.2 matt
339 1.7.4.2 matt if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
340 1.7.4.2 matt BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
341 1.7.4.2 matt panic("Serial console can not be initialized.");
342 1.7.4.2 matt }
343 1.7.4.2 matt
344 1.7.4.2 matt static void
345 1.7.4.2 matt bcm53xx_system_reset(void)
346 1.7.4.2 matt {
347 1.7.4.2 matt bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
348 1.7.4.2 matt MISC_WATCHDOG, 1);
349 1.7.4.2 matt }
350