bcm53xx_machdep.c revision 1.8 1 1.8 matt /* $NetBSD: bcm53xx_machdep.c,v 1.8 2014/03/29 14:02:46 matt Exp $ */
2 1.1 matt
3 1.1 matt /*-
4 1.1 matt * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * This code is derived from software contributed to The NetBSD Foundation
8 1.1 matt * by Matt Thomas of 3am Software Foundry.
9 1.1 matt *
10 1.1 matt * Redistribution and use in source and binary forms, with or without
11 1.1 matt * modification, are permitted provided that the following conditions
12 1.1 matt * are met:
13 1.1 matt * 1. Redistributions of source code must retain the above copyright
14 1.1 matt * notice, this list of conditions and the following disclaimer.
15 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 matt * notice, this list of conditions and the following disclaimer in the
17 1.1 matt * documentation and/or other materials provided with the distribution.
18 1.1 matt *
19 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
30 1.1 matt */
31 1.1 matt
32 1.1 matt #define CCA_PRIVATE
33 1.1 matt #define IDM_PRIVATE
34 1.1 matt
35 1.1 matt #include <sys/cdefs.h>
36 1.8 matt __KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.8 2014/03/29 14:02:46 matt Exp $");
37 1.1 matt
38 1.1 matt #include "opt_evbarm_boardtype.h"
39 1.1 matt #include "opt_broadcom.h"
40 1.1 matt #include "opt_kgdb.h"
41 1.1 matt #include "com.h"
42 1.2 matt #include "pci.h"
43 1.1 matt #include "bcmrng_ccb.h"
44 1.1 matt
45 1.1 matt #include <sys/param.h>
46 1.1 matt #include <sys/bus.h>
47 1.1 matt #include <sys/atomic.h>
48 1.1 matt #include <sys/device.h>
49 1.1 matt #include <sys/kernel.h>
50 1.1 matt #include <sys/reboot.h>
51 1.1 matt #include <sys/termios.h>
52 1.1 matt
53 1.1 matt #include <dev/cons.h>
54 1.1 matt
55 1.1 matt #include <uvm/uvm_extern.h>
56 1.1 matt
57 1.1 matt #include <arm/db_machdep.h>
58 1.1 matt #include <arm/undefined.h>
59 1.1 matt #include <arm/arm32/machdep.h>
60 1.1 matt
61 1.1 matt #include <machine/autoconf.h>
62 1.1 matt #include <machine/bootconfig.h>
63 1.1 matt
64 1.1 matt #define CCA_PRIVATE
65 1.1 matt
66 1.1 matt #include <arm/cortex/scu_reg.h>
67 1.1 matt #include <arm/broadcom/bcm53xx_var.h>
68 1.1 matt
69 1.1 matt #include <evbarm/bcm53xx/platform.h>
70 1.1 matt
71 1.1 matt #if NCOM == 0
72 1.1 matt #error missing COM device for console
73 1.1 matt #endif
74 1.1 matt
75 1.1 matt #include <dev/ic/comreg.h>
76 1.1 matt #include <dev/ic/comvar.h>
77 1.1 matt
78 1.1 matt extern int _end[];
79 1.1 matt extern int KERNEL_BASE_phys[];
80 1.1 matt extern int KERNEL_BASE_virt[];
81 1.1 matt
82 1.1 matt BootConfig bootconfig;
83 1.1 matt static char bootargs[MAX_BOOT_STRING];
84 1.1 matt char *boot_args = NULL;
85 1.1 matt
86 1.3 matt u_int uboot_args[4] = { 0 };
87 1.3 matt
88 1.1 matt static void bcm53xx_system_reset(void);
89 1.1 matt
90 1.1 matt /*
91 1.1 matt * Macros to translate between physical and virtual for a subset of the
92 1.1 matt * kernel address space. *Not* for general use.
93 1.1 matt */
94 1.1 matt #define KERN_VTOPDIFF ((vaddr_t)KERNEL_BASE_phys - (vaddr_t)KERNEL_BASE_virt)
95 1.1 matt #define KERN_VTOPHYS(va) ((paddr_t)((vaddr_t)va + KERN_VTOPDIFF))
96 1.1 matt #define KERN_PHYSTOV(pa) ((vaddr_t)((paddr_t)pa - KERN_VTOPDIFF))
97 1.1 matt
98 1.1 matt #ifndef CONADDR
99 1.1 matt #define CONADDR (BCM53XX_IOREG_PBASE + CCA_UART0_BASE)
100 1.1 matt #endif
101 1.1 matt #ifndef CONSPEED
102 1.1 matt #define CONSPEED B115200
103 1.1 matt #endif
104 1.1 matt #ifndef CONMODE
105 1.1 matt #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
106 1.1 matt #endif
107 1.1 matt
108 1.1 matt #if (NCOM > 0)
109 1.1 matt static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
110 1.1 matt
111 1.1 matt int comcnspeed = CONSPEED;
112 1.1 matt int comcnmode = CONMODE | CLOCAL;
113 1.1 matt #endif
114 1.1 matt
115 1.1 matt #ifdef KGDB
116 1.1 matt #include <sys/kgdb.h>
117 1.1 matt #endif
118 1.1 matt
119 1.1 matt /*
120 1.1 matt * Static device mappings. These peripheral registers are mapped at
121 1.1 matt * fixed virtual addresses very early in initarm() so that we can use
122 1.1 matt * them while booting the kernel, and stay at the same address
123 1.1 matt * throughout whole kernel's life time.
124 1.1 matt *
125 1.1 matt * We use this table twice; once with bootstrap page table, and once
126 1.1 matt * with kernel's page table which we build up in initarm().
127 1.1 matt *
128 1.1 matt * Since we map these registers into the bootstrap page table using
129 1.1 matt * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
130 1.1 matt * registers segment-aligned and segment-rounded in order to avoid
131 1.1 matt * using the 2nd page tables.
132 1.1 matt */
133 1.1 matt
134 1.1 matt static const struct pmap_devmap devmap[] = {
135 1.1 matt {
136 1.2 matt KERNEL_IO_IOREG_VBASE,
137 1.1 matt BCM53XX_IOREG_PBASE, /* 0x18000000 */
138 1.1 matt BCM53XX_IOREG_SIZE, /* 2MB */
139 1.1 matt VM_PROT_READ|VM_PROT_WRITE,
140 1.1 matt PTE_NOCACHE,
141 1.1 matt },
142 1.1 matt {
143 1.2 matt KERNEL_IO_ARMCORE_VBASE,
144 1.1 matt BCM53XX_ARMCORE_PBASE, /* 0x19000000 */
145 1.2 matt BCM53XX_ARMCORE_SIZE, /* 1MB */
146 1.1 matt VM_PROT_READ|VM_PROT_WRITE,
147 1.1 matt PTE_NOCACHE,
148 1.1 matt },
149 1.2 matt #if NPCI > 0
150 1.2 matt {
151 1.2 matt KERNEL_IO_PCIE0_OWIN_VBASE,
152 1.2 matt BCM53XX_PCIE0_OWIN_PBASE, /* 0x08000000 */
153 1.2 matt BCM53XX_PCIE0_OWIN_SIZE, /* 4MB */
154 1.2 matt VM_PROT_READ|VM_PROT_WRITE,
155 1.2 matt PTE_NOCACHE,
156 1.2 matt },
157 1.2 matt {
158 1.2 matt KERNEL_IO_PCIE1_OWIN_VBASE,
159 1.2 matt BCM53XX_PCIE1_OWIN_PBASE, /* 0x40000000 */
160 1.2 matt BCM53XX_PCIE1_OWIN_SIZE, /* 4MB */
161 1.2 matt VM_PROT_READ|VM_PROT_WRITE,
162 1.2 matt PTE_NOCACHE,
163 1.2 matt },
164 1.2 matt {
165 1.2 matt KERNEL_IO_PCIE2_OWIN_VBASE,
166 1.2 matt BCM53XX_PCIE2_OWIN_PBASE, /* 0x48000000 */
167 1.2 matt BCM53XX_PCIE2_OWIN_SIZE, /* 4MB */
168 1.2 matt VM_PROT_READ|VM_PROT_WRITE,
169 1.2 matt PTE_NOCACHE,
170 1.2 matt },
171 1.2 matt #endif /* NPCI > 0 */
172 1.1 matt { 0, 0, 0, 0, 0 }
173 1.1 matt };
174 1.1 matt
175 1.5 matt static const struct boot_physmem bp_first256 = {
176 1.5 matt .bp_start = 0x80000000 / NBPG,
177 1.5 matt .bp_pages = 0x10000000 / NBPG,
178 1.5 matt .bp_freelist = VM_FREELIST_ISADMA,
179 1.5 matt .bp_flags = 0,
180 1.5 matt };
181 1.5 matt
182 1.1 matt /*
183 1.1 matt * u_int initarm(...)
184 1.1 matt *
185 1.1 matt * Initial entry point on startup. This gets called before main() is
186 1.1 matt * entered.
187 1.1 matt * It should be responsible for setting up everything that must be
188 1.1 matt * in place when main is called.
189 1.1 matt * This includes
190 1.1 matt * Taking a copy of the boot configuration structure.
191 1.1 matt * Initialising the physical console so characters can be printed.
192 1.1 matt * Setting up page tables for the kernel
193 1.1 matt */
194 1.1 matt u_int
195 1.1 matt initarm(void *arg)
196 1.1 matt {
197 1.1 matt pmap_devmap_register(devmap);
198 1.2 matt bcm53xx_bootstrap(KERNEL_IO_IOREG_VBASE);
199 1.1 matt
200 1.1 matt #ifdef MULTIPROCESSOR
201 1.1 matt uint32_t scu_cfg = bus_space_read_4(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
202 1.1 matt ARMCORE_SCU_BASE + SCU_CFG);
203 1.8 matt arm_cpu_max = 1 + (scu_cfg & SCU_CFG_CPUMAX);
204 1.1 matt membar_producer();
205 1.1 matt #endif
206 1.1 matt /*
207 1.1 matt * Heads up ... Setup the CPU / MMU / TLB functions
208 1.1 matt */
209 1.1 matt if (set_cpufuncs()) // starts PMC counter
210 1.1 matt panic("cpu not recognized!");
211 1.1 matt
212 1.1 matt cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
213 1.1 matt
214 1.1 matt consinit();
215 1.1 matt
216 1.1 matt bcm53xx_cpu_softc_init(curcpu());
217 1.1 matt bcm53xx_print_clocks();
218 1.1 matt
219 1.1 matt #if NBCMRNG_CCB > 0
220 1.1 matt /*
221 1.1 matt * Start this early since it takes a while to startup up.
222 1.1 matt */
223 1.1 matt bcm53xx_rng_start(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
224 1.1 matt #endif
225 1.1 matt
226 1.3 matt printf("uboot arg = %#x, %#x, %#x, %#x\n",
227 1.3 matt uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
228 1.3 matt
229 1.1 matt /* Talk to the user */
230 1.1 matt printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
231 1.1 matt
232 1.1 matt bootargs[0] = '\0';
233 1.1 matt
234 1.1 matt #if defined(VERBOSE_INIT_ARM) || 1
235 1.1 matt printf("initarm: Configuring system");
236 1.1 matt #ifdef MULTIPROCESSOR
237 1.1 matt printf(" (%u cpu%s, hatched %#x)",
238 1.1 matt arm_cpu_max + 1, arm_cpu_max + 1 ? "s" : "",
239 1.1 matt arm_cpu_hatched);
240 1.1 matt #endif
241 1.7 matt printf(", CLIDR=%010o CTR=%#x PMUSERSR=%#x",
242 1.7 matt armreg_clidr_read(), armreg_ctr_read(), armreg_pmuserenr_read());
243 1.1 matt printf("\n");
244 1.1 matt #endif
245 1.1 matt
246 1.3 matt psize_t memsize = bcm53xx_memprobe();
247 1.6 matt #ifdef MEMSIZE
248 1.6 matt if ((memsize >> 20) > MEMSIZE)
249 1.6 matt memsize = MEMSIZE*1024*1024;
250 1.6 matt #endif
251 1.5 matt const bool bigmem_p = (memsize >> 20) > 256;
252 1.3 matt
253 1.3 matt arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
254 1.1 matt (paddr_t)KERNEL_BASE_phys);
255 1.1 matt
256 1.4 matt bcm53xx_dma_bootstrap(memsize);
257 1.4 matt
258 1.1 matt /*
259 1.1 matt * This is going to do all the hard work of setting up the first and
260 1.1 matt * and second level page tables. Pages of memory will be allocated
261 1.1 matt * and mapped for other structures that are required for system
262 1.1 matt * operation. When it returns, physical_freestart and free_pages will
263 1.1 matt * have been updated to reflect the allocations that were made. In
264 1.1 matt * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
265 1.1 matt * abtstack, undstack, kernelstack, msgbufphys will be set to point to
266 1.1 matt * the memory that was allocated for them.
267 1.1 matt */
268 1.1 matt arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, true);
269 1.1 matt
270 1.1 matt cpu_reset_address = bcm53xx_system_reset;
271 1.1 matt /* we've a specific device_register routine */
272 1.1 matt evbarm_device_register = bcm53xx_device_register;
273 1.5 matt if (bigmem_p) {
274 1.5 matt /*
275 1.5 matt * If we have more than 256MB
276 1.5 matt */
277 1.5 matt arm_poolpage_vmfreelist = bp_first256.bp_freelist;
278 1.5 matt }
279 1.1 matt
280 1.5 matt /*
281 1.5 matt * If we have more than 256MB of RAM, set aside the first 256MB for
282 1.5 matt * non-default VM allocations.
283 1.5 matt */
284 1.5 matt return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
285 1.5 matt (bigmem_p ? &bp_first256 : NULL), (bigmem_p ? 1 : 0));
286 1.1 matt }
287 1.1 matt
288 1.1 matt void
289 1.1 matt consinit(void)
290 1.1 matt {
291 1.1 matt static bool consinit_called = false;
292 1.1 matt uint32_t v;
293 1.1 matt if (consinit_called)
294 1.1 matt return;
295 1.1 matt
296 1.1 matt consinit_called = true;
297 1.1 matt
298 1.1 matt /*
299 1.1 matt * Force UART clock to the reference clock
300 1.1 matt */
301 1.1 matt v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
302 1.1 matt IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT);
303 1.1 matt v &= ~IO_CONTROL_DIRECT_UARTCLKSEL;
304 1.1 matt bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
305 1.1 matt IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT, v);
306 1.1 matt
307 1.1 matt /*
308 1.1 matt * Switch to the reference clock
309 1.1 matt */
310 1.1 matt v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
311 1.1 matt CCA_MISC_BASE + MISC_CORECTL);
312 1.1 matt v &= ~CORECTL_UART_CLK_OVERRIDE;
313 1.1 matt bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
314 1.1 matt CCA_MISC_BASE + MISC_CORECTL, v);
315 1.1 matt
316 1.1 matt if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
317 1.1 matt BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
318 1.1 matt panic("Serial console can not be initialized.");
319 1.1 matt }
320 1.1 matt
321 1.1 matt static void
322 1.1 matt bcm53xx_system_reset(void)
323 1.1 matt {
324 1.1 matt bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
325 1.1 matt MISC_WATCHDOG, 1);
326 1.1 matt }
327