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bcm53xx_machdep.c revision 1.9.16.4
      1  1.9.16.4  pgoyette /*	$NetBSD: bcm53xx_machdep.c,v 1.9.16.4 2018/10/20 06:58:26 pgoyette Exp $	*/
      2       1.1      matt 
      3       1.1      matt /*-
      4       1.1      matt  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5       1.1      matt  * All rights reserved.
      6       1.1      matt  *
      7       1.1      matt  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1      matt  * by Matt Thomas of 3am Software Foundry.
      9       1.1      matt  *
     10       1.1      matt  * Redistribution and use in source and binary forms, with or without
     11       1.1      matt  * modification, are permitted provided that the following conditions
     12       1.1      matt  * are met:
     13       1.1      matt  * 1. Redistributions of source code must retain the above copyright
     14       1.1      matt  *    notice, this list of conditions and the following disclaimer.
     15       1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     17       1.1      matt  *    documentation and/or other materials provided with the distribution.
     18       1.1      matt  *
     19       1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.1      matt  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1      matt  */
     31       1.1      matt 
     32       1.1      matt #define CCA_PRIVATE
     33       1.1      matt #define IDM_PRIVATE
     34       1.1      matt 
     35       1.1      matt #include <sys/cdefs.h>
     36  1.9.16.4  pgoyette __KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.9.16.4 2018/10/20 06:58:26 pgoyette Exp $");
     37       1.1      matt 
     38  1.9.16.2  pgoyette #include "opt_arm_debug.h"
     39  1.9.16.3  pgoyette #include "opt_console.h"
     40       1.1      matt #include "opt_evbarm_boardtype.h"
     41       1.1      matt #include "opt_broadcom.h"
     42       1.1      matt #include "opt_kgdb.h"
     43       1.1      matt #include "com.h"
     44       1.2      matt #include "pci.h"
     45       1.1      matt #include "bcmrng_ccb.h"
     46       1.1      matt 
     47       1.1      matt #include <sys/param.h>
     48       1.1      matt #include <sys/bus.h>
     49       1.1      matt #include <sys/atomic.h>
     50       1.1      matt #include <sys/device.h>
     51       1.1      matt #include <sys/kernel.h>
     52       1.1      matt #include <sys/reboot.h>
     53       1.1      matt #include <sys/termios.h>
     54       1.1      matt 
     55       1.1      matt #include <dev/cons.h>
     56       1.1      matt 
     57       1.1      matt #include <uvm/uvm_extern.h>
     58       1.1      matt 
     59       1.1      matt #include <arm/db_machdep.h>
     60       1.1      matt #include <arm/undefined.h>
     61       1.1      matt #include <arm/arm32/machdep.h>
     62       1.1      matt 
     63       1.1      matt #include <machine/autoconf.h>
     64       1.1      matt #include <machine/bootconfig.h>
     65       1.1      matt 
     66       1.1      matt #define CCA_PRIVATE
     67       1.1      matt 
     68       1.1      matt #include <arm/cortex/scu_reg.h>
     69       1.1      matt #include <arm/broadcom/bcm53xx_var.h>
     70       1.1      matt 
     71       1.1      matt #include <evbarm/bcm53xx/platform.h>
     72       1.1      matt 
     73       1.1      matt #if NCOM == 0
     74       1.1      matt #error missing COM device for console
     75       1.1      matt #endif
     76       1.1      matt 
     77       1.1      matt #include <dev/ic/comreg.h>
     78       1.1      matt #include <dev/ic/comvar.h>
     79       1.1      matt 
     80       1.1      matt extern int _end[];
     81       1.1      matt extern int KERNEL_BASE_phys[];
     82       1.1      matt extern int KERNEL_BASE_virt[];
     83       1.1      matt 
     84       1.1      matt BootConfig bootconfig;
     85       1.1      matt static char bootargs[MAX_BOOT_STRING];
     86  1.9.16.4  pgoyette char *boot_args = NULL;
     87       1.1      matt 
     88  1.9.16.1  pgoyette /* filled in before cleaning bss. keep in .data */
     89  1.9.16.1  pgoyette u_int uboot_args[4] __attribute__((__section__(".data")));
     90       1.3      matt 
     91       1.1      matt static void bcm53xx_system_reset(void);
     92       1.1      matt 
     93       1.1      matt #ifndef CONADDR
     94       1.1      matt #define CONADDR		(BCM53XX_IOREG_PBASE + CCA_UART0_BASE)
     95       1.1      matt #endif
     96       1.1      matt #ifndef CONSPEED
     97       1.1      matt #define CONSPEED B115200
     98       1.1      matt #endif
     99       1.1      matt #ifndef CONMODE
    100       1.1      matt #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    101       1.1      matt #endif
    102       1.1      matt 
    103       1.1      matt #if (NCOM > 0)
    104       1.1      matt static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
    105       1.1      matt 
    106       1.1      matt int comcnspeed = CONSPEED;
    107       1.1      matt int comcnmode = CONMODE | CLOCAL;
    108       1.1      matt #endif
    109       1.1      matt 
    110       1.1      matt #ifdef KGDB
    111       1.1      matt #include <sys/kgdb.h>
    112       1.1      matt #endif
    113       1.1      matt 
    114  1.9.16.4  pgoyette static dev_type_cnputc(earlyconsputc);
    115  1.9.16.4  pgoyette static dev_type_cngetc(earlyconsgetc);
    116  1.9.16.4  pgoyette 
    117  1.9.16.4  pgoyette static struct consdev earlycons = {
    118  1.9.16.4  pgoyette 	.cn_putc = earlyconsputc,
    119  1.9.16.4  pgoyette 	.cn_getc = earlyconsgetc,
    120  1.9.16.4  pgoyette 	.cn_pollc = nullcnpollc,
    121  1.9.16.4  pgoyette };
    122  1.9.16.4  pgoyette 
    123  1.9.16.4  pgoyette static void
    124  1.9.16.4  pgoyette earlyconsputc(dev_t dev, int c)
    125  1.9.16.4  pgoyette {
    126  1.9.16.4  pgoyette 	uartputc(c);
    127  1.9.16.4  pgoyette }
    128  1.9.16.4  pgoyette 
    129  1.9.16.4  pgoyette static int
    130  1.9.16.4  pgoyette earlyconsgetc(dev_t dev)
    131  1.9.16.4  pgoyette {
    132  1.9.16.4  pgoyette 	return 0;	/* XXX */
    133  1.9.16.4  pgoyette }
    134  1.9.16.4  pgoyette 
    135       1.1      matt /*
    136       1.1      matt  * Static device mappings. These peripheral registers are mapped at
    137       1.1      matt  * fixed virtual addresses very early in initarm() so that we can use
    138       1.1      matt  * them while booting the kernel, and stay at the same address
    139       1.1      matt  * throughout whole kernel's life time.
    140       1.1      matt  *
    141       1.1      matt  * We use this table twice; once with bootstrap page table, and once
    142       1.1      matt  * with kernel's page table which we build up in initarm().
    143       1.1      matt  *
    144       1.1      matt  * Since we map these registers into the bootstrap page table using
    145       1.1      matt  * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
    146       1.1      matt  * registers segment-aligned and segment-rounded in order to avoid
    147       1.1      matt  * using the 2nd page tables.
    148       1.1      matt  */
    149       1.1      matt 
    150       1.1      matt static const struct pmap_devmap devmap[] = {
    151       1.1      matt 	{
    152       1.2      matt 		KERNEL_IO_IOREG_VBASE,
    153       1.1      matt 		BCM53XX_IOREG_PBASE,		/* 0x18000000 */
    154       1.1      matt 		BCM53XX_IOREG_SIZE,		/* 2MB */
    155       1.1      matt 		VM_PROT_READ|VM_PROT_WRITE,
    156       1.1      matt 		PTE_NOCACHE,
    157       1.1      matt 	},
    158       1.1      matt 	{
    159       1.2      matt 		KERNEL_IO_ARMCORE_VBASE,
    160       1.1      matt 		BCM53XX_ARMCORE_PBASE,		/* 0x19000000 */
    161       1.2      matt 		BCM53XX_ARMCORE_SIZE,		/* 1MB */
    162       1.1      matt 		VM_PROT_READ|VM_PROT_WRITE,
    163       1.1      matt 		PTE_NOCACHE,
    164       1.1      matt 	},
    165       1.2      matt #if NPCI > 0
    166       1.2      matt 	{
    167       1.2      matt 		KERNEL_IO_PCIE0_OWIN_VBASE,
    168       1.2      matt 		BCM53XX_PCIE0_OWIN_PBASE,	/* 0x08000000 */
    169       1.2      matt 		BCM53XX_PCIE0_OWIN_SIZE,	/* 4MB */
    170       1.2      matt 		VM_PROT_READ|VM_PROT_WRITE,
    171       1.2      matt 		PTE_NOCACHE,
    172       1.2      matt 	},
    173       1.2      matt 	{
    174       1.2      matt 		KERNEL_IO_PCIE1_OWIN_VBASE,
    175       1.2      matt 		BCM53XX_PCIE1_OWIN_PBASE,	/* 0x40000000 */
    176       1.2      matt 		BCM53XX_PCIE1_OWIN_SIZE,	/* 4MB */
    177       1.2      matt 		VM_PROT_READ|VM_PROT_WRITE,
    178       1.2      matt 		PTE_NOCACHE,
    179       1.2      matt 	},
    180       1.2      matt 	{
    181       1.2      matt 		KERNEL_IO_PCIE2_OWIN_VBASE,
    182       1.2      matt 		BCM53XX_PCIE2_OWIN_PBASE,	/* 0x48000000 */
    183       1.2      matt 		BCM53XX_PCIE2_OWIN_SIZE,	/* 4MB */
    184       1.2      matt 		VM_PROT_READ|VM_PROT_WRITE,
    185       1.2      matt 		PTE_NOCACHE,
    186       1.2      matt 	},
    187       1.2      matt #endif /* NPCI > 0 */
    188       1.1      matt 	{ 0, 0, 0, 0, 0 }
    189       1.1      matt };
    190       1.1      matt 
    191       1.5      matt static const struct boot_physmem bp_first256 = {
    192       1.5      matt 	.bp_start = 0x80000000 / NBPG,
    193       1.5      matt 	.bp_pages = 0x10000000 / NBPG,
    194       1.5      matt 	.bp_freelist = VM_FREELIST_ISADMA,
    195       1.5      matt 	.bp_flags = 0,
    196       1.5      matt };
    197       1.5      matt 
    198       1.1      matt /*
    199       1.1      matt  * u_int initarm(...)
    200       1.1      matt  *
    201       1.1      matt  * Initial entry point on startup. This gets called before main() is
    202       1.1      matt  * entered.
    203       1.1      matt  * It should be responsible for setting up everything that must be
    204       1.1      matt  * in place when main is called.
    205       1.1      matt  * This includes
    206       1.1      matt  *   Taking a copy of the boot configuration structure.
    207       1.1      matt  *   Initialising the physical console so characters can be printed.
    208       1.1      matt  *   Setting up page tables for the kernel
    209       1.1      matt  */
    210       1.1      matt u_int
    211       1.1      matt initarm(void *arg)
    212       1.1      matt {
    213  1.9.16.4  pgoyette 	/*
    214  1.9.16.4  pgoyette 	 * Heads up ... Setup the CPU / MMU / TLB functions
    215  1.9.16.4  pgoyette 	 */
    216  1.9.16.4  pgoyette 	if (set_cpufuncs())		// starts PMC counter
    217  1.9.16.4  pgoyette 		panic("cpu not recognized!");
    218  1.9.16.4  pgoyette 
    219  1.9.16.4  pgoyette 	cn_tab = &earlycons;
    220  1.9.16.4  pgoyette 
    221  1.9.16.4  pgoyette 	extern char ARM_BOOTSTRAP_LxPT[];
    222  1.9.16.4  pgoyette 	pmap_devmap_bootstrap((vaddr_t)ARM_BOOTSTRAP_LxPT, devmap);
    223  1.9.16.2  pgoyette 
    224       1.2      matt 	bcm53xx_bootstrap(KERNEL_IO_IOREG_VBASE);
    225       1.1      matt 
    226       1.1      matt #ifdef MULTIPROCESSOR
    227       1.1      matt 	uint32_t scu_cfg = bus_space_read_4(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
    228       1.1      matt 	    ARMCORE_SCU_BASE + SCU_CFG);
    229       1.8      matt 	arm_cpu_max = 1 + (scu_cfg & SCU_CFG_CPUMAX);
    230       1.1      matt 	membar_producer();
    231       1.1      matt #endif
    232       1.1      matt 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    233       1.1      matt 
    234       1.1      matt 	consinit();
    235       1.1      matt 
    236       1.1      matt 	bcm53xx_cpu_softc_init(curcpu());
    237       1.1      matt 	bcm53xx_print_clocks();
    238       1.1      matt 
    239       1.1      matt #if NBCMRNG_CCB > 0
    240       1.1      matt 	/*
    241       1.1      matt 	 * Start this early since it takes a while to startup up.
    242       1.1      matt 	 */
    243       1.1      matt 	bcm53xx_rng_start(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
    244       1.1      matt #endif
    245       1.1      matt 
    246       1.3      matt 	printf("uboot arg = %#x, %#x, %#x, %#x\n",
    247  1.9.16.4  pgoyette 	    uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
    248       1.3      matt 
    249       1.1      matt 	/* Talk to the user */
    250       1.1      matt 	printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
    251       1.1      matt 
    252       1.1      matt 	bootargs[0] = '\0';
    253       1.1      matt 
    254       1.1      matt #if defined(VERBOSE_INIT_ARM) || 1
    255       1.1      matt 	printf("initarm: Configuring system");
    256       1.1      matt #ifdef MULTIPROCESSOR
    257       1.1      matt 	printf(" (%u cpu%s, hatched %#x)",
    258       1.1      matt 	    arm_cpu_max + 1, arm_cpu_max + 1 ? "s" : "",
    259       1.1      matt 	    arm_cpu_hatched);
    260       1.1      matt #endif
    261       1.7      matt 	printf(", CLIDR=%010o CTR=%#x PMUSERSR=%#x",
    262       1.7      matt 	    armreg_clidr_read(), armreg_ctr_read(), armreg_pmuserenr_read());
    263       1.1      matt 	printf("\n");
    264       1.1      matt #endif
    265       1.1      matt 
    266       1.3      matt 	psize_t memsize = bcm53xx_memprobe();
    267       1.6      matt #ifdef MEMSIZE
    268       1.6      matt 	if ((memsize >> 20) > MEMSIZE)
    269       1.6      matt 		memsize = MEMSIZE*1024*1024;
    270       1.6      matt #endif
    271  1.9.16.4  pgoyette 	const bool bigmem_p = (memsize >> 20) > 256;
    272       1.3      matt 
    273       1.9      matt #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
    274       1.9      matt 	const bool mapallmem_p = true;
    275       1.9      matt #ifndef PMAP_NEED_ALLOC_POOLPAGE
    276       1.9      matt 	if (memsize > KERNEL_VM_BASE - KERNEL_BASE) {
    277       1.9      matt 		printf("%s: dropping RAM size from %luMB to %uMB\n",
    278       1.9      matt 		   __func__, (unsigned long) (ram_size >> 20),
    279       1.9      matt 		   (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
    280       1.9      matt 		memsize = KERNEL_VM_BASE - KERNEL_BASE;
    281       1.9      matt 	}
    282       1.9      matt #endif
    283       1.9      matt #else
    284       1.9      matt 	const bool mapallmem_p = false;
    285       1.9      matt #endif
    286       1.9      matt 	KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
    287       1.3      matt 	arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
    288       1.1      matt 	    (paddr_t)KERNEL_BASE_phys);
    289       1.1      matt 
    290       1.4      matt 	bcm53xx_dma_bootstrap(memsize);
    291       1.4      matt 
    292       1.1      matt 	/*
    293       1.1      matt 	 * This is going to do all the hard work of setting up the first and
    294       1.1      matt 	 * and second level page tables.  Pages of memory will be allocated
    295       1.1      matt 	 * and mapped for other structures that are required for system
    296       1.1      matt 	 * operation.  When it returns, physical_freestart and free_pages will
    297       1.1      matt 	 * have been updated to reflect the allocations that were made.  In
    298       1.1      matt 	 * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
    299       1.1      matt 	 * abtstack, undstack, kernelstack, msgbufphys will be set to point to
    300       1.1      matt 	 * the memory that was allocated for them.
    301       1.1      matt 	 */
    302       1.9      matt 	arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
    303       1.9      matt 	    mapallmem_p);
    304       1.1      matt 
    305       1.1      matt 	cpu_reset_address = bcm53xx_system_reset;
    306       1.1      matt 	/* we've a specific device_register routine */
    307       1.1      matt 	evbarm_device_register = bcm53xx_device_register;
    308       1.5      matt 	if (bigmem_p) {
    309       1.5      matt 		/*
    310       1.5      matt 		 * If we have more than 256MB
    311       1.5      matt 		 */
    312       1.5      matt 		arm_poolpage_vmfreelist = bp_first256.bp_freelist;
    313       1.5      matt 	}
    314       1.1      matt 
    315       1.5      matt 	/*
    316       1.5      matt 	 * If we have more than 256MB of RAM, set aside the first 256MB for
    317       1.5      matt 	 * non-default VM allocations.
    318       1.5      matt 	 */
    319       1.5      matt 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
    320       1.5      matt 	    (bigmem_p ? &bp_first256 : NULL), (bigmem_p ? 1 : 0));
    321       1.1      matt }
    322       1.1      matt 
    323       1.1      matt void
    324       1.1      matt consinit(void)
    325       1.1      matt {
    326       1.1      matt 	static bool consinit_called = false;
    327       1.1      matt 	uint32_t v;
    328       1.1      matt 	if (consinit_called)
    329       1.1      matt 		return;
    330       1.1      matt 
    331       1.1      matt 	consinit_called = true;
    332       1.1      matt 
    333       1.1      matt 	/*
    334       1.1      matt 	 * Force UART clock to the reference clock
    335       1.1      matt 	 */
    336       1.1      matt 	v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    337       1.1      matt 	    IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT);
    338       1.1      matt 	v &= ~IO_CONTROL_DIRECT_UARTCLKSEL;
    339       1.1      matt 	bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    340       1.1      matt 	    IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT, v);
    341       1.1      matt 
    342       1.1      matt 	/*
    343       1.1      matt 	 * Switch to the reference clock
    344       1.1      matt 	 */
    345       1.1      matt 	v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    346       1.1      matt 	    CCA_MISC_BASE + MISC_CORECTL);
    347       1.1      matt 	v &= ~CORECTL_UART_CLK_OVERRIDE;
    348       1.1      matt 	bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    349       1.1      matt 	    CCA_MISC_BASE + MISC_CORECTL, v);
    350       1.1      matt 
    351       1.1      matt         if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
    352       1.1      matt                         BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
    353       1.1      matt                 panic("Serial console can not be initialized.");
    354       1.1      matt }
    355       1.1      matt 
    356       1.1      matt static void
    357       1.1      matt bcm53xx_system_reset(void)
    358       1.1      matt {
    359       1.1      matt 	bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    360       1.1      matt 	    MISC_WATCHDOG, 1);
    361       1.1      matt }
    362