bcm53xx_machdep.c revision 1.16 1 /* $NetBSD: bcm53xx_machdep.c,v 1.16 2018/09/21 12:04:08 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #define CCA_PRIVATE
33 #define IDM_PRIVATE
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.16 2018/09/21 12:04:08 skrll Exp $");
37
38 #include "opt_arm_debug.h"
39 #include "opt_console.h"
40 #include "opt_evbarm_boardtype.h"
41 #include "opt_broadcom.h"
42 #include "opt_kgdb.h"
43 #include "com.h"
44 #include "pci.h"
45 #include "bcmrng_ccb.h"
46
47 #include <sys/param.h>
48 #include <sys/bus.h>
49 #include <sys/atomic.h>
50 #include <sys/device.h>
51 #include <sys/kernel.h>
52 #include <sys/reboot.h>
53 #include <sys/termios.h>
54
55 #include <dev/cons.h>
56
57 #include <uvm/uvm_extern.h>
58
59 #include <arm/db_machdep.h>
60 #include <arm/undefined.h>
61 #include <arm/arm32/machdep.h>
62
63 #include <machine/autoconf.h>
64 #include <machine/bootconfig.h>
65
66 #define CCA_PRIVATE
67
68 #include <arm/cortex/scu_reg.h>
69 #include <arm/broadcom/bcm53xx_var.h>
70
71 #include <evbarm/bcm53xx/platform.h>
72
73 #if NCOM == 0
74 #error missing COM device for console
75 #endif
76
77 #include <dev/ic/comreg.h>
78 #include <dev/ic/comvar.h>
79
80 extern int _end[];
81 extern int KERNEL_BASE_phys[];
82 extern int KERNEL_BASE_virt[];
83
84 BootConfig bootconfig;
85 static char bootargs[MAX_BOOT_STRING];
86 char *boot_args = NULL;
87
88 /* filled in before cleaning bss. keep in .data */
89 u_int uboot_args[4] __attribute__((__section__(".data")));
90
91 static void bcm53xx_system_reset(void);
92
93 /*
94 * Macros to translate between physical and virtual for a subset of the
95 * kernel address space. *Not* for general use.
96 */
97 #define KERN_VTOPDIFF ((vaddr_t)KERNEL_BASE_phys - (vaddr_t)KERNEL_BASE_virt)
98
99 #ifndef CONADDR
100 #define CONADDR (BCM53XX_IOREG_PBASE + CCA_UART0_BASE)
101 #endif
102 #ifndef CONSPEED
103 #define CONSPEED B115200
104 #endif
105 #ifndef CONMODE
106 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
107 #endif
108
109 #if (NCOM > 0)
110 static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
111
112 int comcnspeed = CONSPEED;
113 int comcnmode = CONMODE | CLOCAL;
114 #endif
115
116 #ifdef KGDB
117 #include <sys/kgdb.h>
118 #endif
119
120 /*
121 * Static device mappings. These peripheral registers are mapped at
122 * fixed virtual addresses very early in initarm() so that we can use
123 * them while booting the kernel, and stay at the same address
124 * throughout whole kernel's life time.
125 *
126 * We use this table twice; once with bootstrap page table, and once
127 * with kernel's page table which we build up in initarm().
128 *
129 * Since we map these registers into the bootstrap page table using
130 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
131 * registers segment-aligned and segment-rounded in order to avoid
132 * using the 2nd page tables.
133 */
134
135 static const struct pmap_devmap devmap[] = {
136 {
137 KERNEL_IO_IOREG_VBASE,
138 BCM53XX_IOREG_PBASE, /* 0x18000000 */
139 BCM53XX_IOREG_SIZE, /* 2MB */
140 VM_PROT_READ|VM_PROT_WRITE,
141 PTE_NOCACHE,
142 },
143 {
144 KERNEL_IO_ARMCORE_VBASE,
145 BCM53XX_ARMCORE_PBASE, /* 0x19000000 */
146 BCM53XX_ARMCORE_SIZE, /* 1MB */
147 VM_PROT_READ|VM_PROT_WRITE,
148 PTE_NOCACHE,
149 },
150 #if NPCI > 0
151 {
152 KERNEL_IO_PCIE0_OWIN_VBASE,
153 BCM53XX_PCIE0_OWIN_PBASE, /* 0x08000000 */
154 BCM53XX_PCIE0_OWIN_SIZE, /* 4MB */
155 VM_PROT_READ|VM_PROT_WRITE,
156 PTE_NOCACHE,
157 },
158 {
159 KERNEL_IO_PCIE1_OWIN_VBASE,
160 BCM53XX_PCIE1_OWIN_PBASE, /* 0x40000000 */
161 BCM53XX_PCIE1_OWIN_SIZE, /* 4MB */
162 VM_PROT_READ|VM_PROT_WRITE,
163 PTE_NOCACHE,
164 },
165 {
166 KERNEL_IO_PCIE2_OWIN_VBASE,
167 BCM53XX_PCIE2_OWIN_PBASE, /* 0x48000000 */
168 BCM53XX_PCIE2_OWIN_SIZE, /* 4MB */
169 VM_PROT_READ|VM_PROT_WRITE,
170 PTE_NOCACHE,
171 },
172 #endif /* NPCI > 0 */
173 { 0, 0, 0, 0, 0 }
174 };
175
176 static const struct boot_physmem bp_first256 = {
177 .bp_start = 0x80000000 / NBPG,
178 .bp_pages = 0x10000000 / NBPG,
179 .bp_freelist = VM_FREELIST_ISADMA,
180 .bp_flags = 0,
181 };
182
183 /*
184 * u_int initarm(...)
185 *
186 * Initial entry point on startup. This gets called before main() is
187 * entered.
188 * It should be responsible for setting up everything that must be
189 * in place when main is called.
190 * This includes
191 * Taking a copy of the boot configuration structure.
192 * Initialising the physical console so characters can be printed.
193 * Setting up page tables for the kernel
194 */
195 u_int
196 initarm(void *arg)
197 {
198 kern_vtopdiff = KERN_VTOPDIFF;
199
200 pmap_devmap_register(devmap);
201 bcm53xx_bootstrap(KERNEL_IO_IOREG_VBASE);
202
203 #ifdef MULTIPROCESSOR
204 uint32_t scu_cfg = bus_space_read_4(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
205 ARMCORE_SCU_BASE + SCU_CFG);
206 arm_cpu_max = 1 + (scu_cfg & SCU_CFG_CPUMAX);
207 membar_producer();
208 #endif
209 /*
210 * Heads up ... Setup the CPU / MMU / TLB functions
211 */
212 if (set_cpufuncs()) // starts PMC counter
213 panic("cpu not recognized!");
214
215 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
216
217 consinit();
218
219 bcm53xx_cpu_softc_init(curcpu());
220 bcm53xx_print_clocks();
221
222 #if NBCMRNG_CCB > 0
223 /*
224 * Start this early since it takes a while to startup up.
225 */
226 bcm53xx_rng_start(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
227 #endif
228
229 printf("uboot arg = %#x, %#x, %#x, %#x\n",
230 uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
231
232 /* Talk to the user */
233 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
234
235 bootargs[0] = '\0';
236
237 #if defined(VERBOSE_INIT_ARM) || 1
238 printf("initarm: Configuring system");
239 #ifdef MULTIPROCESSOR
240 printf(" (%u cpu%s, hatched %#x)",
241 arm_cpu_max + 1, arm_cpu_max + 1 ? "s" : "",
242 arm_cpu_hatched);
243 #endif
244 printf(", CLIDR=%010o CTR=%#x PMUSERSR=%#x",
245 armreg_clidr_read(), armreg_ctr_read(), armreg_pmuserenr_read());
246 printf("\n");
247 #endif
248
249 psize_t memsize = bcm53xx_memprobe();
250 #ifdef MEMSIZE
251 if ((memsize >> 20) > MEMSIZE)
252 memsize = MEMSIZE*1024*1024;
253 #endif
254 const bool bigmem_p = (memsize >> 20) > 256;
255
256 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
257 const bool mapallmem_p = true;
258 #ifndef PMAP_NEED_ALLOC_POOLPAGE
259 if (memsize > KERNEL_VM_BASE - KERNEL_BASE) {
260 printf("%s: dropping RAM size from %luMB to %uMB\n",
261 __func__, (unsigned long) (ram_size >> 20),
262 (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
263 memsize = KERNEL_VM_BASE - KERNEL_BASE;
264 }
265 #endif
266 #else
267 const bool mapallmem_p = false;
268 #endif
269 KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
270 arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
271 (paddr_t)KERNEL_BASE_phys);
272
273 bcm53xx_dma_bootstrap(memsize);
274
275 /*
276 * This is going to do all the hard work of setting up the first and
277 * and second level page tables. Pages of memory will be allocated
278 * and mapped for other structures that are required for system
279 * operation. When it returns, physical_freestart and free_pages will
280 * have been updated to reflect the allocations that were made. In
281 * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
282 * abtstack, undstack, kernelstack, msgbufphys will be set to point to
283 * the memory that was allocated for them.
284 */
285 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
286 mapallmem_p);
287
288 cpu_reset_address = bcm53xx_system_reset;
289 /* we've a specific device_register routine */
290 evbarm_device_register = bcm53xx_device_register;
291 if (bigmem_p) {
292 /*
293 * If we have more than 256MB
294 */
295 arm_poolpage_vmfreelist = bp_first256.bp_freelist;
296 }
297
298 /*
299 * If we have more than 256MB of RAM, set aside the first 256MB for
300 * non-default VM allocations.
301 */
302 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
303 (bigmem_p ? &bp_first256 : NULL), (bigmem_p ? 1 : 0));
304 }
305
306 void
307 consinit(void)
308 {
309 static bool consinit_called = false;
310 uint32_t v;
311 if (consinit_called)
312 return;
313
314 consinit_called = true;
315
316 /*
317 * Force UART clock to the reference clock
318 */
319 v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
320 IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT);
321 v &= ~IO_CONTROL_DIRECT_UARTCLKSEL;
322 bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
323 IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT, v);
324
325 /*
326 * Switch to the reference clock
327 */
328 v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
329 CCA_MISC_BASE + MISC_CORECTL);
330 v &= ~CORECTL_UART_CLK_OVERRIDE;
331 bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
332 CCA_MISC_BASE + MISC_CORECTL, v);
333
334 if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
335 BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
336 panic("Serial console can not be initialized.");
337 }
338
339 static void
340 bcm53xx_system_reset(void)
341 {
342 bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
343 MISC_WATCHDOG, 1);
344 }
345