bcm53xx_machdep.c revision 1.18 1 /* $NetBSD: bcm53xx_machdep.c,v 1.18 2018/10/18 09:01:53 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #define CCA_PRIVATE
33 #define IDM_PRIVATE
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.18 2018/10/18 09:01:53 skrll Exp $");
37
38 #include "opt_arm_debug.h"
39 #include "opt_console.h"
40 #include "opt_evbarm_boardtype.h"
41 #include "opt_broadcom.h"
42 #include "opt_kgdb.h"
43 #include "com.h"
44 #include "pci.h"
45 #include "bcmrng_ccb.h"
46
47 #include <sys/param.h>
48 #include <sys/bus.h>
49 #include <sys/atomic.h>
50 #include <sys/device.h>
51 #include <sys/kernel.h>
52 #include <sys/reboot.h>
53 #include <sys/termios.h>
54
55 #include <dev/cons.h>
56
57 #include <uvm/uvm_extern.h>
58
59 #include <arm/db_machdep.h>
60 #include <arm/undefined.h>
61 #include <arm/arm32/machdep.h>
62
63 #include <machine/autoconf.h>
64 #include <machine/bootconfig.h>
65
66 #define CCA_PRIVATE
67
68 #include <arm/cortex/scu_reg.h>
69 #include <arm/broadcom/bcm53xx_var.h>
70
71 #include <evbarm/bcm53xx/platform.h>
72
73 #if NCOM == 0
74 #error missing COM device for console
75 #endif
76
77 #include <dev/ic/comreg.h>
78 #include <dev/ic/comvar.h>
79
80 extern int _end[];
81 extern int KERNEL_BASE_phys[];
82 extern int KERNEL_BASE_virt[];
83
84 BootConfig bootconfig;
85 static char bootargs[MAX_BOOT_STRING];
86 char *boot_args = NULL;
87
88 /* filled in before cleaning bss. keep in .data */
89 u_int uboot_args[4] __attribute__((__section__(".data")));
90
91 static void bcm53xx_system_reset(void);
92
93 #ifndef CONADDR
94 #define CONADDR (BCM53XX_IOREG_PBASE + CCA_UART0_BASE)
95 #endif
96 #ifndef CONSPEED
97 #define CONSPEED B115200
98 #endif
99 #ifndef CONMODE
100 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
101 #endif
102
103 #if (NCOM > 0)
104 static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
105
106 int comcnspeed = CONSPEED;
107 int comcnmode = CONMODE | CLOCAL;
108 #endif
109
110 #ifdef KGDB
111 #include <sys/kgdb.h>
112 #endif
113
114 static dev_type_cnputc(earlyconsputc);
115 static dev_type_cngetc(earlyconsgetc);
116
117 static struct consdev earlycons = {
118 .cn_putc = earlyconsputc,
119 .cn_getc = earlyconsgetc,
120 .cn_pollc = nullcnpollc,
121 };
122
123 static void
124 earlyconsputc(dev_t dev, int c)
125 {
126 uartputc(c);
127 }
128
129 static int
130 earlyconsgetc(dev_t dev)
131 {
132 return 0; /* XXX */
133 }
134
135 /*
136 * Static device mappings. These peripheral registers are mapped at
137 * fixed virtual addresses very early in initarm() so that we can use
138 * them while booting the kernel, and stay at the same address
139 * throughout whole kernel's life time.
140 *
141 * We use this table twice; once with bootstrap page table, and once
142 * with kernel's page table which we build up in initarm().
143 *
144 * Since we map these registers into the bootstrap page table using
145 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
146 * registers segment-aligned and segment-rounded in order to avoid
147 * using the 2nd page tables.
148 */
149
150 static const struct pmap_devmap devmap[] = {
151 {
152 KERNEL_IO_IOREG_VBASE,
153 BCM53XX_IOREG_PBASE, /* 0x18000000 */
154 BCM53XX_IOREG_SIZE, /* 2MB */
155 VM_PROT_READ|VM_PROT_WRITE,
156 PTE_NOCACHE,
157 },
158 {
159 KERNEL_IO_ARMCORE_VBASE,
160 BCM53XX_ARMCORE_PBASE, /* 0x19000000 */
161 BCM53XX_ARMCORE_SIZE, /* 1MB */
162 VM_PROT_READ|VM_PROT_WRITE,
163 PTE_NOCACHE,
164 },
165 #if NPCI > 0
166 {
167 KERNEL_IO_PCIE0_OWIN_VBASE,
168 BCM53XX_PCIE0_OWIN_PBASE, /* 0x08000000 */
169 BCM53XX_PCIE0_OWIN_SIZE, /* 4MB */
170 VM_PROT_READ|VM_PROT_WRITE,
171 PTE_NOCACHE,
172 },
173 {
174 KERNEL_IO_PCIE1_OWIN_VBASE,
175 BCM53XX_PCIE1_OWIN_PBASE, /* 0x40000000 */
176 BCM53XX_PCIE1_OWIN_SIZE, /* 4MB */
177 VM_PROT_READ|VM_PROT_WRITE,
178 PTE_NOCACHE,
179 },
180 {
181 KERNEL_IO_PCIE2_OWIN_VBASE,
182 BCM53XX_PCIE2_OWIN_PBASE, /* 0x48000000 */
183 BCM53XX_PCIE2_OWIN_SIZE, /* 4MB */
184 VM_PROT_READ|VM_PROT_WRITE,
185 PTE_NOCACHE,
186 },
187 #endif /* NPCI > 0 */
188 { 0, 0, 0, 0, 0 }
189 };
190
191 static const struct boot_physmem bp_first256 = {
192 .bp_start = 0x80000000 / NBPG,
193 .bp_pages = 0x10000000 / NBPG,
194 .bp_freelist = VM_FREELIST_ISADMA,
195 .bp_flags = 0,
196 };
197
198 /*
199 * u_int initarm(...)
200 *
201 * Initial entry point on startup. This gets called before main() is
202 * entered.
203 * It should be responsible for setting up everything that must be
204 * in place when main is called.
205 * This includes
206 * Taking a copy of the boot configuration structure.
207 * Initialising the physical console so characters can be printed.
208 * Setting up page tables for the kernel
209 */
210 u_int
211 initarm(void *arg)
212 {
213 /*
214 * Heads up ... Setup the CPU / MMU / TLB functions
215 */
216 if (set_cpufuncs()) // starts PMC counter
217 panic("cpu not recognized!");
218
219 cn_tab = &earlycons;
220
221 extern char ARM_BOOTSTRAP_LxPT[];
222 pmap_devmap_bootstrap((vaddr_t)ARM_BOOTSTRAP_LxPT, devmap);
223
224 bcm53xx_bootstrap(KERNEL_IO_IOREG_VBASE);
225
226 #ifdef MULTIPROCESSOR
227 uint32_t scu_cfg = bus_space_read_4(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
228 ARMCORE_SCU_BASE + SCU_CFG);
229 arm_cpu_max = 1 + (scu_cfg & SCU_CFG_CPUMAX);
230 membar_producer();
231 #endif
232 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
233
234 consinit();
235
236 bcm53xx_cpu_softc_init(curcpu());
237 bcm53xx_print_clocks();
238
239 #if NBCMRNG_CCB > 0
240 /*
241 * Start this early since it takes a while to startup up.
242 */
243 bcm53xx_rng_start(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
244 #endif
245
246 printf("uboot arg = %#x, %#x, %#x, %#x\n",
247 uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
248
249 /* Talk to the user */
250 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
251
252 bootargs[0] = '\0';
253
254 #if defined(VERBOSE_INIT_ARM) || 1
255 printf("initarm: Configuring system");
256 #ifdef MULTIPROCESSOR
257 printf(" (%u cpu%s, hatched %#x)",
258 arm_cpu_max + 1, arm_cpu_max + 1 ? "s" : "",
259 arm_cpu_hatched);
260 #endif
261 printf(", CLIDR=%010o CTR=%#x PMUSERSR=%#x",
262 armreg_clidr_read(), armreg_ctr_read(), armreg_pmuserenr_read());
263 printf("\n");
264 #endif
265
266 psize_t memsize = bcm53xx_memprobe();
267 #ifdef MEMSIZE
268 if ((memsize >> 20) > MEMSIZE)
269 memsize = MEMSIZE*1024*1024;
270 #endif
271 const bool bigmem_p = (memsize >> 20) > 256;
272
273 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
274 const bool mapallmem_p = true;
275 #ifndef PMAP_NEED_ALLOC_POOLPAGE
276 if (memsize > KERNEL_VM_BASE - KERNEL_BASE) {
277 printf("%s: dropping RAM size from %luMB to %uMB\n",
278 __func__, (unsigned long) (ram_size >> 20),
279 (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
280 memsize = KERNEL_VM_BASE - KERNEL_BASE;
281 }
282 #endif
283 #else
284 const bool mapallmem_p = false;
285 #endif
286 KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
287 arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
288 (paddr_t)KERNEL_BASE_phys);
289
290 bcm53xx_dma_bootstrap(memsize);
291
292 /*
293 * This is going to do all the hard work of setting up the first and
294 * and second level page tables. Pages of memory will be allocated
295 * and mapped for other structures that are required for system
296 * operation. When it returns, physical_freestart and free_pages will
297 * have been updated to reflect the allocations that were made. In
298 * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
299 * abtstack, undstack, kernelstack, msgbufphys will be set to point to
300 * the memory that was allocated for them.
301 */
302 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
303 mapallmem_p);
304
305 cpu_reset_address = bcm53xx_system_reset;
306 /* we've a specific device_register routine */
307 evbarm_device_register = bcm53xx_device_register;
308 if (bigmem_p) {
309 /*
310 * If we have more than 256MB
311 */
312 arm_poolpage_vmfreelist = bp_first256.bp_freelist;
313 }
314
315 /*
316 * If we have more than 256MB of RAM, set aside the first 256MB for
317 * non-default VM allocations.
318 */
319 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
320 (bigmem_p ? &bp_first256 : NULL), (bigmem_p ? 1 : 0));
321 }
322
323 void
324 consinit(void)
325 {
326 static bool consinit_called = false;
327 uint32_t v;
328 if (consinit_called)
329 return;
330
331 consinit_called = true;
332
333 /*
334 * Force UART clock to the reference clock
335 */
336 v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
337 IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT);
338 v &= ~IO_CONTROL_DIRECT_UARTCLKSEL;
339 bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
340 IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT, v);
341
342 /*
343 * Switch to the reference clock
344 */
345 v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
346 CCA_MISC_BASE + MISC_CORECTL);
347 v &= ~CORECTL_UART_CLK_OVERRIDE;
348 bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
349 CCA_MISC_BASE + MISC_CORECTL, v);
350
351 if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
352 BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
353 panic("Serial console can not be initialized.");
354 }
355
356 static void
357 bcm53xx_system_reset(void)
358 {
359 bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
360 MISC_WATCHDOG, 1);
361 }
362