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bcm53xx_machdep.c revision 1.19
      1 /*	$NetBSD: bcm53xx_machdep.c,v 1.19 2018/11/03 15:02:32 skrll Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Matt Thomas of 3am Software Foundry.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #define CCA_PRIVATE
     33 #define IDM_PRIVATE
     34 
     35 #include <sys/cdefs.h>
     36 __KERNEL_RCSID(0, "$NetBSD: bcm53xx_machdep.c,v 1.19 2018/11/03 15:02:32 skrll Exp $");
     37 
     38 #include "opt_arm_debug.h"
     39 #include "opt_console.h"
     40 #include "opt_evbarm_boardtype.h"
     41 #include "opt_broadcom.h"
     42 #include "opt_kgdb.h"
     43 #include "com.h"
     44 #include "pci.h"
     45 #include "bcmrng_ccb.h"
     46 
     47 #include <sys/param.h>
     48 #include <sys/bus.h>
     49 #include <sys/atomic.h>
     50 #include <sys/device.h>
     51 #include <sys/kernel.h>
     52 #include <sys/reboot.h>
     53 #include <sys/termios.h>
     54 
     55 #include <dev/cons.h>
     56 
     57 #include <uvm/uvm_extern.h>
     58 
     59 #include <arm/db_machdep.h>
     60 #include <arm/undefined.h>
     61 #include <arm/arm32/machdep.h>
     62 
     63 #include <machine/autoconf.h>
     64 #include <machine/bootconfig.h>
     65 
     66 #define CCA_PRIVATE
     67 
     68 #include <arm/cortex/scu_reg.h>
     69 #include <arm/broadcom/bcm53xx_var.h>
     70 
     71 #include <evbarm/bcm53xx/platform.h>
     72 
     73 #if NCOM == 0
     74 #error missing COM device for console
     75 #endif
     76 
     77 #include <dev/ic/comreg.h>
     78 #include <dev/ic/comvar.h>
     79 
     80 extern int _end[];
     81 extern int KERNEL_BASE_phys[];
     82 extern int KERNEL_BASE_virt[];
     83 
     84 BootConfig bootconfig;
     85 static char bootargs[MAX_BOOT_STRING];
     86 char *boot_args = NULL;
     87 
     88 /* filled in before cleaning bss. keep in .data */
     89 u_int uboot_args[4] __attribute__((__section__(".data")));
     90 
     91 static void bcm53xx_system_reset(void);
     92 
     93 #ifndef CONADDR
     94 #define CONADDR		(BCM53XX_IOREG_PBASE + CCA_UART0_BASE)
     95 #endif
     96 #ifndef CONSPEED
     97 #define CONSPEED B115200
     98 #endif
     99 #ifndef CONMODE
    100 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    101 #endif
    102 
    103 #if (NCOM > 0)
    104 static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
    105 
    106 int comcnspeed = CONSPEED;
    107 int comcnmode = CONMODE | CLOCAL;
    108 #endif
    109 
    110 #ifdef KGDB
    111 #include <sys/kgdb.h>
    112 #endif
    113 
    114 static void
    115 earlyconsputc(dev_t dev, int c)
    116 {
    117 	uartputc(c);
    118 }
    119 
    120 static int
    121 earlyconsgetc(dev_t dev)
    122 {
    123 	return 0;
    124 }
    125 
    126 static struct consdev earlycons = {
    127 	.cn_putc = earlyconsputc,
    128 	.cn_getc = earlyconsgetc,
    129 	.cn_pollc = nullcnpollc,
    130 };
    131 
    132 /*
    133  * Static device mappings. These peripheral registers are mapped at
    134  * fixed virtual addresses very early in initarm() so that we can use
    135  * them while booting the kernel, and stay at the same address
    136  * throughout whole kernel's life time.
    137  *
    138  * We use this table twice; once with bootstrap page table, and once
    139  * with kernel's page table which we build up in initarm().
    140  *
    141  * Since we map these registers into the bootstrap page table using
    142  * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
    143  * registers segment-aligned and segment-rounded in order to avoid
    144  * using the 2nd page tables.
    145  */
    146 
    147 static const struct pmap_devmap devmap[] = {
    148 	{
    149 		KERNEL_IO_IOREG_VBASE,
    150 		BCM53XX_IOREG_PBASE,		/* 0x18000000 */
    151 		BCM53XX_IOREG_SIZE,		/* 2MB */
    152 		VM_PROT_READ|VM_PROT_WRITE,
    153 		PTE_NOCACHE,
    154 	},
    155 	{
    156 		KERNEL_IO_ARMCORE_VBASE,
    157 		BCM53XX_ARMCORE_PBASE,		/* 0x19000000 */
    158 		BCM53XX_ARMCORE_SIZE,		/* 1MB */
    159 		VM_PROT_READ|VM_PROT_WRITE,
    160 		PTE_NOCACHE,
    161 	},
    162 #if NPCI > 0
    163 	{
    164 		KERNEL_IO_PCIE0_OWIN_VBASE,
    165 		BCM53XX_PCIE0_OWIN_PBASE,	/* 0x08000000 */
    166 		BCM53XX_PCIE0_OWIN_SIZE,	/* 4MB */
    167 		VM_PROT_READ|VM_PROT_WRITE,
    168 		PTE_NOCACHE,
    169 	},
    170 	{
    171 		KERNEL_IO_PCIE1_OWIN_VBASE,
    172 		BCM53XX_PCIE1_OWIN_PBASE,	/* 0x40000000 */
    173 		BCM53XX_PCIE1_OWIN_SIZE,	/* 4MB */
    174 		VM_PROT_READ|VM_PROT_WRITE,
    175 		PTE_NOCACHE,
    176 	},
    177 	{
    178 		KERNEL_IO_PCIE2_OWIN_VBASE,
    179 		BCM53XX_PCIE2_OWIN_PBASE,	/* 0x48000000 */
    180 		BCM53XX_PCIE2_OWIN_SIZE,	/* 4MB */
    181 		VM_PROT_READ|VM_PROT_WRITE,
    182 		PTE_NOCACHE,
    183 	},
    184 #endif /* NPCI > 0 */
    185 	{ 0, 0, 0, 0, 0 }
    186 };
    187 
    188 static const struct boot_physmem bp_first256 = {
    189 	.bp_start = 0x80000000 / NBPG,
    190 	.bp_pages = 0x10000000 / NBPG,
    191 	.bp_freelist = VM_FREELIST_ISADMA,
    192 	.bp_flags = 0,
    193 };
    194 
    195 /*
    196  * u_int initarm(...)
    197  *
    198  * Initial entry point on startup. This gets called before main() is
    199  * entered.
    200  * It should be responsible for setting up everything that must be
    201  * in place when main is called.
    202  * This includes
    203  *   Taking a copy of the boot configuration structure.
    204  *   Initialising the physical console so characters can be printed.
    205  *   Setting up page tables for the kernel
    206  */
    207 u_int
    208 initarm(void *arg)
    209 {
    210 	/*
    211 	 * Heads up ... Setup the CPU / MMU / TLB functions
    212 	 */
    213 	if (set_cpufuncs())		// starts PMC counter
    214 		panic("cpu not recognized!");
    215 
    216 	cn_tab = &earlycons;
    217 
    218 	extern char ARM_BOOTSTRAP_LxPT[];
    219 	pmap_devmap_bootstrap((vaddr_t)ARM_BOOTSTRAP_LxPT, devmap);
    220 
    221 	bcm53xx_bootstrap(KERNEL_IO_IOREG_VBASE);
    222 
    223 #ifdef MULTIPROCESSOR
    224 	uint32_t scu_cfg = bus_space_read_4(bcm53xx_armcore_bst, bcm53xx_armcore_bsh,
    225 	    ARMCORE_SCU_BASE + SCU_CFG);
    226 	arm_cpu_max = 1 + (scu_cfg & SCU_CFG_CPUMAX);
    227 	membar_producer();
    228 #endif
    229 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    230 
    231 	consinit();
    232 
    233 	bcm53xx_cpu_softc_init(curcpu());
    234 	bcm53xx_print_clocks();
    235 
    236 #if NBCMRNG_CCB > 0
    237 	/*
    238 	 * Start this early since it takes a while to startup up.
    239 	 */
    240 	bcm53xx_rng_start(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
    241 #endif
    242 
    243 	printf("uboot arg = %#x, %#x, %#x, %#x\n",
    244 	    uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
    245 
    246 	/* Talk to the user */
    247 	printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
    248 
    249 	bootargs[0] = '\0';
    250 
    251 #if defined(VERBOSE_INIT_ARM) || 1
    252 	printf("initarm: Configuring system");
    253 #ifdef MULTIPROCESSOR
    254 	printf(" (%u cpu%s, hatched %#x)",
    255 	    arm_cpu_max + 1, arm_cpu_max + 1 ? "s" : "",
    256 	    arm_cpu_hatched);
    257 #endif
    258 	printf(", CLIDR=%010o CTR=%#x PMUSERSR=%#x",
    259 	    armreg_clidr_read(), armreg_ctr_read(), armreg_pmuserenr_read());
    260 	printf("\n");
    261 #endif
    262 
    263 	psize_t memsize = bcm53xx_memprobe();
    264 #ifdef MEMSIZE
    265 	if ((memsize >> 20) > MEMSIZE)
    266 		memsize = MEMSIZE*1024*1024;
    267 #endif
    268 	const bool bigmem_p = (memsize >> 20) > 256;
    269 
    270 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
    271 	const bool mapallmem_p = true;
    272 #ifndef PMAP_NEED_ALLOC_POOLPAGE
    273 	if (memsize > KERNEL_VM_BASE - KERNEL_BASE) {
    274 		printf("%s: dropping RAM size from %luMB to %uMB\n",
    275 		   __func__, (unsigned long) (ram_size >> 20),
    276 		   (KERNEL_VM_BASE - KERNEL_BASE) >> 20);
    277 		memsize = KERNEL_VM_BASE - KERNEL_BASE;
    278 	}
    279 #endif
    280 #else
    281 	const bool mapallmem_p = false;
    282 #endif
    283 	KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
    284 	arm32_bootmem_init(KERN_VTOPHYS(KERNEL_BASE), memsize,
    285 	    (paddr_t)KERNEL_BASE_phys);
    286 
    287 	bcm53xx_dma_bootstrap(memsize);
    288 
    289 	/*
    290 	 * This is going to do all the hard work of setting up the first and
    291 	 * and second level page tables.  Pages of memory will be allocated
    292 	 * and mapped for other structures that are required for system
    293 	 * operation.  When it returns, physical_freestart and free_pages will
    294 	 * have been updated to reflect the allocations that were made.  In
    295 	 * addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
    296 	 * abtstack, undstack, kernelstack, msgbufphys will be set to point to
    297 	 * the memory that was allocated for them.
    298 	 */
    299 	arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
    300 	    mapallmem_p);
    301 
    302 	cpu_reset_address = bcm53xx_system_reset;
    303 	/* we've a specific device_register routine */
    304 	evbarm_device_register = bcm53xx_device_register;
    305 	if (bigmem_p) {
    306 		/*
    307 		 * If we have more than 256MB
    308 		 */
    309 		arm_poolpage_vmfreelist = bp_first256.bp_freelist;
    310 	}
    311 
    312 	/*
    313 	 * If we have more than 256MB of RAM, set aside the first 256MB for
    314 	 * non-default VM allocations.
    315 	 */
    316 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
    317 	    (bigmem_p ? &bp_first256 : NULL), (bigmem_p ? 1 : 0));
    318 }
    319 
    320 void
    321 consinit(void)
    322 {
    323 	static bool consinit_called = false;
    324 	uint32_t v;
    325 	if (consinit_called)
    326 		return;
    327 
    328 	consinit_called = true;
    329 
    330 	/*
    331 	 * Force UART clock to the reference clock
    332 	 */
    333 	v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    334 	    IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT);
    335 	v &= ~IO_CONTROL_DIRECT_UARTCLKSEL;
    336 	bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    337 	    IDM_BASE + IDM_APBX_BASE + IDM_IO_CONTROL_DIRECT, v);
    338 
    339 	/*
    340 	 * Switch to the reference clock
    341 	 */
    342 	v = bus_space_read_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    343 	    CCA_MISC_BASE + MISC_CORECTL);
    344 	v &= ~CORECTL_UART_CLK_OVERRIDE;
    345 	bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    346 	    CCA_MISC_BASE + MISC_CORECTL, v);
    347 
    348         if (comcnattach(bcm53xx_ioreg_bst, comcnaddr, comcnspeed,
    349                         BCM53XX_REF_CLK, COM_TYPE_NORMAL, comcnmode))
    350                 panic("Serial console can not be initialized.");
    351 }
    352 
    353 static void
    354 bcm53xx_system_reset(void)
    355 {
    356 	bus_space_write_4(bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh,
    357 	    MISC_WATCHDOG, 1);
    358 }
    359