plcom.c revision 1.1.2.2
1 1.1.2.2 nathanw /* $NetBSD: plcom.c,v 1.1.2.2 2002/01/08 00:24:12 nathanw Exp $ */ 2 1.1.2.2 nathanw 3 1.1.2.2 nathanw /*- 4 1.1.2.2 nathanw * Copyright (c) 2001 ARM Ltd 5 1.1.2.2 nathanw * All rights reserved. 6 1.1.2.2 nathanw * 7 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 9 1.1.2.2 nathanw * are met: 10 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 15 1.1.2.2 nathanw * 3. The name of the company may not be used to endorse or promote 16 1.1.2.2 nathanw * products derived from this software without specific prior written 17 1.1.2.2 nathanw * permission. 18 1.1.2.2 nathanw * 19 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 1.1.2.2 nathanw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 1.1.2.2 nathanw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 1.1.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 1.1.2.2 nathanw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 1.1.2.2 nathanw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 1.1.2.2 nathanw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 1.1.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 1.1.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 1.1.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 1.1.2.2 nathanw * SUCH DAMAGE. 30 1.1.2.2 nathanw * 31 1.1.2.2 nathanw * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 32 1.1.2.2 nathanw * All rights reserved. 33 1.1.2.2 nathanw * 34 1.1.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation 35 1.1.2.2 nathanw * by Charles M. Hannum. 36 1.1.2.2 nathanw * 37 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 38 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 39 1.1.2.2 nathanw * are met: 40 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 41 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 42 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 43 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 44 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 45 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 46 1.1.2.2 nathanw * must display the following acknowledgement: 47 1.1.2.2 nathanw * This product includes software developed by the NetBSD 48 1.1.2.2 nathanw * Foundation, Inc. and its contributors. 49 1.1.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its 50 1.1.2.2 nathanw * contributors may be used to endorse or promote products derived 51 1.1.2.2 nathanw * from this software without specific prior written permission. 52 1.1.2.2 nathanw * 53 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 54 1.1.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 1.1.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 1.1.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 57 1.1.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 1.1.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 1.1.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 1.1.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 1.1.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 1.1.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 1.1.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 64 1.1.2.2 nathanw */ 65 1.1.2.2 nathanw 66 1.1.2.2 nathanw /* 67 1.1.2.2 nathanw * Copyright (c) 1991 The Regents of the University of California. 68 1.1.2.2 nathanw * All rights reserved. 69 1.1.2.2 nathanw * 70 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 71 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 72 1.1.2.2 nathanw * are met: 73 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 74 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 75 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 76 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 77 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 78 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 79 1.1.2.2 nathanw * must display the following acknowledgement: 80 1.1.2.2 nathanw * This product includes software developed by the University of 81 1.1.2.2 nathanw * California, Berkeley and its contributors. 82 1.1.2.2 nathanw * 4. Neither the name of the University nor the names of its contributors 83 1.1.2.2 nathanw * may be used to endorse or promote products derived from this software 84 1.1.2.2 nathanw * without specific prior written permission. 85 1.1.2.2 nathanw * 86 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 87 1.1.2.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 88 1.1.2.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 89 1.1.2.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 90 1.1.2.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 91 1.1.2.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 92 1.1.2.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 1.1.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 1.1.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 1.1.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 1.1.2.2 nathanw * SUCH DAMAGE. 97 1.1.2.2 nathanw * 98 1.1.2.2 nathanw * @(#)com.c 7.5 (Berkeley) 5/16/91 99 1.1.2.2 nathanw */ 100 1.1.2.2 nathanw 101 1.1.2.2 nathanw /* 102 1.1.2.2 nathanw * COM driver for the Prime Cell PL010 UART, which is similar to the 16C550, 103 1.1.2.2 nathanw * but has a completely different programmer's model. 104 1.1.2.2 nathanw * Derived from the NS16550AF com driver. 105 1.1.2.2 nathanw */ 106 1.1.2.2 nathanw 107 1.1.2.2 nathanw #include "opt_plcom.h" 108 1.1.2.2 nathanw #include "opt_ddb.h" 109 1.1.2.2 nathanw #include "opt_kgdb.h" 110 1.1.2.2 nathanw 111 1.1.2.2 nathanw #include "rnd.h" 112 1.1.2.2 nathanw #if NRND > 0 && defined(RND_COM) 113 1.1.2.2 nathanw #include <sys/rnd.h> 114 1.1.2.2 nathanw #endif 115 1.1.2.2 nathanw 116 1.1.2.2 nathanw /* 117 1.1.2.2 nathanw * Override cnmagic(9) macro before including <sys/systm.h>. 118 1.1.2.2 nathanw * We need to know if cn_check_magic triggered debugger, so set a flag. 119 1.1.2.2 nathanw * Callers of cn_check_magic must declare int cn_trapped = 0; 120 1.1.2.2 nathanw * XXX: this is *ugly*! 121 1.1.2.2 nathanw */ 122 1.1.2.2 nathanw #define cn_trap() \ 123 1.1.2.2 nathanw do { \ 124 1.1.2.2 nathanw console_debugger(); \ 125 1.1.2.2 nathanw cn_trapped = 1; \ 126 1.1.2.2 nathanw } while (/* CONSTCOND */ 0) 127 1.1.2.2 nathanw 128 1.1.2.2 nathanw #include <sys/param.h> 129 1.1.2.2 nathanw #include <sys/systm.h> 130 1.1.2.2 nathanw #include <sys/ioctl.h> 131 1.1.2.2 nathanw #include <sys/select.h> 132 1.1.2.2 nathanw #include <sys/tty.h> 133 1.1.2.2 nathanw #include <sys/proc.h> 134 1.1.2.2 nathanw #include <sys/user.h> 135 1.1.2.2 nathanw #include <sys/conf.h> 136 1.1.2.2 nathanw #include <sys/file.h> 137 1.1.2.2 nathanw #include <sys/uio.h> 138 1.1.2.2 nathanw #include <sys/kernel.h> 139 1.1.2.2 nathanw #include <sys/syslog.h> 140 1.1.2.2 nathanw #include <sys/types.h> 141 1.1.2.2 nathanw #include <sys/device.h> 142 1.1.2.2 nathanw #include <sys/malloc.h> 143 1.1.2.2 nathanw #include <sys/timepps.h> 144 1.1.2.2 nathanw #include <sys/vnode.h> 145 1.1.2.2 nathanw 146 1.1.2.2 nathanw #include <machine/intr.h> 147 1.1.2.2 nathanw #include <machine/bus.h> 148 1.1.2.2 nathanw 149 1.1.2.2 nathanw #include <evbarm/dev/plcomreg.h> 150 1.1.2.2 nathanw #include <evbarm/dev/plcomvar.h> 151 1.1.2.2 nathanw 152 1.1.2.2 nathanw #include <dev/cons.h> 153 1.1.2.2 nathanw 154 1.1.2.2 nathanw static void plcom_enable_debugport (struct plcom_softc *); 155 1.1.2.2 nathanw 156 1.1.2.2 nathanw void plcom_config (struct plcom_softc *); 157 1.1.2.2 nathanw void plcom_shutdown (struct plcom_softc *); 158 1.1.2.2 nathanw int plcomspeed (long, long); 159 1.1.2.2 nathanw static u_char cflag2lcr (tcflag_t); 160 1.1.2.2 nathanw int plcomparam (struct tty *, struct termios *); 161 1.1.2.2 nathanw void plcomstart (struct tty *); 162 1.1.2.2 nathanw int plcomhwiflow (struct tty *, int); 163 1.1.2.2 nathanw 164 1.1.2.2 nathanw void plcom_loadchannelregs (struct plcom_softc *); 165 1.1.2.2 nathanw void plcom_hwiflow (struct plcom_softc *); 166 1.1.2.2 nathanw void plcom_break (struct plcom_softc *, int); 167 1.1.2.2 nathanw void plcom_modem (struct plcom_softc *, int); 168 1.1.2.2 nathanw void tiocm_to_plcom (struct plcom_softc *, u_long, int); 169 1.1.2.2 nathanw int plcom_to_tiocm (struct plcom_softc *); 170 1.1.2.2 nathanw void plcom_iflush (struct plcom_softc *); 171 1.1.2.2 nathanw 172 1.1.2.2 nathanw int plcom_common_getc (dev_t, bus_space_tag_t, bus_space_handle_t); 173 1.1.2.2 nathanw void plcom_common_putc (dev_t, bus_space_tag_t, bus_space_handle_t, int); 174 1.1.2.2 nathanw 175 1.1.2.2 nathanw int plcominit (bus_space_tag_t, bus_addr_t, int, int, tcflag_t, 176 1.1.2.2 nathanw bus_space_handle_t *); 177 1.1.2.2 nathanw 178 1.1.2.2 nathanw /* XXX: This belongs elsewhere */ 179 1.1.2.2 nathanw cdev_decl(plcom); 180 1.1.2.2 nathanw 181 1.1.2.2 nathanw int plcomcngetc (dev_t); 182 1.1.2.2 nathanw void plcomcnputc (dev_t, int); 183 1.1.2.2 nathanw void plcomcnpollc (dev_t, int); 184 1.1.2.2 nathanw 185 1.1.2.2 nathanw #define integrate static inline 186 1.1.2.2 nathanw #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 187 1.1.2.2 nathanw void plcomsoft (void *); 188 1.1.2.2 nathanw #else 189 1.1.2.2 nathanw #ifndef __NO_SOFT_SERIAL_INTERRUPT 190 1.1.2.2 nathanw void plcomsoft (void); 191 1.1.2.2 nathanw #else 192 1.1.2.2 nathanw void plcomsoft (void *); 193 1.1.2.2 nathanw struct callout plcomsoft_callout = CALLOUT_INITIALIZER; 194 1.1.2.2 nathanw #endif 195 1.1.2.2 nathanw #endif 196 1.1.2.2 nathanw integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 197 1.1.2.2 nathanw integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 198 1.1.2.2 nathanw integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 199 1.1.2.2 nathanw integrate void plcom_schedrx (struct plcom_softc *); 200 1.1.2.2 nathanw void plcomdiag (void *); 201 1.1.2.2 nathanw 202 1.1.2.2 nathanw extern struct cfdriver plcom_cd; 203 1.1.2.2 nathanw 204 1.1.2.2 nathanw /* 205 1.1.2.2 nathanw * Make this an option variable one can patch. 206 1.1.2.2 nathanw * But be warned: this must be a power of 2! 207 1.1.2.2 nathanw */ 208 1.1.2.2 nathanw u_int plcom_rbuf_size = PLCOM_RING_SIZE; 209 1.1.2.2 nathanw 210 1.1.2.2 nathanw /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 211 1.1.2.2 nathanw u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 212 1.1.2.2 nathanw u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 213 1.1.2.2 nathanw 214 1.1.2.2 nathanw static int plcomconsunit = -1; 215 1.1.2.2 nathanw static bus_space_tag_t plcomconstag; 216 1.1.2.2 nathanw static bus_space_handle_t plcomconsioh; 217 1.1.2.2 nathanw static int plcomconsattached; 218 1.1.2.2 nathanw static int plcomconsrate; 219 1.1.2.2 nathanw static tcflag_t plcomconscflag; 220 1.1.2.2 nathanw static struct cnm_state plcom_cnm_state; 221 1.1.2.2 nathanw 222 1.1.2.2 nathanw static int ppscap = 223 1.1.2.2 nathanw PPS_TSFMT_TSPEC | 224 1.1.2.2 nathanw PPS_CAPTUREASSERT | 225 1.1.2.2 nathanw PPS_CAPTURECLEAR | 226 1.1.2.2 nathanw #ifdef PPS_SYNC 227 1.1.2.2 nathanw PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 228 1.1.2.2 nathanw #endif /* PPS_SYNC */ 229 1.1.2.2 nathanw PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 230 1.1.2.2 nathanw 231 1.1.2.2 nathanw #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 232 1.1.2.2 nathanw #ifdef __NO_SOFT_SERIAL_INTERRUPT 233 1.1.2.2 nathanw volatile int plcom_softintr_scheduled; 234 1.1.2.2 nathanw #endif 235 1.1.2.2 nathanw #endif 236 1.1.2.2 nathanw 237 1.1.2.2 nathanw #ifdef KGDB 238 1.1.2.2 nathanw #include <sys/kgdb.h> 239 1.1.2.2 nathanw 240 1.1.2.2 nathanw static int plcom_kgdb_unit; 241 1.1.2.2 nathanw static bus_space_tag_t plcom_kgdb_iot; 242 1.1.2.2 nathanw static bus_space_handle_t plcom_kgdb_ioh; 243 1.1.2.2 nathanw static int plcom_kgdb_attached; 244 1.1.2.2 nathanw 245 1.1.2.2 nathanw int plcom_kgdb_getc (void *); 246 1.1.2.2 nathanw void plcom_kgdb_putc (void *, int); 247 1.1.2.2 nathanw #endif /* KGDB */ 248 1.1.2.2 nathanw 249 1.1.2.2 nathanw #define PLCOMUNIT_MASK 0x7ffff 250 1.1.2.2 nathanw #define PLCOMDIALOUT_MASK 0x80000 251 1.1.2.2 nathanw 252 1.1.2.2 nathanw #define PLCOMUNIT(x) (minor(x) & PLCOMUNIT_MASK) 253 1.1.2.2 nathanw #define PLCOMDIALOUT(x) (minor(x) & PLCOMDIALOUT_MASK) 254 1.1.2.2 nathanw 255 1.1.2.2 nathanw #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 256 1.1.2.2 nathanw ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 257 1.1.2.2 nathanw 258 1.1.2.2 nathanw #define BR BUS_SPACE_BARRIER_READ 259 1.1.2.2 nathanw #define BW BUS_SPACE_BARRIER_WRITE 260 1.1.2.2 nathanw #define PLCOM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, PLCOM_UART_SIZE, (f)) 261 1.1.2.2 nathanw 262 1.1.2.2 nathanw #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(PLCOM_MPLOCK) 263 1.1.2.2 nathanw 264 1.1.2.2 nathanw #define PLCOM_LOCK(sc) simple_lock(&(sc)->sc_lock) 265 1.1.2.2 nathanw #define PLCOM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 266 1.1.2.2 nathanw 267 1.1.2.2 nathanw #else 268 1.1.2.2 nathanw 269 1.1.2.2 nathanw #define PLCOM_LOCK(sc) 270 1.1.2.2 nathanw #define PLCOM_UNLOCK(sc) 271 1.1.2.2 nathanw 272 1.1.2.2 nathanw #endif 273 1.1.2.2 nathanw 274 1.1.2.2 nathanw int 275 1.1.2.2 nathanw plcomspeed(long speed, long frequency) 276 1.1.2.2 nathanw { 277 1.1.2.2 nathanw #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 278 1.1.2.2 nathanw 279 1.1.2.2 nathanw int x, err; 280 1.1.2.2 nathanw 281 1.1.2.2 nathanw #if 0 282 1.1.2.2 nathanw if (speed == 0) 283 1.1.2.2 nathanw return 0; 284 1.1.2.2 nathanw #endif 285 1.1.2.2 nathanw if (speed <= 0) 286 1.1.2.2 nathanw return -1; 287 1.1.2.2 nathanw x = divrnd(frequency / 16, speed); 288 1.1.2.2 nathanw if (x <= 0) 289 1.1.2.2 nathanw return -1; 290 1.1.2.2 nathanw err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 291 1.1.2.2 nathanw if (err < 0) 292 1.1.2.2 nathanw err = -err; 293 1.1.2.2 nathanw if (err > PLCOM_TOLERANCE) 294 1.1.2.2 nathanw return -1; 295 1.1.2.2 nathanw return x; 296 1.1.2.2 nathanw 297 1.1.2.2 nathanw #undef divrnd 298 1.1.2.2 nathanw } 299 1.1.2.2 nathanw 300 1.1.2.2 nathanw #ifdef PLCOM_DEBUG 301 1.1.2.2 nathanw int plcom_debug = 0; 302 1.1.2.2 nathanw 303 1.1.2.2 nathanw void plcomstatus (struct plcom_softc *, char *); 304 1.1.2.2 nathanw void 305 1.1.2.2 nathanw plcomstatus(struct plcom_softc *sc, char *str) 306 1.1.2.2 nathanw { 307 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 308 1.1.2.2 nathanw 309 1.1.2.2 nathanw printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 310 1.1.2.2 nathanw sc->sc_dev.dv_xname, str, 311 1.1.2.2 nathanw ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 312 1.1.2.2 nathanw ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 313 1.1.2.2 nathanw ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 314 1.1.2.2 nathanw ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 315 1.1.2.2 nathanw sc->sc_tx_stopped ? "+" : "-"); 316 1.1.2.2 nathanw 317 1.1.2.2 nathanw printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 318 1.1.2.2 nathanw sc->sc_dev.dv_xname, str, 319 1.1.2.2 nathanw ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 320 1.1.2.2 nathanw ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 321 1.1.2.2 nathanw ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 322 1.1.2.2 nathanw ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 323 1.1.2.2 nathanw sc->sc_rx_flags); 324 1.1.2.2 nathanw } 325 1.1.2.2 nathanw #endif 326 1.1.2.2 nathanw 327 1.1.2.2 nathanw int 328 1.1.2.2 nathanw plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 329 1.1.2.2 nathanw { 330 1.1.2.2 nathanw int data; 331 1.1.2.2 nathanw 332 1.1.2.2 nathanw /* Disable the UART. */ 333 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 0); 334 1.1.2.2 nathanw /* Make sure the FIFO is off. */ 335 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_lcr, LCR_8BITS); 336 1.1.2.2 nathanw /* Disable interrupts. */ 337 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_iir, 0); 338 1.1.2.2 nathanw 339 1.1.2.2 nathanw /* Make sure we swallow anything in the receiving register. */ 340 1.1.2.2 nathanw data = bus_space_read_1(iot, ioh, plcom_dr); 341 1.1.2.2 nathanw 342 1.1.2.2 nathanw if (bus_space_read_1(iot, ioh, plcom_lcr) != LCR_8BITS) 343 1.1.2.2 nathanw return 0; 344 1.1.2.2 nathanw 345 1.1.2.2 nathanw data = bus_space_read_1(iot, ioh, plcom_fr) & (FR_RXFF | FR_RXFE); 346 1.1.2.2 nathanw 347 1.1.2.2 nathanw if (data != FR_RXFE) 348 1.1.2.2 nathanw return 0; 349 1.1.2.2 nathanw 350 1.1.2.2 nathanw return 1; 351 1.1.2.2 nathanw } 352 1.1.2.2 nathanw 353 1.1.2.2 nathanw static void 354 1.1.2.2 nathanw plcom_enable_debugport(struct plcom_softc *sc) 355 1.1.2.2 nathanw { 356 1.1.2.2 nathanw int s; 357 1.1.2.2 nathanw 358 1.1.2.2 nathanw /* Turn on line break interrupt, set carrier. */ 359 1.1.2.2 nathanw s = splserial(); 360 1.1.2.2 nathanw PLCOM_LOCK(sc); 361 1.1.2.2 nathanw sc->sc_cr = CR_RIE | CR_RTIE | CR_UARTEN; 362 1.1.2.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr); 363 1.1.2.2 nathanw SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 364 1.1.2.2 nathanw sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit, sc->sc_mcr); 365 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 366 1.1.2.2 nathanw splx(s); 367 1.1.2.2 nathanw } 368 1.1.2.2 nathanw 369 1.1.2.2 nathanw void 370 1.1.2.2 nathanw plcom_attach_subr(struct plcom_softc *sc) 371 1.1.2.2 nathanw { 372 1.1.2.2 nathanw int unit = sc->sc_iounit; 373 1.1.2.2 nathanw bus_space_tag_t iot = sc->sc_iot; 374 1.1.2.2 nathanw bus_space_handle_t ioh = sc->sc_ioh; 375 1.1.2.2 nathanw struct tty *tp; 376 1.1.2.2 nathanw 377 1.1.2.2 nathanw callout_init(&sc->sc_diag_callout); 378 1.1.2.2 nathanw #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(PLCOM_MPLOCK) 379 1.1.2.2 nathanw simple_lock_init(&sc->sc_lock); 380 1.1.2.2 nathanw #endif 381 1.1.2.2 nathanw 382 1.1.2.2 nathanw /* Disable interrupts before configuring the device. */ 383 1.1.2.2 nathanw sc->sc_cr = 0; 384 1.1.2.2 nathanw 385 1.1.2.2 nathanw if (plcomconstag && unit == plcomconsunit) { 386 1.1.2.2 nathanw plcomconsattached = 1; 387 1.1.2.2 nathanw 388 1.1.2.2 nathanw plcomconstag = iot; 389 1.1.2.2 nathanw plcomconsioh = ioh; 390 1.1.2.2 nathanw 391 1.1.2.2 nathanw /* Make sure the console is always "hardwired". */ 392 1.1.2.2 nathanw delay(1000); /* wait for output to finish */ 393 1.1.2.2 nathanw SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 394 1.1.2.2 nathanw SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 395 1.1.2.2 nathanw /* Must re-enable the console immediately, or we will 396 1.1.2.2 nathanw hang when trying to print. */ 397 1.1.2.2 nathanw sc->sc_cr = CR_UARTEN; 398 1.1.2.2 nathanw } 399 1.1.2.2 nathanw 400 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr); 401 1.1.2.2 nathanw 402 1.1.2.2 nathanw /* The PL010 has a 16-byte fifo, but the tx interrupt triggers when 403 1.1.2.2 nathanw there is space for 8 more bytes. */ 404 1.1.2.2 nathanw sc->sc_fifolen = 8; 405 1.1.2.2 nathanw printf("\n"); 406 1.1.2.2 nathanw 407 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 408 1.1.2.2 nathanw sc->sc_fifolen = 1; 409 1.1.2.2 nathanw printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 410 1.1.2.2 nathanw } 411 1.1.2.2 nathanw 412 1.1.2.2 nathanw if (sc->sc_fifolen > 1) 413 1.1.2.2 nathanw SET(sc->sc_hwflags, PLCOM_HW_FIFO); 414 1.1.2.2 nathanw 415 1.1.2.2 nathanw tp = ttymalloc(); 416 1.1.2.2 nathanw tp->t_oproc = plcomstart; 417 1.1.2.2 nathanw tp->t_param = plcomparam; 418 1.1.2.2 nathanw tp->t_hwiflow = plcomhwiflow; 419 1.1.2.2 nathanw 420 1.1.2.2 nathanw sc->sc_tty = tp; 421 1.1.2.2 nathanw sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 422 1.1.2.2 nathanw sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 423 1.1.2.2 nathanw sc->sc_rbavail = plcom_rbuf_size; 424 1.1.2.2 nathanw if (sc->sc_rbuf == NULL) { 425 1.1.2.2 nathanw printf("%s: unable to allocate ring buffer\n", 426 1.1.2.2 nathanw sc->sc_dev.dv_xname); 427 1.1.2.2 nathanw return; 428 1.1.2.2 nathanw } 429 1.1.2.2 nathanw sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 430 1.1.2.2 nathanw 431 1.1.2.2 nathanw tty_attach(tp); 432 1.1.2.2 nathanw 433 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 434 1.1.2.2 nathanw int maj; 435 1.1.2.2 nathanw 436 1.1.2.2 nathanw /* locate the major number */ 437 1.1.2.2 nathanw for (maj = 0; maj < nchrdev; maj++) 438 1.1.2.2 nathanw if (cdevsw[maj].d_open == plcomopen) 439 1.1.2.2 nathanw break; 440 1.1.2.2 nathanw 441 1.1.2.2 nathanw cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 442 1.1.2.2 nathanw 443 1.1.2.2 nathanw printf("%s: console\n", sc->sc_dev.dv_xname); 444 1.1.2.2 nathanw } 445 1.1.2.2 nathanw 446 1.1.2.2 nathanw #ifdef KGDB 447 1.1.2.2 nathanw /* 448 1.1.2.2 nathanw * Allow kgdb to "take over" this port. If this is 449 1.1.2.2 nathanw * the kgdb device, it has exclusive use. 450 1.1.2.2 nathanw */ 451 1.1.2.2 nathanw if (iot == plcom_kgdb_iot && unit == plcom_kgdb_unit) { 452 1.1.2.2 nathanw plcom_kgdb_attached = 1; 453 1.1.2.2 nathanw 454 1.1.2.2 nathanw SET(sc->sc_hwflags, PLCOM_HW_KGDB); 455 1.1.2.2 nathanw printf("%s: kgdb\n", sc->sc_dev.dv_xname); 456 1.1.2.2 nathanw } 457 1.1.2.2 nathanw #endif 458 1.1.2.2 nathanw 459 1.1.2.2 nathanw #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 460 1.1.2.2 nathanw sc->sc_si = softintr_establish(IPL_SOFTSERIAL, plcomsoft, sc); 461 1.1.2.2 nathanw #endif 462 1.1.2.2 nathanw 463 1.1.2.2 nathanw #if NRND > 0 && defined(RND_COM) 464 1.1.2.2 nathanw rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 465 1.1.2.2 nathanw RND_TYPE_TTY, 0); 466 1.1.2.2 nathanw #endif 467 1.1.2.2 nathanw 468 1.1.2.2 nathanw /* if there are no enable/disable functions, assume the device 469 1.1.2.2 nathanw is always enabled */ 470 1.1.2.2 nathanw if (!sc->enable) 471 1.1.2.2 nathanw sc->enabled = 1; 472 1.1.2.2 nathanw 473 1.1.2.2 nathanw plcom_config(sc); 474 1.1.2.2 nathanw 475 1.1.2.2 nathanw SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 476 1.1.2.2 nathanw } 477 1.1.2.2 nathanw 478 1.1.2.2 nathanw void 479 1.1.2.2 nathanw plcom_config(struct plcom_softc *sc) 480 1.1.2.2 nathanw { 481 1.1.2.2 nathanw bus_space_tag_t iot = sc->sc_iot; 482 1.1.2.2 nathanw bus_space_handle_t ioh = sc->sc_ioh; 483 1.1.2.2 nathanw 484 1.1.2.2 nathanw /* Disable interrupts before configuring the device. */ 485 1.1.2.2 nathanw sc->sc_cr = 0; 486 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr); 487 1.1.2.2 nathanw 488 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 489 1.1.2.2 nathanw plcom_enable_debugport(sc); 490 1.1.2.2 nathanw } 491 1.1.2.2 nathanw 492 1.1.2.2 nathanw int 493 1.1.2.2 nathanw plcom_detach(self, flags) 494 1.1.2.2 nathanw struct device *self; 495 1.1.2.2 nathanw int flags; 496 1.1.2.2 nathanw { 497 1.1.2.2 nathanw struct plcom_softc *sc = (struct plcom_softc *)self; 498 1.1.2.2 nathanw int maj, mn; 499 1.1.2.2 nathanw 500 1.1.2.2 nathanw /* locate the major number */ 501 1.1.2.2 nathanw for (maj = 0; maj < nchrdev; maj++) 502 1.1.2.2 nathanw if (cdevsw[maj].d_open == plcomopen) 503 1.1.2.2 nathanw break; 504 1.1.2.2 nathanw 505 1.1.2.2 nathanw /* Nuke the vnodes for any open instances. */ 506 1.1.2.2 nathanw mn = self->dv_unit; 507 1.1.2.2 nathanw vdevgone(maj, mn, mn, VCHR); 508 1.1.2.2 nathanw 509 1.1.2.2 nathanw mn |= PLCOMDIALOUT_MASK; 510 1.1.2.2 nathanw vdevgone(maj, mn, mn, VCHR); 511 1.1.2.2 nathanw 512 1.1.2.2 nathanw /* Free the receive buffer. */ 513 1.1.2.2 nathanw free(sc->sc_rbuf, M_DEVBUF); 514 1.1.2.2 nathanw 515 1.1.2.2 nathanw /* Detach and free the tty. */ 516 1.1.2.2 nathanw tty_detach(sc->sc_tty); 517 1.1.2.2 nathanw ttyfree(sc->sc_tty); 518 1.1.2.2 nathanw 519 1.1.2.2 nathanw #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 520 1.1.2.2 nathanw /* Unhook the soft interrupt handler. */ 521 1.1.2.2 nathanw softintr_disestablish(sc->sc_si); 522 1.1.2.2 nathanw #endif 523 1.1.2.2 nathanw 524 1.1.2.2 nathanw #if NRND > 0 && defined(RND_COM) 525 1.1.2.2 nathanw /* Unhook the entropy source. */ 526 1.1.2.2 nathanw rnd_detach_source(&sc->rnd_source); 527 1.1.2.2 nathanw #endif 528 1.1.2.2 nathanw 529 1.1.2.2 nathanw return 0; 530 1.1.2.2 nathanw } 531 1.1.2.2 nathanw 532 1.1.2.2 nathanw int 533 1.1.2.2 nathanw plcom_activate(struct device *self, enum devact act) 534 1.1.2.2 nathanw { 535 1.1.2.2 nathanw struct plcom_softc *sc = (struct plcom_softc *)self; 536 1.1.2.2 nathanw int s, rv = 0; 537 1.1.2.2 nathanw 538 1.1.2.2 nathanw s = splserial(); 539 1.1.2.2 nathanw PLCOM_LOCK(sc); 540 1.1.2.2 nathanw switch (act) { 541 1.1.2.2 nathanw case DVACT_ACTIVATE: 542 1.1.2.2 nathanw rv = EOPNOTSUPP; 543 1.1.2.2 nathanw break; 544 1.1.2.2 nathanw 545 1.1.2.2 nathanw case DVACT_DEACTIVATE: 546 1.1.2.2 nathanw if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) { 547 1.1.2.2 nathanw rv = EBUSY; 548 1.1.2.2 nathanw break; 549 1.1.2.2 nathanw } 550 1.1.2.2 nathanw 551 1.1.2.2 nathanw if (sc->disable != NULL && sc->enabled != 0) { 552 1.1.2.2 nathanw (*sc->disable)(sc); 553 1.1.2.2 nathanw sc->enabled = 0; 554 1.1.2.2 nathanw } 555 1.1.2.2 nathanw break; 556 1.1.2.2 nathanw } 557 1.1.2.2 nathanw 558 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 559 1.1.2.2 nathanw splx(s); 560 1.1.2.2 nathanw return rv; 561 1.1.2.2 nathanw } 562 1.1.2.2 nathanw 563 1.1.2.2 nathanw void 564 1.1.2.2 nathanw plcom_shutdown(struct plcom_softc *sc) 565 1.1.2.2 nathanw { 566 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 567 1.1.2.2 nathanw int s; 568 1.1.2.2 nathanw 569 1.1.2.2 nathanw s = splserial(); 570 1.1.2.2 nathanw PLCOM_LOCK(sc); 571 1.1.2.2 nathanw 572 1.1.2.2 nathanw /* If we were asserting flow control, then deassert it. */ 573 1.1.2.2 nathanw SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 574 1.1.2.2 nathanw plcom_hwiflow(sc); 575 1.1.2.2 nathanw 576 1.1.2.2 nathanw /* Clear any break condition set with TIOCSBRK. */ 577 1.1.2.2 nathanw plcom_break(sc, 0); 578 1.1.2.2 nathanw 579 1.1.2.2 nathanw /* Turn off PPS capture on last close. */ 580 1.1.2.2 nathanw sc->sc_ppsmask = 0; 581 1.1.2.2 nathanw sc->ppsparam.mode = 0; 582 1.1.2.2 nathanw 583 1.1.2.2 nathanw /* 584 1.1.2.2 nathanw * Hang up if necessary. Wait a bit, so the other side has time to 585 1.1.2.2 nathanw * notice even if we immediately open the port again. 586 1.1.2.2 nathanw * Avoid tsleeping above splhigh(). 587 1.1.2.2 nathanw */ 588 1.1.2.2 nathanw if (ISSET(tp->t_cflag, HUPCL)) { 589 1.1.2.2 nathanw plcom_modem(sc, 0); 590 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 591 1.1.2.2 nathanw splx(s); 592 1.1.2.2 nathanw /* XXX tsleep will only timeout */ 593 1.1.2.2 nathanw (void) tsleep(sc, TTIPRI, ttclos, hz); 594 1.1.2.2 nathanw s = splserial(); 595 1.1.2.2 nathanw PLCOM_LOCK(sc); 596 1.1.2.2 nathanw } 597 1.1.2.2 nathanw 598 1.1.2.2 nathanw /* Turn off interrupts. */ 599 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) 600 1.1.2.2 nathanw /* interrupt on break */ 601 1.1.2.2 nathanw sc->sc_cr = CR_RIE | CR_RTIE | CR_UARTEN; 602 1.1.2.2 nathanw else 603 1.1.2.2 nathanw sc->sc_cr = 0; 604 1.1.2.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr); 605 1.1.2.2 nathanw 606 1.1.2.2 nathanw if (sc->disable) { 607 1.1.2.2 nathanw #ifdef DIAGNOSTIC 608 1.1.2.2 nathanw if (!sc->enabled) 609 1.1.2.2 nathanw panic("plcom_shutdown: not enabled?"); 610 1.1.2.2 nathanw #endif 611 1.1.2.2 nathanw (*sc->disable)(sc); 612 1.1.2.2 nathanw sc->enabled = 0; 613 1.1.2.2 nathanw } 614 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 615 1.1.2.2 nathanw splx(s); 616 1.1.2.2 nathanw } 617 1.1.2.2 nathanw 618 1.1.2.2 nathanw int 619 1.1.2.2 nathanw plcomopen(dev_t dev, int flag, int mode, struct proc *p) 620 1.1.2.2 nathanw { 621 1.1.2.2 nathanw struct plcom_softc *sc; 622 1.1.2.2 nathanw struct tty *tp; 623 1.1.2.2 nathanw int s, s2; 624 1.1.2.2 nathanw int error; 625 1.1.2.2 nathanw 626 1.1.2.2 nathanw sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 627 1.1.2.2 nathanw if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 628 1.1.2.2 nathanw sc->sc_rbuf == NULL) 629 1.1.2.2 nathanw return ENXIO; 630 1.1.2.2 nathanw 631 1.1.2.2 nathanw if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 632 1.1.2.2 nathanw return ENXIO; 633 1.1.2.2 nathanw 634 1.1.2.2 nathanw #ifdef KGDB 635 1.1.2.2 nathanw /* 636 1.1.2.2 nathanw * If this is the kgdb port, no other use is permitted. 637 1.1.2.2 nathanw */ 638 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 639 1.1.2.2 nathanw return EBUSY; 640 1.1.2.2 nathanw #endif 641 1.1.2.2 nathanw 642 1.1.2.2 nathanw tp = sc->sc_tty; 643 1.1.2.2 nathanw 644 1.1.2.2 nathanw if (ISSET(tp->t_state, TS_ISOPEN) && 645 1.1.2.2 nathanw ISSET(tp->t_state, TS_XCLUDE) && 646 1.1.2.2 nathanw p->p_ucred->cr_uid != 0) 647 1.1.2.2 nathanw return EBUSY; 648 1.1.2.2 nathanw 649 1.1.2.2 nathanw s = spltty(); 650 1.1.2.2 nathanw 651 1.1.2.2 nathanw /* 652 1.1.2.2 nathanw * Do the following iff this is a first open. 653 1.1.2.2 nathanw */ 654 1.1.2.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 655 1.1.2.2 nathanw struct termios t; 656 1.1.2.2 nathanw 657 1.1.2.2 nathanw tp->t_dev = dev; 658 1.1.2.2 nathanw 659 1.1.2.2 nathanw s2 = splserial(); 660 1.1.2.2 nathanw PLCOM_LOCK(sc); 661 1.1.2.2 nathanw 662 1.1.2.2 nathanw if (sc->enable) { 663 1.1.2.2 nathanw if ((*sc->enable)(sc)) { 664 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 665 1.1.2.2 nathanw splx(s2); 666 1.1.2.2 nathanw splx(s); 667 1.1.2.2 nathanw printf("%s: device enable failed\n", 668 1.1.2.2 nathanw sc->sc_dev.dv_xname); 669 1.1.2.2 nathanw return EIO; 670 1.1.2.2 nathanw } 671 1.1.2.2 nathanw sc->enabled = 1; 672 1.1.2.2 nathanw plcom_config(sc); 673 1.1.2.2 nathanw } 674 1.1.2.2 nathanw 675 1.1.2.2 nathanw /* Turn on interrupts. */ 676 1.1.2.2 nathanw /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 677 1.1.2.2 nathanw sc->sc_cr = CR_RIE | CR_RTIE | CR_MSIE | CR_UARTEN; 678 1.1.2.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr); 679 1.1.2.2 nathanw 680 1.1.2.2 nathanw /* Fetch the current modem control status, needed later. */ 681 1.1.2.2 nathanw sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, plcom_fr); 682 1.1.2.2 nathanw 683 1.1.2.2 nathanw /* Clear PPS capture state on first open. */ 684 1.1.2.2 nathanw sc->sc_ppsmask = 0; 685 1.1.2.2 nathanw sc->ppsparam.mode = 0; 686 1.1.2.2 nathanw 687 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 688 1.1.2.2 nathanw splx(s2); 689 1.1.2.2 nathanw 690 1.1.2.2 nathanw /* 691 1.1.2.2 nathanw * Initialize the termios status to the defaults. Add in the 692 1.1.2.2 nathanw * sticky bits from TIOCSFLAGS. 693 1.1.2.2 nathanw */ 694 1.1.2.2 nathanw t.c_ispeed = 0; 695 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 696 1.1.2.2 nathanw t.c_ospeed = plcomconsrate; 697 1.1.2.2 nathanw t.c_cflag = plcomconscflag; 698 1.1.2.2 nathanw } else { 699 1.1.2.2 nathanw t.c_ospeed = TTYDEF_SPEED; 700 1.1.2.2 nathanw t.c_cflag = TTYDEF_CFLAG; 701 1.1.2.2 nathanw } 702 1.1.2.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 703 1.1.2.2 nathanw SET(t.c_cflag, CLOCAL); 704 1.1.2.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 705 1.1.2.2 nathanw SET(t.c_cflag, CRTSCTS); 706 1.1.2.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 707 1.1.2.2 nathanw SET(t.c_cflag, MDMBUF); 708 1.1.2.2 nathanw /* Make sure plcomparam() will do something. */ 709 1.1.2.2 nathanw tp->t_ospeed = 0; 710 1.1.2.2 nathanw (void) plcomparam(tp, &t); 711 1.1.2.2 nathanw tp->t_iflag = TTYDEF_IFLAG; 712 1.1.2.2 nathanw tp->t_oflag = TTYDEF_OFLAG; 713 1.1.2.2 nathanw tp->t_lflag = TTYDEF_LFLAG; 714 1.1.2.2 nathanw ttychars(tp); 715 1.1.2.2 nathanw ttsetwater(tp); 716 1.1.2.2 nathanw 717 1.1.2.2 nathanw s2 = splserial(); 718 1.1.2.2 nathanw PLCOM_LOCK(sc); 719 1.1.2.2 nathanw 720 1.1.2.2 nathanw /* 721 1.1.2.2 nathanw * Turn on DTR. We must always do this, even if carrier is not 722 1.1.2.2 nathanw * present, because otherwise we'd have to use TIOCSDTR 723 1.1.2.2 nathanw * immediately after setting CLOCAL, which applications do not 724 1.1.2.2 nathanw * expect. We always assert DTR while the device is open 725 1.1.2.2 nathanw * unless explicitly requested to deassert it. 726 1.1.2.2 nathanw */ 727 1.1.2.2 nathanw plcom_modem(sc, 1); 728 1.1.2.2 nathanw 729 1.1.2.2 nathanw /* Clear the input ring, and unblock. */ 730 1.1.2.2 nathanw sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 731 1.1.2.2 nathanw sc->sc_rbavail = plcom_rbuf_size; 732 1.1.2.2 nathanw plcom_iflush(sc); 733 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 734 1.1.2.2 nathanw plcom_hwiflow(sc); 735 1.1.2.2 nathanw 736 1.1.2.2 nathanw #ifdef PLCOM_DEBUG 737 1.1.2.2 nathanw if (plcom_debug) 738 1.1.2.2 nathanw plcomstatus(sc, "plcomopen "); 739 1.1.2.2 nathanw #endif 740 1.1.2.2 nathanw 741 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 742 1.1.2.2 nathanw splx(s2); 743 1.1.2.2 nathanw } 744 1.1.2.2 nathanw 745 1.1.2.2 nathanw splx(s); 746 1.1.2.2 nathanw 747 1.1.2.2 nathanw error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 748 1.1.2.2 nathanw if (error) 749 1.1.2.2 nathanw goto bad; 750 1.1.2.2 nathanw 751 1.1.2.2 nathanw error = (*tp->t_linesw->l_open)(dev, tp); 752 1.1.2.2 nathanw if (error) 753 1.1.2.2 nathanw goto bad; 754 1.1.2.2 nathanw 755 1.1.2.2 nathanw return 0; 756 1.1.2.2 nathanw 757 1.1.2.2 nathanw bad: 758 1.1.2.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 759 1.1.2.2 nathanw /* 760 1.1.2.2 nathanw * We failed to open the device, and nobody else had it opened. 761 1.1.2.2 nathanw * Clean up the state as appropriate. 762 1.1.2.2 nathanw */ 763 1.1.2.2 nathanw plcom_shutdown(sc); 764 1.1.2.2 nathanw } 765 1.1.2.2 nathanw 766 1.1.2.2 nathanw return error; 767 1.1.2.2 nathanw } 768 1.1.2.2 nathanw 769 1.1.2.2 nathanw int 770 1.1.2.2 nathanw plcomclose(dev_t dev, int flag, int mode, struct proc *p) 771 1.1.2.2 nathanw { 772 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 773 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 774 1.1.2.2 nathanw 775 1.1.2.2 nathanw /* XXX This is for cons.c. */ 776 1.1.2.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN)) 777 1.1.2.2 nathanw return 0; 778 1.1.2.2 nathanw 779 1.1.2.2 nathanw (*tp->t_linesw->l_close)(tp, flag); 780 1.1.2.2 nathanw ttyclose(tp); 781 1.1.2.2 nathanw 782 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 783 1.1.2.2 nathanw return 0; 784 1.1.2.2 nathanw 785 1.1.2.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 786 1.1.2.2 nathanw /* 787 1.1.2.2 nathanw * Although we got a last close, the device may still be in 788 1.1.2.2 nathanw * use; e.g. if this was the dialout node, and there are still 789 1.1.2.2 nathanw * processes waiting for carrier on the non-dialout node. 790 1.1.2.2 nathanw */ 791 1.1.2.2 nathanw plcom_shutdown(sc); 792 1.1.2.2 nathanw } 793 1.1.2.2 nathanw 794 1.1.2.2 nathanw return 0; 795 1.1.2.2 nathanw } 796 1.1.2.2 nathanw 797 1.1.2.2 nathanw int 798 1.1.2.2 nathanw plcomread(dev_t dev, struct uio *uio, int flag) 799 1.1.2.2 nathanw { 800 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 801 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 802 1.1.2.2 nathanw 803 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 804 1.1.2.2 nathanw return EIO; 805 1.1.2.2 nathanw 806 1.1.2.2 nathanw return (*tp->t_linesw->l_read)(tp, uio, flag); 807 1.1.2.2 nathanw } 808 1.1.2.2 nathanw 809 1.1.2.2 nathanw int 810 1.1.2.2 nathanw plcomwrite(dev_t dev, struct uio *uio, int flag) 811 1.1.2.2 nathanw { 812 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 813 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 814 1.1.2.2 nathanw 815 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 816 1.1.2.2 nathanw return EIO; 817 1.1.2.2 nathanw 818 1.1.2.2 nathanw return (*tp->t_linesw->l_write)(tp, uio, flag); 819 1.1.2.2 nathanw } 820 1.1.2.2 nathanw 821 1.1.2.2 nathanw int 822 1.1.2.2 nathanw plcompoll(dev_t dev, int events, struct proc *p) 823 1.1.2.2 nathanw { 824 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 825 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 826 1.1.2.2 nathanw 827 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 828 1.1.2.2 nathanw return EIO; 829 1.1.2.2 nathanw 830 1.1.2.2 nathanw return (*tp->t_linesw->l_poll)(tp, events, p); 831 1.1.2.2 nathanw } 832 1.1.2.2 nathanw 833 1.1.2.2 nathanw struct tty * 834 1.1.2.2 nathanw plcomtty(dev_t dev) 835 1.1.2.2 nathanw { 836 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 837 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 838 1.1.2.2 nathanw 839 1.1.2.2 nathanw return tp; 840 1.1.2.2 nathanw } 841 1.1.2.2 nathanw 842 1.1.2.2 nathanw int 843 1.1.2.2 nathanw plcomioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 844 1.1.2.2 nathanw { 845 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(dev)); 846 1.1.2.2 nathanw struct tty *tp = sc->sc_tty; 847 1.1.2.2 nathanw int error; 848 1.1.2.2 nathanw int s; 849 1.1.2.2 nathanw 850 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 851 1.1.2.2 nathanw return EIO; 852 1.1.2.2 nathanw 853 1.1.2.2 nathanw error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 854 1.1.2.2 nathanw if (error >= 0) 855 1.1.2.2 nathanw return error; 856 1.1.2.2 nathanw 857 1.1.2.2 nathanw error = ttioctl(tp, cmd, data, flag, p); 858 1.1.2.2 nathanw if (error >= 0) 859 1.1.2.2 nathanw return error; 860 1.1.2.2 nathanw 861 1.1.2.2 nathanw error = 0; 862 1.1.2.2 nathanw 863 1.1.2.2 nathanw s = splserial(); 864 1.1.2.2 nathanw PLCOM_LOCK(sc); 865 1.1.2.2 nathanw 866 1.1.2.2 nathanw switch (cmd) { 867 1.1.2.2 nathanw case TIOCSBRK: 868 1.1.2.2 nathanw plcom_break(sc, 1); 869 1.1.2.2 nathanw break; 870 1.1.2.2 nathanw 871 1.1.2.2 nathanw case TIOCCBRK: 872 1.1.2.2 nathanw plcom_break(sc, 0); 873 1.1.2.2 nathanw break; 874 1.1.2.2 nathanw 875 1.1.2.2 nathanw case TIOCSDTR: 876 1.1.2.2 nathanw plcom_modem(sc, 1); 877 1.1.2.2 nathanw break; 878 1.1.2.2 nathanw 879 1.1.2.2 nathanw case TIOCCDTR: 880 1.1.2.2 nathanw plcom_modem(sc, 0); 881 1.1.2.2 nathanw break; 882 1.1.2.2 nathanw 883 1.1.2.2 nathanw case TIOCGFLAGS: 884 1.1.2.2 nathanw *(int *)data = sc->sc_swflags; 885 1.1.2.2 nathanw break; 886 1.1.2.2 nathanw 887 1.1.2.2 nathanw case TIOCSFLAGS: 888 1.1.2.2 nathanw error = suser(p->p_ucred, &p->p_acflag); 889 1.1.2.2 nathanw if (error) 890 1.1.2.2 nathanw break; 891 1.1.2.2 nathanw sc->sc_swflags = *(int *)data; 892 1.1.2.2 nathanw break; 893 1.1.2.2 nathanw 894 1.1.2.2 nathanw case TIOCMSET: 895 1.1.2.2 nathanw case TIOCMBIS: 896 1.1.2.2 nathanw case TIOCMBIC: 897 1.1.2.2 nathanw tiocm_to_plcom(sc, cmd, *(int *)data); 898 1.1.2.2 nathanw break; 899 1.1.2.2 nathanw 900 1.1.2.2 nathanw case TIOCMGET: 901 1.1.2.2 nathanw *(int *)data = plcom_to_tiocm(sc); 902 1.1.2.2 nathanw break; 903 1.1.2.2 nathanw 904 1.1.2.2 nathanw case PPS_IOC_CREATE: 905 1.1.2.2 nathanw break; 906 1.1.2.2 nathanw 907 1.1.2.2 nathanw case PPS_IOC_DESTROY: 908 1.1.2.2 nathanw break; 909 1.1.2.2 nathanw 910 1.1.2.2 nathanw case PPS_IOC_GETPARAMS: { 911 1.1.2.2 nathanw pps_params_t *pp; 912 1.1.2.2 nathanw pp = (pps_params_t *)data; 913 1.1.2.2 nathanw *pp = sc->ppsparam; 914 1.1.2.2 nathanw break; 915 1.1.2.2 nathanw } 916 1.1.2.2 nathanw 917 1.1.2.2 nathanw case PPS_IOC_SETPARAMS: { 918 1.1.2.2 nathanw pps_params_t *pp; 919 1.1.2.2 nathanw int mode; 920 1.1.2.2 nathanw pp = (pps_params_t *)data; 921 1.1.2.2 nathanw if (pp->mode & ~ppscap) { 922 1.1.2.2 nathanw error = EINVAL; 923 1.1.2.2 nathanw break; 924 1.1.2.2 nathanw } 925 1.1.2.2 nathanw sc->ppsparam = *pp; 926 1.1.2.2 nathanw /* 927 1.1.2.2 nathanw * Compute msr masks from user-specified timestamp state. 928 1.1.2.2 nathanw */ 929 1.1.2.2 nathanw mode = sc->ppsparam.mode; 930 1.1.2.2 nathanw #ifdef PPS_SYNC 931 1.1.2.2 nathanw if (mode & PPS_HARDPPSONASSERT) { 932 1.1.2.2 nathanw mode |= PPS_CAPTUREASSERT; 933 1.1.2.2 nathanw /* XXX revoke any previous HARDPPS source */ 934 1.1.2.2 nathanw } 935 1.1.2.2 nathanw if (mode & PPS_HARDPPSONCLEAR) { 936 1.1.2.2 nathanw mode |= PPS_CAPTURECLEAR; 937 1.1.2.2 nathanw /* XXX revoke any previous HARDPPS source */ 938 1.1.2.2 nathanw } 939 1.1.2.2 nathanw #endif /* PPS_SYNC */ 940 1.1.2.2 nathanw switch (mode & PPS_CAPTUREBOTH) { 941 1.1.2.2 nathanw case 0: 942 1.1.2.2 nathanw sc->sc_ppsmask = 0; 943 1.1.2.2 nathanw break; 944 1.1.2.2 nathanw 945 1.1.2.2 nathanw case PPS_CAPTUREASSERT: 946 1.1.2.2 nathanw sc->sc_ppsmask = MSR_DCD; 947 1.1.2.2 nathanw sc->sc_ppsassert = MSR_DCD; 948 1.1.2.2 nathanw sc->sc_ppsclear = -1; 949 1.1.2.2 nathanw break; 950 1.1.2.2 nathanw 951 1.1.2.2 nathanw case PPS_CAPTURECLEAR: 952 1.1.2.2 nathanw sc->sc_ppsmask = MSR_DCD; 953 1.1.2.2 nathanw sc->sc_ppsassert = -1; 954 1.1.2.2 nathanw sc->sc_ppsclear = 0; 955 1.1.2.2 nathanw break; 956 1.1.2.2 nathanw 957 1.1.2.2 nathanw case PPS_CAPTUREBOTH: 958 1.1.2.2 nathanw sc->sc_ppsmask = MSR_DCD; 959 1.1.2.2 nathanw sc->sc_ppsassert = MSR_DCD; 960 1.1.2.2 nathanw sc->sc_ppsclear = 0; 961 1.1.2.2 nathanw break; 962 1.1.2.2 nathanw 963 1.1.2.2 nathanw default: 964 1.1.2.2 nathanw error = EINVAL; 965 1.1.2.2 nathanw break; 966 1.1.2.2 nathanw } 967 1.1.2.2 nathanw break; 968 1.1.2.2 nathanw } 969 1.1.2.2 nathanw 970 1.1.2.2 nathanw case PPS_IOC_GETCAP: 971 1.1.2.2 nathanw *(int*)data = ppscap; 972 1.1.2.2 nathanw break; 973 1.1.2.2 nathanw 974 1.1.2.2 nathanw case PPS_IOC_FETCH: { 975 1.1.2.2 nathanw pps_info_t *pi; 976 1.1.2.2 nathanw pi = (pps_info_t *)data; 977 1.1.2.2 nathanw *pi = sc->ppsinfo; 978 1.1.2.2 nathanw break; 979 1.1.2.2 nathanw } 980 1.1.2.2 nathanw 981 1.1.2.2 nathanw case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 982 1.1.2.2 nathanw /* 983 1.1.2.2 nathanw * Some GPS clocks models use the falling rather than 984 1.1.2.2 nathanw * rising edge as the on-the-second signal. 985 1.1.2.2 nathanw * The old API has no way to specify PPS polarity. 986 1.1.2.2 nathanw */ 987 1.1.2.2 nathanw sc->sc_ppsmask = MSR_DCD; 988 1.1.2.2 nathanw #ifndef PPS_TRAILING_EDGE 989 1.1.2.2 nathanw sc->sc_ppsassert = MSR_DCD; 990 1.1.2.2 nathanw sc->sc_ppsclear = -1; 991 1.1.2.2 nathanw TIMESPEC_TO_TIMEVAL((struct timeval *)data, 992 1.1.2.2 nathanw &sc->ppsinfo.assert_timestamp); 993 1.1.2.2 nathanw #else 994 1.1.2.2 nathanw sc->sc_ppsassert = -1 995 1.1.2.2 nathanw sc->sc_ppsclear = 0; 996 1.1.2.2 nathanw TIMESPEC_TO_TIMEVAL((struct timeval *)data, 997 1.1.2.2 nathanw &sc->ppsinfo.clear_timestamp); 998 1.1.2.2 nathanw #endif 999 1.1.2.2 nathanw break; 1000 1.1.2.2 nathanw 1001 1.1.2.2 nathanw default: 1002 1.1.2.2 nathanw error = ENOTTY; 1003 1.1.2.2 nathanw break; 1004 1.1.2.2 nathanw } 1005 1.1.2.2 nathanw 1006 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1007 1.1.2.2 nathanw splx(s); 1008 1.1.2.2 nathanw 1009 1.1.2.2 nathanw #ifdef PLCOM_DEBUG 1010 1.1.2.2 nathanw if (plcom_debug) 1011 1.1.2.2 nathanw plcomstatus(sc, "plcomioctl "); 1012 1.1.2.2 nathanw #endif 1013 1.1.2.2 nathanw 1014 1.1.2.2 nathanw return error; 1015 1.1.2.2 nathanw } 1016 1.1.2.2 nathanw 1017 1.1.2.2 nathanw integrate void 1018 1.1.2.2 nathanw plcom_schedrx(struct plcom_softc *sc) 1019 1.1.2.2 nathanw { 1020 1.1.2.2 nathanw 1021 1.1.2.2 nathanw sc->sc_rx_ready = 1; 1022 1.1.2.2 nathanw 1023 1.1.2.2 nathanw /* Wake up the poller. */ 1024 1.1.2.2 nathanw #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1025 1.1.2.2 nathanw softintr_schedule(sc->sc_si); 1026 1.1.2.2 nathanw #else 1027 1.1.2.2 nathanw #ifndef __NO_SOFT_SERIAL_INTERRUPT 1028 1.1.2.2 nathanw setsoftserial(); 1029 1.1.2.2 nathanw #else 1030 1.1.2.2 nathanw if (!plcom_softintr_scheduled) { 1031 1.1.2.2 nathanw plcom_softintr_scheduled = 1; 1032 1.1.2.2 nathanw callout_reset(&plcomsoft_callout, 1, plcomsoft, NULL); 1033 1.1.2.2 nathanw } 1034 1.1.2.2 nathanw #endif 1035 1.1.2.2 nathanw #endif 1036 1.1.2.2 nathanw } 1037 1.1.2.2 nathanw 1038 1.1.2.2 nathanw void 1039 1.1.2.2 nathanw plcom_break(struct plcom_softc *sc, int onoff) 1040 1.1.2.2 nathanw { 1041 1.1.2.2 nathanw 1042 1.1.2.2 nathanw if (onoff) 1043 1.1.2.2 nathanw SET(sc->sc_lcr, LCR_BRK); 1044 1.1.2.2 nathanw else 1045 1.1.2.2 nathanw CLR(sc->sc_lcr, LCR_BRK); 1046 1.1.2.2 nathanw 1047 1.1.2.2 nathanw if (!sc->sc_heldchange) { 1048 1.1.2.2 nathanw if (sc->sc_tx_busy) { 1049 1.1.2.2 nathanw sc->sc_heldtbc = sc->sc_tbc; 1050 1.1.2.2 nathanw sc->sc_tbc = 0; 1051 1.1.2.2 nathanw sc->sc_heldchange = 1; 1052 1.1.2.2 nathanw } else 1053 1.1.2.2 nathanw plcom_loadchannelregs(sc); 1054 1.1.2.2 nathanw } 1055 1.1.2.2 nathanw } 1056 1.1.2.2 nathanw 1057 1.1.2.2 nathanw void 1058 1.1.2.2 nathanw plcom_modem(struct plcom_softc *sc, int onoff) 1059 1.1.2.2 nathanw { 1060 1.1.2.2 nathanw 1061 1.1.2.2 nathanw if (sc->sc_mcr_dtr == 0) 1062 1.1.2.2 nathanw return; 1063 1.1.2.2 nathanw 1064 1.1.2.2 nathanw if (onoff) 1065 1.1.2.2 nathanw SET(sc->sc_mcr, sc->sc_mcr_dtr); 1066 1.1.2.2 nathanw else 1067 1.1.2.2 nathanw CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1068 1.1.2.2 nathanw 1069 1.1.2.2 nathanw if (!sc->sc_heldchange) { 1070 1.1.2.2 nathanw if (sc->sc_tx_busy) { 1071 1.1.2.2 nathanw sc->sc_heldtbc = sc->sc_tbc; 1072 1.1.2.2 nathanw sc->sc_tbc = 0; 1073 1.1.2.2 nathanw sc->sc_heldchange = 1; 1074 1.1.2.2 nathanw } else 1075 1.1.2.2 nathanw plcom_loadchannelregs(sc); 1076 1.1.2.2 nathanw } 1077 1.1.2.2 nathanw } 1078 1.1.2.2 nathanw 1079 1.1.2.2 nathanw void 1080 1.1.2.2 nathanw tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1081 1.1.2.2 nathanw { 1082 1.1.2.2 nathanw u_char plcombits; 1083 1.1.2.2 nathanw 1084 1.1.2.2 nathanw plcombits = 0; 1085 1.1.2.2 nathanw if (ISSET(ttybits, TIOCM_DTR)) 1086 1.1.2.2 nathanw SET(plcombits, MCR_DTR); 1087 1.1.2.2 nathanw if (ISSET(ttybits, TIOCM_RTS)) 1088 1.1.2.2 nathanw SET(plcombits, MCR_RTS); 1089 1.1.2.2 nathanw 1090 1.1.2.2 nathanw switch (how) { 1091 1.1.2.2 nathanw case TIOCMBIC: 1092 1.1.2.2 nathanw CLR(sc->sc_mcr, plcombits); 1093 1.1.2.2 nathanw break; 1094 1.1.2.2 nathanw 1095 1.1.2.2 nathanw case TIOCMBIS: 1096 1.1.2.2 nathanw SET(sc->sc_mcr, plcombits); 1097 1.1.2.2 nathanw break; 1098 1.1.2.2 nathanw 1099 1.1.2.2 nathanw case TIOCMSET: 1100 1.1.2.2 nathanw CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1101 1.1.2.2 nathanw SET(sc->sc_mcr, plcombits); 1102 1.1.2.2 nathanw break; 1103 1.1.2.2 nathanw } 1104 1.1.2.2 nathanw 1105 1.1.2.2 nathanw if (!sc->sc_heldchange) { 1106 1.1.2.2 nathanw if (sc->sc_tx_busy) { 1107 1.1.2.2 nathanw sc->sc_heldtbc = sc->sc_tbc; 1108 1.1.2.2 nathanw sc->sc_tbc = 0; 1109 1.1.2.2 nathanw sc->sc_heldchange = 1; 1110 1.1.2.2 nathanw } else 1111 1.1.2.2 nathanw plcom_loadchannelregs(sc); 1112 1.1.2.2 nathanw } 1113 1.1.2.2 nathanw } 1114 1.1.2.2 nathanw 1115 1.1.2.2 nathanw int 1116 1.1.2.2 nathanw plcom_to_tiocm(struct plcom_softc *sc) 1117 1.1.2.2 nathanw { 1118 1.1.2.2 nathanw u_char plcombits; 1119 1.1.2.2 nathanw int ttybits = 0; 1120 1.1.2.2 nathanw 1121 1.1.2.2 nathanw plcombits = sc->sc_mcr; 1122 1.1.2.2 nathanw if (ISSET(plcombits, MCR_DTR)) 1123 1.1.2.2 nathanw SET(ttybits, TIOCM_DTR); 1124 1.1.2.2 nathanw if (ISSET(plcombits, MCR_RTS)) 1125 1.1.2.2 nathanw SET(ttybits, TIOCM_RTS); 1126 1.1.2.2 nathanw 1127 1.1.2.2 nathanw plcombits = sc->sc_msr; 1128 1.1.2.2 nathanw if (ISSET(plcombits, MSR_DCD)) 1129 1.1.2.2 nathanw SET(ttybits, TIOCM_CD); 1130 1.1.2.2 nathanw if (ISSET(plcombits, MSR_CTS)) 1131 1.1.2.2 nathanw SET(ttybits, TIOCM_CTS); 1132 1.1.2.2 nathanw if (ISSET(plcombits, MSR_DSR)) 1133 1.1.2.2 nathanw SET(ttybits, TIOCM_DSR); 1134 1.1.2.2 nathanw 1135 1.1.2.2 nathanw if (sc->sc_cr != 0) 1136 1.1.2.2 nathanw SET(ttybits, TIOCM_LE); 1137 1.1.2.2 nathanw 1138 1.1.2.2 nathanw return ttybits; 1139 1.1.2.2 nathanw } 1140 1.1.2.2 nathanw 1141 1.1.2.2 nathanw static u_char 1142 1.1.2.2 nathanw cflag2lcr(tcflag_t cflag) 1143 1.1.2.2 nathanw { 1144 1.1.2.2 nathanw u_char lcr = 0; 1145 1.1.2.2 nathanw 1146 1.1.2.2 nathanw switch (ISSET(cflag, CSIZE)) { 1147 1.1.2.2 nathanw case CS5: 1148 1.1.2.2 nathanw SET(lcr, LCR_5BITS); 1149 1.1.2.2 nathanw break; 1150 1.1.2.2 nathanw case CS6: 1151 1.1.2.2 nathanw SET(lcr, LCR_6BITS); 1152 1.1.2.2 nathanw break; 1153 1.1.2.2 nathanw case CS7: 1154 1.1.2.2 nathanw SET(lcr, LCR_7BITS); 1155 1.1.2.2 nathanw break; 1156 1.1.2.2 nathanw case CS8: 1157 1.1.2.2 nathanw SET(lcr, LCR_8BITS); 1158 1.1.2.2 nathanw break; 1159 1.1.2.2 nathanw } 1160 1.1.2.2 nathanw if (ISSET(cflag, PARENB)) { 1161 1.1.2.2 nathanw SET(lcr, LCR_PEN); 1162 1.1.2.2 nathanw if (!ISSET(cflag, PARODD)) 1163 1.1.2.2 nathanw SET(lcr, LCR_EPS); 1164 1.1.2.2 nathanw } 1165 1.1.2.2 nathanw if (ISSET(cflag, CSTOPB)) 1166 1.1.2.2 nathanw SET(lcr, LCR_STP2); 1167 1.1.2.2 nathanw 1168 1.1.2.2 nathanw return lcr; 1169 1.1.2.2 nathanw } 1170 1.1.2.2 nathanw 1171 1.1.2.2 nathanw int 1172 1.1.2.2 nathanw plcomparam(struct tty *tp, struct termios *t) 1173 1.1.2.2 nathanw { 1174 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1175 1.1.2.2 nathanw int ospeed; 1176 1.1.2.2 nathanw u_char lcr; 1177 1.1.2.2 nathanw int s; 1178 1.1.2.2 nathanw 1179 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 1180 1.1.2.2 nathanw return EIO; 1181 1.1.2.2 nathanw 1182 1.1.2.2 nathanw ospeed = plcomspeed(t->c_ospeed, sc->sc_frequency); 1183 1.1.2.2 nathanw 1184 1.1.2.2 nathanw /* Check requested parameters. */ 1185 1.1.2.2 nathanw if (ospeed < 0) 1186 1.1.2.2 nathanw return EINVAL; 1187 1.1.2.2 nathanw if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1188 1.1.2.2 nathanw return EINVAL; 1189 1.1.2.2 nathanw 1190 1.1.2.2 nathanw /* 1191 1.1.2.2 nathanw * For the console, always force CLOCAL and !HUPCL, so that the port 1192 1.1.2.2 nathanw * is always active. 1193 1.1.2.2 nathanw */ 1194 1.1.2.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1195 1.1.2.2 nathanw ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1196 1.1.2.2 nathanw SET(t->c_cflag, CLOCAL); 1197 1.1.2.2 nathanw CLR(t->c_cflag, HUPCL); 1198 1.1.2.2 nathanw } 1199 1.1.2.2 nathanw 1200 1.1.2.2 nathanw /* 1201 1.1.2.2 nathanw * If there were no changes, don't do anything. This avoids dropping 1202 1.1.2.2 nathanw * input and improves performance when all we did was frob things like 1203 1.1.2.2 nathanw * VMIN and VTIME. 1204 1.1.2.2 nathanw */ 1205 1.1.2.2 nathanw if (tp->t_ospeed == t->c_ospeed && 1206 1.1.2.2 nathanw tp->t_cflag == t->c_cflag) 1207 1.1.2.2 nathanw return 0; 1208 1.1.2.2 nathanw 1209 1.1.2.2 nathanw lcr = ISSET(sc->sc_lcr, LCR_BRK) | cflag2lcr(t->c_cflag); 1210 1.1.2.2 nathanw 1211 1.1.2.2 nathanw s = splserial(); 1212 1.1.2.2 nathanw PLCOM_LOCK(sc); 1213 1.1.2.2 nathanw 1214 1.1.2.2 nathanw sc->sc_lcr = lcr; 1215 1.1.2.2 nathanw 1216 1.1.2.2 nathanw /* 1217 1.1.2.2 nathanw * PL010 has a fixed-length FIFO trigger point. 1218 1.1.2.2 nathanw */ 1219 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1220 1.1.2.2 nathanw sc->sc_fifo = 1; 1221 1.1.2.2 nathanw else 1222 1.1.2.2 nathanw sc->sc_fifo = 0; 1223 1.1.2.2 nathanw 1224 1.1.2.2 nathanw if (sc->sc_fifo) 1225 1.1.2.2 nathanw SET(sc->sc_lcr, LCR_FEN); 1226 1.1.2.2 nathanw 1227 1.1.2.2 nathanw /* 1228 1.1.2.2 nathanw * If we're not in a mode that assumes a connection is present, then 1229 1.1.2.2 nathanw * ignore carrier changes. 1230 1.1.2.2 nathanw */ 1231 1.1.2.2 nathanw if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1232 1.1.2.2 nathanw sc->sc_msr_dcd = 0; 1233 1.1.2.2 nathanw else 1234 1.1.2.2 nathanw sc->sc_msr_dcd = MSR_DCD; 1235 1.1.2.2 nathanw /* 1236 1.1.2.2 nathanw * Set the flow control pins depending on the current flow control 1237 1.1.2.2 nathanw * mode. 1238 1.1.2.2 nathanw */ 1239 1.1.2.2 nathanw if (ISSET(t->c_cflag, CRTSCTS)) { 1240 1.1.2.2 nathanw sc->sc_mcr_dtr = MCR_DTR; 1241 1.1.2.2 nathanw sc->sc_mcr_rts = MCR_RTS; 1242 1.1.2.2 nathanw sc->sc_msr_cts = MSR_CTS; 1243 1.1.2.2 nathanw } else if (ISSET(t->c_cflag, MDMBUF)) { 1244 1.1.2.2 nathanw /* 1245 1.1.2.2 nathanw * For DTR/DCD flow control, make sure we don't toggle DTR for 1246 1.1.2.2 nathanw * carrier detection. 1247 1.1.2.2 nathanw */ 1248 1.1.2.2 nathanw sc->sc_mcr_dtr = 0; 1249 1.1.2.2 nathanw sc->sc_mcr_rts = MCR_DTR; 1250 1.1.2.2 nathanw sc->sc_msr_cts = MSR_DCD; 1251 1.1.2.2 nathanw } else { 1252 1.1.2.2 nathanw /* 1253 1.1.2.2 nathanw * If no flow control, then always set RTS. This will make 1254 1.1.2.2 nathanw * the other side happy if it mistakenly thinks we're doing 1255 1.1.2.2 nathanw * RTS/CTS flow control. 1256 1.1.2.2 nathanw */ 1257 1.1.2.2 nathanw sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1258 1.1.2.2 nathanw sc->sc_mcr_rts = 0; 1259 1.1.2.2 nathanw sc->sc_msr_cts = 0; 1260 1.1.2.2 nathanw if (ISSET(sc->sc_mcr, MCR_DTR)) 1261 1.1.2.2 nathanw SET(sc->sc_mcr, MCR_RTS); 1262 1.1.2.2 nathanw else 1263 1.1.2.2 nathanw CLR(sc->sc_mcr, MCR_RTS); 1264 1.1.2.2 nathanw } 1265 1.1.2.2 nathanw sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1266 1.1.2.2 nathanw 1267 1.1.2.2 nathanw #if 0 1268 1.1.2.2 nathanw if (ospeed == 0) 1269 1.1.2.2 nathanw CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1270 1.1.2.2 nathanw else 1271 1.1.2.2 nathanw SET(sc->sc_mcr, sc->sc_mcr_dtr); 1272 1.1.2.2 nathanw #endif 1273 1.1.2.2 nathanw 1274 1.1.2.2 nathanw sc->sc_dlbl = ospeed; 1275 1.1.2.2 nathanw sc->sc_dlbh = ospeed >> 8; 1276 1.1.2.2 nathanw 1277 1.1.2.2 nathanw /* And copy to tty. */ 1278 1.1.2.2 nathanw tp->t_ispeed = 0; 1279 1.1.2.2 nathanw tp->t_ospeed = t->c_ospeed; 1280 1.1.2.2 nathanw tp->t_cflag = t->c_cflag; 1281 1.1.2.2 nathanw 1282 1.1.2.2 nathanw if (!sc->sc_heldchange) { 1283 1.1.2.2 nathanw if (sc->sc_tx_busy) { 1284 1.1.2.2 nathanw sc->sc_heldtbc = sc->sc_tbc; 1285 1.1.2.2 nathanw sc->sc_tbc = 0; 1286 1.1.2.2 nathanw sc->sc_heldchange = 1; 1287 1.1.2.2 nathanw } else 1288 1.1.2.2 nathanw plcom_loadchannelregs(sc); 1289 1.1.2.2 nathanw } 1290 1.1.2.2 nathanw 1291 1.1.2.2 nathanw if (!ISSET(t->c_cflag, CHWFLOW)) { 1292 1.1.2.2 nathanw /* Disable the high water mark. */ 1293 1.1.2.2 nathanw sc->sc_r_hiwat = 0; 1294 1.1.2.2 nathanw sc->sc_r_lowat = 0; 1295 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1296 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1297 1.1.2.2 nathanw plcom_schedrx(sc); 1298 1.1.2.2 nathanw } 1299 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1300 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1301 1.1.2.2 nathanw plcom_hwiflow(sc); 1302 1.1.2.2 nathanw } 1303 1.1.2.2 nathanw } else { 1304 1.1.2.2 nathanw sc->sc_r_hiwat = plcom_rbuf_hiwat; 1305 1.1.2.2 nathanw sc->sc_r_lowat = plcom_rbuf_lowat; 1306 1.1.2.2 nathanw } 1307 1.1.2.2 nathanw 1308 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1309 1.1.2.2 nathanw splx(s); 1310 1.1.2.2 nathanw 1311 1.1.2.2 nathanw /* 1312 1.1.2.2 nathanw * Update the tty layer's idea of the carrier bit, in case we changed 1313 1.1.2.2 nathanw * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1314 1.1.2.2 nathanw * explicit request. 1315 1.1.2.2 nathanw */ 1316 1.1.2.2 nathanw (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1317 1.1.2.2 nathanw 1318 1.1.2.2 nathanw #ifdef PLCOM_DEBUG 1319 1.1.2.2 nathanw if (plcom_debug) 1320 1.1.2.2 nathanw plcomstatus(sc, "plcomparam "); 1321 1.1.2.2 nathanw #endif 1322 1.1.2.2 nathanw 1323 1.1.2.2 nathanw if (!ISSET(t->c_cflag, CHWFLOW)) { 1324 1.1.2.2 nathanw if (sc->sc_tx_stopped) { 1325 1.1.2.2 nathanw sc->sc_tx_stopped = 0; 1326 1.1.2.2 nathanw plcomstart(tp); 1327 1.1.2.2 nathanw } 1328 1.1.2.2 nathanw } 1329 1.1.2.2 nathanw 1330 1.1.2.2 nathanw return 0; 1331 1.1.2.2 nathanw } 1332 1.1.2.2 nathanw 1333 1.1.2.2 nathanw void 1334 1.1.2.2 nathanw plcom_iflush(struct plcom_softc *sc) 1335 1.1.2.2 nathanw { 1336 1.1.2.2 nathanw bus_space_tag_t iot = sc->sc_iot; 1337 1.1.2.2 nathanw bus_space_handle_t ioh = sc->sc_ioh; 1338 1.1.2.2 nathanw #ifdef DIAGNOSTIC 1339 1.1.2.2 nathanw int reg; 1340 1.1.2.2 nathanw #endif 1341 1.1.2.2 nathanw int timo; 1342 1.1.2.2 nathanw 1343 1.1.2.2 nathanw #ifdef DIAGNOSTIC 1344 1.1.2.2 nathanw reg = 0xffff; 1345 1.1.2.2 nathanw #endif 1346 1.1.2.2 nathanw timo = 50000; 1347 1.1.2.2 nathanw /* flush any pending I/O */ 1348 1.1.2.2 nathanw while (! ISSET(bus_space_read_1(iot, ioh, plcom_fr), FR_RXFE) 1349 1.1.2.2 nathanw && --timo) 1350 1.1.2.2 nathanw #ifdef DIAGNOSTIC 1351 1.1.2.2 nathanw reg = 1352 1.1.2.2 nathanw #else 1353 1.1.2.2 nathanw (void) 1354 1.1.2.2 nathanw #endif 1355 1.1.2.2 nathanw bus_space_read_1(iot, ioh, plcom_dr); 1356 1.1.2.2 nathanw #ifdef DIAGNOSTIC 1357 1.1.2.2 nathanw if (!timo) 1358 1.1.2.2 nathanw printf("%s: plcom_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1359 1.1.2.2 nathanw reg); 1360 1.1.2.2 nathanw #endif 1361 1.1.2.2 nathanw } 1362 1.1.2.2 nathanw 1363 1.1.2.2 nathanw void 1364 1.1.2.2 nathanw plcom_loadchannelregs(struct plcom_softc *sc) 1365 1.1.2.2 nathanw { 1366 1.1.2.2 nathanw bus_space_tag_t iot = sc->sc_iot; 1367 1.1.2.2 nathanw bus_space_handle_t ioh = sc->sc_ioh; 1368 1.1.2.2 nathanw 1369 1.1.2.2 nathanw /* XXXXX necessary? */ 1370 1.1.2.2 nathanw plcom_iflush(sc); 1371 1.1.2.2 nathanw 1372 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 0); 1373 1.1.2.2 nathanw 1374 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_dlbl, sc->sc_dlbl); 1375 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_dlbh, sc->sc_dlbh); 1376 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_lcr, sc->sc_lcr); 1377 1.1.2.2 nathanw sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit, 1378 1.1.2.2 nathanw sc->sc_mcr_active = sc->sc_mcr); 1379 1.1.2.2 nathanw 1380 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr); 1381 1.1.2.2 nathanw } 1382 1.1.2.2 nathanw 1383 1.1.2.2 nathanw int 1384 1.1.2.2 nathanw plcomhwiflow(struct tty *tp, int block) 1385 1.1.2.2 nathanw { 1386 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1387 1.1.2.2 nathanw int s; 1388 1.1.2.2 nathanw 1389 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 1390 1.1.2.2 nathanw return 0; 1391 1.1.2.2 nathanw 1392 1.1.2.2 nathanw if (sc->sc_mcr_rts == 0) 1393 1.1.2.2 nathanw return 0; 1394 1.1.2.2 nathanw 1395 1.1.2.2 nathanw s = splserial(); 1396 1.1.2.2 nathanw PLCOM_LOCK(sc); 1397 1.1.2.2 nathanw 1398 1.1.2.2 nathanw if (block) { 1399 1.1.2.2 nathanw if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1400 1.1.2.2 nathanw SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1401 1.1.2.2 nathanw plcom_hwiflow(sc); 1402 1.1.2.2 nathanw } 1403 1.1.2.2 nathanw } else { 1404 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1405 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1406 1.1.2.2 nathanw plcom_schedrx(sc); 1407 1.1.2.2 nathanw } 1408 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1409 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1410 1.1.2.2 nathanw plcom_hwiflow(sc); 1411 1.1.2.2 nathanw } 1412 1.1.2.2 nathanw } 1413 1.1.2.2 nathanw 1414 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1415 1.1.2.2 nathanw splx(s); 1416 1.1.2.2 nathanw return 1; 1417 1.1.2.2 nathanw } 1418 1.1.2.2 nathanw 1419 1.1.2.2 nathanw /* 1420 1.1.2.2 nathanw * (un)block input via hw flowcontrol 1421 1.1.2.2 nathanw */ 1422 1.1.2.2 nathanw void 1423 1.1.2.2 nathanw plcom_hwiflow(struct plcom_softc *sc) 1424 1.1.2.2 nathanw { 1425 1.1.2.2 nathanw if (sc->sc_mcr_rts == 0) 1426 1.1.2.2 nathanw return; 1427 1.1.2.2 nathanw 1428 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1429 1.1.2.2 nathanw CLR(sc->sc_mcr, sc->sc_mcr_rts); 1430 1.1.2.2 nathanw CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1431 1.1.2.2 nathanw } else { 1432 1.1.2.2 nathanw SET(sc->sc_mcr, sc->sc_mcr_rts); 1433 1.1.2.2 nathanw SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1434 1.1.2.2 nathanw } 1435 1.1.2.2 nathanw sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit, 1436 1.1.2.2 nathanw sc->sc_mcr_active); 1437 1.1.2.2 nathanw } 1438 1.1.2.2 nathanw 1439 1.1.2.2 nathanw 1440 1.1.2.2 nathanw void 1441 1.1.2.2 nathanw plcomstart(struct tty *tp) 1442 1.1.2.2 nathanw { 1443 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1444 1.1.2.2 nathanw bus_space_tag_t iot = sc->sc_iot; 1445 1.1.2.2 nathanw bus_space_handle_t ioh = sc->sc_ioh; 1446 1.1.2.2 nathanw int s; 1447 1.1.2.2 nathanw 1448 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 1449 1.1.2.2 nathanw return; 1450 1.1.2.2 nathanw 1451 1.1.2.2 nathanw s = spltty(); 1452 1.1.2.2 nathanw if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1453 1.1.2.2 nathanw goto out; 1454 1.1.2.2 nathanw if (sc->sc_tx_stopped) 1455 1.1.2.2 nathanw goto out; 1456 1.1.2.2 nathanw 1457 1.1.2.2 nathanw if (tp->t_outq.c_cc <= tp->t_lowat) { 1458 1.1.2.2 nathanw if (ISSET(tp->t_state, TS_ASLEEP)) { 1459 1.1.2.2 nathanw CLR(tp->t_state, TS_ASLEEP); 1460 1.1.2.2 nathanw wakeup(&tp->t_outq); 1461 1.1.2.2 nathanw } 1462 1.1.2.2 nathanw selwakeup(&tp->t_wsel); 1463 1.1.2.2 nathanw if (tp->t_outq.c_cc == 0) 1464 1.1.2.2 nathanw goto out; 1465 1.1.2.2 nathanw } 1466 1.1.2.2 nathanw 1467 1.1.2.2 nathanw /* Grab the first contiguous region of buffer space. */ 1468 1.1.2.2 nathanw { 1469 1.1.2.2 nathanw u_char *tba; 1470 1.1.2.2 nathanw int tbc; 1471 1.1.2.2 nathanw 1472 1.1.2.2 nathanw tba = tp->t_outq.c_cf; 1473 1.1.2.2 nathanw tbc = ndqb(&tp->t_outq, 0); 1474 1.1.2.2 nathanw 1475 1.1.2.2 nathanw (void)splserial(); 1476 1.1.2.2 nathanw PLCOM_LOCK(sc); 1477 1.1.2.2 nathanw 1478 1.1.2.2 nathanw sc->sc_tba = tba; 1479 1.1.2.2 nathanw sc->sc_tbc = tbc; 1480 1.1.2.2 nathanw } 1481 1.1.2.2 nathanw 1482 1.1.2.2 nathanw SET(tp->t_state, TS_BUSY); 1483 1.1.2.2 nathanw sc->sc_tx_busy = 1; 1484 1.1.2.2 nathanw 1485 1.1.2.2 nathanw /* Enable transmit completion interrupts if necessary. */ 1486 1.1.2.2 nathanw if (!ISSET(sc->sc_cr, CR_TIE)) { 1487 1.1.2.2 nathanw SET(sc->sc_cr, CR_TIE); 1488 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, sc->sc_cr); 1489 1.1.2.2 nathanw } 1490 1.1.2.2 nathanw 1491 1.1.2.2 nathanw /* Output the first chunk of the contiguous buffer. */ 1492 1.1.2.2 nathanw { 1493 1.1.2.2 nathanw int n; 1494 1.1.2.2 nathanw 1495 1.1.2.2 nathanw n = sc->sc_tbc; 1496 1.1.2.2 nathanw if (n > sc->sc_fifolen) 1497 1.1.2.2 nathanw n = sc->sc_fifolen; 1498 1.1.2.2 nathanw bus_space_write_multi_1(iot, ioh, plcom_dr, sc->sc_tba, n); 1499 1.1.2.2 nathanw sc->sc_tbc -= n; 1500 1.1.2.2 nathanw sc->sc_tba += n; 1501 1.1.2.2 nathanw } 1502 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1503 1.1.2.2 nathanw out: 1504 1.1.2.2 nathanw splx(s); 1505 1.1.2.2 nathanw return; 1506 1.1.2.2 nathanw } 1507 1.1.2.2 nathanw 1508 1.1.2.2 nathanw /* 1509 1.1.2.2 nathanw * Stop output on a line. 1510 1.1.2.2 nathanw */ 1511 1.1.2.2 nathanw void 1512 1.1.2.2 nathanw plcomstop(struct tty *tp, int flag) 1513 1.1.2.2 nathanw { 1514 1.1.2.2 nathanw struct plcom_softc *sc = device_lookup(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1515 1.1.2.2 nathanw int s; 1516 1.1.2.2 nathanw 1517 1.1.2.2 nathanw s = splserial(); 1518 1.1.2.2 nathanw PLCOM_LOCK(sc); 1519 1.1.2.2 nathanw if (ISSET(tp->t_state, TS_BUSY)) { 1520 1.1.2.2 nathanw /* Stop transmitting at the next chunk. */ 1521 1.1.2.2 nathanw sc->sc_tbc = 0; 1522 1.1.2.2 nathanw sc->sc_heldtbc = 0; 1523 1.1.2.2 nathanw if (!ISSET(tp->t_state, TS_TTSTOP)) 1524 1.1.2.2 nathanw SET(tp->t_state, TS_FLUSH); 1525 1.1.2.2 nathanw } 1526 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1527 1.1.2.2 nathanw splx(s); 1528 1.1.2.2 nathanw } 1529 1.1.2.2 nathanw 1530 1.1.2.2 nathanw void 1531 1.1.2.2 nathanw plcomdiag(void *arg) 1532 1.1.2.2 nathanw { 1533 1.1.2.2 nathanw struct plcom_softc *sc = arg; 1534 1.1.2.2 nathanw int overflows, floods; 1535 1.1.2.2 nathanw int s; 1536 1.1.2.2 nathanw 1537 1.1.2.2 nathanw s = splserial(); 1538 1.1.2.2 nathanw PLCOM_LOCK(sc); 1539 1.1.2.2 nathanw overflows = sc->sc_overflows; 1540 1.1.2.2 nathanw sc->sc_overflows = 0; 1541 1.1.2.2 nathanw floods = sc->sc_floods; 1542 1.1.2.2 nathanw sc->sc_floods = 0; 1543 1.1.2.2 nathanw sc->sc_errors = 0; 1544 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1545 1.1.2.2 nathanw splx(s); 1546 1.1.2.2 nathanw 1547 1.1.2.2 nathanw log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1548 1.1.2.2 nathanw sc->sc_dev.dv_xname, 1549 1.1.2.2 nathanw overflows, overflows == 1 ? "" : "s", 1550 1.1.2.2 nathanw floods, floods == 1 ? "" : "s"); 1551 1.1.2.2 nathanw } 1552 1.1.2.2 nathanw 1553 1.1.2.2 nathanw integrate void 1554 1.1.2.2 nathanw plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1555 1.1.2.2 nathanw { 1556 1.1.2.2 nathanw int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1557 1.1.2.2 nathanw u_char *get, *end; 1558 1.1.2.2 nathanw u_int cc, scc; 1559 1.1.2.2 nathanw u_char rsr; 1560 1.1.2.2 nathanw int code; 1561 1.1.2.2 nathanw int s; 1562 1.1.2.2 nathanw 1563 1.1.2.2 nathanw end = sc->sc_ebuf; 1564 1.1.2.2 nathanw get = sc->sc_rbget; 1565 1.1.2.2 nathanw scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1566 1.1.2.2 nathanw 1567 1.1.2.2 nathanw if (cc == plcom_rbuf_size) { 1568 1.1.2.2 nathanw sc->sc_floods++; 1569 1.1.2.2 nathanw if (sc->sc_errors++ == 0) 1570 1.1.2.2 nathanw callout_reset(&sc->sc_diag_callout, 60 * hz, 1571 1.1.2.2 nathanw plcomdiag, sc); 1572 1.1.2.2 nathanw } 1573 1.1.2.2 nathanw 1574 1.1.2.2 nathanw while (cc) { 1575 1.1.2.2 nathanw code = get[0]; 1576 1.1.2.2 nathanw rsr = get[1]; 1577 1.1.2.2 nathanw if (ISSET(rsr, RSR_OE | RSR_BE | RSR_FE | RSR_PE)) { 1578 1.1.2.2 nathanw if (ISSET(rsr, RSR_OE)) { 1579 1.1.2.2 nathanw sc->sc_overflows++; 1580 1.1.2.2 nathanw if (sc->sc_errors++ == 0) 1581 1.1.2.2 nathanw callout_reset(&sc->sc_diag_callout, 1582 1.1.2.2 nathanw 60 * hz, plcomdiag, sc); 1583 1.1.2.2 nathanw } 1584 1.1.2.2 nathanw if (ISSET(rsr, RSR_BE | RSR_FE)) 1585 1.1.2.2 nathanw SET(code, TTY_FE); 1586 1.1.2.2 nathanw if (ISSET(rsr, RSR_PE)) 1587 1.1.2.2 nathanw SET(code, TTY_PE); 1588 1.1.2.2 nathanw } 1589 1.1.2.2 nathanw if ((*rint)(code, tp) == -1) { 1590 1.1.2.2 nathanw /* 1591 1.1.2.2 nathanw * The line discipline's buffer is out of space. 1592 1.1.2.2 nathanw */ 1593 1.1.2.2 nathanw if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1594 1.1.2.2 nathanw /* 1595 1.1.2.2 nathanw * We're either not using flow control, or the 1596 1.1.2.2 nathanw * line discipline didn't tell us to block for 1597 1.1.2.2 nathanw * some reason. Either way, we have no way to 1598 1.1.2.2 nathanw * know when there's more space available, so 1599 1.1.2.2 nathanw * just drop the rest of the data. 1600 1.1.2.2 nathanw */ 1601 1.1.2.2 nathanw get += cc << 1; 1602 1.1.2.2 nathanw if (get >= end) 1603 1.1.2.2 nathanw get -= plcom_rbuf_size << 1; 1604 1.1.2.2 nathanw cc = 0; 1605 1.1.2.2 nathanw } else { 1606 1.1.2.2 nathanw /* 1607 1.1.2.2 nathanw * Don't schedule any more receive processing 1608 1.1.2.2 nathanw * until the line discipline tells us there's 1609 1.1.2.2 nathanw * space available (through plcomhwiflow()). 1610 1.1.2.2 nathanw * Leave the rest of the data in the input 1611 1.1.2.2 nathanw * buffer. 1612 1.1.2.2 nathanw */ 1613 1.1.2.2 nathanw SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1614 1.1.2.2 nathanw } 1615 1.1.2.2 nathanw break; 1616 1.1.2.2 nathanw } 1617 1.1.2.2 nathanw get += 2; 1618 1.1.2.2 nathanw if (get >= end) 1619 1.1.2.2 nathanw get = sc->sc_rbuf; 1620 1.1.2.2 nathanw cc--; 1621 1.1.2.2 nathanw } 1622 1.1.2.2 nathanw 1623 1.1.2.2 nathanw if (cc != scc) { 1624 1.1.2.2 nathanw sc->sc_rbget = get; 1625 1.1.2.2 nathanw s = splserial(); 1626 1.1.2.2 nathanw PLCOM_LOCK(sc); 1627 1.1.2.2 nathanw 1628 1.1.2.2 nathanw cc = sc->sc_rbavail += scc - cc; 1629 1.1.2.2 nathanw /* Buffers should be ok again, release possible block. */ 1630 1.1.2.2 nathanw if (cc >= sc->sc_r_lowat) { 1631 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1632 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1633 1.1.2.2 nathanw SET(sc->sc_cr, CR_RIE | CR_RTIE); 1634 1.1.2.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, plcom_cr, sc->sc_cr); 1635 1.1.2.2 nathanw } 1636 1.1.2.2 nathanw if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1637 1.1.2.2 nathanw CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1638 1.1.2.2 nathanw plcom_hwiflow(sc); 1639 1.1.2.2 nathanw } 1640 1.1.2.2 nathanw } 1641 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1642 1.1.2.2 nathanw splx(s); 1643 1.1.2.2 nathanw } 1644 1.1.2.2 nathanw } 1645 1.1.2.2 nathanw 1646 1.1.2.2 nathanw integrate void 1647 1.1.2.2 nathanw plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1648 1.1.2.2 nathanw { 1649 1.1.2.2 nathanw 1650 1.1.2.2 nathanw CLR(tp->t_state, TS_BUSY); 1651 1.1.2.2 nathanw if (ISSET(tp->t_state, TS_FLUSH)) 1652 1.1.2.2 nathanw CLR(tp->t_state, TS_FLUSH); 1653 1.1.2.2 nathanw else 1654 1.1.2.2 nathanw ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1655 1.1.2.2 nathanw (*tp->t_linesw->l_start)(tp); 1656 1.1.2.2 nathanw } 1657 1.1.2.2 nathanw 1658 1.1.2.2 nathanw integrate void 1659 1.1.2.2 nathanw plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1660 1.1.2.2 nathanw { 1661 1.1.2.2 nathanw u_char msr, delta; 1662 1.1.2.2 nathanw int s; 1663 1.1.2.2 nathanw 1664 1.1.2.2 nathanw s = splserial(); 1665 1.1.2.2 nathanw PLCOM_LOCK(sc); 1666 1.1.2.2 nathanw msr = sc->sc_msr; 1667 1.1.2.2 nathanw delta = sc->sc_msr_delta; 1668 1.1.2.2 nathanw sc->sc_msr_delta = 0; 1669 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1670 1.1.2.2 nathanw splx(s); 1671 1.1.2.2 nathanw 1672 1.1.2.2 nathanw if (ISSET(delta, sc->sc_msr_dcd)) { 1673 1.1.2.2 nathanw /* 1674 1.1.2.2 nathanw * Inform the tty layer that carrier detect changed. 1675 1.1.2.2 nathanw */ 1676 1.1.2.2 nathanw (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1677 1.1.2.2 nathanw } 1678 1.1.2.2 nathanw 1679 1.1.2.2 nathanw if (ISSET(delta, sc->sc_msr_cts)) { 1680 1.1.2.2 nathanw /* Block or unblock output according to flow control. */ 1681 1.1.2.2 nathanw if (ISSET(msr, sc->sc_msr_cts)) { 1682 1.1.2.2 nathanw sc->sc_tx_stopped = 0; 1683 1.1.2.2 nathanw (*tp->t_linesw->l_start)(tp); 1684 1.1.2.2 nathanw } else { 1685 1.1.2.2 nathanw sc->sc_tx_stopped = 1; 1686 1.1.2.2 nathanw } 1687 1.1.2.2 nathanw } 1688 1.1.2.2 nathanw 1689 1.1.2.2 nathanw #ifdef PLCOM_DEBUG 1690 1.1.2.2 nathanw if (plcom_debug) 1691 1.1.2.2 nathanw plcomstatus(sc, "plcom_stsoft"); 1692 1.1.2.2 nathanw #endif 1693 1.1.2.2 nathanw } 1694 1.1.2.2 nathanw 1695 1.1.2.2 nathanw #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1696 1.1.2.2 nathanw void 1697 1.1.2.2 nathanw plcomsoft(void *arg) 1698 1.1.2.2 nathanw { 1699 1.1.2.2 nathanw struct plcom_softc *sc = arg; 1700 1.1.2.2 nathanw struct tty *tp; 1701 1.1.2.2 nathanw 1702 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 1703 1.1.2.2 nathanw return; 1704 1.1.2.2 nathanw 1705 1.1.2.2 nathanw { 1706 1.1.2.2 nathanw #else 1707 1.1.2.2 nathanw void 1708 1.1.2.2 nathanw #ifndef __NO_SOFT_SERIAL_INTERRUPT 1709 1.1.2.2 nathanw plcomsoft(void) 1710 1.1.2.2 nathanw #else 1711 1.1.2.2 nathanw plcomsoft(void *arg) 1712 1.1.2.2 nathanw #endif 1713 1.1.2.2 nathanw { 1714 1.1.2.2 nathanw struct plcom_softc *sc; 1715 1.1.2.2 nathanw struct tty *tp; 1716 1.1.2.2 nathanw int unit; 1717 1.1.2.2 nathanw #ifdef __NO_SOFT_SERIAL_INTERRUPT 1718 1.1.2.2 nathanw int s; 1719 1.1.2.2 nathanw 1720 1.1.2.2 nathanw s = splsoftserial(); 1721 1.1.2.2 nathanw plcom_softintr_scheduled = 0; 1722 1.1.2.2 nathanw #endif 1723 1.1.2.2 nathanw 1724 1.1.2.2 nathanw for (unit = 0; unit < plcom_cd.cd_ndevs; unit++) { 1725 1.1.2.2 nathanw sc = device_lookup(&plcom_cd, unit); 1726 1.1.2.2 nathanw if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK)) 1727 1.1.2.2 nathanw continue; 1728 1.1.2.2 nathanw 1729 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 1730 1.1.2.2 nathanw continue; 1731 1.1.2.2 nathanw 1732 1.1.2.2 nathanw tp = sc->sc_tty; 1733 1.1.2.2 nathanw if (tp == NULL) 1734 1.1.2.2 nathanw continue; 1735 1.1.2.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1736 1.1.2.2 nathanw continue; 1737 1.1.2.2 nathanw #endif 1738 1.1.2.2 nathanw tp = sc->sc_tty; 1739 1.1.2.2 nathanw 1740 1.1.2.2 nathanw if (sc->sc_rx_ready) { 1741 1.1.2.2 nathanw sc->sc_rx_ready = 0; 1742 1.1.2.2 nathanw plcom_rxsoft(sc, tp); 1743 1.1.2.2 nathanw } 1744 1.1.2.2 nathanw 1745 1.1.2.2 nathanw if (sc->sc_st_check) { 1746 1.1.2.2 nathanw sc->sc_st_check = 0; 1747 1.1.2.2 nathanw plcom_stsoft(sc, tp); 1748 1.1.2.2 nathanw } 1749 1.1.2.2 nathanw 1750 1.1.2.2 nathanw if (sc->sc_tx_done) { 1751 1.1.2.2 nathanw sc->sc_tx_done = 0; 1752 1.1.2.2 nathanw plcom_txsoft(sc, tp); 1753 1.1.2.2 nathanw } 1754 1.1.2.2 nathanw } 1755 1.1.2.2 nathanw 1756 1.1.2.2 nathanw #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1757 1.1.2.2 nathanw #ifdef __NO_SOFT_SERIAL_INTERRUPT 1758 1.1.2.2 nathanw splx(s); 1759 1.1.2.2 nathanw #endif 1760 1.1.2.2 nathanw #endif 1761 1.1.2.2 nathanw } 1762 1.1.2.2 nathanw 1763 1.1.2.2 nathanw #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1764 1.1.2.2 nathanw /* there has got to be a better way to do plcomsoft() */ 1765 1.1.2.2 nathanw }} 1766 1.1.2.2 nathanw #endif 1767 1.1.2.2 nathanw 1768 1.1.2.2 nathanw int 1769 1.1.2.2 nathanw plcomintr(void *arg) 1770 1.1.2.2 nathanw { 1771 1.1.2.2 nathanw struct plcom_softc *sc = arg; 1772 1.1.2.2 nathanw bus_space_tag_t iot = sc->sc_iot; 1773 1.1.2.2 nathanw bus_space_handle_t ioh = sc->sc_ioh; 1774 1.1.2.2 nathanw u_char *put, *end; 1775 1.1.2.2 nathanw u_int cc; 1776 1.1.2.2 nathanw u_char rsr, iir; 1777 1.1.2.2 nathanw 1778 1.1.2.2 nathanw if (PLCOM_ISALIVE(sc) == 0) 1779 1.1.2.2 nathanw return 0; 1780 1.1.2.2 nathanw 1781 1.1.2.2 nathanw PLCOM_LOCK(sc); 1782 1.1.2.2 nathanw iir = bus_space_read_1(iot, ioh, plcom_iir); 1783 1.1.2.2 nathanw if (! ISSET(iir, IIR_IMASK)) { 1784 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 1785 1.1.2.2 nathanw return 0; 1786 1.1.2.2 nathanw } 1787 1.1.2.2 nathanw 1788 1.1.2.2 nathanw end = sc->sc_ebuf; 1789 1.1.2.2 nathanw put = sc->sc_rbput; 1790 1.1.2.2 nathanw cc = sc->sc_rbavail; 1791 1.1.2.2 nathanw 1792 1.1.2.2 nathanw do { 1793 1.1.2.2 nathanw u_char msr, delta, fr; 1794 1.1.2.2 nathanw 1795 1.1.2.2 nathanw fr = bus_space_read_1(iot, ioh, plcom_fr); 1796 1.1.2.2 nathanw 1797 1.1.2.2 nathanw if (!ISSET(fr, FR_RXFE) && 1798 1.1.2.2 nathanw !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1799 1.1.2.2 nathanw while (cc > 0) { 1800 1.1.2.2 nathanw int cn_trapped = 0; 1801 1.1.2.2 nathanw put[0] = bus_space_read_1(iot, ioh, 1802 1.1.2.2 nathanw plcom_dr); 1803 1.1.2.2 nathanw rsr = bus_space_read_1(iot, ioh, plcom_rsr); 1804 1.1.2.2 nathanw /* Clear any error status. */ 1805 1.1.2.2 nathanw if (ISSET(rsr, 1806 1.1.2.2 nathanw (RSR_BE | RSR_OE | RSR_PE | RSR_FE))) 1807 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_ecr, 1808 1.1.2.2 nathanw 0); 1809 1.1.2.2 nathanw if (ISSET(rsr, RSR_BE)) { 1810 1.1.2.2 nathanw int cn_trapped = 0; 1811 1.1.2.2 nathanw cn_check_magic(sc->sc_tty->t_dev, 1812 1.1.2.2 nathanw CNC_BREAK, plcom_cnm_state); 1813 1.1.2.2 nathanw if (cn_trapped) 1814 1.1.2.2 nathanw continue; 1815 1.1.2.2 nathanw #if defined(KGDB) 1816 1.1.2.2 nathanw if (ISSET(sc->sc_hwflags, 1817 1.1.2.2 nathanw PLCOM_HW_KGDB)) { 1818 1.1.2.2 nathanw kgdb_connect(1); 1819 1.1.2.2 nathanw continue; 1820 1.1.2.2 nathanw } 1821 1.1.2.2 nathanw #endif 1822 1.1.2.2 nathanw } 1823 1.1.2.2 nathanw 1824 1.1.2.2 nathanw put[1] = rsr; 1825 1.1.2.2 nathanw cn_check_magic(sc->sc_tty->t_dev, 1826 1.1.2.2 nathanw put[0], plcom_cnm_state); 1827 1.1.2.2 nathanw if (cn_trapped) { 1828 1.1.2.2 nathanw fr = bus_space_read_1(iot, ioh, 1829 1.1.2.2 nathanw plcom_fr); 1830 1.1.2.2 nathanw if (ISSET(fr, FR_RXFE)) 1831 1.1.2.2 nathanw break; 1832 1.1.2.2 nathanw 1833 1.1.2.2 nathanw continue; 1834 1.1.2.2 nathanw } 1835 1.1.2.2 nathanw put += 2; 1836 1.1.2.2 nathanw if (put >= end) 1837 1.1.2.2 nathanw put = sc->sc_rbuf; 1838 1.1.2.2 nathanw cc--; 1839 1.1.2.2 nathanw 1840 1.1.2.2 nathanw fr = bus_space_read_1(iot, ioh, plcom_fr); 1841 1.1.2.2 nathanw if (ISSET(fr, FR_RXFE)) 1842 1.1.2.2 nathanw break; 1843 1.1.2.2 nathanw } 1844 1.1.2.2 nathanw 1845 1.1.2.2 nathanw /* 1846 1.1.2.2 nathanw * Current string of incoming characters ended because 1847 1.1.2.2 nathanw * no more data was available or we ran out of space. 1848 1.1.2.2 nathanw * Schedule a receive event if any data was received. 1849 1.1.2.2 nathanw * If we're out of space, turn off receive interrupts. 1850 1.1.2.2 nathanw */ 1851 1.1.2.2 nathanw sc->sc_rbput = put; 1852 1.1.2.2 nathanw sc->sc_rbavail = cc; 1853 1.1.2.2 nathanw if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1854 1.1.2.2 nathanw sc->sc_rx_ready = 1; 1855 1.1.2.2 nathanw 1856 1.1.2.2 nathanw /* 1857 1.1.2.2 nathanw * See if we are in danger of overflowing a buffer. If 1858 1.1.2.2 nathanw * so, use hardware flow control to ease the pressure. 1859 1.1.2.2 nathanw */ 1860 1.1.2.2 nathanw if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1861 1.1.2.2 nathanw cc < sc->sc_r_hiwat) { 1862 1.1.2.2 nathanw SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1863 1.1.2.2 nathanw plcom_hwiflow(sc); 1864 1.1.2.2 nathanw } 1865 1.1.2.2 nathanw 1866 1.1.2.2 nathanw /* 1867 1.1.2.2 nathanw * If we're out of space, disable receive interrupts 1868 1.1.2.2 nathanw * until the queue has drained a bit. 1869 1.1.2.2 nathanw */ 1870 1.1.2.2 nathanw if (!cc) { 1871 1.1.2.2 nathanw SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1872 1.1.2.2 nathanw CLR(sc->sc_cr, CR_RIE | CR_RTIE); 1873 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 1874 1.1.2.2 nathanw sc->sc_cr); 1875 1.1.2.2 nathanw } 1876 1.1.2.2 nathanw } else { 1877 1.1.2.2 nathanw if (ISSET(iir, IIR_RIS)) { 1878 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 0); 1879 1.1.2.2 nathanw delay(10); 1880 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 1881 1.1.2.2 nathanw sc->sc_cr); 1882 1.1.2.2 nathanw continue; 1883 1.1.2.2 nathanw } 1884 1.1.2.2 nathanw } 1885 1.1.2.2 nathanw 1886 1.1.2.2 nathanw msr = bus_space_read_1(iot, ioh, plcom_fr); 1887 1.1.2.2 nathanw delta = msr ^ sc->sc_msr; 1888 1.1.2.2 nathanw sc->sc_msr = msr; 1889 1.1.2.2 nathanw /* Clear any pending modem status interrupt. */ 1890 1.1.2.2 nathanw if (iir & IIR_MIS) 1891 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_icr, 0); 1892 1.1.2.2 nathanw /* 1893 1.1.2.2 nathanw * Pulse-per-second (PSS) signals on edge of DCD? 1894 1.1.2.2 nathanw * Process these even if line discipline is ignoring DCD. 1895 1.1.2.2 nathanw */ 1896 1.1.2.2 nathanw if (delta & sc->sc_ppsmask) { 1897 1.1.2.2 nathanw struct timeval tv; 1898 1.1.2.2 nathanw if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 1899 1.1.2.2 nathanw /* XXX nanotime() */ 1900 1.1.2.2 nathanw microtime(&tv); 1901 1.1.2.2 nathanw TIMEVAL_TO_TIMESPEC(&tv, 1902 1.1.2.2 nathanw &sc->ppsinfo.assert_timestamp); 1903 1.1.2.2 nathanw if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1904 1.1.2.2 nathanw timespecadd(&sc->ppsinfo.assert_timestamp, 1905 1.1.2.2 nathanw &sc->ppsparam.assert_offset, 1906 1.1.2.2 nathanw &sc->ppsinfo.assert_timestamp); 1907 1.1.2.2 nathanw } 1908 1.1.2.2 nathanw 1909 1.1.2.2 nathanw #ifdef PPS_SYNC 1910 1.1.2.2 nathanw if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1911 1.1.2.2 nathanw hardpps(&tv, tv.tv_usec); 1912 1.1.2.2 nathanw #endif 1913 1.1.2.2 nathanw sc->ppsinfo.assert_sequence++; 1914 1.1.2.2 nathanw sc->ppsinfo.current_mode = sc->ppsparam.mode; 1915 1.1.2.2 nathanw 1916 1.1.2.2 nathanw } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 1917 1.1.2.2 nathanw /* XXX nanotime() */ 1918 1.1.2.2 nathanw microtime(&tv); 1919 1.1.2.2 nathanw TIMEVAL_TO_TIMESPEC(&tv, 1920 1.1.2.2 nathanw &sc->ppsinfo.clear_timestamp); 1921 1.1.2.2 nathanw if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1922 1.1.2.2 nathanw timespecadd(&sc->ppsinfo.clear_timestamp, 1923 1.1.2.2 nathanw &sc->ppsparam.clear_offset, 1924 1.1.2.2 nathanw &sc->ppsinfo.clear_timestamp); 1925 1.1.2.2 nathanw } 1926 1.1.2.2 nathanw 1927 1.1.2.2 nathanw #ifdef PPS_SYNC 1928 1.1.2.2 nathanw if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1929 1.1.2.2 nathanw hardpps(&tv, tv.tv_usec); 1930 1.1.2.2 nathanw #endif 1931 1.1.2.2 nathanw sc->ppsinfo.clear_sequence++; 1932 1.1.2.2 nathanw sc->ppsinfo.current_mode = sc->ppsparam.mode; 1933 1.1.2.2 nathanw } 1934 1.1.2.2 nathanw } 1935 1.1.2.2 nathanw 1936 1.1.2.2 nathanw /* 1937 1.1.2.2 nathanw * Process normal status changes 1938 1.1.2.2 nathanw */ 1939 1.1.2.2 nathanw if (ISSET(delta, sc->sc_msr_mask)) { 1940 1.1.2.2 nathanw SET(sc->sc_msr_delta, delta); 1941 1.1.2.2 nathanw 1942 1.1.2.2 nathanw /* 1943 1.1.2.2 nathanw * Stop output immediately if we lose the output 1944 1.1.2.2 nathanw * flow control signal or carrier detect. 1945 1.1.2.2 nathanw */ 1946 1.1.2.2 nathanw if (ISSET(~msr, sc->sc_msr_mask)) { 1947 1.1.2.2 nathanw sc->sc_tbc = 0; 1948 1.1.2.2 nathanw sc->sc_heldtbc = 0; 1949 1.1.2.2 nathanw #ifdef PLCOM_DEBUG 1950 1.1.2.2 nathanw if (plcom_debug) 1951 1.1.2.2 nathanw plcomstatus(sc, "plcomintr "); 1952 1.1.2.2 nathanw #endif 1953 1.1.2.2 nathanw } 1954 1.1.2.2 nathanw 1955 1.1.2.2 nathanw sc->sc_st_check = 1; 1956 1.1.2.2 nathanw } 1957 1.1.2.2 nathanw 1958 1.1.2.2 nathanw /* 1959 1.1.2.2 nathanw * Done handling any receive interrupts. See if data 1960 1.1.2.2 nathanw * can be * transmitted as well. Schedule tx done 1961 1.1.2.2 nathanw * event if no data left * and tty was marked busy. 1962 1.1.2.2 nathanw */ 1963 1.1.2.2 nathanw if (ISSET(iir, IIR_TIS)) { 1964 1.1.2.2 nathanw /* 1965 1.1.2.2 nathanw * If we've delayed a parameter change, do it 1966 1.1.2.2 nathanw * now, and restart * output. 1967 1.1.2.2 nathanw */ 1968 1.1.2.2 nathanw if (sc->sc_heldchange) { 1969 1.1.2.2 nathanw plcom_loadchannelregs(sc); 1970 1.1.2.2 nathanw sc->sc_heldchange = 0; 1971 1.1.2.2 nathanw sc->sc_tbc = sc->sc_heldtbc; 1972 1.1.2.2 nathanw sc->sc_heldtbc = 0; 1973 1.1.2.2 nathanw } 1974 1.1.2.2 nathanw 1975 1.1.2.2 nathanw /* 1976 1.1.2.2 nathanw * Output the next chunk of the contiguous 1977 1.1.2.2 nathanw * buffer, if any. 1978 1.1.2.2 nathanw */ 1979 1.1.2.2 nathanw if (sc->sc_tbc > 0) { 1980 1.1.2.2 nathanw int n; 1981 1.1.2.2 nathanw 1982 1.1.2.2 nathanw n = sc->sc_tbc; 1983 1.1.2.2 nathanw if (n > sc->sc_fifolen) 1984 1.1.2.2 nathanw n = sc->sc_fifolen; 1985 1.1.2.2 nathanw bus_space_write_multi_1(iot, ioh, plcom_dr, 1986 1.1.2.2 nathanw sc->sc_tba, n); 1987 1.1.2.2 nathanw sc->sc_tbc -= n; 1988 1.1.2.2 nathanw sc->sc_tba += n; 1989 1.1.2.2 nathanw } else { 1990 1.1.2.2 nathanw /* 1991 1.1.2.2 nathanw * Disable transmit plcompletion 1992 1.1.2.2 nathanw * interrupts if necessary. 1993 1.1.2.2 nathanw */ 1994 1.1.2.2 nathanw if (ISSET(sc->sc_cr, CR_TIE)) { 1995 1.1.2.2 nathanw CLR(sc->sc_cr, CR_TIE); 1996 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 1997 1.1.2.2 nathanw sc->sc_cr); 1998 1.1.2.2 nathanw } 1999 1.1.2.2 nathanw if (sc->sc_tx_busy) { 2000 1.1.2.2 nathanw sc->sc_tx_busy = 0; 2001 1.1.2.2 nathanw sc->sc_tx_done = 1; 2002 1.1.2.2 nathanw } 2003 1.1.2.2 nathanw } 2004 1.1.2.2 nathanw } 2005 1.1.2.2 nathanw } while (ISSET((iir = bus_space_read_1(iot, ioh, plcom_iir)), 2006 1.1.2.2 nathanw IIR_IMASK)); 2007 1.1.2.2 nathanw 2008 1.1.2.2 nathanw PLCOM_UNLOCK(sc); 2009 1.1.2.2 nathanw 2010 1.1.2.2 nathanw /* Wake up the poller. */ 2011 1.1.2.2 nathanw #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2012 1.1.2.2 nathanw softintr_schedule(sc->sc_si); 2013 1.1.2.2 nathanw #else 2014 1.1.2.2 nathanw #ifndef __NO_SOFT_SERIAL_INTERRUPT 2015 1.1.2.2 nathanw setsoftserial(); 2016 1.1.2.2 nathanw #else 2017 1.1.2.2 nathanw if (!plcom_softintr_scheduled) { 2018 1.1.2.2 nathanw plcom_softintr_scheduled = 1; 2019 1.1.2.2 nathanw callout_reset(&plcomsoft_callout, 1, plcomsoft, NULL); 2020 1.1.2.2 nathanw } 2021 1.1.2.2 nathanw #endif 2022 1.1.2.2 nathanw #endif 2023 1.1.2.2 nathanw 2024 1.1.2.2 nathanw #if NRND > 0 && defined(RND_COM) 2025 1.1.2.2 nathanw rnd_add_uint32(&sc->rnd_source, iir | rsr); 2026 1.1.2.2 nathanw #endif 2027 1.1.2.2 nathanw 2028 1.1.2.2 nathanw return 1; 2029 1.1.2.2 nathanw } 2030 1.1.2.2 nathanw 2031 1.1.2.2 nathanw /* 2032 1.1.2.2 nathanw * The following functions are polled getc and putc routines, shared 2033 1.1.2.2 nathanw * by the console and kgdb glue. 2034 1.1.2.2 nathanw * 2035 1.1.2.2 nathanw * The read-ahead code is so that you can detect pending in-band 2036 1.1.2.2 nathanw * cn_magic in polled mode while doing output rather than having to 2037 1.1.2.2 nathanw * wait until the kernel decides it needs input. 2038 1.1.2.2 nathanw */ 2039 1.1.2.2 nathanw 2040 1.1.2.2 nathanw #define MAX_READAHEAD 20 2041 1.1.2.2 nathanw static int plcom_readahead[MAX_READAHEAD]; 2042 1.1.2.2 nathanw static int plcom_readaheadcount = 0; 2043 1.1.2.2 nathanw 2044 1.1.2.2 nathanw int 2045 1.1.2.2 nathanw plcom_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2046 1.1.2.2 nathanw { 2047 1.1.2.2 nathanw int s = splserial(); 2048 1.1.2.2 nathanw u_char stat, c; 2049 1.1.2.2 nathanw 2050 1.1.2.2 nathanw /* got a character from reading things earlier */ 2051 1.1.2.2 nathanw if (plcom_readaheadcount > 0) { 2052 1.1.2.2 nathanw int i; 2053 1.1.2.2 nathanw 2054 1.1.2.2 nathanw c = plcom_readahead[0]; 2055 1.1.2.2 nathanw for (i = 1; i < plcom_readaheadcount; i++) { 2056 1.1.2.2 nathanw plcom_readahead[i-1] = plcom_readahead[i]; 2057 1.1.2.2 nathanw } 2058 1.1.2.2 nathanw plcom_readaheadcount--; 2059 1.1.2.2 nathanw splx(s); 2060 1.1.2.2 nathanw return c; 2061 1.1.2.2 nathanw } 2062 1.1.2.2 nathanw 2063 1.1.2.2 nathanw /* block until a character becomes available */ 2064 1.1.2.2 nathanw while (ISSET(stat = bus_space_read_1(iot, ioh, plcom_fr), FR_RXFE)) 2065 1.1.2.2 nathanw ; 2066 1.1.2.2 nathanw 2067 1.1.2.2 nathanw c = bus_space_read_1(iot, ioh, plcom_dr); 2068 1.1.2.2 nathanw stat = bus_space_read_1(iot, ioh, plcom_iir); 2069 1.1.2.2 nathanw { 2070 1.1.2.2 nathanw int cn_trapped = 0; /* unused */ 2071 1.1.2.2 nathanw #ifdef DDB 2072 1.1.2.2 nathanw extern int db_active; 2073 1.1.2.2 nathanw if (!db_active) 2074 1.1.2.2 nathanw #endif 2075 1.1.2.2 nathanw cn_check_magic(dev, c, plcom_cnm_state); 2076 1.1.2.2 nathanw } 2077 1.1.2.2 nathanw splx(s); 2078 1.1.2.2 nathanw return c; 2079 1.1.2.2 nathanw } 2080 1.1.2.2 nathanw 2081 1.1.2.2 nathanw void 2082 1.1.2.2 nathanw plcom_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, 2083 1.1.2.2 nathanw int c) 2084 1.1.2.2 nathanw { 2085 1.1.2.2 nathanw int s = splserial(); 2086 1.1.2.2 nathanw int timo; 2087 1.1.2.2 nathanw 2088 1.1.2.2 nathanw int cin, stat; 2089 1.1.2.2 nathanw if (plcom_readaheadcount < MAX_READAHEAD 2090 1.1.2.2 nathanw && !ISSET(stat = bus_space_read_1(iot, ioh, plcom_fr), FR_RXFE)) { 2091 1.1.2.2 nathanw int cn_trapped = 0; 2092 1.1.2.2 nathanw cin = bus_space_read_1(iot, ioh, plcom_dr); 2093 1.1.2.2 nathanw stat = bus_space_read_1(iot, ioh, plcom_iir); 2094 1.1.2.2 nathanw cn_check_magic(dev, cin, plcom_cnm_state); 2095 1.1.2.2 nathanw plcom_readahead[plcom_readaheadcount++] = cin; 2096 1.1.2.2 nathanw } 2097 1.1.2.2 nathanw 2098 1.1.2.2 nathanw /* wait for any pending transmission to finish */ 2099 1.1.2.2 nathanw timo = 150000; 2100 1.1.2.2 nathanw while (!ISSET(bus_space_read_1(iot, ioh, plcom_fr), FR_TXFE) && --timo) 2101 1.1.2.2 nathanw continue; 2102 1.1.2.2 nathanw 2103 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_dr, c); 2104 1.1.2.2 nathanw PLCOM_BARRIER(iot, ioh, BR | BW); 2105 1.1.2.2 nathanw 2106 1.1.2.2 nathanw /* wait for this transmission to complete */ 2107 1.1.2.2 nathanw timo = 1500000; 2108 1.1.2.2 nathanw while (!ISSET(bus_space_read_1(iot, ioh, plcom_fr), FR_TXFE) && --timo) 2109 1.1.2.2 nathanw continue; 2110 1.1.2.2 nathanw 2111 1.1.2.2 nathanw splx(s); 2112 1.1.2.2 nathanw } 2113 1.1.2.2 nathanw 2114 1.1.2.2 nathanw /* 2115 1.1.2.2 nathanw * Initialize UART for use as console or KGDB line. 2116 1.1.2.2 nathanw */ 2117 1.1.2.2 nathanw int 2118 1.1.2.2 nathanw plcominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2119 1.1.2.2 nathanw tcflag_t cflag, bus_space_handle_t *iohp) 2120 1.1.2.2 nathanw { 2121 1.1.2.2 nathanw bus_space_handle_t ioh; 2122 1.1.2.2 nathanw 2123 1.1.2.2 nathanw if (bus_space_map(iot, iobase, PLCOM_UART_SIZE, 0, &ioh)) 2124 1.1.2.2 nathanw return ENOMEM; /* ??? */ 2125 1.1.2.2 nathanw 2126 1.1.2.2 nathanw rate = plcomspeed(rate, frequency); 2127 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, 0); 2128 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_dlbl, rate); 2129 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_dlbh, rate >> 8); 2130 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_lcr, cflag2lcr(cflag) | LCR_FEN); 2131 1.1.2.2 nathanw bus_space_write_1(iot, ioh, plcom_cr, CR_UARTEN); 2132 1.1.2.2 nathanw 2133 1.1.2.2 nathanw #if 0 2134 1.1.2.2 nathanw /* Ought to do something like this, but we have no sc to 2135 1.1.2.2 nathanw dereference. */ 2136 1.1.2.2 nathanw sc->sc_set_mcr(sc->sc_set_mcr_arg, sc->sc_dev.dv_unit, 2137 1.1.2.2 nathanw MCR_DTR | MCR_RTS); 2138 1.1.2.2 nathanw #endif 2139 1.1.2.2 nathanw 2140 1.1.2.2 nathanw *iohp = ioh; 2141 1.1.2.2 nathanw return 0; 2142 1.1.2.2 nathanw } 2143 1.1.2.2 nathanw 2144 1.1.2.2 nathanw /* 2145 1.1.2.2 nathanw * Following are all routines needed for PLCOM to act as console 2146 1.1.2.2 nathanw */ 2147 1.1.2.2 nathanw struct consdev plcomcons = { 2148 1.1.2.2 nathanw NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2149 1.1.2.2 nathanw NODEV, CN_NORMAL 2150 1.1.2.2 nathanw }; 2151 1.1.2.2 nathanw 2152 1.1.2.2 nathanw 2153 1.1.2.2 nathanw int 2154 1.1.2.2 nathanw plcomcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2155 1.1.2.2 nathanw tcflag_t cflag, int unit) 2156 1.1.2.2 nathanw { 2157 1.1.2.2 nathanw int res; 2158 1.1.2.2 nathanw 2159 1.1.2.2 nathanw res = plcominit(iot, iobase, rate, frequency, cflag, &plcomconsioh); 2160 1.1.2.2 nathanw if (res) 2161 1.1.2.2 nathanw return res; 2162 1.1.2.2 nathanw 2163 1.1.2.2 nathanw cn_tab = &plcomcons; 2164 1.1.2.2 nathanw cn_init_magic(&plcom_cnm_state); 2165 1.1.2.2 nathanw cn_set_magic("\047\001"); /* default magic is BREAK */ 2166 1.1.2.2 nathanw 2167 1.1.2.2 nathanw plcomconstag = iot; 2168 1.1.2.2 nathanw plcomconsunit = unit; 2169 1.1.2.2 nathanw plcomconsrate = rate; 2170 1.1.2.2 nathanw plcomconscflag = cflag; 2171 1.1.2.2 nathanw 2172 1.1.2.2 nathanw return 0; 2173 1.1.2.2 nathanw } 2174 1.1.2.2 nathanw 2175 1.1.2.2 nathanw void 2176 1.1.2.2 nathanw plcomcndetach(void) 2177 1.1.2.2 nathanw { 2178 1.1.2.2 nathanw bus_space_unmap(plcomconstag, plcomconsioh, PLCOM_UART_SIZE); 2179 1.1.2.2 nathanw plcomconstag = NULL; 2180 1.1.2.2 nathanw 2181 1.1.2.2 nathanw cn_tab = NULL; 2182 1.1.2.2 nathanw } 2183 1.1.2.2 nathanw 2184 1.1.2.2 nathanw int 2185 1.1.2.2 nathanw plcomcngetc(dev_t dev) 2186 1.1.2.2 nathanw { 2187 1.1.2.2 nathanw return plcom_common_getc(dev, plcomconstag, plcomconsioh); 2188 1.1.2.2 nathanw } 2189 1.1.2.2 nathanw 2190 1.1.2.2 nathanw /* 2191 1.1.2.2 nathanw * Console kernel output character routine. 2192 1.1.2.2 nathanw */ 2193 1.1.2.2 nathanw void 2194 1.1.2.2 nathanw plcomcnputc(dev_t dev, int c) 2195 1.1.2.2 nathanw { 2196 1.1.2.2 nathanw plcom_common_putc(dev, plcomconstag, plcomconsioh, c); 2197 1.1.2.2 nathanw } 2198 1.1.2.2 nathanw 2199 1.1.2.2 nathanw void 2200 1.1.2.2 nathanw plcomcnpollc(dev_t dev, int on) 2201 1.1.2.2 nathanw { 2202 1.1.2.2 nathanw 2203 1.1.2.2 nathanw } 2204 1.1.2.2 nathanw 2205 1.1.2.2 nathanw #ifdef KGDB 2206 1.1.2.2 nathanw int 2207 1.1.2.2 nathanw plcom_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2208 1.1.2.2 nathanw int frequency, tcflag_t cflag, int unit) 2209 1.1.2.2 nathanw { 2210 1.1.2.2 nathanw int res; 2211 1.1.2.2 nathanw 2212 1.1.2.2 nathanw if (iot == plcomconstag && iobase == plcomconsunit) 2213 1.1.2.2 nathanw return EBUSY; /* cannot share with console */ 2214 1.1.2.2 nathanw 2215 1.1.2.2 nathanw res = plcominit(iot, iobase, rate, frequency, cflag, &plcom_kgdb_ioh); 2216 1.1.2.2 nathanw if (res) 2217 1.1.2.2 nathanw return res; 2218 1.1.2.2 nathanw 2219 1.1.2.2 nathanw kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2220 1.1.2.2 nathanw kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2221 1.1.2.2 nathanw 2222 1.1.2.2 nathanw plcom_kgdb_iot = iot; 2223 1.1.2.2 nathanw plcom_kgdb_unit = unit; 2224 1.1.2.2 nathanw 2225 1.1.2.2 nathanw return 0; 2226 1.1.2.2 nathanw } 2227 1.1.2.2 nathanw 2228 1.1.2.2 nathanw /* ARGSUSED */ 2229 1.1.2.2 nathanw int 2230 1.1.2.2 nathanw plcom_kgdb_getc(void *arg) 2231 1.1.2.2 nathanw { 2232 1.1.2.2 nathanw return plcom_common_getc(NODEV, plcom_kgdb_iot, plcom_kgdb_ioh); 2233 1.1.2.2 nathanw } 2234 1.1.2.2 nathanw 2235 1.1.2.2 nathanw /* ARGSUSED */ 2236 1.1.2.2 nathanw void 2237 1.1.2.2 nathanw plcom_kgdb_putc(void *arg, int c) 2238 1.1.2.2 nathanw { 2239 1.1.2.2 nathanw plcom_common_putc(NODEV, plcom_kgdb_iot, plcom_kgdb_ioh, c); 2240 1.1.2.2 nathanw } 2241 1.1.2.2 nathanw #endif /* KGDB */ 2242 1.1.2.2 nathanw 2243 1.1.2.2 nathanw /* helper function to identify the plcom ports used by 2244 1.1.2.2 nathanw console or KGDB (and not yet autoconf attached) */ 2245 1.1.2.2 nathanw int 2246 1.1.2.2 nathanw plcom_is_console(bus_space_tag_t iot, int unit, 2247 1.1.2.2 nathanw bus_space_handle_t *ioh) 2248 1.1.2.2 nathanw { 2249 1.1.2.2 nathanw bus_space_handle_t help; 2250 1.1.2.2 nathanw 2251 1.1.2.2 nathanw if (!plcomconsattached && 2252 1.1.2.2 nathanw iot == plcomconstag && unit == plcomconsunit) 2253 1.1.2.2 nathanw help = plcomconsioh; 2254 1.1.2.2 nathanw #ifdef KGDB 2255 1.1.2.2 nathanw else if (!plcom_kgdb_attached && 2256 1.1.2.2 nathanw iot == plcom_kgdb_iot && unit == plcom_kgdb_unit) 2257 1.1.2.2 nathanw help = plcom_kgdb_ioh; 2258 1.1.2.2 nathanw #endif 2259 1.1.2.2 nathanw else 2260 1.1.2.2 nathanw return 0; 2261 1.1.2.2 nathanw 2262 1.1.2.2 nathanw if (ioh) 2263 1.1.2.2 nathanw *ioh = help; 2264 1.1.2.2 nathanw return 1; 2265 1.1.2.2 nathanw } 2266
Indexes created Mon Oct 20 01:09:56 GMT 2025