plcom.c revision 1.54 1 1.54 jmcneill /* $NetBSD: plcom.c,v 1.54 2018/10/12 22:18:38 jmcneill Exp $ */
2 1.1 rearnsha
3 1.1 rearnsha /*-
4 1.1 rearnsha * Copyright (c) 2001 ARM Ltd
5 1.1 rearnsha * All rights reserved.
6 1.1 rearnsha *
7 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
8 1.1 rearnsha * modification, are permitted provided that the following conditions
9 1.1 rearnsha * are met:
10 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
11 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
12 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
14 1.1 rearnsha * documentation and/or other materials provided with the distribution.
15 1.1 rearnsha * 3. The name of the company may not be used to endorse or promote
16 1.1 rearnsha * products derived from this software without specific prior written
17 1.1 rearnsha * permission.
18 1.1 rearnsha *
19 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1 rearnsha * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1 rearnsha * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 rearnsha * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 1.1 rearnsha * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 1.1 rearnsha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 1.1 rearnsha * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1 rearnsha * SUCH DAMAGE.
30 1.46 skrll *
31 1.40 skrll * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc.
32 1.1 rearnsha * All rights reserved.
33 1.1 rearnsha *
34 1.1 rearnsha * This code is derived from software contributed to The NetBSD Foundation
35 1.40 skrll * by Charles M. Hannum and Nick Hudson.
36 1.1 rearnsha *
37 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
38 1.1 rearnsha * modification, are permitted provided that the following conditions
39 1.1 rearnsha * are met:
40 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
41 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
42 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
44 1.1 rearnsha * documentation and/or other materials provided with the distribution.
45 1.1 rearnsha *
46 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
47 1.1 rearnsha * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
48 1.1 rearnsha * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
49 1.1 rearnsha * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
50 1.1 rearnsha * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
51 1.1 rearnsha * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
52 1.1 rearnsha * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
53 1.1 rearnsha * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
54 1.1 rearnsha * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
55 1.1 rearnsha * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56 1.1 rearnsha * POSSIBILITY OF SUCH DAMAGE.
57 1.1 rearnsha */
58 1.1 rearnsha
59 1.1 rearnsha /*
60 1.1 rearnsha * Copyright (c) 1991 The Regents of the University of California.
61 1.1 rearnsha * All rights reserved.
62 1.1 rearnsha *
63 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
64 1.1 rearnsha * modification, are permitted provided that the following conditions
65 1.1 rearnsha * are met:
66 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
67 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
68 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
69 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
70 1.1 rearnsha * documentation and/or other materials provided with the distribution.
71 1.9 agc * 3. Neither the name of the University nor the names of its contributors
72 1.1 rearnsha * may be used to endorse or promote products derived from this software
73 1.1 rearnsha * without specific prior written permission.
74 1.1 rearnsha *
75 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
76 1.1 rearnsha * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
77 1.1 rearnsha * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
78 1.1 rearnsha * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
79 1.1 rearnsha * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
80 1.1 rearnsha * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
81 1.1 rearnsha * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
82 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
83 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
84 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
85 1.1 rearnsha * SUCH DAMAGE.
86 1.1 rearnsha *
87 1.1 rearnsha * @(#)com.c 7.5 (Berkeley) 5/16/91
88 1.1 rearnsha */
89 1.1 rearnsha
90 1.1 rearnsha /*
91 1.40 skrll * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to
92 1.40 skrll * the 16C550, but have a completely different programmer's model.
93 1.1 rearnsha * Derived from the NS16550AF com driver.
94 1.1 rearnsha */
95 1.8 lukem
96 1.8 lukem #include <sys/cdefs.h>
97 1.54 jmcneill __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.54 2018/10/12 22:18:38 jmcneill Exp $");
98 1.1 rearnsha
99 1.1 rearnsha #include "opt_plcom.h"
100 1.1 rearnsha #include "opt_ddb.h"
101 1.1 rearnsha #include "opt_kgdb.h"
102 1.7 martin #include "opt_lockdebug.h"
103 1.7 martin #include "opt_multiprocessor.h"
104 1.1 rearnsha
105 1.1 rearnsha /*
106 1.1 rearnsha * Override cnmagic(9) macro before including <sys/systm.h>.
107 1.1 rearnsha * We need to know if cn_check_magic triggered debugger, so set a flag.
108 1.1 rearnsha * Callers of cn_check_magic must declare int cn_trapped = 0;
109 1.1 rearnsha * XXX: this is *ugly*!
110 1.1 rearnsha */
111 1.1 rearnsha #define cn_trap() \
112 1.1 rearnsha do { \
113 1.1 rearnsha console_debugger(); \
114 1.1 rearnsha cn_trapped = 1; \
115 1.1 rearnsha } while (/* CONSTCOND */ 0)
116 1.1 rearnsha
117 1.1 rearnsha #include <sys/param.h>
118 1.1 rearnsha #include <sys/systm.h>
119 1.1 rearnsha #include <sys/ioctl.h>
120 1.1 rearnsha #include <sys/select.h>
121 1.1 rearnsha #include <sys/tty.h>
122 1.1 rearnsha #include <sys/proc.h>
123 1.1 rearnsha #include <sys/conf.h>
124 1.1 rearnsha #include <sys/file.h>
125 1.1 rearnsha #include <sys/uio.h>
126 1.1 rearnsha #include <sys/kernel.h>
127 1.1 rearnsha #include <sys/syslog.h>
128 1.1 rearnsha #include <sys/types.h>
129 1.1 rearnsha #include <sys/device.h>
130 1.1 rearnsha #include <sys/malloc.h>
131 1.1 rearnsha #include <sys/timepps.h>
132 1.1 rearnsha #include <sys/vnode.h>
133 1.16 elad #include <sys/kauth.h>
134 1.25 ad #include <sys/intr.h>
135 1.25 ad #include <sys/bus.h>
136 1.40 skrll #ifdef RND_COM
137 1.52 riastrad #include <sys/rndsource.h>
138 1.40 skrll #endif
139 1.1 rearnsha
140 1.1 rearnsha #include <evbarm/dev/plcomreg.h>
141 1.1 rearnsha #include <evbarm/dev/plcomvar.h>
142 1.1 rearnsha
143 1.1 rearnsha #include <dev/cons.h>
144 1.1 rearnsha
145 1.1 rearnsha static void plcom_enable_debugport (struct plcom_softc *);
146 1.1 rearnsha
147 1.1 rearnsha void plcom_config (struct plcom_softc *);
148 1.1 rearnsha void plcom_shutdown (struct plcom_softc *);
149 1.40 skrll int pl010comspeed (long, long);
150 1.40 skrll int pl011comspeed (long, long);
151 1.1 rearnsha static u_char cflag2lcr (tcflag_t);
152 1.1 rearnsha int plcomparam (struct tty *, struct termios *);
153 1.1 rearnsha void plcomstart (struct tty *);
154 1.1 rearnsha int plcomhwiflow (struct tty *, int);
155 1.1 rearnsha
156 1.1 rearnsha void plcom_loadchannelregs (struct plcom_softc *);
157 1.1 rearnsha void plcom_hwiflow (struct plcom_softc *);
158 1.1 rearnsha void plcom_break (struct plcom_softc *, int);
159 1.1 rearnsha void plcom_modem (struct plcom_softc *, int);
160 1.1 rearnsha void tiocm_to_plcom (struct plcom_softc *, u_long, int);
161 1.1 rearnsha int plcom_to_tiocm (struct plcom_softc *);
162 1.1 rearnsha void plcom_iflush (struct plcom_softc *);
163 1.1 rearnsha
164 1.40 skrll int plcom_common_getc (dev_t, struct plcom_instance *);
165 1.40 skrll void plcom_common_putc (dev_t, struct plcom_instance *, int);
166 1.1 rearnsha
167 1.40 skrll int plcominit (struct plcom_instance *, int, int, tcflag_t);
168 1.1 rearnsha
169 1.4 gehenna dev_type_open(plcomopen);
170 1.4 gehenna dev_type_close(plcomclose);
171 1.4 gehenna dev_type_read(plcomread);
172 1.4 gehenna dev_type_write(plcomwrite);
173 1.4 gehenna dev_type_ioctl(plcomioctl);
174 1.4 gehenna dev_type_stop(plcomstop);
175 1.4 gehenna dev_type_tty(plcomtty);
176 1.4 gehenna dev_type_poll(plcompoll);
177 1.1 rearnsha
178 1.1 rearnsha int plcomcngetc (dev_t);
179 1.1 rearnsha void plcomcnputc (dev_t, int);
180 1.1 rearnsha void plcomcnpollc (dev_t, int);
181 1.1 rearnsha
182 1.1 rearnsha #define integrate static inline
183 1.1 rearnsha void plcomsoft (void *);
184 1.1 rearnsha integrate void plcom_rxsoft (struct plcom_softc *, struct tty *);
185 1.1 rearnsha integrate void plcom_txsoft (struct plcom_softc *, struct tty *);
186 1.1 rearnsha integrate void plcom_stsoft (struct plcom_softc *, struct tty *);
187 1.1 rearnsha integrate void plcom_schedrx (struct plcom_softc *);
188 1.1 rearnsha void plcomdiag (void *);
189 1.1 rearnsha
190 1.40 skrll bool plcom_intstatus(struct plcom_instance *, u_int *);
191 1.40 skrll
192 1.1 rearnsha extern struct cfdriver plcom_cd;
193 1.1 rearnsha
194 1.4 gehenna const struct cdevsw plcom_cdevsw = {
195 1.48 dholland .d_open = plcomopen,
196 1.48 dholland .d_close = plcomclose,
197 1.48 dholland .d_read = plcomread,
198 1.48 dholland .d_write = plcomwrite,
199 1.48 dholland .d_ioctl = plcomioctl,
200 1.48 dholland .d_stop = plcomstop,
201 1.48 dholland .d_tty = plcomtty,
202 1.48 dholland .d_poll = plcompoll,
203 1.48 dholland .d_mmap = nommap,
204 1.48 dholland .d_kqfilter = ttykqfilter,
205 1.49 dholland .d_discard = nodiscard,
206 1.48 dholland .d_flag = D_TTY
207 1.4 gehenna };
208 1.4 gehenna
209 1.1 rearnsha /*
210 1.1 rearnsha * Make this an option variable one can patch.
211 1.1 rearnsha * But be warned: this must be a power of 2!
212 1.1 rearnsha */
213 1.1 rearnsha u_int plcom_rbuf_size = PLCOM_RING_SIZE;
214 1.1 rearnsha
215 1.1 rearnsha /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
216 1.1 rearnsha u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4;
217 1.1 rearnsha u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4;
218 1.1 rearnsha
219 1.1 rearnsha static int plcomconsunit = -1;
220 1.40 skrll static struct plcom_instance plcomcons_info;
221 1.40 skrll
222 1.40 skrll static int plcomconsattached;
223 1.1 rearnsha static int plcomconsrate;
224 1.1 rearnsha static tcflag_t plcomconscflag;
225 1.1 rearnsha static struct cnm_state plcom_cnm_state;
226 1.1 rearnsha
227 1.1 rearnsha static int ppscap =
228 1.1 rearnsha PPS_TSFMT_TSPEC |
229 1.46 skrll PPS_CAPTUREASSERT |
230 1.1 rearnsha PPS_CAPTURECLEAR |
231 1.46 skrll #ifdef PPS_SYNC
232 1.1 rearnsha PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR |
233 1.1 rearnsha #endif /* PPS_SYNC */
234 1.1 rearnsha PPS_OFFSETASSERT | PPS_OFFSETCLEAR;
235 1.1 rearnsha
236 1.1 rearnsha #ifdef KGDB
237 1.1 rearnsha #include <sys/kgdb.h>
238 1.1 rearnsha
239 1.40 skrll static struct plcom_instance plcomkgdb_info;
240 1.1 rearnsha static int plcom_kgdb_attached;
241 1.1 rearnsha
242 1.1 rearnsha int plcom_kgdb_getc (void *);
243 1.1 rearnsha void plcom_kgdb_putc (void *, int);
244 1.1 rearnsha #endif /* KGDB */
245 1.1 rearnsha
246 1.51 christos #define PLCOMDIALOUT_MASK TTDIALOUT_MASK
247 1.1 rearnsha
248 1.51 christos #define PLCOMUNIT(x) TTUNIT(x)
249 1.51 christos #define PLCOMDIALOUT(x) TTDIALOUT(x)
250 1.1 rearnsha
251 1.1 rearnsha #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \
252 1.38 skrll device_is_active((sc)->sc_dev))
253 1.1 rearnsha
254 1.1 rearnsha #define BR BUS_SPACE_BARRIER_READ
255 1.1 rearnsha #define BW BUS_SPACE_BARRIER_WRITE
256 1.40 skrll #define PLCOM_BARRIER(pi, f) \
257 1.40 skrll bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f))
258 1.40 skrll
259 1.40 skrll static uint8_t
260 1.40 skrll pread1(struct plcom_instance *pi, bus_size_t reg)
261 1.40 skrll {
262 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS))
263 1.40 skrll return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg);
264 1.40 skrll
265 1.40 skrll return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >>
266 1.40 skrll (8 * (reg & 3));
267 1.40 skrll }
268 1.40 skrll int nhcr;
269 1.40 skrll static void
270 1.40 skrll pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val)
271 1.40 skrll {
272 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
273 1.40 skrll bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val);
274 1.40 skrll } else {
275 1.40 skrll const size_t shift = 8 * (o & 3);
276 1.40 skrll o &= -4;
277 1.40 skrll uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o);
278 1.40 skrll tmp = (val << shift) | (tmp & ~(0xff << shift));
279 1.40 skrll bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp);
280 1.40 skrll }
281 1.40 skrll }
282 1.40 skrll
283 1.40 skrll static void
284 1.40 skrll pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap,
285 1.40 skrll bus_size_t count)
286 1.40 skrll {
287 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
288 1.40 skrll bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count);
289 1.40 skrll } else {
290 1.40 skrll KASSERT((o & 3) == 0);
291 1.40 skrll while (count--) {
292 1.40 skrll bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++);
293 1.40 skrll };
294 1.40 skrll }
295 1.40 skrll }
296 1.40 skrll
297 1.40 skrll #define PREAD1(pi, reg) pread1(pi, reg)
298 1.40 skrll #define PREAD4(pi, reg) \
299 1.40 skrll (bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg)))
300 1.40 skrll
301 1.40 skrll #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val)
302 1.40 skrll #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c)
303 1.40 skrll #define PWRITE4(pi, reg, val) \
304 1.40 skrll (bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val)))
305 1.1 rearnsha
306 1.1 rearnsha int
307 1.40 skrll pl010comspeed(long speed, long frequency)
308 1.1 rearnsha {
309 1.1 rearnsha #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
310 1.1 rearnsha
311 1.1 rearnsha int x, err;
312 1.1 rearnsha
313 1.1 rearnsha #if 0
314 1.1 rearnsha if (speed == 0)
315 1.1 rearnsha return 0;
316 1.1 rearnsha #endif
317 1.1 rearnsha if (speed <= 0)
318 1.1 rearnsha return -1;
319 1.1 rearnsha x = divrnd(frequency / 16, speed);
320 1.1 rearnsha if (x <= 0)
321 1.1 rearnsha return -1;
322 1.1 rearnsha err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
323 1.1 rearnsha if (err < 0)
324 1.1 rearnsha err = -err;
325 1.1 rearnsha if (err > PLCOM_TOLERANCE)
326 1.1 rearnsha return -1;
327 1.1 rearnsha return x;
328 1.1 rearnsha
329 1.1 rearnsha #undef divrnd
330 1.1 rearnsha }
331 1.1 rearnsha
332 1.40 skrll int
333 1.40 skrll pl011comspeed(long speed, long frequency)
334 1.40 skrll {
335 1.40 skrll int denom = 16 * speed;
336 1.40 skrll int div = frequency / denom;
337 1.40 skrll int rem = frequency % denom;
338 1.46 skrll
339 1.40 skrll int ibrd = div << 6;
340 1.40 skrll int fbrd = (((8 * rem) / speed) + 1) / 2;
341 1.46 skrll
342 1.40 skrll /* Tolerance? */
343 1.40 skrll return ibrd | fbrd;
344 1.40 skrll }
345 1.40 skrll
346 1.1 rearnsha #ifdef PLCOM_DEBUG
347 1.1 rearnsha int plcom_debug = 0;
348 1.1 rearnsha
349 1.34 bsh void plcomstatus (struct plcom_softc *, const char *);
350 1.1 rearnsha void
351 1.34 bsh plcomstatus(struct plcom_softc *sc, const char *str)
352 1.1 rearnsha {
353 1.1 rearnsha struct tty *tp = sc->sc_tty;
354 1.1 rearnsha
355 1.1 rearnsha printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n",
356 1.38 skrll device_xname(sc->sc_dev), str,
357 1.1 rearnsha ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
358 1.35 skrll ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-",
359 1.1 rearnsha ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
360 1.35 skrll ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-",
361 1.1 rearnsha sc->sc_tx_stopped ? "+" : "-");
362 1.1 rearnsha
363 1.1 rearnsha printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n",
364 1.38 skrll device_xname(sc->sc_dev), str,
365 1.1 rearnsha ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
366 1.35 skrll ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-",
367 1.1 rearnsha ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
368 1.35 skrll ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-",
369 1.1 rearnsha sc->sc_rx_flags);
370 1.1 rearnsha }
371 1.1 rearnsha #endif
372 1.1 rearnsha
373 1.40 skrll #if 0
374 1.1 rearnsha int
375 1.1 rearnsha plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
376 1.1 rearnsha {
377 1.1 rearnsha int data;
378 1.1 rearnsha
379 1.1 rearnsha /* Disable the UART. */
380 1.1 rearnsha bus_space_write_1(iot, ioh, plcom_cr, 0);
381 1.1 rearnsha /* Make sure the FIFO is off. */
382 1.35 skrll bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS);
383 1.1 rearnsha /* Disable interrupts. */
384 1.1 rearnsha bus_space_write_1(iot, ioh, plcom_iir, 0);
385 1.1 rearnsha
386 1.1 rearnsha /* Make sure we swallow anything in the receiving register. */
387 1.1 rearnsha data = bus_space_read_1(iot, ioh, plcom_dr);
388 1.1 rearnsha
389 1.35 skrll if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS)
390 1.1 rearnsha return 0;
391 1.1 rearnsha
392 1.35 skrll data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE);
393 1.1 rearnsha
394 1.35 skrll if (data != PL01X_FR_RXFE)
395 1.1 rearnsha return 0;
396 1.1 rearnsha
397 1.1 rearnsha return 1;
398 1.1 rearnsha }
399 1.40 skrll #endif
400 1.1 rearnsha
401 1.36 skrll /*
402 1.36 skrll * No locking in this routine; it is only called during attach,
403 1.36 skrll * or with the port already locked.
404 1.36 skrll */
405 1.1 rearnsha static void
406 1.1 rearnsha plcom_enable_debugport(struct plcom_softc *sc)
407 1.1 rearnsha {
408 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
409 1.40 skrll
410 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
411 1.40 skrll SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
412 1.1 rearnsha
413 1.1 rearnsha /* Turn on line break interrupt, set carrier. */
414 1.40 skrll switch (pi->pi_type) {
415 1.40 skrll case PLCOM_TYPE_PL010:
416 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
417 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
418 1.40 skrll if (sc->sc_set_mcr) {
419 1.40 skrll /* XXX device_unit() abuse */
420 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
421 1.40 skrll device_unit(sc->sc_dev), sc->sc_mcr);
422 1.40 skrll }
423 1.40 skrll break;
424 1.40 skrll case PLCOM_TYPE_PL011:
425 1.40 skrll sc->sc_imsc = PL011_INT_RX | PL011_INT_RT;
426 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
427 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr));
428 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
429 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
430 1.40 skrll break;
431 1.40 skrll }
432 1.40 skrll
433 1.1 rearnsha }
434 1.1 rearnsha
435 1.1 rearnsha void
436 1.1 rearnsha plcom_attach_subr(struct plcom_softc *sc)
437 1.1 rearnsha {
438 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
439 1.1 rearnsha struct tty *tp;
440 1.1 rearnsha
441 1.40 skrll aprint_naive("\n");
442 1.40 skrll
443 1.21 ad callout_init(&sc->sc_diag_callout, 0);
444 1.36 skrll mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
445 1.1 rearnsha
446 1.40 skrll switch (pi->pi_type) {
447 1.40 skrll case PLCOM_TYPE_PL010:
448 1.40 skrll case PLCOM_TYPE_PL011:
449 1.40 skrll break;
450 1.40 skrll default:
451 1.40 skrll aprint_error_dev(sc->sc_dev,
452 1.40 skrll "Unknown plcom type: %d\n", pi->pi_type);
453 1.40 skrll return;
454 1.40 skrll }
455 1.40 skrll
456 1.1 rearnsha /* Disable interrupts before configuring the device. */
457 1.1 rearnsha sc->sc_cr = 0;
458 1.40 skrll sc->sc_imsc = 0;
459 1.1 rearnsha
460 1.40 skrll if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) &&
461 1.40 skrll pi->pi_iobase == plcomcons_info.pi_iobase) {
462 1.1 rearnsha plcomconsattached = 1;
463 1.1 rearnsha
464 1.1 rearnsha /* Make sure the console is always "hardwired". */
465 1.1 rearnsha delay(1000); /* wait for output to finish */
466 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_CONSOLE);
467 1.1 rearnsha SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
468 1.40 skrll /*
469 1.40 skrll * Must re-enable the console immediately, or we will
470 1.40 skrll * hang when trying to print.
471 1.40 skrll */
472 1.35 skrll sc->sc_cr = PL01X_CR_UARTEN;
473 1.46 skrll if (pi->pi_type == PLCOM_TYPE_PL011)
474 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
475 1.1 rearnsha }
476 1.1 rearnsha
477 1.40 skrll switch (pi->pi_type) {
478 1.40 skrll case PLCOM_TYPE_PL010:
479 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
480 1.40 skrll break;
481 1.46 skrll
482 1.40 skrll case PLCOM_TYPE_PL011:
483 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
484 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
485 1.40 skrll break;
486 1.46 skrll }
487 1.40 skrll
488 1.40 skrll if (sc->sc_fifolen == 0) {
489 1.40 skrll switch (pi->pi_type) {
490 1.40 skrll case PLCOM_TYPE_PL010:
491 1.40 skrll /*
492 1.40 skrll * The PL010 has a 16-byte fifo, but the tx interrupt
493 1.40 skrll * triggers when there is space for 8 more bytes.
494 1.40 skrll */
495 1.42 skrll sc->sc_fifolen = 8;
496 1.40 skrll break;
497 1.40 skrll case PLCOM_TYPE_PL011:
498 1.40 skrll /* Some revisions have a 32 byte TX FIFO */
499 1.40 skrll sc->sc_fifolen = 16;
500 1.40 skrll break;
501 1.40 skrll }
502 1.40 skrll }
503 1.40 skrll aprint_normal("\n");
504 1.1 rearnsha
505 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) {
506 1.1 rearnsha sc->sc_fifolen = 1;
507 1.40 skrll aprint_normal_dev(sc->sc_dev, "txfifo disabled\n");
508 1.1 rearnsha }
509 1.1 rearnsha
510 1.1 rearnsha if (sc->sc_fifolen > 1)
511 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_FIFO);
512 1.1 rearnsha
513 1.32 rmind tp = tty_alloc();
514 1.1 rearnsha tp->t_oproc = plcomstart;
515 1.1 rearnsha tp->t_param = plcomparam;
516 1.1 rearnsha tp->t_hwiflow = plcomhwiflow;
517 1.1 rearnsha
518 1.1 rearnsha sc->sc_tty = tp;
519 1.1 rearnsha sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
520 1.1 rearnsha sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
521 1.1 rearnsha sc->sc_rbavail = plcom_rbuf_size;
522 1.1 rearnsha if (sc->sc_rbuf == NULL) {
523 1.40 skrll aprint_error_dev(sc->sc_dev,
524 1.46 skrll "unable to allocate ring buffer\n");
525 1.1 rearnsha return;
526 1.1 rearnsha }
527 1.1 rearnsha sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1);
528 1.1 rearnsha
529 1.1 rearnsha tty_attach(tp);
530 1.1 rearnsha
531 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
532 1.1 rearnsha int maj;
533 1.1 rearnsha
534 1.1 rearnsha /* locate the major number */
535 1.4 gehenna maj = cdevsw_lookup_major(&plcom_cdevsw);
536 1.1 rearnsha
537 1.40 skrll tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev));
538 1.1 rearnsha
539 1.40 skrll aprint_normal_dev(sc->sc_dev, "console\n");
540 1.1 rearnsha }
541 1.1 rearnsha
542 1.1 rearnsha #ifdef KGDB
543 1.1 rearnsha /*
544 1.1 rearnsha * Allow kgdb to "take over" this port. If this is
545 1.1 rearnsha * the kgdb device, it has exclusive use.
546 1.1 rearnsha */
547 1.44 mlelstv if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) &&
548 1.40 skrll pi->pi_iobase == plcomkgdb_info.pi_iobase) {
549 1.40 skrll if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
550 1.40 skrll plcom_kgdb_attached = 1;
551 1.1 rearnsha
552 1.40 skrll SET(sc->sc_hwflags, PLCOM_HW_KGDB);
553 1.40 skrll }
554 1.40 skrll aprint_normal_dev(sc->sc_dev, "kgdb\n");
555 1.1 rearnsha }
556 1.1 rearnsha #endif
557 1.1 rearnsha
558 1.25 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc);
559 1.1 rearnsha
560 1.33 tls #ifdef RND_COM
561 1.40 skrll rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
562 1.50 tls RND_TYPE_TTY, RND_FLAG_DEFAULT);
563 1.1 rearnsha #endif
564 1.1 rearnsha
565 1.40 skrll /*
566 1.40 skrll * if there are no enable/disable functions, assume the device
567 1.40 skrll * is always enabled
568 1.40 skrll */
569 1.1 rearnsha if (!sc->enable)
570 1.1 rearnsha sc->enabled = 1;
571 1.1 rearnsha
572 1.1 rearnsha plcom_config(sc);
573 1.1 rearnsha
574 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_DEV_OK);
575 1.1 rearnsha }
576 1.1 rearnsha
577 1.1 rearnsha void
578 1.1 rearnsha plcom_config(struct plcom_softc *sc)
579 1.1 rearnsha {
580 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
581 1.1 rearnsha
582 1.1 rearnsha /* Disable interrupts before configuring the device. */
583 1.1 rearnsha sc->sc_cr = 0;
584 1.40 skrll sc->sc_imsc = 0;
585 1.40 skrll switch (pi->pi_type) {
586 1.40 skrll case PLCOM_TYPE_PL010:
587 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
588 1.40 skrll break;
589 1.46 skrll
590 1.40 skrll case PLCOM_TYPE_PL011:
591 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
592 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
593 1.40 skrll break;
594 1.46 skrll }
595 1.1 rearnsha
596 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
597 1.1 rearnsha plcom_enable_debugport(sc);
598 1.1 rearnsha }
599 1.1 rearnsha
600 1.1 rearnsha int
601 1.38 skrll plcom_detach(device_t self, int flags)
602 1.1 rearnsha {
603 1.38 skrll struct plcom_softc *sc = device_private(self);
604 1.1 rearnsha int maj, mn;
605 1.1 rearnsha
606 1.31 dyoung if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
607 1.31 dyoung return EBUSY;
608 1.31 dyoung
609 1.31 dyoung if (sc->disable != NULL && sc->enabled != 0) {
610 1.31 dyoung (*sc->disable)(sc);
611 1.31 dyoung sc->enabled = 0;
612 1.31 dyoung }
613 1.31 dyoung
614 1.1 rearnsha /* locate the major number */
615 1.4 gehenna maj = cdevsw_lookup_major(&plcom_cdevsw);
616 1.1 rearnsha
617 1.1 rearnsha /* Nuke the vnodes for any open instances. */
618 1.15 thorpej mn = device_unit(self);
619 1.1 rearnsha vdevgone(maj, mn, mn, VCHR);
620 1.1 rearnsha
621 1.1 rearnsha mn |= PLCOMDIALOUT_MASK;
622 1.1 rearnsha vdevgone(maj, mn, mn, VCHR);
623 1.1 rearnsha
624 1.40 skrll if (sc->sc_rbuf == NULL) {
625 1.40 skrll /*
626 1.40 skrll * Ring buffer allocation failed in the plcom_attach_subr,
627 1.40 skrll * only the tty is allocated, and nothing else.
628 1.46 skrll */
629 1.40 skrll tty_free(sc->sc_tty);
630 1.40 skrll return 0;
631 1.40 skrll }
632 1.40 skrll
633 1.1 rearnsha /* Free the receive buffer. */
634 1.1 rearnsha free(sc->sc_rbuf, M_DEVBUF);
635 1.1 rearnsha
636 1.1 rearnsha /* Detach and free the tty. */
637 1.1 rearnsha tty_detach(sc->sc_tty);
638 1.32 rmind tty_free(sc->sc_tty);
639 1.1 rearnsha
640 1.1 rearnsha /* Unhook the soft interrupt handler. */
641 1.25 ad softint_disestablish(sc->sc_si);
642 1.1 rearnsha
643 1.33 tls #ifdef RND_COM
644 1.1 rearnsha /* Unhook the entropy source. */
645 1.1 rearnsha rnd_detach_source(&sc->rnd_source);
646 1.1 rearnsha #endif
647 1.40 skrll callout_destroy(&sc->sc_diag_callout);
648 1.1 rearnsha
649 1.36 skrll /* Destroy the lock. */
650 1.36 skrll mutex_destroy(&sc->sc_lock);
651 1.36 skrll
652 1.1 rearnsha return 0;
653 1.1 rearnsha }
654 1.1 rearnsha
655 1.1 rearnsha int
656 1.31 dyoung plcom_activate(device_t self, enum devact act)
657 1.1 rearnsha {
658 1.31 dyoung struct plcom_softc *sc = device_private(self);
659 1.1 rearnsha
660 1.1 rearnsha switch (act) {
661 1.1 rearnsha case DVACT_DEACTIVATE:
662 1.31 dyoung sc->enabled = 0;
663 1.31 dyoung return 0;
664 1.31 dyoung default:
665 1.31 dyoung return EOPNOTSUPP;
666 1.1 rearnsha }
667 1.1 rearnsha }
668 1.1 rearnsha
669 1.1 rearnsha void
670 1.1 rearnsha plcom_shutdown(struct plcom_softc *sc)
671 1.1 rearnsha {
672 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
673 1.1 rearnsha struct tty *tp = sc->sc_tty;
674 1.36 skrll mutex_spin_enter(&sc->sc_lock);
675 1.1 rearnsha
676 1.1 rearnsha /* If we were asserting flow control, then deassert it. */
677 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
678 1.1 rearnsha plcom_hwiflow(sc);
679 1.1 rearnsha
680 1.1 rearnsha /* Clear any break condition set with TIOCSBRK. */
681 1.1 rearnsha plcom_break(sc, 0);
682 1.1 rearnsha
683 1.1 rearnsha /* Turn off PPS capture on last close. */
684 1.26 ad mutex_spin_enter(&timecounter_lock);
685 1.1 rearnsha sc->sc_ppsmask = 0;
686 1.1 rearnsha sc->ppsparam.mode = 0;
687 1.26 ad mutex_spin_exit(&timecounter_lock);
688 1.1 rearnsha
689 1.1 rearnsha /*
690 1.1 rearnsha * Hang up if necessary. Wait a bit, so the other side has time to
691 1.1 rearnsha * notice even if we immediately open the port again.
692 1.1 rearnsha * Avoid tsleeping above splhigh().
693 1.1 rearnsha */
694 1.1 rearnsha if (ISSET(tp->t_cflag, HUPCL)) {
695 1.1 rearnsha plcom_modem(sc, 0);
696 1.36 skrll mutex_spin_exit(&sc->sc_lock);
697 1.36 skrll /* XXX will only timeout */
698 1.36 skrll (void) kpause(ttclos, false, hz, NULL);
699 1.36 skrll mutex_spin_enter(&sc->sc_lock);
700 1.1 rearnsha }
701 1.1 rearnsha
702 1.40 skrll sc->sc_cr = 0;
703 1.40 skrll sc->sc_imsc = 0;
704 1.1 rearnsha /* Turn off interrupts. */
705 1.40 skrll if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
706 1.1 rearnsha /* interrupt on break */
707 1.46 skrll
708 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
709 1.40 skrll sc->sc_imsc = 0;
710 1.40 skrll switch (pi->pi_type) {
711 1.40 skrll case PLCOM_TYPE_PL010:
712 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
713 1.40 skrll break;
714 1.40 skrll case PLCOM_TYPE_PL011:
715 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE);
716 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX);
717 1.40 skrll break;
718 1.40 skrll }
719 1.40 skrll }
720 1.40 skrll switch (pi->pi_type) {
721 1.40 skrll case PLCOM_TYPE_PL010:
722 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
723 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
724 1.40 skrll break;
725 1.40 skrll case PLCOM_TYPE_PL011:
726 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
727 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX);
728 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
729 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
730 1.40 skrll break;
731 1.40 skrll }
732 1.1 rearnsha
733 1.36 skrll mutex_spin_exit(&sc->sc_lock);
734 1.1 rearnsha if (sc->disable) {
735 1.1 rearnsha #ifdef DIAGNOSTIC
736 1.1 rearnsha if (!sc->enabled)
737 1.1 rearnsha panic("plcom_shutdown: not enabled?");
738 1.1 rearnsha #endif
739 1.1 rearnsha (*sc->disable)(sc);
740 1.1 rearnsha sc->enabled = 0;
741 1.1 rearnsha }
742 1.1 rearnsha }
743 1.1 rearnsha
744 1.1 rearnsha int
745 1.12 christos plcomopen(dev_t dev, int flag, int mode, struct lwp *l)
746 1.1 rearnsha {
747 1.1 rearnsha struct plcom_softc *sc;
748 1.40 skrll struct plcom_instance *pi;
749 1.1 rearnsha struct tty *tp;
750 1.36 skrll int s;
751 1.1 rearnsha int error;
752 1.1 rearnsha
753 1.28 cegger sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
754 1.1 rearnsha if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) ||
755 1.1 rearnsha sc->sc_rbuf == NULL)
756 1.1 rearnsha return ENXIO;
757 1.1 rearnsha
758 1.38 skrll if (!device_is_active(sc->sc_dev))
759 1.1 rearnsha return ENXIO;
760 1.1 rearnsha
761 1.40 skrll pi = &sc->sc_pi;
762 1.40 skrll
763 1.1 rearnsha #ifdef KGDB
764 1.1 rearnsha /*
765 1.1 rearnsha * If this is the kgdb port, no other use is permitted.
766 1.1 rearnsha */
767 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB))
768 1.1 rearnsha return EBUSY;
769 1.1 rearnsha #endif
770 1.1 rearnsha
771 1.1 rearnsha tp = sc->sc_tty;
772 1.1 rearnsha
773 1.18 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
774 1.18 elad return (EBUSY);
775 1.1 rearnsha
776 1.1 rearnsha s = spltty();
777 1.1 rearnsha
778 1.1 rearnsha /*
779 1.1 rearnsha * Do the following iff this is a first open.
780 1.1 rearnsha */
781 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
782 1.1 rearnsha struct termios t;
783 1.1 rearnsha
784 1.1 rearnsha tp->t_dev = dev;
785 1.1 rearnsha
786 1.1 rearnsha if (sc->enable) {
787 1.1 rearnsha if ((*sc->enable)(sc)) {
788 1.1 rearnsha splx(s);
789 1.40 skrll aprint_error_dev(sc->sc_dev,
790 1.40 skrll "device enable failed\n");
791 1.1 rearnsha return EIO;
792 1.1 rearnsha }
793 1.36 skrll mutex_spin_enter(&sc->sc_lock);
794 1.1 rearnsha sc->enabled = 1;
795 1.1 rearnsha plcom_config(sc);
796 1.36 skrll } else {
797 1.36 skrll mutex_spin_enter(&sc->sc_lock);
798 1.1 rearnsha }
799 1.1 rearnsha
800 1.1 rearnsha /* Turn on interrupts. */
801 1.1 rearnsha /* IER_ERXRDY | IER_ERLS | IER_EMSC; */
802 1.1 rearnsha /* Fetch the current modem control status, needed later. */
803 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
804 1.40 skrll switch (pi->pi_type) {
805 1.40 skrll case PLCOM_TYPE_PL010:
806 1.40 skrll SET(sc->sc_cr,
807 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE);
808 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
809 1.40 skrll sc->sc_msr = PREAD1(pi, PL01XCOM_FR);
810 1.40 skrll break;
811 1.40 skrll case PLCOM_TYPE_PL011:
812 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
813 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX |
814 1.40 skrll PL011_INT_MSMASK);
815 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
816 1.40 skrll sc->sc_msr = PREAD4(pi, PL01XCOM_FR);
817 1.40 skrll break;
818 1.40 skrll }
819 1.1 rearnsha
820 1.1 rearnsha /* Clear PPS capture state on first open. */
821 1.26 ad
822 1.26 ad mutex_spin_enter(&timecounter_lock);
823 1.1 rearnsha sc->sc_ppsmask = 0;
824 1.1 rearnsha sc->ppsparam.mode = 0;
825 1.26 ad mutex_spin_exit(&timecounter_lock);
826 1.1 rearnsha
827 1.39 skrll mutex_spin_exit(&sc->sc_lock);
828 1.1 rearnsha
829 1.1 rearnsha /*
830 1.1 rearnsha * Initialize the termios status to the defaults. Add in the
831 1.1 rearnsha * sticky bits from TIOCSFLAGS.
832 1.1 rearnsha */
833 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
834 1.1 rearnsha t.c_ospeed = plcomconsrate;
835 1.1 rearnsha t.c_cflag = plcomconscflag;
836 1.1 rearnsha } else {
837 1.1 rearnsha t.c_ospeed = TTYDEF_SPEED;
838 1.1 rearnsha t.c_cflag = TTYDEF_CFLAG;
839 1.1 rearnsha }
840 1.40 skrll t.c_ispeed = t.c_ospeed;
841 1.40 skrll
842 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
843 1.1 rearnsha SET(t.c_cflag, CLOCAL);
844 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
845 1.1 rearnsha SET(t.c_cflag, CRTSCTS);
846 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
847 1.1 rearnsha SET(t.c_cflag, MDMBUF);
848 1.1 rearnsha /* Make sure plcomparam() will do something. */
849 1.1 rearnsha tp->t_ospeed = 0;
850 1.1 rearnsha (void) plcomparam(tp, &t);
851 1.1 rearnsha tp->t_iflag = TTYDEF_IFLAG;
852 1.1 rearnsha tp->t_oflag = TTYDEF_OFLAG;
853 1.1 rearnsha tp->t_lflag = TTYDEF_LFLAG;
854 1.1 rearnsha ttychars(tp);
855 1.1 rearnsha ttsetwater(tp);
856 1.1 rearnsha
857 1.36 skrll mutex_spin_enter(&sc->sc_lock);
858 1.1 rearnsha
859 1.1 rearnsha /*
860 1.1 rearnsha * Turn on DTR. We must always do this, even if carrier is not
861 1.1 rearnsha * present, because otherwise we'd have to use TIOCSDTR
862 1.1 rearnsha * immediately after setting CLOCAL, which applications do not
863 1.1 rearnsha * expect. We always assert DTR while the device is open
864 1.1 rearnsha * unless explicitly requested to deassert it.
865 1.1 rearnsha */
866 1.1 rearnsha plcom_modem(sc, 1);
867 1.1 rearnsha
868 1.1 rearnsha /* Clear the input ring, and unblock. */
869 1.1 rearnsha sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
870 1.1 rearnsha sc->sc_rbavail = plcom_rbuf_size;
871 1.1 rearnsha plcom_iflush(sc);
872 1.1 rearnsha CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
873 1.1 rearnsha plcom_hwiflow(sc);
874 1.1 rearnsha
875 1.1 rearnsha #ifdef PLCOM_DEBUG
876 1.1 rearnsha if (plcom_debug)
877 1.1 rearnsha plcomstatus(sc, "plcomopen ");
878 1.1 rearnsha #endif
879 1.1 rearnsha
880 1.36 skrll mutex_spin_exit(&sc->sc_lock);
881 1.1 rearnsha }
882 1.46 skrll
883 1.1 rearnsha splx(s);
884 1.1 rearnsha
885 1.1 rearnsha error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
886 1.1 rearnsha if (error)
887 1.1 rearnsha goto bad;
888 1.1 rearnsha
889 1.1 rearnsha error = (*tp->t_linesw->l_open)(dev, tp);
890 1.1 rearnsha if (error)
891 1.1 rearnsha goto bad;
892 1.1 rearnsha
893 1.1 rearnsha return 0;
894 1.1 rearnsha
895 1.1 rearnsha bad:
896 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
897 1.1 rearnsha /*
898 1.1 rearnsha * We failed to open the device, and nobody else had it opened.
899 1.1 rearnsha * Clean up the state as appropriate.
900 1.1 rearnsha */
901 1.1 rearnsha plcom_shutdown(sc);
902 1.1 rearnsha }
903 1.1 rearnsha
904 1.1 rearnsha return error;
905 1.1 rearnsha }
906 1.46 skrll
907 1.1 rearnsha int
908 1.12 christos plcomclose(dev_t dev, int flag, int mode, struct lwp *l)
909 1.1 rearnsha {
910 1.28 cegger struct plcom_softc *sc =
911 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
912 1.1 rearnsha struct tty *tp = sc->sc_tty;
913 1.1 rearnsha
914 1.1 rearnsha /* XXX This is for cons.c. */
915 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN))
916 1.1 rearnsha return 0;
917 1.1 rearnsha
918 1.1 rearnsha (*tp->t_linesw->l_close)(tp, flag);
919 1.1 rearnsha ttyclose(tp);
920 1.1 rearnsha
921 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
922 1.1 rearnsha return 0;
923 1.1 rearnsha
924 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
925 1.1 rearnsha /*
926 1.1 rearnsha * Although we got a last close, the device may still be in
927 1.1 rearnsha * use; e.g. if this was the dialout node, and there are still
928 1.1 rearnsha * processes waiting for carrier on the non-dialout node.
929 1.1 rearnsha */
930 1.1 rearnsha plcom_shutdown(sc);
931 1.1 rearnsha }
932 1.1 rearnsha
933 1.1 rearnsha return 0;
934 1.1 rearnsha }
935 1.46 skrll
936 1.1 rearnsha int
937 1.1 rearnsha plcomread(dev_t dev, struct uio *uio, int flag)
938 1.1 rearnsha {
939 1.28 cegger struct plcom_softc *sc =
940 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
941 1.1 rearnsha struct tty *tp = sc->sc_tty;
942 1.1 rearnsha
943 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
944 1.1 rearnsha return EIO;
945 1.46 skrll
946 1.1 rearnsha return (*tp->t_linesw->l_read)(tp, uio, flag);
947 1.1 rearnsha }
948 1.46 skrll
949 1.1 rearnsha int
950 1.1 rearnsha plcomwrite(dev_t dev, struct uio *uio, int flag)
951 1.1 rearnsha {
952 1.28 cegger struct plcom_softc *sc =
953 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
954 1.1 rearnsha struct tty *tp = sc->sc_tty;
955 1.1 rearnsha
956 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
957 1.1 rearnsha return EIO;
958 1.46 skrll
959 1.1 rearnsha return (*tp->t_linesw->l_write)(tp, uio, flag);
960 1.1 rearnsha }
961 1.1 rearnsha
962 1.1 rearnsha int
963 1.12 christos plcompoll(dev_t dev, int events, struct lwp *l)
964 1.1 rearnsha {
965 1.28 cegger struct plcom_softc *sc =
966 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
967 1.1 rearnsha struct tty *tp = sc->sc_tty;
968 1.1 rearnsha
969 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
970 1.1 rearnsha return EIO;
971 1.46 skrll
972 1.12 christos return (*tp->t_linesw->l_poll)(tp, events, l);
973 1.1 rearnsha }
974 1.1 rearnsha
975 1.1 rearnsha struct tty *
976 1.1 rearnsha plcomtty(dev_t dev)
977 1.1 rearnsha {
978 1.28 cegger struct plcom_softc *sc =
979 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
980 1.1 rearnsha struct tty *tp = sc->sc_tty;
981 1.1 rearnsha
982 1.1 rearnsha return tp;
983 1.1 rearnsha }
984 1.1 rearnsha
985 1.1 rearnsha int
986 1.20 christos plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
987 1.1 rearnsha {
988 1.28 cegger struct plcom_softc *sc =
989 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
990 1.40 skrll struct tty *tp;
991 1.1 rearnsha int error;
992 1.1 rearnsha
993 1.40 skrll if (sc == NULL)
994 1.40 skrll return ENXIO;
995 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
996 1.1 rearnsha return EIO;
997 1.1 rearnsha
998 1.40 skrll tp = sc->sc_tty;
999 1.40 skrll
1000 1.12 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
1001 1.3 atatat if (error != EPASSTHROUGH)
1002 1.1 rearnsha return error;
1003 1.1 rearnsha
1004 1.12 christos error = ttioctl(tp, cmd, data, flag, l);
1005 1.3 atatat if (error != EPASSTHROUGH)
1006 1.1 rearnsha return error;
1007 1.1 rearnsha
1008 1.1 rearnsha error = 0;
1009 1.40 skrll switch (cmd) {
1010 1.40 skrll case TIOCSFLAGS:
1011 1.40 skrll error = kauth_authorize_device_tty(l->l_cred,
1012 1.40 skrll KAUTH_DEVICE_TTY_PRIVSET, tp);
1013 1.40 skrll break;
1014 1.40 skrll default:
1015 1.40 skrll /* nothing */
1016 1.40 skrll break;
1017 1.40 skrll }
1018 1.40 skrll if (error) {
1019 1.40 skrll return error;
1020 1.40 skrll }
1021 1.1 rearnsha
1022 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1023 1.1 rearnsha switch (cmd) {
1024 1.1 rearnsha case TIOCSBRK:
1025 1.1 rearnsha plcom_break(sc, 1);
1026 1.1 rearnsha break;
1027 1.1 rearnsha
1028 1.1 rearnsha case TIOCCBRK:
1029 1.1 rearnsha plcom_break(sc, 0);
1030 1.1 rearnsha break;
1031 1.1 rearnsha
1032 1.1 rearnsha case TIOCSDTR:
1033 1.1 rearnsha plcom_modem(sc, 1);
1034 1.1 rearnsha break;
1035 1.1 rearnsha
1036 1.1 rearnsha case TIOCCDTR:
1037 1.1 rearnsha plcom_modem(sc, 0);
1038 1.1 rearnsha break;
1039 1.1 rearnsha
1040 1.1 rearnsha case TIOCGFLAGS:
1041 1.1 rearnsha *(int *)data = sc->sc_swflags;
1042 1.1 rearnsha break;
1043 1.1 rearnsha
1044 1.1 rearnsha case TIOCSFLAGS:
1045 1.1 rearnsha sc->sc_swflags = *(int *)data;
1046 1.1 rearnsha break;
1047 1.1 rearnsha
1048 1.1 rearnsha case TIOCMSET:
1049 1.1 rearnsha case TIOCMBIS:
1050 1.1 rearnsha case TIOCMBIC:
1051 1.1 rearnsha tiocm_to_plcom(sc, cmd, *(int *)data);
1052 1.1 rearnsha break;
1053 1.1 rearnsha
1054 1.1 rearnsha case TIOCMGET:
1055 1.1 rearnsha *(int *)data = plcom_to_tiocm(sc);
1056 1.1 rearnsha break;
1057 1.1 rearnsha
1058 1.1 rearnsha case PPS_IOC_CREATE:
1059 1.1 rearnsha break;
1060 1.1 rearnsha
1061 1.1 rearnsha case PPS_IOC_DESTROY:
1062 1.1 rearnsha break;
1063 1.1 rearnsha
1064 1.1 rearnsha case PPS_IOC_GETPARAMS: {
1065 1.1 rearnsha pps_params_t *pp;
1066 1.1 rearnsha pp = (pps_params_t *)data;
1067 1.26 ad mutex_spin_enter(&timecounter_lock);
1068 1.1 rearnsha *pp = sc->ppsparam;
1069 1.26 ad mutex_spin_exit(&timecounter_lock);
1070 1.1 rearnsha break;
1071 1.1 rearnsha }
1072 1.1 rearnsha
1073 1.1 rearnsha case PPS_IOC_SETPARAMS: {
1074 1.1 rearnsha pps_params_t *pp;
1075 1.1 rearnsha int mode;
1076 1.1 rearnsha pp = (pps_params_t *)data;
1077 1.26 ad mutex_spin_enter(&timecounter_lock);
1078 1.1 rearnsha if (pp->mode & ~ppscap) {
1079 1.1 rearnsha error = EINVAL;
1080 1.26 ad mutex_spin_exit(&timecounter_lock);
1081 1.1 rearnsha break;
1082 1.1 rearnsha }
1083 1.1 rearnsha sc->ppsparam = *pp;
1084 1.46 skrll /*
1085 1.1 rearnsha * Compute msr masks from user-specified timestamp state.
1086 1.1 rearnsha */
1087 1.1 rearnsha mode = sc->ppsparam.mode;
1088 1.1 rearnsha #ifdef PPS_SYNC
1089 1.1 rearnsha if (mode & PPS_HARDPPSONASSERT) {
1090 1.1 rearnsha mode |= PPS_CAPTUREASSERT;
1091 1.1 rearnsha /* XXX revoke any previous HARDPPS source */
1092 1.1 rearnsha }
1093 1.1 rearnsha if (mode & PPS_HARDPPSONCLEAR) {
1094 1.1 rearnsha mode |= PPS_CAPTURECLEAR;
1095 1.1 rearnsha /* XXX revoke any previous HARDPPS source */
1096 1.1 rearnsha }
1097 1.1 rearnsha #endif /* PPS_SYNC */
1098 1.1 rearnsha switch (mode & PPS_CAPTUREBOTH) {
1099 1.1 rearnsha case 0:
1100 1.1 rearnsha sc->sc_ppsmask = 0;
1101 1.1 rearnsha break;
1102 1.46 skrll
1103 1.1 rearnsha case PPS_CAPTUREASSERT:
1104 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1105 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1106 1.1 rearnsha sc->sc_ppsclear = -1;
1107 1.1 rearnsha break;
1108 1.46 skrll
1109 1.1 rearnsha case PPS_CAPTURECLEAR:
1110 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1111 1.1 rearnsha sc->sc_ppsassert = -1;
1112 1.1 rearnsha sc->sc_ppsclear = 0;
1113 1.1 rearnsha break;
1114 1.1 rearnsha
1115 1.1 rearnsha case PPS_CAPTUREBOTH:
1116 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1117 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1118 1.1 rearnsha sc->sc_ppsclear = 0;
1119 1.1 rearnsha break;
1120 1.1 rearnsha
1121 1.1 rearnsha default:
1122 1.1 rearnsha error = EINVAL;
1123 1.1 rearnsha break;
1124 1.1 rearnsha }
1125 1.26 ad mutex_spin_exit(&timecounter_lock);
1126 1.1 rearnsha break;
1127 1.1 rearnsha }
1128 1.1 rearnsha
1129 1.1 rearnsha case PPS_IOC_GETCAP:
1130 1.1 rearnsha *(int*)data = ppscap;
1131 1.1 rearnsha break;
1132 1.1 rearnsha
1133 1.1 rearnsha case PPS_IOC_FETCH: {
1134 1.1 rearnsha pps_info_t *pi;
1135 1.1 rearnsha pi = (pps_info_t *)data;
1136 1.26 ad mutex_spin_enter(&timecounter_lock);
1137 1.1 rearnsha *pi = sc->ppsinfo;
1138 1.26 ad mutex_spin_exit(&timecounter_lock);
1139 1.1 rearnsha break;
1140 1.1 rearnsha }
1141 1.1 rearnsha
1142 1.1 rearnsha case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */
1143 1.1 rearnsha /*
1144 1.1 rearnsha * Some GPS clocks models use the falling rather than
1145 1.46 skrll * rising edge as the on-the-second signal.
1146 1.1 rearnsha * The old API has no way to specify PPS polarity.
1147 1.1 rearnsha */
1148 1.26 ad mutex_spin_enter(&timecounter_lock);
1149 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1150 1.1 rearnsha #ifndef PPS_TRAILING_EDGE
1151 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1152 1.1 rearnsha sc->sc_ppsclear = -1;
1153 1.46 skrll TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1154 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
1155 1.1 rearnsha #else
1156 1.1 rearnsha sc->sc_ppsassert = -1
1157 1.1 rearnsha sc->sc_ppsclear = 0;
1158 1.46 skrll TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1159 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
1160 1.1 rearnsha #endif
1161 1.26 ad mutex_spin_exit(&timecounter_lock);
1162 1.1 rearnsha break;
1163 1.1 rearnsha
1164 1.1 rearnsha default:
1165 1.3 atatat error = EPASSTHROUGH;
1166 1.1 rearnsha break;
1167 1.1 rearnsha }
1168 1.1 rearnsha
1169 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1170 1.1 rearnsha
1171 1.1 rearnsha #ifdef PLCOM_DEBUG
1172 1.1 rearnsha if (plcom_debug)
1173 1.1 rearnsha plcomstatus(sc, "plcomioctl ");
1174 1.1 rearnsha #endif
1175 1.1 rearnsha
1176 1.1 rearnsha return error;
1177 1.1 rearnsha }
1178 1.1 rearnsha
1179 1.1 rearnsha integrate void
1180 1.1 rearnsha plcom_schedrx(struct plcom_softc *sc)
1181 1.1 rearnsha {
1182 1.1 rearnsha
1183 1.1 rearnsha sc->sc_rx_ready = 1;
1184 1.1 rearnsha
1185 1.1 rearnsha /* Wake up the poller. */
1186 1.25 ad softint_schedule(sc->sc_si);
1187 1.1 rearnsha }
1188 1.1 rearnsha
1189 1.1 rearnsha void
1190 1.1 rearnsha plcom_break(struct plcom_softc *sc, int onoff)
1191 1.1 rearnsha {
1192 1.1 rearnsha
1193 1.1 rearnsha if (onoff)
1194 1.35 skrll SET(sc->sc_lcr, PL01X_LCR_BRK);
1195 1.1 rearnsha else
1196 1.35 skrll CLR(sc->sc_lcr, PL01X_LCR_BRK);
1197 1.1 rearnsha
1198 1.1 rearnsha if (!sc->sc_heldchange) {
1199 1.1 rearnsha if (sc->sc_tx_busy) {
1200 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1201 1.1 rearnsha sc->sc_tbc = 0;
1202 1.1 rearnsha sc->sc_heldchange = 1;
1203 1.1 rearnsha } else
1204 1.1 rearnsha plcom_loadchannelregs(sc);
1205 1.1 rearnsha }
1206 1.1 rearnsha }
1207 1.1 rearnsha
1208 1.1 rearnsha void
1209 1.1 rearnsha plcom_modem(struct plcom_softc *sc, int onoff)
1210 1.1 rearnsha {
1211 1.1 rearnsha
1212 1.1 rearnsha if (sc->sc_mcr_dtr == 0)
1213 1.1 rearnsha return;
1214 1.1 rearnsha
1215 1.1 rearnsha if (onoff)
1216 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_dtr);
1217 1.1 rearnsha else
1218 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1219 1.1 rearnsha
1220 1.1 rearnsha if (!sc->sc_heldchange) {
1221 1.1 rearnsha if (sc->sc_tx_busy) {
1222 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1223 1.1 rearnsha sc->sc_tbc = 0;
1224 1.1 rearnsha sc->sc_heldchange = 1;
1225 1.1 rearnsha } else
1226 1.1 rearnsha plcom_loadchannelregs(sc);
1227 1.1 rearnsha }
1228 1.1 rearnsha }
1229 1.1 rearnsha
1230 1.1 rearnsha void
1231 1.1 rearnsha tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits)
1232 1.1 rearnsha {
1233 1.1 rearnsha u_char plcombits;
1234 1.1 rearnsha
1235 1.1 rearnsha plcombits = 0;
1236 1.1 rearnsha if (ISSET(ttybits, TIOCM_DTR))
1237 1.35 skrll SET(plcombits, PL01X_MCR_DTR);
1238 1.1 rearnsha if (ISSET(ttybits, TIOCM_RTS))
1239 1.35 skrll SET(plcombits, PL01X_MCR_RTS);
1240 1.46 skrll
1241 1.1 rearnsha switch (how) {
1242 1.1 rearnsha case TIOCMBIC:
1243 1.1 rearnsha CLR(sc->sc_mcr, plcombits);
1244 1.1 rearnsha break;
1245 1.1 rearnsha
1246 1.1 rearnsha case TIOCMBIS:
1247 1.1 rearnsha SET(sc->sc_mcr, plcombits);
1248 1.1 rearnsha break;
1249 1.1 rearnsha
1250 1.1 rearnsha case TIOCMSET:
1251 1.35 skrll CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
1252 1.1 rearnsha SET(sc->sc_mcr, plcombits);
1253 1.1 rearnsha break;
1254 1.1 rearnsha }
1255 1.1 rearnsha
1256 1.1 rearnsha if (!sc->sc_heldchange) {
1257 1.1 rearnsha if (sc->sc_tx_busy) {
1258 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1259 1.1 rearnsha sc->sc_tbc = 0;
1260 1.1 rearnsha sc->sc_heldchange = 1;
1261 1.1 rearnsha } else
1262 1.1 rearnsha plcom_loadchannelregs(sc);
1263 1.1 rearnsha }
1264 1.1 rearnsha }
1265 1.1 rearnsha
1266 1.1 rearnsha int
1267 1.1 rearnsha plcom_to_tiocm(struct plcom_softc *sc)
1268 1.1 rearnsha {
1269 1.1 rearnsha u_char plcombits;
1270 1.1 rearnsha int ttybits = 0;
1271 1.1 rearnsha
1272 1.1 rearnsha plcombits = sc->sc_mcr;
1273 1.35 skrll if (ISSET(plcombits, PL01X_MCR_DTR))
1274 1.1 rearnsha SET(ttybits, TIOCM_DTR);
1275 1.35 skrll if (ISSET(plcombits, PL01X_MCR_RTS))
1276 1.1 rearnsha SET(ttybits, TIOCM_RTS);
1277 1.1 rearnsha
1278 1.1 rearnsha plcombits = sc->sc_msr;
1279 1.35 skrll if (ISSET(plcombits, PL01X_MSR_DCD))
1280 1.1 rearnsha SET(ttybits, TIOCM_CD);
1281 1.35 skrll if (ISSET(plcombits, PL01X_MSR_CTS))
1282 1.1 rearnsha SET(ttybits, TIOCM_CTS);
1283 1.35 skrll if (ISSET(plcombits, PL01X_MSR_DSR))
1284 1.1 rearnsha SET(ttybits, TIOCM_DSR);
1285 1.40 skrll if (ISSET(plcombits, PL011_MSR_RI))
1286 1.40 skrll SET(ttybits, TIOCM_RI);
1287 1.1 rearnsha
1288 1.1 rearnsha if (sc->sc_cr != 0)
1289 1.1 rearnsha SET(ttybits, TIOCM_LE);
1290 1.1 rearnsha
1291 1.1 rearnsha return ttybits;
1292 1.1 rearnsha }
1293 1.1 rearnsha
1294 1.1 rearnsha static u_char
1295 1.1 rearnsha cflag2lcr(tcflag_t cflag)
1296 1.1 rearnsha {
1297 1.1 rearnsha u_char lcr = 0;
1298 1.1 rearnsha
1299 1.1 rearnsha switch (ISSET(cflag, CSIZE)) {
1300 1.1 rearnsha case CS5:
1301 1.35 skrll SET(lcr, PL01X_LCR_5BITS);
1302 1.1 rearnsha break;
1303 1.1 rearnsha case CS6:
1304 1.35 skrll SET(lcr, PL01X_LCR_6BITS);
1305 1.1 rearnsha break;
1306 1.1 rearnsha case CS7:
1307 1.35 skrll SET(lcr, PL01X_LCR_7BITS);
1308 1.1 rearnsha break;
1309 1.1 rearnsha case CS8:
1310 1.35 skrll SET(lcr, PL01X_LCR_8BITS);
1311 1.1 rearnsha break;
1312 1.1 rearnsha }
1313 1.1 rearnsha if (ISSET(cflag, PARENB)) {
1314 1.35 skrll SET(lcr, PL01X_LCR_PEN);
1315 1.1 rearnsha if (!ISSET(cflag, PARODD))
1316 1.35 skrll SET(lcr, PL01X_LCR_EPS);
1317 1.1 rearnsha }
1318 1.1 rearnsha if (ISSET(cflag, CSTOPB))
1319 1.35 skrll SET(lcr, PL01X_LCR_STP2);
1320 1.1 rearnsha
1321 1.1 rearnsha return lcr;
1322 1.1 rearnsha }
1323 1.1 rearnsha
1324 1.1 rearnsha int
1325 1.1 rearnsha plcomparam(struct tty *tp, struct termios *t)
1326 1.1 rearnsha {
1327 1.28 cegger struct plcom_softc *sc =
1328 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1329 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1330 1.40 skrll int ospeed = -1;
1331 1.1 rearnsha u_char lcr;
1332 1.1 rearnsha
1333 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1334 1.1 rearnsha return EIO;
1335 1.1 rearnsha
1336 1.40 skrll switch (pi->pi_type) {
1337 1.40 skrll case PLCOM_TYPE_PL010:
1338 1.40 skrll ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency);
1339 1.40 skrll break;
1340 1.40 skrll case PLCOM_TYPE_PL011:
1341 1.40 skrll ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency);
1342 1.40 skrll break;
1343 1.40 skrll }
1344 1.1 rearnsha
1345 1.1 rearnsha /* Check requested parameters. */
1346 1.1 rearnsha if (ospeed < 0)
1347 1.1 rearnsha return EINVAL;
1348 1.1 rearnsha if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1349 1.1 rearnsha return EINVAL;
1350 1.1 rearnsha
1351 1.1 rearnsha /*
1352 1.1 rearnsha * For the console, always force CLOCAL and !HUPCL, so that the port
1353 1.1 rearnsha * is always active.
1354 1.1 rearnsha */
1355 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1356 1.1 rearnsha ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
1357 1.1 rearnsha SET(t->c_cflag, CLOCAL);
1358 1.1 rearnsha CLR(t->c_cflag, HUPCL);
1359 1.1 rearnsha }
1360 1.1 rearnsha
1361 1.1 rearnsha /*
1362 1.1 rearnsha * If there were no changes, don't do anything. This avoids dropping
1363 1.1 rearnsha * input and improves performance when all we did was frob things like
1364 1.1 rearnsha * VMIN and VTIME.
1365 1.1 rearnsha */
1366 1.1 rearnsha if (tp->t_ospeed == t->c_ospeed &&
1367 1.1 rearnsha tp->t_cflag == t->c_cflag)
1368 1.1 rearnsha return 0;
1369 1.1 rearnsha
1370 1.35 skrll lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag);
1371 1.1 rearnsha
1372 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1373 1.1 rearnsha
1374 1.1 rearnsha sc->sc_lcr = lcr;
1375 1.1 rearnsha
1376 1.1 rearnsha /*
1377 1.1 rearnsha * PL010 has a fixed-length FIFO trigger point.
1378 1.1 rearnsha */
1379 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO))
1380 1.1 rearnsha sc->sc_fifo = 1;
1381 1.1 rearnsha else
1382 1.1 rearnsha sc->sc_fifo = 0;
1383 1.1 rearnsha
1384 1.1 rearnsha if (sc->sc_fifo)
1385 1.35 skrll SET(sc->sc_lcr, PL01X_LCR_FEN);
1386 1.1 rearnsha
1387 1.1 rearnsha /*
1388 1.1 rearnsha * If we're not in a mode that assumes a connection is present, then
1389 1.1 rearnsha * ignore carrier changes.
1390 1.1 rearnsha */
1391 1.1 rearnsha if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1392 1.1 rearnsha sc->sc_msr_dcd = 0;
1393 1.1 rearnsha else
1394 1.35 skrll sc->sc_msr_dcd = PL01X_MSR_DCD;
1395 1.1 rearnsha /*
1396 1.1 rearnsha * Set the flow control pins depending on the current flow control
1397 1.1 rearnsha * mode.
1398 1.1 rearnsha */
1399 1.1 rearnsha if (ISSET(t->c_cflag, CRTSCTS)) {
1400 1.35 skrll sc->sc_mcr_dtr = PL01X_MCR_DTR;
1401 1.35 skrll sc->sc_mcr_rts = PL01X_MCR_RTS;
1402 1.35 skrll sc->sc_msr_cts = PL01X_MSR_CTS;
1403 1.1 rearnsha } else if (ISSET(t->c_cflag, MDMBUF)) {
1404 1.1 rearnsha /*
1405 1.1 rearnsha * For DTR/DCD flow control, make sure we don't toggle DTR for
1406 1.1 rearnsha * carrier detection.
1407 1.1 rearnsha */
1408 1.1 rearnsha sc->sc_mcr_dtr = 0;
1409 1.35 skrll sc->sc_mcr_rts = PL01X_MCR_DTR;
1410 1.35 skrll sc->sc_msr_cts = PL01X_MSR_DCD;
1411 1.1 rearnsha } else {
1412 1.1 rearnsha /*
1413 1.1 rearnsha * If no flow control, then always set RTS. This will make
1414 1.1 rearnsha * the other side happy if it mistakenly thinks we're doing
1415 1.1 rearnsha * RTS/CTS flow control.
1416 1.1 rearnsha */
1417 1.35 skrll sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS;
1418 1.1 rearnsha sc->sc_mcr_rts = 0;
1419 1.1 rearnsha sc->sc_msr_cts = 0;
1420 1.35 skrll if (ISSET(sc->sc_mcr, PL01X_MCR_DTR))
1421 1.35 skrll SET(sc->sc_mcr, PL01X_MCR_RTS);
1422 1.1 rearnsha else
1423 1.35 skrll CLR(sc->sc_mcr, PL01X_MCR_RTS);
1424 1.1 rearnsha }
1425 1.1 rearnsha sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1426 1.1 rearnsha
1427 1.1 rearnsha #if 0
1428 1.1 rearnsha if (ospeed == 0)
1429 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1430 1.1 rearnsha else
1431 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_dtr);
1432 1.1 rearnsha #endif
1433 1.1 rearnsha
1434 1.40 skrll switch (pi->pi_type) {
1435 1.40 skrll case PLCOM_TYPE_PL010:
1436 1.40 skrll sc->sc_ratel = ospeed & 0xff;
1437 1.40 skrll sc->sc_rateh = (ospeed >> 8) & 0xff;
1438 1.40 skrll break;
1439 1.40 skrll case PLCOM_TYPE_PL011:
1440 1.40 skrll sc->sc_ratel = ospeed & ((1 << 6) - 1);
1441 1.40 skrll sc->sc_rateh = ospeed >> 6;
1442 1.40 skrll break;
1443 1.40 skrll }
1444 1.1 rearnsha
1445 1.1 rearnsha /* And copy to tty. */
1446 1.40 skrll tp->t_ispeed = t->c_ospeed;
1447 1.1 rearnsha tp->t_ospeed = t->c_ospeed;
1448 1.1 rearnsha tp->t_cflag = t->c_cflag;
1449 1.1 rearnsha
1450 1.1 rearnsha if (!sc->sc_heldchange) {
1451 1.1 rearnsha if (sc->sc_tx_busy) {
1452 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1453 1.1 rearnsha sc->sc_tbc = 0;
1454 1.1 rearnsha sc->sc_heldchange = 1;
1455 1.1 rearnsha } else
1456 1.1 rearnsha plcom_loadchannelregs(sc);
1457 1.1 rearnsha }
1458 1.1 rearnsha
1459 1.1 rearnsha if (!ISSET(t->c_cflag, CHWFLOW)) {
1460 1.1 rearnsha /* Disable the high water mark. */
1461 1.1 rearnsha sc->sc_r_hiwat = 0;
1462 1.1 rearnsha sc->sc_r_lowat = 0;
1463 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1464 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1465 1.1 rearnsha plcom_schedrx(sc);
1466 1.1 rearnsha }
1467 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1468 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1469 1.1 rearnsha plcom_hwiflow(sc);
1470 1.1 rearnsha }
1471 1.1 rearnsha } else {
1472 1.1 rearnsha sc->sc_r_hiwat = plcom_rbuf_hiwat;
1473 1.1 rearnsha sc->sc_r_lowat = plcom_rbuf_lowat;
1474 1.1 rearnsha }
1475 1.1 rearnsha
1476 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1477 1.1 rearnsha
1478 1.1 rearnsha /*
1479 1.1 rearnsha * Update the tty layer's idea of the carrier bit, in case we changed
1480 1.1 rearnsha * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1481 1.1 rearnsha * explicit request.
1482 1.1 rearnsha */
1483 1.35 skrll (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD));
1484 1.1 rearnsha
1485 1.1 rearnsha #ifdef PLCOM_DEBUG
1486 1.1 rearnsha if (plcom_debug)
1487 1.1 rearnsha plcomstatus(sc, "plcomparam ");
1488 1.1 rearnsha #endif
1489 1.1 rearnsha
1490 1.1 rearnsha if (!ISSET(t->c_cflag, CHWFLOW)) {
1491 1.1 rearnsha if (sc->sc_tx_stopped) {
1492 1.1 rearnsha sc->sc_tx_stopped = 0;
1493 1.1 rearnsha plcomstart(tp);
1494 1.1 rearnsha }
1495 1.1 rearnsha }
1496 1.1 rearnsha
1497 1.1 rearnsha return 0;
1498 1.1 rearnsha }
1499 1.1 rearnsha
1500 1.1 rearnsha void
1501 1.1 rearnsha plcom_iflush(struct plcom_softc *sc)
1502 1.1 rearnsha {
1503 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1504 1.1 rearnsha #ifdef DIAGNOSTIC
1505 1.1 rearnsha int reg;
1506 1.1 rearnsha #endif
1507 1.1 rearnsha int timo;
1508 1.1 rearnsha
1509 1.1 rearnsha #ifdef DIAGNOSTIC
1510 1.1 rearnsha reg = 0xffff;
1511 1.1 rearnsha #endif
1512 1.1 rearnsha timo = 50000;
1513 1.1 rearnsha /* flush any pending I/O */
1514 1.40 skrll while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)
1515 1.1 rearnsha && --timo)
1516 1.1 rearnsha #ifdef DIAGNOSTIC
1517 1.1 rearnsha reg =
1518 1.1 rearnsha #else
1519 1.1 rearnsha (void)
1520 1.1 rearnsha #endif
1521 1.40 skrll PREAD1(pi, PL01XCOM_DR);
1522 1.1 rearnsha #ifdef DIAGNOSTIC
1523 1.1 rearnsha if (!timo)
1524 1.40 skrll aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__,
1525 1.40 skrll reg);
1526 1.1 rearnsha #endif
1527 1.1 rearnsha }
1528 1.1 rearnsha
1529 1.1 rearnsha void
1530 1.1 rearnsha plcom_loadchannelregs(struct plcom_softc *sc)
1531 1.1 rearnsha {
1532 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1533 1.1 rearnsha
1534 1.1 rearnsha /* XXXXX necessary? */
1535 1.1 rearnsha plcom_iflush(sc);
1536 1.1 rearnsha
1537 1.40 skrll switch (pi->pi_type) {
1538 1.40 skrll case PLCOM_TYPE_PL010:
1539 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
1540 1.40 skrll PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel);
1541 1.40 skrll PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh);
1542 1.40 skrll PWRITE1(pi, PL010COM_LCR, sc->sc_lcr);
1543 1.40 skrll
1544 1.40 skrll /* XXX device_unit() abuse */
1545 1.40 skrll if (sc->sc_set_mcr)
1546 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
1547 1.40 skrll device_unit(sc->sc_dev),
1548 1.40 skrll sc->sc_mcr_active = sc->sc_mcr);
1549 1.40 skrll
1550 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1551 1.40 skrll break;
1552 1.40 skrll
1553 1.40 skrll case PLCOM_TYPE_PL011:
1554 1.40 skrll PWRITE4(pi, PL011COM_CR, 0);
1555 1.40 skrll PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel);
1556 1.40 skrll PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh);
1557 1.40 skrll PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr);
1558 1.40 skrll sc->sc_mcr_active = sc->sc_mcr;
1559 1.40 skrll CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR));
1560 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active));
1561 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
1562 1.40 skrll break;
1563 1.40 skrll }
1564 1.1 rearnsha }
1565 1.1 rearnsha
1566 1.1 rearnsha int
1567 1.1 rearnsha plcomhwiflow(struct tty *tp, int block)
1568 1.1 rearnsha {
1569 1.28 cegger struct plcom_softc *sc =
1570 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1571 1.1 rearnsha
1572 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1573 1.1 rearnsha return 0;
1574 1.1 rearnsha
1575 1.1 rearnsha if (sc->sc_mcr_rts == 0)
1576 1.1 rearnsha return 0;
1577 1.1 rearnsha
1578 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1579 1.46 skrll
1580 1.1 rearnsha if (block) {
1581 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1582 1.1 rearnsha SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1583 1.1 rearnsha plcom_hwiflow(sc);
1584 1.1 rearnsha }
1585 1.1 rearnsha } else {
1586 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1587 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1588 1.1 rearnsha plcom_schedrx(sc);
1589 1.1 rearnsha }
1590 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1591 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1592 1.1 rearnsha plcom_hwiflow(sc);
1593 1.1 rearnsha }
1594 1.1 rearnsha }
1595 1.1 rearnsha
1596 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1597 1.1 rearnsha return 1;
1598 1.1 rearnsha }
1599 1.46 skrll
1600 1.1 rearnsha /*
1601 1.1 rearnsha * (un)block input via hw flowcontrol
1602 1.1 rearnsha */
1603 1.1 rearnsha void
1604 1.1 rearnsha plcom_hwiflow(struct plcom_softc *sc)
1605 1.1 rearnsha {
1606 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1607 1.40 skrll
1608 1.1 rearnsha if (sc->sc_mcr_rts == 0)
1609 1.1 rearnsha return;
1610 1.1 rearnsha
1611 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1612 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_rts);
1613 1.1 rearnsha CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1614 1.1 rearnsha } else {
1615 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_rts);
1616 1.1 rearnsha SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1617 1.1 rearnsha }
1618 1.40 skrll switch (pi->pi_type) {
1619 1.40 skrll case PLCOM_TYPE_PL010:
1620 1.40 skrll if (sc->sc_set_mcr)
1621 1.40 skrll /* XXX device_unit() abuse */
1622 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
1623 1.40 skrll device_unit(sc->sc_dev), sc->sc_mcr_active);
1624 1.40 skrll break;
1625 1.40 skrll case PLCOM_TYPE_PL011:
1626 1.40 skrll CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR));
1627 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active));
1628 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
1629 1.40 skrll break;
1630 1.40 skrll }
1631 1.1 rearnsha }
1632 1.1 rearnsha
1633 1.1 rearnsha
1634 1.1 rearnsha void
1635 1.1 rearnsha plcomstart(struct tty *tp)
1636 1.1 rearnsha {
1637 1.28 cegger struct plcom_softc *sc =
1638 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1639 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1640 1.1 rearnsha int s;
1641 1.1 rearnsha
1642 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1643 1.1 rearnsha return;
1644 1.1 rearnsha
1645 1.1 rearnsha s = spltty();
1646 1.1 rearnsha if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1647 1.1 rearnsha goto out;
1648 1.1 rearnsha if (sc->sc_tx_stopped)
1649 1.1 rearnsha goto out;
1650 1.1 rearnsha
1651 1.24 ad if (!ttypull(tp))
1652 1.24 ad goto out;
1653 1.1 rearnsha
1654 1.1 rearnsha /* Grab the first contiguous region of buffer space. */
1655 1.1 rearnsha {
1656 1.1 rearnsha u_char *tba;
1657 1.1 rearnsha int tbc;
1658 1.1 rearnsha
1659 1.1 rearnsha tba = tp->t_outq.c_cf;
1660 1.1 rearnsha tbc = ndqb(&tp->t_outq, 0);
1661 1.1 rearnsha
1662 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1663 1.1 rearnsha
1664 1.1 rearnsha sc->sc_tba = tba;
1665 1.1 rearnsha sc->sc_tbc = tbc;
1666 1.1 rearnsha }
1667 1.1 rearnsha
1668 1.1 rearnsha SET(tp->t_state, TS_BUSY);
1669 1.1 rearnsha sc->sc_tx_busy = 1;
1670 1.1 rearnsha
1671 1.1 rearnsha /* Enable transmit completion interrupts if necessary. */
1672 1.40 skrll switch (pi->pi_type) {
1673 1.40 skrll case PLCOM_TYPE_PL010:
1674 1.40 skrll if (!ISSET(sc->sc_cr, PL010_CR_TIE)) {
1675 1.40 skrll SET(sc->sc_cr, PL010_CR_TIE);
1676 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1677 1.40 skrll }
1678 1.40 skrll break;
1679 1.40 skrll case PLCOM_TYPE_PL011:
1680 1.40 skrll if (!ISSET(sc->sc_imsc, PL011_INT_TX)) {
1681 1.40 skrll SET(sc->sc_imsc, PL011_INT_TX);
1682 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
1683 1.40 skrll }
1684 1.40 skrll break;
1685 1.1 rearnsha }
1686 1.1 rearnsha
1687 1.1 rearnsha /* Output the first chunk of the contiguous buffer. */
1688 1.1 rearnsha {
1689 1.42 skrll int n;
1690 1.1 rearnsha
1691 1.1 rearnsha n = sc->sc_tbc;
1692 1.42 skrll if (n > sc->sc_fifolen)
1693 1.42 skrll n = sc->sc_fifolen;
1694 1.40 skrll PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n);
1695 1.1 rearnsha sc->sc_tbc -= n;
1696 1.1 rearnsha sc->sc_tba += n;
1697 1.1 rearnsha }
1698 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1699 1.1 rearnsha out:
1700 1.1 rearnsha splx(s);
1701 1.1 rearnsha return;
1702 1.1 rearnsha }
1703 1.1 rearnsha
1704 1.1 rearnsha /*
1705 1.1 rearnsha * Stop output on a line.
1706 1.1 rearnsha */
1707 1.1 rearnsha void
1708 1.1 rearnsha plcomstop(struct tty *tp, int flag)
1709 1.1 rearnsha {
1710 1.28 cegger struct plcom_softc *sc =
1711 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1712 1.1 rearnsha
1713 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1714 1.1 rearnsha if (ISSET(tp->t_state, TS_BUSY)) {
1715 1.1 rearnsha /* Stop transmitting at the next chunk. */
1716 1.1 rearnsha sc->sc_tbc = 0;
1717 1.1 rearnsha sc->sc_heldtbc = 0;
1718 1.1 rearnsha if (!ISSET(tp->t_state, TS_TTSTOP))
1719 1.1 rearnsha SET(tp->t_state, TS_FLUSH);
1720 1.1 rearnsha }
1721 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1722 1.1 rearnsha }
1723 1.1 rearnsha
1724 1.1 rearnsha void
1725 1.1 rearnsha plcomdiag(void *arg)
1726 1.1 rearnsha {
1727 1.1 rearnsha struct plcom_softc *sc = arg;
1728 1.1 rearnsha int overflows, floods;
1729 1.1 rearnsha
1730 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1731 1.1 rearnsha overflows = sc->sc_overflows;
1732 1.1 rearnsha sc->sc_overflows = 0;
1733 1.1 rearnsha floods = sc->sc_floods;
1734 1.1 rearnsha sc->sc_floods = 0;
1735 1.1 rearnsha sc->sc_errors = 0;
1736 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1737 1.1 rearnsha
1738 1.1 rearnsha log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1739 1.38 skrll device_xname(sc->sc_dev),
1740 1.1 rearnsha overflows, overflows == 1 ? "" : "s",
1741 1.1 rearnsha floods, floods == 1 ? "" : "s");
1742 1.1 rearnsha }
1743 1.1 rearnsha
1744 1.1 rearnsha integrate void
1745 1.1 rearnsha plcom_rxsoft(struct plcom_softc *sc, struct tty *tp)
1746 1.1 rearnsha {
1747 1.1 rearnsha int (*rint) (int, struct tty *) = tp->t_linesw->l_rint;
1748 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1749 1.1 rearnsha u_char *get, *end;
1750 1.1 rearnsha u_int cc, scc;
1751 1.1 rearnsha u_char rsr;
1752 1.1 rearnsha int code;
1753 1.1 rearnsha
1754 1.1 rearnsha end = sc->sc_ebuf;
1755 1.1 rearnsha get = sc->sc_rbget;
1756 1.1 rearnsha scc = cc = plcom_rbuf_size - sc->sc_rbavail;
1757 1.1 rearnsha
1758 1.1 rearnsha if (cc == plcom_rbuf_size) {
1759 1.1 rearnsha sc->sc_floods++;
1760 1.1 rearnsha if (sc->sc_errors++ == 0)
1761 1.1 rearnsha callout_reset(&sc->sc_diag_callout, 60 * hz,
1762 1.1 rearnsha plcomdiag, sc);
1763 1.1 rearnsha }
1764 1.1 rearnsha
1765 1.1 rearnsha while (cc) {
1766 1.1 rearnsha code = get[0];
1767 1.1 rearnsha rsr = get[1];
1768 1.35 skrll if (ISSET(rsr, PL01X_RSR_ERROR)) {
1769 1.35 skrll if (ISSET(rsr, PL01X_RSR_OE)) {
1770 1.1 rearnsha sc->sc_overflows++;
1771 1.1 rearnsha if (sc->sc_errors++ == 0)
1772 1.1 rearnsha callout_reset(&sc->sc_diag_callout,
1773 1.1 rearnsha 60 * hz, plcomdiag, sc);
1774 1.1 rearnsha }
1775 1.35 skrll if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE))
1776 1.1 rearnsha SET(code, TTY_FE);
1777 1.35 skrll if (ISSET(rsr, PL01X_RSR_PE))
1778 1.1 rearnsha SET(code, TTY_PE);
1779 1.1 rearnsha }
1780 1.1 rearnsha if ((*rint)(code, tp) == -1) {
1781 1.1 rearnsha /*
1782 1.1 rearnsha * The line discipline's buffer is out of space.
1783 1.1 rearnsha */
1784 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1785 1.1 rearnsha /*
1786 1.1 rearnsha * We're either not using flow control, or the
1787 1.1 rearnsha * line discipline didn't tell us to block for
1788 1.1 rearnsha * some reason. Either way, we have no way to
1789 1.1 rearnsha * know when there's more space available, so
1790 1.1 rearnsha * just drop the rest of the data.
1791 1.1 rearnsha */
1792 1.1 rearnsha get += cc << 1;
1793 1.1 rearnsha if (get >= end)
1794 1.1 rearnsha get -= plcom_rbuf_size << 1;
1795 1.1 rearnsha cc = 0;
1796 1.1 rearnsha } else {
1797 1.1 rearnsha /*
1798 1.1 rearnsha * Don't schedule any more receive processing
1799 1.1 rearnsha * until the line discipline tells us there's
1800 1.1 rearnsha * space available (through plcomhwiflow()).
1801 1.1 rearnsha * Leave the rest of the data in the input
1802 1.1 rearnsha * buffer.
1803 1.1 rearnsha */
1804 1.1 rearnsha SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1805 1.1 rearnsha }
1806 1.1 rearnsha break;
1807 1.1 rearnsha }
1808 1.1 rearnsha get += 2;
1809 1.1 rearnsha if (get >= end)
1810 1.1 rearnsha get = sc->sc_rbuf;
1811 1.1 rearnsha cc--;
1812 1.1 rearnsha }
1813 1.1 rearnsha
1814 1.1 rearnsha if (cc != scc) {
1815 1.1 rearnsha sc->sc_rbget = get;
1816 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1817 1.36 skrll
1818 1.1 rearnsha cc = sc->sc_rbavail += scc - cc;
1819 1.1 rearnsha /* Buffers should be ok again, release possible block. */
1820 1.1 rearnsha if (cc >= sc->sc_r_lowat) {
1821 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1822 1.1 rearnsha CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1823 1.40 skrll switch (pi->pi_type) {
1824 1.40 skrll case PLCOM_TYPE_PL010:
1825 1.40 skrll SET(sc->sc_cr,
1826 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE);
1827 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1828 1.40 skrll break;
1829 1.40 skrll case PLCOM_TYPE_PL011:
1830 1.40 skrll SET(sc->sc_imsc,
1831 1.40 skrll PL011_INT_RX | PL011_INT_RT);
1832 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
1833 1.40 skrll break;
1834 1.40 skrll }
1835 1.1 rearnsha }
1836 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1837 1.1 rearnsha CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1838 1.1 rearnsha plcom_hwiflow(sc);
1839 1.1 rearnsha }
1840 1.1 rearnsha }
1841 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1842 1.1 rearnsha }
1843 1.1 rearnsha }
1844 1.1 rearnsha
1845 1.1 rearnsha integrate void
1846 1.1 rearnsha plcom_txsoft(struct plcom_softc *sc, struct tty *tp)
1847 1.1 rearnsha {
1848 1.1 rearnsha
1849 1.1 rearnsha CLR(tp->t_state, TS_BUSY);
1850 1.1 rearnsha if (ISSET(tp->t_state, TS_FLUSH))
1851 1.1 rearnsha CLR(tp->t_state, TS_FLUSH);
1852 1.1 rearnsha else
1853 1.1 rearnsha ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1854 1.1 rearnsha (*tp->t_linesw->l_start)(tp);
1855 1.1 rearnsha }
1856 1.1 rearnsha
1857 1.1 rearnsha integrate void
1858 1.1 rearnsha plcom_stsoft(struct plcom_softc *sc, struct tty *tp)
1859 1.1 rearnsha {
1860 1.1 rearnsha u_char msr, delta;
1861 1.1 rearnsha
1862 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1863 1.1 rearnsha msr = sc->sc_msr;
1864 1.1 rearnsha delta = sc->sc_msr_delta;
1865 1.1 rearnsha sc->sc_msr_delta = 0;
1866 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1867 1.1 rearnsha
1868 1.1 rearnsha if (ISSET(delta, sc->sc_msr_dcd)) {
1869 1.1 rearnsha /*
1870 1.1 rearnsha * Inform the tty layer that carrier detect changed.
1871 1.1 rearnsha */
1872 1.35 skrll (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD));
1873 1.1 rearnsha }
1874 1.1 rearnsha
1875 1.1 rearnsha if (ISSET(delta, sc->sc_msr_cts)) {
1876 1.1 rearnsha /* Block or unblock output according to flow control. */
1877 1.1 rearnsha if (ISSET(msr, sc->sc_msr_cts)) {
1878 1.1 rearnsha sc->sc_tx_stopped = 0;
1879 1.1 rearnsha (*tp->t_linesw->l_start)(tp);
1880 1.1 rearnsha } else {
1881 1.1 rearnsha sc->sc_tx_stopped = 1;
1882 1.1 rearnsha }
1883 1.1 rearnsha }
1884 1.1 rearnsha
1885 1.1 rearnsha #ifdef PLCOM_DEBUG
1886 1.1 rearnsha if (plcom_debug)
1887 1.1 rearnsha plcomstatus(sc, "plcom_stsoft");
1888 1.1 rearnsha #endif
1889 1.1 rearnsha }
1890 1.1 rearnsha
1891 1.1 rearnsha void
1892 1.1 rearnsha plcomsoft(void *arg)
1893 1.1 rearnsha {
1894 1.1 rearnsha struct plcom_softc *sc = arg;
1895 1.1 rearnsha struct tty *tp;
1896 1.1 rearnsha
1897 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1898 1.1 rearnsha return;
1899 1.1 rearnsha
1900 1.21 ad tp = sc->sc_tty;
1901 1.46 skrll
1902 1.21 ad if (sc->sc_rx_ready) {
1903 1.21 ad sc->sc_rx_ready = 0;
1904 1.21 ad plcom_rxsoft(sc, tp);
1905 1.21 ad }
1906 1.1 rearnsha
1907 1.21 ad if (sc->sc_st_check) {
1908 1.21 ad sc->sc_st_check = 0;
1909 1.21 ad plcom_stsoft(sc, tp);
1910 1.21 ad }
1911 1.1 rearnsha
1912 1.21 ad if (sc->sc_tx_done) {
1913 1.21 ad sc->sc_tx_done = 0;
1914 1.21 ad plcom_txsoft(sc, tp);
1915 1.1 rearnsha }
1916 1.1 rearnsha }
1917 1.1 rearnsha
1918 1.40 skrll bool
1919 1.40 skrll plcom_intstatus(struct plcom_instance *pi, u_int *istatus)
1920 1.40 skrll {
1921 1.40 skrll bool ret = false;
1922 1.40 skrll u_int stat = 0;
1923 1.40 skrll
1924 1.40 skrll switch (pi->pi_type) {
1925 1.40 skrll case PLCOM_TYPE_PL010:
1926 1.40 skrll stat = PREAD1(pi, PL010COM_IIR);
1927 1.40 skrll ret = ISSET(stat, PL010_IIR_IMASK);
1928 1.40 skrll break;
1929 1.40 skrll case PLCOM_TYPE_PL011:
1930 1.40 skrll stat = PREAD4(pi, PL011COM_MIS);
1931 1.40 skrll ret = ISSET(stat, PL011_INT_ALLMASK);
1932 1.40 skrll break;
1933 1.40 skrll }
1934 1.40 skrll *istatus = stat;
1935 1.40 skrll
1936 1.40 skrll return ret;
1937 1.46 skrll }
1938 1.40 skrll
1939 1.1 rearnsha int
1940 1.1 rearnsha plcomintr(void *arg)
1941 1.1 rearnsha {
1942 1.1 rearnsha struct plcom_softc *sc = arg;
1943 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1944 1.1 rearnsha u_char *put, *end;
1945 1.1 rearnsha u_int cc;
1946 1.40 skrll u_int istatus = 0;
1947 1.40 skrll u_char rsr;
1948 1.40 skrll bool intr = false;
1949 1.40 skrll
1950 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
1951 1.1 rearnsha
1952 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1953 1.1 rearnsha return 0;
1954 1.1 rearnsha
1955 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1956 1.40 skrll intr = plcom_intstatus(pi, &istatus);
1957 1.40 skrll if (!intr) {
1958 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1959 1.1 rearnsha return 0;
1960 1.1 rearnsha }
1961 1.1 rearnsha
1962 1.1 rearnsha end = sc->sc_ebuf;
1963 1.1 rearnsha put = sc->sc_rbput;
1964 1.1 rearnsha cc = sc->sc_rbavail;
1965 1.1 rearnsha
1966 1.1 rearnsha do {
1967 1.40 skrll u_int msr = 0, delta, fr;
1968 1.40 skrll bool rxintr = false, txintr = false, msintr;
1969 1.1 rearnsha
1970 1.40 skrll /* don't need RI here*/
1971 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
1972 1.1 rearnsha
1973 1.35 skrll if (!ISSET(fr, PL01X_FR_RXFE) &&
1974 1.1 rearnsha !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1975 1.1 rearnsha while (cc > 0) {
1976 1.1 rearnsha int cn_trapped = 0;
1977 1.40 skrll put[0] = PREAD1(pi, PL01XCOM_DR);
1978 1.40 skrll rsr = PREAD1(pi, PL01XCOM_RSR);
1979 1.1 rearnsha /* Clear any error status. */
1980 1.35 skrll if (ISSET(rsr, PL01X_RSR_ERROR))
1981 1.40 skrll PWRITE1(pi, PL01XCOM_ECR, 0);
1982 1.35 skrll if (ISSET(rsr, PL01X_RSR_BE)) {
1983 1.10 rearnsha cn_trapped = 0;
1984 1.1 rearnsha cn_check_magic(sc->sc_tty->t_dev,
1985 1.1 rearnsha CNC_BREAK, plcom_cnm_state);
1986 1.1 rearnsha if (cn_trapped)
1987 1.1 rearnsha continue;
1988 1.1 rearnsha #if defined(KGDB)
1989 1.1 rearnsha if (ISSET(sc->sc_hwflags,
1990 1.1 rearnsha PLCOM_HW_KGDB)) {
1991 1.1 rearnsha kgdb_connect(1);
1992 1.1 rearnsha continue;
1993 1.1 rearnsha }
1994 1.1 rearnsha #endif
1995 1.1 rearnsha }
1996 1.1 rearnsha
1997 1.1 rearnsha put[1] = rsr;
1998 1.10 rearnsha cn_trapped = 0;
1999 1.40 skrll cn_check_magic(sc->sc_tty->t_dev, put[0],
2000 1.40 skrll plcom_cnm_state);
2001 1.1 rearnsha if (cn_trapped) {
2002 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2003 1.35 skrll if (ISSET(fr, PL01X_FR_RXFE))
2004 1.1 rearnsha break;
2005 1.1 rearnsha
2006 1.1 rearnsha continue;
2007 1.1 rearnsha }
2008 1.1 rearnsha put += 2;
2009 1.1 rearnsha if (put >= end)
2010 1.1 rearnsha put = sc->sc_rbuf;
2011 1.1 rearnsha cc--;
2012 1.1 rearnsha
2013 1.40 skrll /* don't need RI here*/
2014 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2015 1.35 skrll if (ISSET(fr, PL01X_FR_RXFE))
2016 1.1 rearnsha break;
2017 1.1 rearnsha }
2018 1.1 rearnsha
2019 1.1 rearnsha /*
2020 1.1 rearnsha * Current string of incoming characters ended because
2021 1.1 rearnsha * no more data was available or we ran out of space.
2022 1.1 rearnsha * Schedule a receive event if any data was received.
2023 1.1 rearnsha * If we're out of space, turn off receive interrupts.
2024 1.1 rearnsha */
2025 1.1 rearnsha sc->sc_rbput = put;
2026 1.1 rearnsha sc->sc_rbavail = cc;
2027 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
2028 1.1 rearnsha sc->sc_rx_ready = 1;
2029 1.1 rearnsha
2030 1.1 rearnsha /*
2031 1.1 rearnsha * See if we are in danger of overflowing a buffer. If
2032 1.1 rearnsha * so, use hardware flow control to ease the pressure.
2033 1.1 rearnsha */
2034 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
2035 1.1 rearnsha cc < sc->sc_r_hiwat) {
2036 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
2037 1.1 rearnsha plcom_hwiflow(sc);
2038 1.1 rearnsha }
2039 1.1 rearnsha
2040 1.1 rearnsha /*
2041 1.1 rearnsha * If we're out of space, disable receive interrupts
2042 1.1 rearnsha * until the queue has drained a bit.
2043 1.1 rearnsha */
2044 1.1 rearnsha if (!cc) {
2045 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
2046 1.40 skrll switch (pi->pi_type) {
2047 1.40 skrll case PLCOM_TYPE_PL010:
2048 1.40 skrll CLR(sc->sc_cr,
2049 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE);
2050 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
2051 1.40 skrll break;
2052 1.40 skrll case PLCOM_TYPE_PL011:
2053 1.40 skrll CLR(sc->sc_imsc,
2054 1.40 skrll PL011_INT_RT | PL011_INT_RX);
2055 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
2056 1.40 skrll break;
2057 1.40 skrll }
2058 1.1 rearnsha }
2059 1.1 rearnsha } else {
2060 1.40 skrll switch (pi->pi_type) {
2061 1.40 skrll case PLCOM_TYPE_PL010:
2062 1.40 skrll rxintr = ISSET(istatus, PL010_IIR_RIS);
2063 1.40 skrll if (rxintr) {
2064 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
2065 1.40 skrll delay(10);
2066 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
2067 1.40 skrll continue;
2068 1.40 skrll }
2069 1.40 skrll break;
2070 1.40 skrll case PLCOM_TYPE_PL011:
2071 1.40 skrll rxintr = ISSET(istatus, PL011_INT_RX);
2072 1.40 skrll if (rxintr) {
2073 1.40 skrll PWRITE4(pi, PL011COM_CR, 0);
2074 1.40 skrll delay(10);
2075 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
2076 1.40 skrll continue;
2077 1.40 skrll }
2078 1.40 skrll break;
2079 1.1 rearnsha }
2080 1.1 rearnsha }
2081 1.1 rearnsha
2082 1.40 skrll switch (pi->pi_type) {
2083 1.40 skrll case PLCOM_TYPE_PL010:
2084 1.40 skrll msr = PREAD1(pi, PL01XCOM_FR);
2085 1.40 skrll break;
2086 1.40 skrll case PLCOM_TYPE_PL011:
2087 1.40 skrll msr = PREAD4(pi, PL01XCOM_FR);
2088 1.40 skrll break;
2089 1.40 skrll }
2090 1.1 rearnsha delta = msr ^ sc->sc_msr;
2091 1.1 rearnsha sc->sc_msr = msr;
2092 1.40 skrll
2093 1.1 rearnsha /* Clear any pending modem status interrupt. */
2094 1.40 skrll switch (pi->pi_type) {
2095 1.40 skrll case PLCOM_TYPE_PL010:
2096 1.40 skrll msintr = ISSET(istatus, PL010_IIR_MIS);
2097 1.40 skrll if (msintr) {
2098 1.40 skrll PWRITE1(pi, PL010COM_ICR, 0);
2099 1.40 skrll }
2100 1.40 skrll break;
2101 1.40 skrll case PLCOM_TYPE_PL011:
2102 1.40 skrll msintr = ISSET(istatus, PL011_INT_MSMASK);
2103 1.40 skrll if (msintr) {
2104 1.40 skrll PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK);
2105 1.40 skrll }
2106 1.40 skrll break;
2107 1.40 skrll }
2108 1.1 rearnsha /*
2109 1.1 rearnsha * Pulse-per-second (PSS) signals on edge of DCD?
2110 1.1 rearnsha * Process these even if line discipline is ignoring DCD.
2111 1.1 rearnsha */
2112 1.1 rearnsha if (delta & sc->sc_ppsmask) {
2113 1.1 rearnsha struct timeval tv;
2114 1.26 ad mutex_spin_enter(&timecounter_lock);
2115 1.1 rearnsha if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) {
2116 1.1 rearnsha /* XXX nanotime() */
2117 1.1 rearnsha microtime(&tv);
2118 1.46 skrll TIMEVAL_TO_TIMESPEC(&tv,
2119 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
2120 1.1 rearnsha if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
2121 1.1 rearnsha timespecadd(&sc->ppsinfo.assert_timestamp,
2122 1.1 rearnsha &sc->ppsparam.assert_offset,
2123 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
2124 1.1 rearnsha }
2125 1.1 rearnsha
2126 1.1 rearnsha #ifdef PPS_SYNC
2127 1.1 rearnsha if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
2128 1.1 rearnsha hardpps(&tv, tv.tv_usec);
2129 1.1 rearnsha #endif
2130 1.1 rearnsha sc->ppsinfo.assert_sequence++;
2131 1.1 rearnsha sc->ppsinfo.current_mode = sc->ppsparam.mode;
2132 1.1 rearnsha
2133 1.1 rearnsha } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) {
2134 1.1 rearnsha /* XXX nanotime() */
2135 1.1 rearnsha microtime(&tv);
2136 1.46 skrll TIMEVAL_TO_TIMESPEC(&tv,
2137 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
2138 1.1 rearnsha if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
2139 1.1 rearnsha timespecadd(&sc->ppsinfo.clear_timestamp,
2140 1.1 rearnsha &sc->ppsparam.clear_offset,
2141 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
2142 1.1 rearnsha }
2143 1.1 rearnsha
2144 1.1 rearnsha #ifdef PPS_SYNC
2145 1.1 rearnsha if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
2146 1.1 rearnsha hardpps(&tv, tv.tv_usec);
2147 1.1 rearnsha #endif
2148 1.1 rearnsha sc->ppsinfo.clear_sequence++;
2149 1.1 rearnsha sc->ppsinfo.current_mode = sc->ppsparam.mode;
2150 1.1 rearnsha }
2151 1.26 ad mutex_spin_exit(&timecounter_lock);
2152 1.1 rearnsha }
2153 1.1 rearnsha
2154 1.1 rearnsha /*
2155 1.1 rearnsha * Process normal status changes
2156 1.1 rearnsha */
2157 1.1 rearnsha if (ISSET(delta, sc->sc_msr_mask)) {
2158 1.1 rearnsha SET(sc->sc_msr_delta, delta);
2159 1.1 rearnsha
2160 1.1 rearnsha /*
2161 1.1 rearnsha * Stop output immediately if we lose the output
2162 1.1 rearnsha * flow control signal or carrier detect.
2163 1.1 rearnsha */
2164 1.1 rearnsha if (ISSET(~msr, sc->sc_msr_mask)) {
2165 1.1 rearnsha sc->sc_tbc = 0;
2166 1.1 rearnsha sc->sc_heldtbc = 0;
2167 1.1 rearnsha #ifdef PLCOM_DEBUG
2168 1.1 rearnsha if (plcom_debug)
2169 1.1 rearnsha plcomstatus(sc, "plcomintr ");
2170 1.1 rearnsha #endif
2171 1.1 rearnsha }
2172 1.1 rearnsha
2173 1.1 rearnsha sc->sc_st_check = 1;
2174 1.1 rearnsha }
2175 1.1 rearnsha
2176 1.46 skrll /*
2177 1.1 rearnsha * Done handling any receive interrupts. See if data
2178 1.40 skrll * can be transmitted as well. Schedule tx done
2179 1.40 skrll * event if no data left and tty was marked busy.
2180 1.1 rearnsha */
2181 1.46 skrll
2182 1.40 skrll switch (pi->pi_type) {
2183 1.40 skrll case PLCOM_TYPE_PL010:
2184 1.40 skrll txintr = ISSET(istatus, PL010_IIR_TIS);
2185 1.40 skrll break;
2186 1.40 skrll case PLCOM_TYPE_PL011:
2187 1.40 skrll txintr = ISSET(istatus, PL011_INT_TX);
2188 1.40 skrll break;
2189 1.40 skrll }
2190 1.40 skrll if (txintr) {
2191 1.1 rearnsha /*
2192 1.1 rearnsha * If we've delayed a parameter change, do it
2193 1.1 rearnsha * now, and restart * output.
2194 1.1 rearnsha */
2195 1.40 skrll // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX);
2196 1.1 rearnsha if (sc->sc_heldchange) {
2197 1.1 rearnsha plcom_loadchannelregs(sc);
2198 1.1 rearnsha sc->sc_heldchange = 0;
2199 1.1 rearnsha sc->sc_tbc = sc->sc_heldtbc;
2200 1.1 rearnsha sc->sc_heldtbc = 0;
2201 1.1 rearnsha }
2202 1.1 rearnsha
2203 1.46 skrll /*
2204 1.1 rearnsha * Output the next chunk of the contiguous
2205 1.1 rearnsha * buffer, if any.
2206 1.1 rearnsha */
2207 1.1 rearnsha if (sc->sc_tbc > 0) {
2208 1.1 rearnsha int n;
2209 1.1 rearnsha
2210 1.1 rearnsha n = sc->sc_tbc;
2211 1.42 skrll if (n > sc->sc_fifolen)
2212 1.42 skrll n = sc->sc_fifolen;
2213 1.40 skrll PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n);
2214 1.1 rearnsha sc->sc_tbc -= n;
2215 1.1 rearnsha sc->sc_tba += n;
2216 1.1 rearnsha } else {
2217 1.1 rearnsha /*
2218 1.40 skrll * Disable transmit completion
2219 1.1 rearnsha * interrupts if necessary.
2220 1.1 rearnsha */
2221 1.40 skrll switch (pi->pi_type) {
2222 1.40 skrll case PLCOM_TYPE_PL010:
2223 1.40 skrll if (ISSET(sc->sc_cr, PL010_CR_TIE)) {
2224 1.40 skrll CLR(sc->sc_cr, PL010_CR_TIE);
2225 1.40 skrll PWRITE1(pi, PL010COM_CR,
2226 1.40 skrll sc->sc_cr);
2227 1.40 skrll }
2228 1.40 skrll break;
2229 1.40 skrll case PLCOM_TYPE_PL011:
2230 1.40 skrll if (ISSET(sc->sc_imsc, PL011_INT_TX)) {
2231 1.40 skrll CLR(sc->sc_imsc, PL011_INT_TX);
2232 1.40 skrll PWRITE4(pi, PL011COM_IMSC,
2233 1.40 skrll sc->sc_imsc);
2234 1.40 skrll }
2235 1.40 skrll break;
2236 1.1 rearnsha }
2237 1.1 rearnsha if (sc->sc_tx_busy) {
2238 1.1 rearnsha sc->sc_tx_busy = 0;
2239 1.1 rearnsha sc->sc_tx_done = 1;
2240 1.1 rearnsha }
2241 1.1 rearnsha }
2242 1.1 rearnsha }
2243 1.40 skrll
2244 1.40 skrll } while (plcom_intstatus(pi, &istatus));
2245 1.1 rearnsha
2246 1.36 skrll mutex_spin_exit(&sc->sc_lock);
2247 1.1 rearnsha
2248 1.1 rearnsha /* Wake up the poller. */
2249 1.25 ad softint_schedule(sc->sc_si);
2250 1.1 rearnsha
2251 1.33 tls #ifdef RND_COM
2252 1.40 skrll rnd_add_uint32(&sc->rnd_source, istatus | rsr);
2253 1.1 rearnsha #endif
2254 1.1 rearnsha
2255 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2256 1.40 skrll
2257 1.1 rearnsha return 1;
2258 1.1 rearnsha }
2259 1.1 rearnsha
2260 1.1 rearnsha /*
2261 1.1 rearnsha * The following functions are polled getc and putc routines, shared
2262 1.1 rearnsha * by the console and kgdb glue.
2263 1.46 skrll *
2264 1.1 rearnsha * The read-ahead code is so that you can detect pending in-band
2265 1.1 rearnsha * cn_magic in polled mode while doing output rather than having to
2266 1.1 rearnsha * wait until the kernel decides it needs input.
2267 1.1 rearnsha */
2268 1.1 rearnsha
2269 1.1 rearnsha #define MAX_READAHEAD 20
2270 1.1 rearnsha static int plcom_readahead[MAX_READAHEAD];
2271 1.1 rearnsha static int plcom_readaheadcount = 0;
2272 1.1 rearnsha
2273 1.1 rearnsha int
2274 1.40 skrll plcom_common_getc(dev_t dev, struct plcom_instance *pi)
2275 1.1 rearnsha {
2276 1.1 rearnsha int s = splserial();
2277 1.1 rearnsha u_char stat, c;
2278 1.1 rearnsha
2279 1.1 rearnsha /* got a character from reading things earlier */
2280 1.1 rearnsha if (plcom_readaheadcount > 0) {
2281 1.1 rearnsha int i;
2282 1.1 rearnsha
2283 1.1 rearnsha c = plcom_readahead[0];
2284 1.1 rearnsha for (i = 1; i < plcom_readaheadcount; i++) {
2285 1.1 rearnsha plcom_readahead[i-1] = plcom_readahead[i];
2286 1.1 rearnsha }
2287 1.1 rearnsha plcom_readaheadcount--;
2288 1.1 rearnsha splx(s);
2289 1.1 rearnsha return c;
2290 1.1 rearnsha }
2291 1.1 rearnsha
2292 1.1 rearnsha /* block until a character becomes available */
2293 1.40 skrll while (ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE))
2294 1.1 rearnsha ;
2295 1.1 rearnsha
2296 1.40 skrll c = PREAD1(pi, PL01XCOM_DR);
2297 1.1 rearnsha {
2298 1.47 skrll int cn_trapped __unused = 0;
2299 1.1 rearnsha #ifdef DDB
2300 1.1 rearnsha extern int db_active;
2301 1.1 rearnsha if (!db_active)
2302 1.1 rearnsha #endif
2303 1.1 rearnsha cn_check_magic(dev, c, plcom_cnm_state);
2304 1.1 rearnsha }
2305 1.1 rearnsha splx(s);
2306 1.1 rearnsha return c;
2307 1.1 rearnsha }
2308 1.1 rearnsha
2309 1.1 rearnsha void
2310 1.40 skrll plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c)
2311 1.1 rearnsha {
2312 1.1 rearnsha int s = splserial();
2313 1.1 rearnsha int timo;
2314 1.1 rearnsha
2315 1.1 rearnsha int cin, stat;
2316 1.46 skrll if (plcom_readaheadcount < MAX_READAHEAD
2317 1.40 skrll && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) {
2318 1.47 skrll int cn_trapped __unused = 0;
2319 1.40 skrll cin = PREAD1(pi, PL01XCOM_DR);
2320 1.1 rearnsha cn_check_magic(dev, cin, plcom_cnm_state);
2321 1.1 rearnsha plcom_readahead[plcom_readaheadcount++] = cin;
2322 1.1 rearnsha }
2323 1.1 rearnsha
2324 1.1 rearnsha /* wait for any pending transmission to finish */
2325 1.1 rearnsha timo = 150000;
2326 1.53 skrll while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo)
2327 1.1 rearnsha continue;
2328 1.1 rearnsha
2329 1.40 skrll PWRITE1(pi, PL01XCOM_DR, c);
2330 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2331 1.1 rearnsha
2332 1.1 rearnsha /* wait for this transmission to complete */
2333 1.1 rearnsha timo = 1500000;
2334 1.40 skrll while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo)
2335 1.1 rearnsha continue;
2336 1.1 rearnsha
2337 1.1 rearnsha splx(s);
2338 1.1 rearnsha }
2339 1.1 rearnsha
2340 1.1 rearnsha /*
2341 1.1 rearnsha * Initialize UART for use as console or KGDB line.
2342 1.1 rearnsha */
2343 1.1 rearnsha int
2344 1.40 skrll plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag)
2345 1.1 rearnsha {
2346 1.40 skrll u_char lcr;
2347 1.1 rearnsha
2348 1.40 skrll switch (pi->pi_type) {
2349 1.40 skrll case PLCOM_TYPE_PL010:
2350 1.40 skrll if (pi->pi_size == 0)
2351 1.40 skrll pi->pi_size = PL010COM_UART_SIZE;
2352 1.40 skrll break;
2353 1.40 skrll case PLCOM_TYPE_PL011:
2354 1.40 skrll if (pi->pi_size == 0)
2355 1.40 skrll pi->pi_size = PL011COM_UART_SIZE;
2356 1.40 skrll break;
2357 1.40 skrll default:
2358 1.40 skrll panic("Unknown plcom type");
2359 1.40 skrll }
2360 1.40 skrll
2361 1.40 skrll if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0,
2362 1.40 skrll &pi->pi_ioh))
2363 1.1 rearnsha return ENOMEM; /* ??? */
2364 1.1 rearnsha
2365 1.40 skrll lcr = cflag2lcr(cflag) | PL01X_LCR_FEN;
2366 1.40 skrll switch (pi->pi_type) {
2367 1.40 skrll case PLCOM_TYPE_PL010:
2368 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
2369 1.40 skrll
2370 1.54 jmcneill if (rate && frequency) {
2371 1.54 jmcneill rate = pl010comspeed(rate, frequency);
2372 1.54 jmcneill PWRITE1(pi, PL010COM_DLBL, (rate & 0xff));
2373 1.54 jmcneill PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff));
2374 1.54 jmcneill }
2375 1.40 skrll PWRITE1(pi, PL010COM_LCR, lcr);
2376 1.40 skrll PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN);
2377 1.40 skrll break;
2378 1.40 skrll case PLCOM_TYPE_PL011:
2379 1.40 skrll PWRITE4(pi, PL011COM_CR, 0);
2380 1.40 skrll
2381 1.54 jmcneill if (rate && frequency) {
2382 1.54 jmcneill rate = pl011comspeed(rate, frequency);
2383 1.54 jmcneill PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1));
2384 1.54 jmcneill PWRITE4(pi, PL011COM_IBRD, rate >> 6);
2385 1.54 jmcneill }
2386 1.40 skrll PWRITE1(pi, PL011COM_LCRH, lcr);
2387 1.40 skrll PWRITE4(pi, PL011COM_CR,
2388 1.40 skrll PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE);
2389 1.40 skrll break;
2390 1.40 skrll }
2391 1.1 rearnsha
2392 1.1 rearnsha #if 0
2393 1.1 rearnsha /* Ought to do something like this, but we have no sc to
2394 1.1 rearnsha dereference. */
2395 1.15 thorpej /* XXX device_unit() abuse */
2396 1.43 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev),
2397 1.35 skrll PL01X_MCR_DTR | PL01X_MCR_RTS);
2398 1.1 rearnsha #endif
2399 1.1 rearnsha
2400 1.1 rearnsha return 0;
2401 1.1 rearnsha }
2402 1.1 rearnsha
2403 1.1 rearnsha /*
2404 1.1 rearnsha * Following are all routines needed for PLCOM to act as console
2405 1.1 rearnsha */
2406 1.1 rearnsha struct consdev plcomcons = {
2407 1.1 rearnsha NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL,
2408 1.6 he NULL, NULL, NODEV, CN_NORMAL
2409 1.1 rearnsha };
2410 1.1 rearnsha
2411 1.1 rearnsha int
2412 1.40 skrll plcomcnattach(struct plcom_instance *pi, int rate, int frequency,
2413 1.1 rearnsha tcflag_t cflag, int unit)
2414 1.1 rearnsha {
2415 1.1 rearnsha int res;
2416 1.1 rearnsha
2417 1.40 skrll plcomcons_info = *pi;
2418 1.40 skrll
2419 1.40 skrll res = plcominit(&plcomcons_info, rate, frequency, cflag);
2420 1.1 rearnsha if (res)
2421 1.1 rearnsha return res;
2422 1.1 rearnsha
2423 1.1 rearnsha cn_tab = &plcomcons;
2424 1.1 rearnsha cn_init_magic(&plcom_cnm_state);
2425 1.1 rearnsha cn_set_magic("\047\001"); /* default magic is BREAK */
2426 1.1 rearnsha
2427 1.1 rearnsha plcomconsunit = unit;
2428 1.1 rearnsha plcomconsrate = rate;
2429 1.1 rearnsha plcomconscflag = cflag;
2430 1.1 rearnsha
2431 1.1 rearnsha return 0;
2432 1.1 rearnsha }
2433 1.1 rearnsha
2434 1.1 rearnsha void
2435 1.1 rearnsha plcomcndetach(void)
2436 1.1 rearnsha {
2437 1.40 skrll
2438 1.40 skrll bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh,
2439 1.40 skrll plcomcons_info.pi_size);
2440 1.40 skrll plcomcons_info.pi_iot = NULL;
2441 1.1 rearnsha
2442 1.1 rearnsha cn_tab = NULL;
2443 1.1 rearnsha }
2444 1.1 rearnsha
2445 1.1 rearnsha int
2446 1.1 rearnsha plcomcngetc(dev_t dev)
2447 1.1 rearnsha {
2448 1.40 skrll return plcom_common_getc(dev, &plcomcons_info);
2449 1.1 rearnsha }
2450 1.1 rearnsha
2451 1.1 rearnsha /*
2452 1.1 rearnsha * Console kernel output character routine.
2453 1.1 rearnsha */
2454 1.1 rearnsha void
2455 1.1 rearnsha plcomcnputc(dev_t dev, int c)
2456 1.1 rearnsha {
2457 1.40 skrll plcom_common_putc(dev, &plcomcons_info, c);
2458 1.1 rearnsha }
2459 1.1 rearnsha
2460 1.1 rearnsha void
2461 1.1 rearnsha plcomcnpollc(dev_t dev, int on)
2462 1.1 rearnsha {
2463 1.1 rearnsha
2464 1.45 mlelstv plcom_readaheadcount = 0;
2465 1.1 rearnsha }
2466 1.1 rearnsha
2467 1.1 rearnsha #ifdef KGDB
2468 1.1 rearnsha int
2469 1.40 skrll plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency,
2470 1.40 skrll tcflag_t cflag, int unit)
2471 1.1 rearnsha {
2472 1.1 rearnsha int res;
2473 1.1 rearnsha
2474 1.40 skrll if (pi->pi_iot == plcomcons_info.pi_iot &&
2475 1.40 skrll pi->pi_iobase == plcomcons_info.pi_iobase)
2476 1.1 rearnsha return EBUSY; /* cannot share with console */
2477 1.1 rearnsha
2478 1.40 skrll res = plcominit(pi, rate, frequency, cflag);
2479 1.1 rearnsha if (res)
2480 1.1 rearnsha return res;
2481 1.1 rearnsha
2482 1.1 rearnsha kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL);
2483 1.1 rearnsha kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2484 1.1 rearnsha
2485 1.40 skrll plcomkgdb_info.pi_iot = pi->pi_iot;
2486 1.40 skrll plcomkgdb_info.pi_ioh = pi->pi_ioh;
2487 1.40 skrll plcomkgdb_info.pi_iobase = pi->pi_iobase;
2488 1.1 rearnsha
2489 1.1 rearnsha return 0;
2490 1.1 rearnsha }
2491 1.1 rearnsha
2492 1.1 rearnsha /* ARGSUSED */
2493 1.1 rearnsha int
2494 1.1 rearnsha plcom_kgdb_getc(void *arg)
2495 1.1 rearnsha {
2496 1.44 mlelstv return plcom_common_getc(NODEV, &plcomkgdb_info);
2497 1.1 rearnsha }
2498 1.1 rearnsha
2499 1.1 rearnsha /* ARGSUSED */
2500 1.1 rearnsha void
2501 1.1 rearnsha plcom_kgdb_putc(void *arg, int c)
2502 1.1 rearnsha {
2503 1.44 mlelstv plcom_common_putc(NODEV, &plcomkgdb_info, c);
2504 1.1 rearnsha }
2505 1.1 rearnsha #endif /* KGDB */
2506 1.1 rearnsha
2507 1.1 rearnsha /* helper function to identify the plcom ports used by
2508 1.1 rearnsha console or KGDB (and not yet autoconf attached) */
2509 1.1 rearnsha int
2510 1.46 skrll plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase,
2511 1.1 rearnsha bus_space_handle_t *ioh)
2512 1.1 rearnsha {
2513 1.1 rearnsha bus_space_handle_t help;
2514 1.1 rearnsha
2515 1.1 rearnsha if (!plcomconsattached &&
2516 1.40 skrll bus_space_is_equal(iot, plcomcons_info.pi_iot) &&
2517 1.40 skrll iobase == plcomcons_info.pi_iobase)
2518 1.40 skrll help = plcomcons_info.pi_ioh;
2519 1.1 rearnsha #ifdef KGDB
2520 1.1 rearnsha else if (!plcom_kgdb_attached &&
2521 1.40 skrll bus_space_is_equal(iot, plcomkgdb_info.pi_iot) &&
2522 1.40 skrll iobase == plcomkgdb_info.pi_iobase)
2523 1.44 mlelstv help = plcomkgdb_info.pi_ioh;
2524 1.1 rearnsha #endif
2525 1.1 rearnsha else
2526 1.1 rearnsha return 0;
2527 1.1 rearnsha
2528 1.1 rearnsha if (ioh)
2529 1.1 rearnsha *ioh = help;
2530 1.1 rearnsha return 1;
2531 1.1 rearnsha }
2532