plcom.c revision 1.63 1 1.63 jmcneill /* $NetBSD: plcom.c,v 1.63 2021/10/17 22:34:17 jmcneill Exp $ */
2 1.1 rearnsha
3 1.1 rearnsha /*-
4 1.1 rearnsha * Copyright (c) 2001 ARM Ltd
5 1.1 rearnsha * All rights reserved.
6 1.1 rearnsha *
7 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
8 1.1 rearnsha * modification, are permitted provided that the following conditions
9 1.1 rearnsha * are met:
10 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
11 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
12 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
14 1.1 rearnsha * documentation and/or other materials provided with the distribution.
15 1.1 rearnsha * 3. The name of the company may not be used to endorse or promote
16 1.1 rearnsha * products derived from this software without specific prior written
17 1.1 rearnsha * permission.
18 1.1 rearnsha *
19 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1 rearnsha * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1 rearnsha * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 rearnsha * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 1.1 rearnsha * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 1.1 rearnsha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 1.1 rearnsha * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1 rearnsha * SUCH DAMAGE.
30 1.46 skrll *
31 1.40 skrll * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc.
32 1.1 rearnsha * All rights reserved.
33 1.1 rearnsha *
34 1.1 rearnsha * This code is derived from software contributed to The NetBSD Foundation
35 1.40 skrll * by Charles M. Hannum and Nick Hudson.
36 1.1 rearnsha *
37 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
38 1.1 rearnsha * modification, are permitted provided that the following conditions
39 1.1 rearnsha * are met:
40 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
41 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
42 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
44 1.1 rearnsha * documentation and/or other materials provided with the distribution.
45 1.1 rearnsha *
46 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
47 1.1 rearnsha * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
48 1.1 rearnsha * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
49 1.1 rearnsha * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
50 1.1 rearnsha * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
51 1.1 rearnsha * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
52 1.1 rearnsha * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
53 1.1 rearnsha * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
54 1.1 rearnsha * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
55 1.1 rearnsha * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56 1.1 rearnsha * POSSIBILITY OF SUCH DAMAGE.
57 1.1 rearnsha */
58 1.1 rearnsha
59 1.1 rearnsha /*
60 1.1 rearnsha * Copyright (c) 1991 The Regents of the University of California.
61 1.1 rearnsha * All rights reserved.
62 1.1 rearnsha *
63 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
64 1.1 rearnsha * modification, are permitted provided that the following conditions
65 1.1 rearnsha * are met:
66 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
67 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
68 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
69 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
70 1.1 rearnsha * documentation and/or other materials provided with the distribution.
71 1.9 agc * 3. Neither the name of the University nor the names of its contributors
72 1.1 rearnsha * may be used to endorse or promote products derived from this software
73 1.1 rearnsha * without specific prior written permission.
74 1.1 rearnsha *
75 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
76 1.1 rearnsha * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
77 1.1 rearnsha * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
78 1.1 rearnsha * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
79 1.1 rearnsha * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
80 1.1 rearnsha * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
81 1.1 rearnsha * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
82 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
83 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
84 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
85 1.1 rearnsha * SUCH DAMAGE.
86 1.1 rearnsha *
87 1.1 rearnsha * @(#)com.c 7.5 (Berkeley) 5/16/91
88 1.1 rearnsha */
89 1.1 rearnsha
90 1.1 rearnsha /*
91 1.40 skrll * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to
92 1.40 skrll * the 16C550, but have a completely different programmer's model.
93 1.1 rearnsha * Derived from the NS16550AF com driver.
94 1.1 rearnsha */
95 1.8 lukem
96 1.8 lukem #include <sys/cdefs.h>
97 1.63 jmcneill __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.63 2021/10/17 22:34:17 jmcneill Exp $");
98 1.1 rearnsha
99 1.1 rearnsha #include "opt_plcom.h"
100 1.1 rearnsha #include "opt_ddb.h"
101 1.1 rearnsha #include "opt_kgdb.h"
102 1.7 martin #include "opt_lockdebug.h"
103 1.7 martin #include "opt_multiprocessor.h"
104 1.1 rearnsha
105 1.1 rearnsha /*
106 1.1 rearnsha * Override cnmagic(9) macro before including <sys/systm.h>.
107 1.1 rearnsha * We need to know if cn_check_magic triggered debugger, so set a flag.
108 1.1 rearnsha * Callers of cn_check_magic must declare int cn_trapped = 0;
109 1.1 rearnsha * XXX: this is *ugly*!
110 1.1 rearnsha */
111 1.1 rearnsha #define cn_trap() \
112 1.1 rearnsha do { \
113 1.1 rearnsha console_debugger(); \
114 1.1 rearnsha cn_trapped = 1; \
115 1.1 rearnsha } while (/* CONSTCOND */ 0)
116 1.1 rearnsha
117 1.1 rearnsha #include <sys/param.h>
118 1.1 rearnsha #include <sys/systm.h>
119 1.1 rearnsha #include <sys/ioctl.h>
120 1.1 rearnsha #include <sys/select.h>
121 1.1 rearnsha #include <sys/tty.h>
122 1.1 rearnsha #include <sys/proc.h>
123 1.1 rearnsha #include <sys/conf.h>
124 1.1 rearnsha #include <sys/file.h>
125 1.1 rearnsha #include <sys/uio.h>
126 1.1 rearnsha #include <sys/kernel.h>
127 1.1 rearnsha #include <sys/syslog.h>
128 1.1 rearnsha #include <sys/types.h>
129 1.1 rearnsha #include <sys/device.h>
130 1.1 rearnsha #include <sys/malloc.h>
131 1.1 rearnsha #include <sys/timepps.h>
132 1.1 rearnsha #include <sys/vnode.h>
133 1.16 elad #include <sys/kauth.h>
134 1.25 ad #include <sys/intr.h>
135 1.25 ad #include <sys/bus.h>
136 1.40 skrll #ifdef RND_COM
137 1.52 riastrad #include <sys/rndsource.h>
138 1.40 skrll #endif
139 1.1 rearnsha
140 1.1 rearnsha #include <evbarm/dev/plcomreg.h>
141 1.1 rearnsha #include <evbarm/dev/plcomvar.h>
142 1.1 rearnsha
143 1.1 rearnsha #include <dev/cons.h>
144 1.1 rearnsha
145 1.1 rearnsha static void plcom_enable_debugport (struct plcom_softc *);
146 1.1 rearnsha
147 1.1 rearnsha void plcom_config (struct plcom_softc *);
148 1.1 rearnsha void plcom_shutdown (struct plcom_softc *);
149 1.40 skrll int pl010comspeed (long, long);
150 1.40 skrll int pl011comspeed (long, long);
151 1.1 rearnsha static u_char cflag2lcr (tcflag_t);
152 1.1 rearnsha int plcomparam (struct tty *, struct termios *);
153 1.1 rearnsha void plcomstart (struct tty *);
154 1.1 rearnsha int plcomhwiflow (struct tty *, int);
155 1.1 rearnsha
156 1.1 rearnsha void plcom_loadchannelregs (struct plcom_softc *);
157 1.1 rearnsha void plcom_hwiflow (struct plcom_softc *);
158 1.1 rearnsha void plcom_break (struct plcom_softc *, int);
159 1.1 rearnsha void plcom_modem (struct plcom_softc *, int);
160 1.1 rearnsha void tiocm_to_plcom (struct plcom_softc *, u_long, int);
161 1.1 rearnsha int plcom_to_tiocm (struct plcom_softc *);
162 1.1 rearnsha void plcom_iflush (struct plcom_softc *);
163 1.1 rearnsha
164 1.40 skrll int plcom_common_getc (dev_t, struct plcom_instance *);
165 1.40 skrll void plcom_common_putc (dev_t, struct plcom_instance *, int);
166 1.1 rearnsha
167 1.40 skrll int plcominit (struct plcom_instance *, int, int, tcflag_t);
168 1.1 rearnsha
169 1.4 gehenna dev_type_open(plcomopen);
170 1.4 gehenna dev_type_close(plcomclose);
171 1.4 gehenna dev_type_read(plcomread);
172 1.4 gehenna dev_type_write(plcomwrite);
173 1.4 gehenna dev_type_ioctl(plcomioctl);
174 1.4 gehenna dev_type_stop(plcomstop);
175 1.4 gehenna dev_type_tty(plcomtty);
176 1.4 gehenna dev_type_poll(plcompoll);
177 1.1 rearnsha
178 1.1 rearnsha int plcomcngetc (dev_t);
179 1.1 rearnsha void plcomcnputc (dev_t, int);
180 1.1 rearnsha void plcomcnpollc (dev_t, int);
181 1.59 jmcneill void plcomcnhalt (dev_t);
182 1.1 rearnsha
183 1.1 rearnsha #define integrate static inline
184 1.1 rearnsha void plcomsoft (void *);
185 1.1 rearnsha integrate void plcom_rxsoft (struct plcom_softc *, struct tty *);
186 1.1 rearnsha integrate void plcom_txsoft (struct plcom_softc *, struct tty *);
187 1.1 rearnsha integrate void plcom_stsoft (struct plcom_softc *, struct tty *);
188 1.1 rearnsha integrate void plcom_schedrx (struct plcom_softc *);
189 1.1 rearnsha void plcomdiag (void *);
190 1.1 rearnsha
191 1.40 skrll bool plcom_intstatus(struct plcom_instance *, u_int *);
192 1.40 skrll
193 1.1 rearnsha extern struct cfdriver plcom_cd;
194 1.1 rearnsha
195 1.4 gehenna const struct cdevsw plcom_cdevsw = {
196 1.48 dholland .d_open = plcomopen,
197 1.48 dholland .d_close = plcomclose,
198 1.48 dholland .d_read = plcomread,
199 1.48 dholland .d_write = plcomwrite,
200 1.48 dholland .d_ioctl = plcomioctl,
201 1.48 dholland .d_stop = plcomstop,
202 1.48 dholland .d_tty = plcomtty,
203 1.48 dholland .d_poll = plcompoll,
204 1.48 dholland .d_mmap = nommap,
205 1.48 dholland .d_kqfilter = ttykqfilter,
206 1.49 dholland .d_discard = nodiscard,
207 1.48 dholland .d_flag = D_TTY
208 1.4 gehenna };
209 1.4 gehenna
210 1.1 rearnsha /*
211 1.1 rearnsha * Make this an option variable one can patch.
212 1.1 rearnsha * But be warned: this must be a power of 2!
213 1.1 rearnsha */
214 1.1 rearnsha u_int plcom_rbuf_size = PLCOM_RING_SIZE;
215 1.1 rearnsha
216 1.1 rearnsha /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
217 1.1 rearnsha u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4;
218 1.1 rearnsha u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4;
219 1.1 rearnsha
220 1.1 rearnsha static int plcomconsunit = -1;
221 1.40 skrll static struct plcom_instance plcomcons_info;
222 1.40 skrll
223 1.40 skrll static int plcomconsattached;
224 1.1 rearnsha static int plcomconsrate;
225 1.1 rearnsha static tcflag_t plcomconscflag;
226 1.1 rearnsha static struct cnm_state plcom_cnm_state;
227 1.1 rearnsha
228 1.1 rearnsha static int ppscap =
229 1.1 rearnsha PPS_TSFMT_TSPEC |
230 1.46 skrll PPS_CAPTUREASSERT |
231 1.1 rearnsha PPS_CAPTURECLEAR |
232 1.46 skrll #ifdef PPS_SYNC
233 1.1 rearnsha PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR |
234 1.1 rearnsha #endif /* PPS_SYNC */
235 1.1 rearnsha PPS_OFFSETASSERT | PPS_OFFSETCLEAR;
236 1.1 rearnsha
237 1.1 rearnsha #ifdef KGDB
238 1.1 rearnsha #include <sys/kgdb.h>
239 1.1 rearnsha
240 1.40 skrll static struct plcom_instance plcomkgdb_info;
241 1.1 rearnsha static int plcom_kgdb_attached;
242 1.1 rearnsha
243 1.1 rearnsha int plcom_kgdb_getc (void *);
244 1.1 rearnsha void plcom_kgdb_putc (void *, int);
245 1.1 rearnsha #endif /* KGDB */
246 1.1 rearnsha
247 1.51 christos #define PLCOMDIALOUT_MASK TTDIALOUT_MASK
248 1.1 rearnsha
249 1.51 christos #define PLCOMUNIT(x) TTUNIT(x)
250 1.51 christos #define PLCOMDIALOUT(x) TTDIALOUT(x)
251 1.1 rearnsha
252 1.1 rearnsha #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \
253 1.38 skrll device_is_active((sc)->sc_dev))
254 1.1 rearnsha
255 1.1 rearnsha #define BR BUS_SPACE_BARRIER_READ
256 1.1 rearnsha #define BW BUS_SPACE_BARRIER_WRITE
257 1.40 skrll #define PLCOM_BARRIER(pi, f) \
258 1.40 skrll bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f))
259 1.40 skrll
260 1.40 skrll static uint8_t
261 1.40 skrll pread1(struct plcom_instance *pi, bus_size_t reg)
262 1.40 skrll {
263 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS))
264 1.40 skrll return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg);
265 1.40 skrll
266 1.40 skrll return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >>
267 1.40 skrll (8 * (reg & 3));
268 1.40 skrll }
269 1.40 skrll int nhcr;
270 1.40 skrll static void
271 1.40 skrll pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val)
272 1.40 skrll {
273 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
274 1.40 skrll bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val);
275 1.40 skrll } else {
276 1.40 skrll const size_t shift = 8 * (o & 3);
277 1.40 skrll o &= -4;
278 1.40 skrll uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o);
279 1.40 skrll tmp = (val << shift) | (tmp & ~(0xff << shift));
280 1.40 skrll bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp);
281 1.40 skrll }
282 1.40 skrll }
283 1.40 skrll
284 1.40 skrll static void
285 1.40 skrll pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap,
286 1.40 skrll bus_size_t count)
287 1.40 skrll {
288 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
289 1.40 skrll bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count);
290 1.40 skrll } else {
291 1.40 skrll KASSERT((o & 3) == 0);
292 1.40 skrll while (count--) {
293 1.40 skrll bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++);
294 1.40 skrll };
295 1.40 skrll }
296 1.40 skrll }
297 1.40 skrll
298 1.40 skrll #define PREAD1(pi, reg) pread1(pi, reg)
299 1.40 skrll #define PREAD4(pi, reg) \
300 1.62 tnn bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))
301 1.40 skrll
302 1.40 skrll #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val)
303 1.40 skrll #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c)
304 1.40 skrll #define PWRITE4(pi, reg, val) \
305 1.62 tnn bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))
306 1.1 rearnsha
307 1.1 rearnsha int
308 1.40 skrll pl010comspeed(long speed, long frequency)
309 1.1 rearnsha {
310 1.1 rearnsha #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
311 1.1 rearnsha
312 1.1 rearnsha int x, err;
313 1.1 rearnsha
314 1.1 rearnsha #if 0
315 1.1 rearnsha if (speed == 0)
316 1.1 rearnsha return 0;
317 1.1 rearnsha #endif
318 1.1 rearnsha if (speed <= 0)
319 1.1 rearnsha return -1;
320 1.1 rearnsha x = divrnd(frequency / 16, speed);
321 1.1 rearnsha if (x <= 0)
322 1.1 rearnsha return -1;
323 1.1 rearnsha err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
324 1.1 rearnsha if (err < 0)
325 1.1 rearnsha err = -err;
326 1.1 rearnsha if (err > PLCOM_TOLERANCE)
327 1.1 rearnsha return -1;
328 1.1 rearnsha return x;
329 1.1 rearnsha
330 1.1 rearnsha #undef divrnd
331 1.1 rearnsha }
332 1.1 rearnsha
333 1.40 skrll int
334 1.40 skrll pl011comspeed(long speed, long frequency)
335 1.40 skrll {
336 1.40 skrll int denom = 16 * speed;
337 1.40 skrll int div = frequency / denom;
338 1.40 skrll int rem = frequency % denom;
339 1.46 skrll
340 1.40 skrll int ibrd = div << 6;
341 1.40 skrll int fbrd = (((8 * rem) / speed) + 1) / 2;
342 1.46 skrll
343 1.40 skrll /* Tolerance? */
344 1.40 skrll return ibrd | fbrd;
345 1.40 skrll }
346 1.40 skrll
347 1.1 rearnsha #ifdef PLCOM_DEBUG
348 1.1 rearnsha int plcom_debug = 0;
349 1.1 rearnsha
350 1.34 bsh void plcomstatus (struct plcom_softc *, const char *);
351 1.1 rearnsha void
352 1.34 bsh plcomstatus(struct plcom_softc *sc, const char *str)
353 1.1 rearnsha {
354 1.1 rearnsha struct tty *tp = sc->sc_tty;
355 1.1 rearnsha
356 1.1 rearnsha printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n",
357 1.38 skrll device_xname(sc->sc_dev), str,
358 1.1 rearnsha ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
359 1.35 skrll ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-",
360 1.1 rearnsha ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
361 1.35 skrll ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-",
362 1.1 rearnsha sc->sc_tx_stopped ? "+" : "-");
363 1.1 rearnsha
364 1.1 rearnsha printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n",
365 1.38 skrll device_xname(sc->sc_dev), str,
366 1.1 rearnsha ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
367 1.35 skrll ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-",
368 1.1 rearnsha ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
369 1.35 skrll ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-",
370 1.1 rearnsha sc->sc_rx_flags);
371 1.1 rearnsha }
372 1.1 rearnsha #endif
373 1.1 rearnsha
374 1.40 skrll #if 0
375 1.1 rearnsha int
376 1.1 rearnsha plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
377 1.1 rearnsha {
378 1.1 rearnsha int data;
379 1.1 rearnsha
380 1.1 rearnsha /* Disable the UART. */
381 1.1 rearnsha bus_space_write_1(iot, ioh, plcom_cr, 0);
382 1.1 rearnsha /* Make sure the FIFO is off. */
383 1.35 skrll bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS);
384 1.1 rearnsha /* Disable interrupts. */
385 1.1 rearnsha bus_space_write_1(iot, ioh, plcom_iir, 0);
386 1.1 rearnsha
387 1.1 rearnsha /* Make sure we swallow anything in the receiving register. */
388 1.1 rearnsha data = bus_space_read_1(iot, ioh, plcom_dr);
389 1.1 rearnsha
390 1.35 skrll if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS)
391 1.1 rearnsha return 0;
392 1.1 rearnsha
393 1.35 skrll data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE);
394 1.1 rearnsha
395 1.35 skrll if (data != PL01X_FR_RXFE)
396 1.1 rearnsha return 0;
397 1.1 rearnsha
398 1.1 rearnsha return 1;
399 1.1 rearnsha }
400 1.40 skrll #endif
401 1.1 rearnsha
402 1.36 skrll /*
403 1.36 skrll * No locking in this routine; it is only called during attach,
404 1.36 skrll * or with the port already locked.
405 1.36 skrll */
406 1.1 rearnsha static void
407 1.1 rearnsha plcom_enable_debugport(struct plcom_softc *sc)
408 1.1 rearnsha {
409 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
410 1.40 skrll
411 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
412 1.40 skrll SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
413 1.1 rearnsha
414 1.1 rearnsha /* Turn on line break interrupt, set carrier. */
415 1.40 skrll switch (pi->pi_type) {
416 1.40 skrll case PLCOM_TYPE_PL010:
417 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
418 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
419 1.40 skrll if (sc->sc_set_mcr) {
420 1.40 skrll /* XXX device_unit() abuse */
421 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
422 1.40 skrll device_unit(sc->sc_dev), sc->sc_mcr);
423 1.40 skrll }
424 1.40 skrll break;
425 1.40 skrll case PLCOM_TYPE_PL011:
426 1.40 skrll sc->sc_imsc = PL011_INT_RX | PL011_INT_RT;
427 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
428 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr));
429 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
430 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
431 1.40 skrll break;
432 1.40 skrll }
433 1.40 skrll
434 1.1 rearnsha }
435 1.1 rearnsha
436 1.1 rearnsha void
437 1.1 rearnsha plcom_attach_subr(struct plcom_softc *sc)
438 1.1 rearnsha {
439 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
440 1.1 rearnsha struct tty *tp;
441 1.1 rearnsha
442 1.21 ad callout_init(&sc->sc_diag_callout, 0);
443 1.36 skrll mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
444 1.1 rearnsha
445 1.40 skrll switch (pi->pi_type) {
446 1.40 skrll case PLCOM_TYPE_PL010:
447 1.40 skrll case PLCOM_TYPE_PL011:
448 1.40 skrll break;
449 1.40 skrll default:
450 1.40 skrll aprint_error_dev(sc->sc_dev,
451 1.40 skrll "Unknown plcom type: %d\n", pi->pi_type);
452 1.40 skrll return;
453 1.40 skrll }
454 1.40 skrll
455 1.1 rearnsha /* Disable interrupts before configuring the device. */
456 1.1 rearnsha sc->sc_cr = 0;
457 1.40 skrll sc->sc_imsc = 0;
458 1.1 rearnsha
459 1.40 skrll if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) &&
460 1.40 skrll pi->pi_iobase == plcomcons_info.pi_iobase) {
461 1.1 rearnsha plcomconsattached = 1;
462 1.1 rearnsha
463 1.1 rearnsha /* Make sure the console is always "hardwired". */
464 1.1 rearnsha delay(1000); /* wait for output to finish */
465 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_CONSOLE);
466 1.1 rearnsha SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
467 1.40 skrll /*
468 1.40 skrll * Must re-enable the console immediately, or we will
469 1.40 skrll * hang when trying to print.
470 1.40 skrll */
471 1.35 skrll sc->sc_cr = PL01X_CR_UARTEN;
472 1.46 skrll if (pi->pi_type == PLCOM_TYPE_PL011)
473 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
474 1.1 rearnsha }
475 1.1 rearnsha
476 1.40 skrll switch (pi->pi_type) {
477 1.40 skrll case PLCOM_TYPE_PL010:
478 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
479 1.40 skrll break;
480 1.46 skrll
481 1.40 skrll case PLCOM_TYPE_PL011:
482 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
483 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
484 1.40 skrll break;
485 1.46 skrll }
486 1.40 skrll
487 1.40 skrll if (sc->sc_fifolen == 0) {
488 1.40 skrll switch (pi->pi_type) {
489 1.40 skrll case PLCOM_TYPE_PL010:
490 1.40 skrll /*
491 1.40 skrll * The PL010 has a 16-byte fifo, but the tx interrupt
492 1.40 skrll * triggers when there is space for 8 more bytes.
493 1.40 skrll */
494 1.42 skrll sc->sc_fifolen = 8;
495 1.40 skrll break;
496 1.40 skrll case PLCOM_TYPE_PL011:
497 1.40 skrll /* Some revisions have a 32 byte TX FIFO */
498 1.40 skrll sc->sc_fifolen = 16;
499 1.40 skrll break;
500 1.40 skrll }
501 1.40 skrll }
502 1.1 rearnsha
503 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) {
504 1.1 rearnsha sc->sc_fifolen = 1;
505 1.40 skrll aprint_normal_dev(sc->sc_dev, "txfifo disabled\n");
506 1.1 rearnsha }
507 1.1 rearnsha
508 1.1 rearnsha if (sc->sc_fifolen > 1)
509 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_FIFO);
510 1.1 rearnsha
511 1.32 rmind tp = tty_alloc();
512 1.1 rearnsha tp->t_oproc = plcomstart;
513 1.1 rearnsha tp->t_param = plcomparam;
514 1.1 rearnsha tp->t_hwiflow = plcomhwiflow;
515 1.1 rearnsha
516 1.1 rearnsha sc->sc_tty = tp;
517 1.60 chs sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_WAITOK);
518 1.1 rearnsha sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
519 1.1 rearnsha sc->sc_rbavail = plcom_rbuf_size;
520 1.1 rearnsha sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1);
521 1.1 rearnsha
522 1.1 rearnsha tty_attach(tp);
523 1.1 rearnsha
524 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
525 1.1 rearnsha int maj;
526 1.1 rearnsha
527 1.1 rearnsha /* locate the major number */
528 1.4 gehenna maj = cdevsw_lookup_major(&plcom_cdevsw);
529 1.1 rearnsha
530 1.40 skrll tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev));
531 1.1 rearnsha
532 1.40 skrll aprint_normal_dev(sc->sc_dev, "console\n");
533 1.1 rearnsha }
534 1.1 rearnsha
535 1.1 rearnsha #ifdef KGDB
536 1.1 rearnsha /*
537 1.1 rearnsha * Allow kgdb to "take over" this port. If this is
538 1.1 rearnsha * the kgdb device, it has exclusive use.
539 1.1 rearnsha */
540 1.44 mlelstv if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) &&
541 1.40 skrll pi->pi_iobase == plcomkgdb_info.pi_iobase) {
542 1.40 skrll if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
543 1.40 skrll plcom_kgdb_attached = 1;
544 1.1 rearnsha
545 1.40 skrll SET(sc->sc_hwflags, PLCOM_HW_KGDB);
546 1.40 skrll }
547 1.40 skrll aprint_normal_dev(sc->sc_dev, "kgdb\n");
548 1.1 rearnsha }
549 1.1 rearnsha #endif
550 1.1 rearnsha
551 1.25 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc);
552 1.1 rearnsha
553 1.33 tls #ifdef RND_COM
554 1.40 skrll rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
555 1.50 tls RND_TYPE_TTY, RND_FLAG_DEFAULT);
556 1.1 rearnsha #endif
557 1.1 rearnsha
558 1.40 skrll /*
559 1.40 skrll * if there are no enable/disable functions, assume the device
560 1.40 skrll * is always enabled
561 1.40 skrll */
562 1.1 rearnsha if (!sc->enable)
563 1.1 rearnsha sc->enabled = 1;
564 1.1 rearnsha
565 1.1 rearnsha plcom_config(sc);
566 1.1 rearnsha
567 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_DEV_OK);
568 1.1 rearnsha }
569 1.1 rearnsha
570 1.1 rearnsha void
571 1.1 rearnsha plcom_config(struct plcom_softc *sc)
572 1.1 rearnsha {
573 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
574 1.1 rearnsha
575 1.1 rearnsha /* Disable interrupts before configuring the device. */
576 1.1 rearnsha sc->sc_cr = 0;
577 1.40 skrll sc->sc_imsc = 0;
578 1.40 skrll switch (pi->pi_type) {
579 1.40 skrll case PLCOM_TYPE_PL010:
580 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
581 1.40 skrll break;
582 1.46 skrll
583 1.40 skrll case PLCOM_TYPE_PL011:
584 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
585 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
586 1.40 skrll break;
587 1.46 skrll }
588 1.1 rearnsha
589 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
590 1.1 rearnsha plcom_enable_debugport(sc);
591 1.1 rearnsha }
592 1.1 rearnsha
593 1.1 rearnsha int
594 1.38 skrll plcom_detach(device_t self, int flags)
595 1.1 rearnsha {
596 1.38 skrll struct plcom_softc *sc = device_private(self);
597 1.1 rearnsha int maj, mn;
598 1.1 rearnsha
599 1.31 dyoung if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
600 1.31 dyoung return EBUSY;
601 1.31 dyoung
602 1.31 dyoung if (sc->disable != NULL && sc->enabled != 0) {
603 1.31 dyoung (*sc->disable)(sc);
604 1.31 dyoung sc->enabled = 0;
605 1.31 dyoung }
606 1.31 dyoung
607 1.1 rearnsha /* locate the major number */
608 1.4 gehenna maj = cdevsw_lookup_major(&plcom_cdevsw);
609 1.1 rearnsha
610 1.1 rearnsha /* Nuke the vnodes for any open instances. */
611 1.15 thorpej mn = device_unit(self);
612 1.1 rearnsha vdevgone(maj, mn, mn, VCHR);
613 1.1 rearnsha
614 1.1 rearnsha mn |= PLCOMDIALOUT_MASK;
615 1.1 rearnsha vdevgone(maj, mn, mn, VCHR);
616 1.1 rearnsha
617 1.40 skrll if (sc->sc_rbuf == NULL) {
618 1.40 skrll /*
619 1.40 skrll * Ring buffer allocation failed in the plcom_attach_subr,
620 1.40 skrll * only the tty is allocated, and nothing else.
621 1.46 skrll */
622 1.40 skrll tty_free(sc->sc_tty);
623 1.40 skrll return 0;
624 1.40 skrll }
625 1.40 skrll
626 1.1 rearnsha /* Free the receive buffer. */
627 1.1 rearnsha free(sc->sc_rbuf, M_DEVBUF);
628 1.1 rearnsha
629 1.1 rearnsha /* Detach and free the tty. */
630 1.1 rearnsha tty_detach(sc->sc_tty);
631 1.32 rmind tty_free(sc->sc_tty);
632 1.1 rearnsha
633 1.1 rearnsha /* Unhook the soft interrupt handler. */
634 1.25 ad softint_disestablish(sc->sc_si);
635 1.1 rearnsha
636 1.33 tls #ifdef RND_COM
637 1.1 rearnsha /* Unhook the entropy source. */
638 1.1 rearnsha rnd_detach_source(&sc->rnd_source);
639 1.1 rearnsha #endif
640 1.40 skrll callout_destroy(&sc->sc_diag_callout);
641 1.1 rearnsha
642 1.36 skrll /* Destroy the lock. */
643 1.36 skrll mutex_destroy(&sc->sc_lock);
644 1.36 skrll
645 1.1 rearnsha return 0;
646 1.1 rearnsha }
647 1.1 rearnsha
648 1.1 rearnsha int
649 1.31 dyoung plcom_activate(device_t self, enum devact act)
650 1.1 rearnsha {
651 1.31 dyoung struct plcom_softc *sc = device_private(self);
652 1.1 rearnsha
653 1.1 rearnsha switch (act) {
654 1.1 rearnsha case DVACT_DEACTIVATE:
655 1.31 dyoung sc->enabled = 0;
656 1.31 dyoung return 0;
657 1.31 dyoung default:
658 1.31 dyoung return EOPNOTSUPP;
659 1.1 rearnsha }
660 1.1 rearnsha }
661 1.1 rearnsha
662 1.1 rearnsha void
663 1.1 rearnsha plcom_shutdown(struct plcom_softc *sc)
664 1.1 rearnsha {
665 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
666 1.1 rearnsha struct tty *tp = sc->sc_tty;
667 1.36 skrll mutex_spin_enter(&sc->sc_lock);
668 1.1 rearnsha
669 1.1 rearnsha /* If we were asserting flow control, then deassert it. */
670 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
671 1.1 rearnsha plcom_hwiflow(sc);
672 1.1 rearnsha
673 1.1 rearnsha /* Clear any break condition set with TIOCSBRK. */
674 1.1 rearnsha plcom_break(sc, 0);
675 1.1 rearnsha
676 1.1 rearnsha /* Turn off PPS capture on last close. */
677 1.26 ad mutex_spin_enter(&timecounter_lock);
678 1.1 rearnsha sc->sc_ppsmask = 0;
679 1.1 rearnsha sc->ppsparam.mode = 0;
680 1.26 ad mutex_spin_exit(&timecounter_lock);
681 1.1 rearnsha
682 1.1 rearnsha /*
683 1.1 rearnsha * Hang up if necessary. Wait a bit, so the other side has time to
684 1.1 rearnsha * notice even if we immediately open the port again.
685 1.1 rearnsha * Avoid tsleeping above splhigh().
686 1.1 rearnsha */
687 1.1 rearnsha if (ISSET(tp->t_cflag, HUPCL)) {
688 1.1 rearnsha plcom_modem(sc, 0);
689 1.63 jmcneill microtime(&sc->sc_hup_pending);
690 1.63 jmcneill sc->sc_hup_pending.tv_sec++;
691 1.1 rearnsha }
692 1.1 rearnsha
693 1.40 skrll sc->sc_cr = 0;
694 1.40 skrll sc->sc_imsc = 0;
695 1.1 rearnsha /* Turn off interrupts. */
696 1.40 skrll if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
697 1.1 rearnsha /* interrupt on break */
698 1.46 skrll
699 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
700 1.40 skrll sc->sc_imsc = 0;
701 1.40 skrll switch (pi->pi_type) {
702 1.40 skrll case PLCOM_TYPE_PL010:
703 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
704 1.40 skrll break;
705 1.40 skrll case PLCOM_TYPE_PL011:
706 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE);
707 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX);
708 1.40 skrll break;
709 1.40 skrll }
710 1.40 skrll }
711 1.40 skrll switch (pi->pi_type) {
712 1.40 skrll case PLCOM_TYPE_PL010:
713 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
714 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
715 1.40 skrll break;
716 1.40 skrll case PLCOM_TYPE_PL011:
717 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
718 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX);
719 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
720 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
721 1.40 skrll break;
722 1.40 skrll }
723 1.1 rearnsha
724 1.36 skrll mutex_spin_exit(&sc->sc_lock);
725 1.1 rearnsha if (sc->disable) {
726 1.1 rearnsha #ifdef DIAGNOSTIC
727 1.1 rearnsha if (!sc->enabled)
728 1.1 rearnsha panic("plcom_shutdown: not enabled?");
729 1.1 rearnsha #endif
730 1.1 rearnsha (*sc->disable)(sc);
731 1.1 rearnsha sc->enabled = 0;
732 1.1 rearnsha }
733 1.1 rearnsha }
734 1.1 rearnsha
735 1.1 rearnsha int
736 1.12 christos plcomopen(dev_t dev, int flag, int mode, struct lwp *l)
737 1.1 rearnsha {
738 1.1 rearnsha struct plcom_softc *sc;
739 1.40 skrll struct plcom_instance *pi;
740 1.1 rearnsha struct tty *tp;
741 1.36 skrll int s;
742 1.1 rearnsha int error;
743 1.1 rearnsha
744 1.28 cegger sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
745 1.1 rearnsha if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) ||
746 1.1 rearnsha sc->sc_rbuf == NULL)
747 1.1 rearnsha return ENXIO;
748 1.1 rearnsha
749 1.38 skrll if (!device_is_active(sc->sc_dev))
750 1.1 rearnsha return ENXIO;
751 1.1 rearnsha
752 1.40 skrll pi = &sc->sc_pi;
753 1.40 skrll
754 1.1 rearnsha #ifdef KGDB
755 1.1 rearnsha /*
756 1.1 rearnsha * If this is the kgdb port, no other use is permitted.
757 1.1 rearnsha */
758 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB))
759 1.1 rearnsha return EBUSY;
760 1.1 rearnsha #endif
761 1.1 rearnsha
762 1.1 rearnsha tp = sc->sc_tty;
763 1.1 rearnsha
764 1.18 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
765 1.18 elad return (EBUSY);
766 1.1 rearnsha
767 1.1 rearnsha s = spltty();
768 1.1 rearnsha
769 1.1 rearnsha /*
770 1.1 rearnsha * Do the following iff this is a first open.
771 1.1 rearnsha */
772 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
773 1.1 rearnsha struct termios t;
774 1.63 jmcneill struct timeval now, diff;
775 1.1 rearnsha
776 1.1 rearnsha tp->t_dev = dev;
777 1.1 rearnsha
778 1.1 rearnsha if (sc->enable) {
779 1.1 rearnsha if ((*sc->enable)(sc)) {
780 1.1 rearnsha splx(s);
781 1.40 skrll aprint_error_dev(sc->sc_dev,
782 1.40 skrll "device enable failed\n");
783 1.1 rearnsha return EIO;
784 1.1 rearnsha }
785 1.36 skrll mutex_spin_enter(&sc->sc_lock);
786 1.1 rearnsha sc->enabled = 1;
787 1.1 rearnsha plcom_config(sc);
788 1.36 skrll } else {
789 1.36 skrll mutex_spin_enter(&sc->sc_lock);
790 1.1 rearnsha }
791 1.1 rearnsha
792 1.63 jmcneill if (timerisset(&sc->sc_hup_pending)) {
793 1.63 jmcneill microtime(&now);
794 1.63 jmcneill while (timercmp(&now, &sc->sc_hup_pending, <)) {
795 1.63 jmcneill timersub(&sc->sc_hup_pending, &now, &diff);
796 1.63 jmcneill const int ms = diff.tv_sec * 100 +
797 1.63 jmcneill uimax(diff.tv_usec / 1000, 1);
798 1.63 jmcneill kpause(ttclos, false, mstohz(ms), &sc->sc_lock);
799 1.63 jmcneill microtime(&now);
800 1.63 jmcneill }
801 1.63 jmcneill timerclear(&sc->sc_hup_pending);
802 1.63 jmcneill }
803 1.63 jmcneill
804 1.1 rearnsha /* Turn on interrupts. */
805 1.1 rearnsha /* IER_ERXRDY | IER_ERLS | IER_EMSC; */
806 1.1 rearnsha /* Fetch the current modem control status, needed later. */
807 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
808 1.40 skrll switch (pi->pi_type) {
809 1.40 skrll case PLCOM_TYPE_PL010:
810 1.40 skrll SET(sc->sc_cr,
811 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE);
812 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
813 1.40 skrll sc->sc_msr = PREAD1(pi, PL01XCOM_FR);
814 1.40 skrll break;
815 1.40 skrll case PLCOM_TYPE_PL011:
816 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
817 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX |
818 1.40 skrll PL011_INT_MSMASK);
819 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
820 1.40 skrll sc->sc_msr = PREAD4(pi, PL01XCOM_FR);
821 1.40 skrll break;
822 1.40 skrll }
823 1.1 rearnsha
824 1.1 rearnsha /* Clear PPS capture state on first open. */
825 1.26 ad
826 1.26 ad mutex_spin_enter(&timecounter_lock);
827 1.1 rearnsha sc->sc_ppsmask = 0;
828 1.1 rearnsha sc->ppsparam.mode = 0;
829 1.26 ad mutex_spin_exit(&timecounter_lock);
830 1.1 rearnsha
831 1.39 skrll mutex_spin_exit(&sc->sc_lock);
832 1.1 rearnsha
833 1.1 rearnsha /*
834 1.1 rearnsha * Initialize the termios status to the defaults. Add in the
835 1.1 rearnsha * sticky bits from TIOCSFLAGS.
836 1.1 rearnsha */
837 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
838 1.1 rearnsha t.c_ospeed = plcomconsrate;
839 1.1 rearnsha t.c_cflag = plcomconscflag;
840 1.1 rearnsha } else {
841 1.1 rearnsha t.c_ospeed = TTYDEF_SPEED;
842 1.1 rearnsha t.c_cflag = TTYDEF_CFLAG;
843 1.1 rearnsha }
844 1.40 skrll t.c_ispeed = t.c_ospeed;
845 1.40 skrll
846 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
847 1.1 rearnsha SET(t.c_cflag, CLOCAL);
848 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
849 1.1 rearnsha SET(t.c_cflag, CRTSCTS);
850 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
851 1.1 rearnsha SET(t.c_cflag, MDMBUF);
852 1.1 rearnsha /* Make sure plcomparam() will do something. */
853 1.1 rearnsha tp->t_ospeed = 0;
854 1.1 rearnsha (void) plcomparam(tp, &t);
855 1.1 rearnsha tp->t_iflag = TTYDEF_IFLAG;
856 1.1 rearnsha tp->t_oflag = TTYDEF_OFLAG;
857 1.1 rearnsha tp->t_lflag = TTYDEF_LFLAG;
858 1.1 rearnsha ttychars(tp);
859 1.1 rearnsha ttsetwater(tp);
860 1.1 rearnsha
861 1.36 skrll mutex_spin_enter(&sc->sc_lock);
862 1.1 rearnsha
863 1.1 rearnsha /*
864 1.1 rearnsha * Turn on DTR. We must always do this, even if carrier is not
865 1.1 rearnsha * present, because otherwise we'd have to use TIOCSDTR
866 1.1 rearnsha * immediately after setting CLOCAL, which applications do not
867 1.1 rearnsha * expect. We always assert DTR while the device is open
868 1.1 rearnsha * unless explicitly requested to deassert it.
869 1.1 rearnsha */
870 1.1 rearnsha plcom_modem(sc, 1);
871 1.1 rearnsha
872 1.1 rearnsha /* Clear the input ring, and unblock. */
873 1.1 rearnsha sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
874 1.1 rearnsha sc->sc_rbavail = plcom_rbuf_size;
875 1.1 rearnsha plcom_iflush(sc);
876 1.1 rearnsha CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
877 1.1 rearnsha plcom_hwiflow(sc);
878 1.1 rearnsha
879 1.1 rearnsha #ifdef PLCOM_DEBUG
880 1.1 rearnsha if (plcom_debug)
881 1.1 rearnsha plcomstatus(sc, "plcomopen ");
882 1.1 rearnsha #endif
883 1.1 rearnsha
884 1.36 skrll mutex_spin_exit(&sc->sc_lock);
885 1.1 rearnsha }
886 1.46 skrll
887 1.1 rearnsha splx(s);
888 1.1 rearnsha
889 1.1 rearnsha error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
890 1.1 rearnsha if (error)
891 1.1 rearnsha goto bad;
892 1.1 rearnsha
893 1.1 rearnsha error = (*tp->t_linesw->l_open)(dev, tp);
894 1.1 rearnsha if (error)
895 1.1 rearnsha goto bad;
896 1.1 rearnsha
897 1.1 rearnsha return 0;
898 1.1 rearnsha
899 1.1 rearnsha bad:
900 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
901 1.1 rearnsha /*
902 1.1 rearnsha * We failed to open the device, and nobody else had it opened.
903 1.1 rearnsha * Clean up the state as appropriate.
904 1.1 rearnsha */
905 1.1 rearnsha plcom_shutdown(sc);
906 1.1 rearnsha }
907 1.1 rearnsha
908 1.1 rearnsha return error;
909 1.1 rearnsha }
910 1.46 skrll
911 1.1 rearnsha int
912 1.12 christos plcomclose(dev_t dev, int flag, int mode, struct lwp *l)
913 1.1 rearnsha {
914 1.28 cegger struct plcom_softc *sc =
915 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
916 1.1 rearnsha struct tty *tp = sc->sc_tty;
917 1.1 rearnsha
918 1.1 rearnsha /* XXX This is for cons.c. */
919 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN))
920 1.1 rearnsha return 0;
921 1.1 rearnsha
922 1.1 rearnsha (*tp->t_linesw->l_close)(tp, flag);
923 1.1 rearnsha ttyclose(tp);
924 1.1 rearnsha
925 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
926 1.1 rearnsha return 0;
927 1.1 rearnsha
928 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
929 1.1 rearnsha /*
930 1.1 rearnsha * Although we got a last close, the device may still be in
931 1.1 rearnsha * use; e.g. if this was the dialout node, and there are still
932 1.1 rearnsha * processes waiting for carrier on the non-dialout node.
933 1.1 rearnsha */
934 1.1 rearnsha plcom_shutdown(sc);
935 1.1 rearnsha }
936 1.1 rearnsha
937 1.1 rearnsha return 0;
938 1.1 rearnsha }
939 1.46 skrll
940 1.1 rearnsha int
941 1.1 rearnsha plcomread(dev_t dev, struct uio *uio, int flag)
942 1.1 rearnsha {
943 1.28 cegger struct plcom_softc *sc =
944 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
945 1.1 rearnsha struct tty *tp = sc->sc_tty;
946 1.1 rearnsha
947 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
948 1.1 rearnsha return EIO;
949 1.46 skrll
950 1.1 rearnsha return (*tp->t_linesw->l_read)(tp, uio, flag);
951 1.1 rearnsha }
952 1.46 skrll
953 1.1 rearnsha int
954 1.1 rearnsha plcomwrite(dev_t dev, struct uio *uio, int flag)
955 1.1 rearnsha {
956 1.28 cegger struct plcom_softc *sc =
957 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
958 1.1 rearnsha struct tty *tp = sc->sc_tty;
959 1.1 rearnsha
960 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
961 1.1 rearnsha return EIO;
962 1.46 skrll
963 1.1 rearnsha return (*tp->t_linesw->l_write)(tp, uio, flag);
964 1.1 rearnsha }
965 1.1 rearnsha
966 1.1 rearnsha int
967 1.12 christos plcompoll(dev_t dev, int events, struct lwp *l)
968 1.1 rearnsha {
969 1.28 cegger struct plcom_softc *sc =
970 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
971 1.1 rearnsha struct tty *tp = sc->sc_tty;
972 1.1 rearnsha
973 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
974 1.1 rearnsha return EIO;
975 1.46 skrll
976 1.12 christos return (*tp->t_linesw->l_poll)(tp, events, l);
977 1.1 rearnsha }
978 1.1 rearnsha
979 1.1 rearnsha struct tty *
980 1.1 rearnsha plcomtty(dev_t dev)
981 1.1 rearnsha {
982 1.28 cegger struct plcom_softc *sc =
983 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
984 1.1 rearnsha struct tty *tp = sc->sc_tty;
985 1.1 rearnsha
986 1.1 rearnsha return tp;
987 1.1 rearnsha }
988 1.1 rearnsha
989 1.1 rearnsha int
990 1.20 christos plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
991 1.1 rearnsha {
992 1.28 cegger struct plcom_softc *sc =
993 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
994 1.40 skrll struct tty *tp;
995 1.1 rearnsha int error;
996 1.1 rearnsha
997 1.40 skrll if (sc == NULL)
998 1.40 skrll return ENXIO;
999 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1000 1.1 rearnsha return EIO;
1001 1.1 rearnsha
1002 1.40 skrll tp = sc->sc_tty;
1003 1.40 skrll
1004 1.12 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
1005 1.3 atatat if (error != EPASSTHROUGH)
1006 1.1 rearnsha return error;
1007 1.1 rearnsha
1008 1.12 christos error = ttioctl(tp, cmd, data, flag, l);
1009 1.3 atatat if (error != EPASSTHROUGH)
1010 1.1 rearnsha return error;
1011 1.1 rearnsha
1012 1.1 rearnsha error = 0;
1013 1.40 skrll switch (cmd) {
1014 1.40 skrll case TIOCSFLAGS:
1015 1.40 skrll error = kauth_authorize_device_tty(l->l_cred,
1016 1.40 skrll KAUTH_DEVICE_TTY_PRIVSET, tp);
1017 1.40 skrll break;
1018 1.40 skrll default:
1019 1.40 skrll /* nothing */
1020 1.40 skrll break;
1021 1.40 skrll }
1022 1.40 skrll if (error) {
1023 1.40 skrll return error;
1024 1.40 skrll }
1025 1.1 rearnsha
1026 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1027 1.1 rearnsha switch (cmd) {
1028 1.1 rearnsha case TIOCSBRK:
1029 1.1 rearnsha plcom_break(sc, 1);
1030 1.1 rearnsha break;
1031 1.1 rearnsha
1032 1.1 rearnsha case TIOCCBRK:
1033 1.1 rearnsha plcom_break(sc, 0);
1034 1.1 rearnsha break;
1035 1.1 rearnsha
1036 1.1 rearnsha case TIOCSDTR:
1037 1.1 rearnsha plcom_modem(sc, 1);
1038 1.1 rearnsha break;
1039 1.1 rearnsha
1040 1.1 rearnsha case TIOCCDTR:
1041 1.1 rearnsha plcom_modem(sc, 0);
1042 1.1 rearnsha break;
1043 1.1 rearnsha
1044 1.1 rearnsha case TIOCGFLAGS:
1045 1.1 rearnsha *(int *)data = sc->sc_swflags;
1046 1.1 rearnsha break;
1047 1.1 rearnsha
1048 1.1 rearnsha case TIOCSFLAGS:
1049 1.1 rearnsha sc->sc_swflags = *(int *)data;
1050 1.1 rearnsha break;
1051 1.1 rearnsha
1052 1.1 rearnsha case TIOCMSET:
1053 1.1 rearnsha case TIOCMBIS:
1054 1.1 rearnsha case TIOCMBIC:
1055 1.1 rearnsha tiocm_to_plcom(sc, cmd, *(int *)data);
1056 1.1 rearnsha break;
1057 1.1 rearnsha
1058 1.1 rearnsha case TIOCMGET:
1059 1.1 rearnsha *(int *)data = plcom_to_tiocm(sc);
1060 1.1 rearnsha break;
1061 1.1 rearnsha
1062 1.1 rearnsha case PPS_IOC_CREATE:
1063 1.1 rearnsha break;
1064 1.1 rearnsha
1065 1.1 rearnsha case PPS_IOC_DESTROY:
1066 1.1 rearnsha break;
1067 1.1 rearnsha
1068 1.1 rearnsha case PPS_IOC_GETPARAMS: {
1069 1.1 rearnsha pps_params_t *pp;
1070 1.1 rearnsha pp = (pps_params_t *)data;
1071 1.26 ad mutex_spin_enter(&timecounter_lock);
1072 1.1 rearnsha *pp = sc->ppsparam;
1073 1.26 ad mutex_spin_exit(&timecounter_lock);
1074 1.1 rearnsha break;
1075 1.1 rearnsha }
1076 1.1 rearnsha
1077 1.1 rearnsha case PPS_IOC_SETPARAMS: {
1078 1.1 rearnsha pps_params_t *pp;
1079 1.1 rearnsha int mode;
1080 1.1 rearnsha pp = (pps_params_t *)data;
1081 1.26 ad mutex_spin_enter(&timecounter_lock);
1082 1.1 rearnsha if (pp->mode & ~ppscap) {
1083 1.1 rearnsha error = EINVAL;
1084 1.26 ad mutex_spin_exit(&timecounter_lock);
1085 1.1 rearnsha break;
1086 1.1 rearnsha }
1087 1.1 rearnsha sc->ppsparam = *pp;
1088 1.46 skrll /*
1089 1.1 rearnsha * Compute msr masks from user-specified timestamp state.
1090 1.1 rearnsha */
1091 1.1 rearnsha mode = sc->ppsparam.mode;
1092 1.1 rearnsha #ifdef PPS_SYNC
1093 1.1 rearnsha if (mode & PPS_HARDPPSONASSERT) {
1094 1.1 rearnsha mode |= PPS_CAPTUREASSERT;
1095 1.1 rearnsha /* XXX revoke any previous HARDPPS source */
1096 1.1 rearnsha }
1097 1.1 rearnsha if (mode & PPS_HARDPPSONCLEAR) {
1098 1.1 rearnsha mode |= PPS_CAPTURECLEAR;
1099 1.1 rearnsha /* XXX revoke any previous HARDPPS source */
1100 1.1 rearnsha }
1101 1.1 rearnsha #endif /* PPS_SYNC */
1102 1.1 rearnsha switch (mode & PPS_CAPTUREBOTH) {
1103 1.1 rearnsha case 0:
1104 1.1 rearnsha sc->sc_ppsmask = 0;
1105 1.1 rearnsha break;
1106 1.46 skrll
1107 1.1 rearnsha case PPS_CAPTUREASSERT:
1108 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1109 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1110 1.1 rearnsha sc->sc_ppsclear = -1;
1111 1.1 rearnsha break;
1112 1.46 skrll
1113 1.1 rearnsha case PPS_CAPTURECLEAR:
1114 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1115 1.1 rearnsha sc->sc_ppsassert = -1;
1116 1.1 rearnsha sc->sc_ppsclear = 0;
1117 1.1 rearnsha break;
1118 1.1 rearnsha
1119 1.1 rearnsha case PPS_CAPTUREBOTH:
1120 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1121 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1122 1.1 rearnsha sc->sc_ppsclear = 0;
1123 1.1 rearnsha break;
1124 1.1 rearnsha
1125 1.1 rearnsha default:
1126 1.1 rearnsha error = EINVAL;
1127 1.1 rearnsha break;
1128 1.1 rearnsha }
1129 1.26 ad mutex_spin_exit(&timecounter_lock);
1130 1.1 rearnsha break;
1131 1.1 rearnsha }
1132 1.1 rearnsha
1133 1.1 rearnsha case PPS_IOC_GETCAP:
1134 1.1 rearnsha *(int*)data = ppscap;
1135 1.1 rearnsha break;
1136 1.1 rearnsha
1137 1.1 rearnsha case PPS_IOC_FETCH: {
1138 1.1 rearnsha pps_info_t *pi;
1139 1.1 rearnsha pi = (pps_info_t *)data;
1140 1.26 ad mutex_spin_enter(&timecounter_lock);
1141 1.1 rearnsha *pi = sc->ppsinfo;
1142 1.26 ad mutex_spin_exit(&timecounter_lock);
1143 1.1 rearnsha break;
1144 1.1 rearnsha }
1145 1.1 rearnsha
1146 1.1 rearnsha case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */
1147 1.1 rearnsha /*
1148 1.1 rearnsha * Some GPS clocks models use the falling rather than
1149 1.46 skrll * rising edge as the on-the-second signal.
1150 1.1 rearnsha * The old API has no way to specify PPS polarity.
1151 1.1 rearnsha */
1152 1.26 ad mutex_spin_enter(&timecounter_lock);
1153 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1154 1.1 rearnsha #ifndef PPS_TRAILING_EDGE
1155 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1156 1.1 rearnsha sc->sc_ppsclear = -1;
1157 1.46 skrll TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1158 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
1159 1.1 rearnsha #else
1160 1.1 rearnsha sc->sc_ppsassert = -1
1161 1.1 rearnsha sc->sc_ppsclear = 0;
1162 1.46 skrll TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1163 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
1164 1.1 rearnsha #endif
1165 1.26 ad mutex_spin_exit(&timecounter_lock);
1166 1.1 rearnsha break;
1167 1.1 rearnsha
1168 1.1 rearnsha default:
1169 1.3 atatat error = EPASSTHROUGH;
1170 1.1 rearnsha break;
1171 1.1 rearnsha }
1172 1.1 rearnsha
1173 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1174 1.1 rearnsha
1175 1.1 rearnsha #ifdef PLCOM_DEBUG
1176 1.1 rearnsha if (plcom_debug)
1177 1.1 rearnsha plcomstatus(sc, "plcomioctl ");
1178 1.1 rearnsha #endif
1179 1.1 rearnsha
1180 1.1 rearnsha return error;
1181 1.1 rearnsha }
1182 1.1 rearnsha
1183 1.1 rearnsha integrate void
1184 1.1 rearnsha plcom_schedrx(struct plcom_softc *sc)
1185 1.1 rearnsha {
1186 1.1 rearnsha
1187 1.1 rearnsha sc->sc_rx_ready = 1;
1188 1.1 rearnsha
1189 1.1 rearnsha /* Wake up the poller. */
1190 1.25 ad softint_schedule(sc->sc_si);
1191 1.1 rearnsha }
1192 1.1 rearnsha
1193 1.1 rearnsha void
1194 1.1 rearnsha plcom_break(struct plcom_softc *sc, int onoff)
1195 1.1 rearnsha {
1196 1.1 rearnsha
1197 1.1 rearnsha if (onoff)
1198 1.35 skrll SET(sc->sc_lcr, PL01X_LCR_BRK);
1199 1.1 rearnsha else
1200 1.35 skrll CLR(sc->sc_lcr, PL01X_LCR_BRK);
1201 1.1 rearnsha
1202 1.1 rearnsha if (!sc->sc_heldchange) {
1203 1.1 rearnsha if (sc->sc_tx_busy) {
1204 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1205 1.1 rearnsha sc->sc_tbc = 0;
1206 1.1 rearnsha sc->sc_heldchange = 1;
1207 1.1 rearnsha } else
1208 1.1 rearnsha plcom_loadchannelregs(sc);
1209 1.1 rearnsha }
1210 1.1 rearnsha }
1211 1.1 rearnsha
1212 1.1 rearnsha void
1213 1.1 rearnsha plcom_modem(struct plcom_softc *sc, int onoff)
1214 1.1 rearnsha {
1215 1.1 rearnsha
1216 1.1 rearnsha if (sc->sc_mcr_dtr == 0)
1217 1.1 rearnsha return;
1218 1.1 rearnsha
1219 1.1 rearnsha if (onoff)
1220 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_dtr);
1221 1.1 rearnsha else
1222 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1223 1.1 rearnsha
1224 1.1 rearnsha if (!sc->sc_heldchange) {
1225 1.1 rearnsha if (sc->sc_tx_busy) {
1226 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1227 1.1 rearnsha sc->sc_tbc = 0;
1228 1.1 rearnsha sc->sc_heldchange = 1;
1229 1.1 rearnsha } else
1230 1.1 rearnsha plcom_loadchannelregs(sc);
1231 1.1 rearnsha }
1232 1.1 rearnsha }
1233 1.1 rearnsha
1234 1.1 rearnsha void
1235 1.1 rearnsha tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits)
1236 1.1 rearnsha {
1237 1.1 rearnsha u_char plcombits;
1238 1.1 rearnsha
1239 1.1 rearnsha plcombits = 0;
1240 1.1 rearnsha if (ISSET(ttybits, TIOCM_DTR))
1241 1.35 skrll SET(plcombits, PL01X_MCR_DTR);
1242 1.1 rearnsha if (ISSET(ttybits, TIOCM_RTS))
1243 1.35 skrll SET(plcombits, PL01X_MCR_RTS);
1244 1.46 skrll
1245 1.1 rearnsha switch (how) {
1246 1.1 rearnsha case TIOCMBIC:
1247 1.1 rearnsha CLR(sc->sc_mcr, plcombits);
1248 1.1 rearnsha break;
1249 1.1 rearnsha
1250 1.1 rearnsha case TIOCMBIS:
1251 1.1 rearnsha SET(sc->sc_mcr, plcombits);
1252 1.1 rearnsha break;
1253 1.1 rearnsha
1254 1.1 rearnsha case TIOCMSET:
1255 1.35 skrll CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
1256 1.1 rearnsha SET(sc->sc_mcr, plcombits);
1257 1.1 rearnsha break;
1258 1.1 rearnsha }
1259 1.1 rearnsha
1260 1.1 rearnsha if (!sc->sc_heldchange) {
1261 1.1 rearnsha if (sc->sc_tx_busy) {
1262 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1263 1.1 rearnsha sc->sc_tbc = 0;
1264 1.1 rearnsha sc->sc_heldchange = 1;
1265 1.1 rearnsha } else
1266 1.1 rearnsha plcom_loadchannelregs(sc);
1267 1.1 rearnsha }
1268 1.1 rearnsha }
1269 1.1 rearnsha
1270 1.1 rearnsha int
1271 1.1 rearnsha plcom_to_tiocm(struct plcom_softc *sc)
1272 1.1 rearnsha {
1273 1.1 rearnsha u_char plcombits;
1274 1.1 rearnsha int ttybits = 0;
1275 1.1 rearnsha
1276 1.1 rearnsha plcombits = sc->sc_mcr;
1277 1.35 skrll if (ISSET(plcombits, PL01X_MCR_DTR))
1278 1.1 rearnsha SET(ttybits, TIOCM_DTR);
1279 1.35 skrll if (ISSET(plcombits, PL01X_MCR_RTS))
1280 1.1 rearnsha SET(ttybits, TIOCM_RTS);
1281 1.1 rearnsha
1282 1.1 rearnsha plcombits = sc->sc_msr;
1283 1.35 skrll if (ISSET(plcombits, PL01X_MSR_DCD))
1284 1.1 rearnsha SET(ttybits, TIOCM_CD);
1285 1.35 skrll if (ISSET(plcombits, PL01X_MSR_CTS))
1286 1.1 rearnsha SET(ttybits, TIOCM_CTS);
1287 1.35 skrll if (ISSET(plcombits, PL01X_MSR_DSR))
1288 1.1 rearnsha SET(ttybits, TIOCM_DSR);
1289 1.40 skrll if (ISSET(plcombits, PL011_MSR_RI))
1290 1.40 skrll SET(ttybits, TIOCM_RI);
1291 1.1 rearnsha
1292 1.1 rearnsha if (sc->sc_cr != 0)
1293 1.1 rearnsha SET(ttybits, TIOCM_LE);
1294 1.1 rearnsha
1295 1.1 rearnsha return ttybits;
1296 1.1 rearnsha }
1297 1.1 rearnsha
1298 1.1 rearnsha static u_char
1299 1.1 rearnsha cflag2lcr(tcflag_t cflag)
1300 1.1 rearnsha {
1301 1.1 rearnsha u_char lcr = 0;
1302 1.1 rearnsha
1303 1.1 rearnsha switch (ISSET(cflag, CSIZE)) {
1304 1.1 rearnsha case CS5:
1305 1.35 skrll SET(lcr, PL01X_LCR_5BITS);
1306 1.1 rearnsha break;
1307 1.1 rearnsha case CS6:
1308 1.35 skrll SET(lcr, PL01X_LCR_6BITS);
1309 1.1 rearnsha break;
1310 1.1 rearnsha case CS7:
1311 1.35 skrll SET(lcr, PL01X_LCR_7BITS);
1312 1.1 rearnsha break;
1313 1.1 rearnsha case CS8:
1314 1.35 skrll SET(lcr, PL01X_LCR_8BITS);
1315 1.1 rearnsha break;
1316 1.1 rearnsha }
1317 1.1 rearnsha if (ISSET(cflag, PARENB)) {
1318 1.35 skrll SET(lcr, PL01X_LCR_PEN);
1319 1.1 rearnsha if (!ISSET(cflag, PARODD))
1320 1.35 skrll SET(lcr, PL01X_LCR_EPS);
1321 1.1 rearnsha }
1322 1.1 rearnsha if (ISSET(cflag, CSTOPB))
1323 1.35 skrll SET(lcr, PL01X_LCR_STP2);
1324 1.1 rearnsha
1325 1.1 rearnsha return lcr;
1326 1.1 rearnsha }
1327 1.1 rearnsha
1328 1.1 rearnsha int
1329 1.1 rearnsha plcomparam(struct tty *tp, struct termios *t)
1330 1.1 rearnsha {
1331 1.28 cegger struct plcom_softc *sc =
1332 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1333 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1334 1.40 skrll int ospeed = -1;
1335 1.1 rearnsha u_char lcr;
1336 1.1 rearnsha
1337 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1338 1.1 rearnsha return EIO;
1339 1.1 rearnsha
1340 1.40 skrll switch (pi->pi_type) {
1341 1.40 skrll case PLCOM_TYPE_PL010:
1342 1.40 skrll ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency);
1343 1.40 skrll break;
1344 1.40 skrll case PLCOM_TYPE_PL011:
1345 1.40 skrll ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency);
1346 1.40 skrll break;
1347 1.40 skrll }
1348 1.1 rearnsha
1349 1.1 rearnsha /* Check requested parameters. */
1350 1.1 rearnsha if (ospeed < 0)
1351 1.1 rearnsha return EINVAL;
1352 1.1 rearnsha if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1353 1.1 rearnsha return EINVAL;
1354 1.1 rearnsha
1355 1.1 rearnsha /*
1356 1.1 rearnsha * For the console, always force CLOCAL and !HUPCL, so that the port
1357 1.1 rearnsha * is always active.
1358 1.1 rearnsha */
1359 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1360 1.1 rearnsha ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
1361 1.1 rearnsha SET(t->c_cflag, CLOCAL);
1362 1.1 rearnsha CLR(t->c_cflag, HUPCL);
1363 1.1 rearnsha }
1364 1.1 rearnsha
1365 1.1 rearnsha /*
1366 1.1 rearnsha * If there were no changes, don't do anything. This avoids dropping
1367 1.1 rearnsha * input and improves performance when all we did was frob things like
1368 1.1 rearnsha * VMIN and VTIME.
1369 1.1 rearnsha */
1370 1.1 rearnsha if (tp->t_ospeed == t->c_ospeed &&
1371 1.1 rearnsha tp->t_cflag == t->c_cflag)
1372 1.1 rearnsha return 0;
1373 1.1 rearnsha
1374 1.35 skrll lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag);
1375 1.1 rearnsha
1376 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1377 1.1 rearnsha
1378 1.1 rearnsha sc->sc_lcr = lcr;
1379 1.1 rearnsha
1380 1.1 rearnsha /*
1381 1.1 rearnsha * PL010 has a fixed-length FIFO trigger point.
1382 1.1 rearnsha */
1383 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO))
1384 1.1 rearnsha sc->sc_fifo = 1;
1385 1.1 rearnsha else
1386 1.1 rearnsha sc->sc_fifo = 0;
1387 1.1 rearnsha
1388 1.1 rearnsha if (sc->sc_fifo)
1389 1.35 skrll SET(sc->sc_lcr, PL01X_LCR_FEN);
1390 1.1 rearnsha
1391 1.1 rearnsha /*
1392 1.1 rearnsha * If we're not in a mode that assumes a connection is present, then
1393 1.1 rearnsha * ignore carrier changes.
1394 1.1 rearnsha */
1395 1.1 rearnsha if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1396 1.1 rearnsha sc->sc_msr_dcd = 0;
1397 1.1 rearnsha else
1398 1.35 skrll sc->sc_msr_dcd = PL01X_MSR_DCD;
1399 1.1 rearnsha /*
1400 1.1 rearnsha * Set the flow control pins depending on the current flow control
1401 1.1 rearnsha * mode.
1402 1.1 rearnsha */
1403 1.1 rearnsha if (ISSET(t->c_cflag, CRTSCTS)) {
1404 1.35 skrll sc->sc_mcr_dtr = PL01X_MCR_DTR;
1405 1.35 skrll sc->sc_mcr_rts = PL01X_MCR_RTS;
1406 1.35 skrll sc->sc_msr_cts = PL01X_MSR_CTS;
1407 1.1 rearnsha } else if (ISSET(t->c_cflag, MDMBUF)) {
1408 1.1 rearnsha /*
1409 1.1 rearnsha * For DTR/DCD flow control, make sure we don't toggle DTR for
1410 1.1 rearnsha * carrier detection.
1411 1.1 rearnsha */
1412 1.1 rearnsha sc->sc_mcr_dtr = 0;
1413 1.35 skrll sc->sc_mcr_rts = PL01X_MCR_DTR;
1414 1.35 skrll sc->sc_msr_cts = PL01X_MSR_DCD;
1415 1.1 rearnsha } else {
1416 1.1 rearnsha /*
1417 1.1 rearnsha * If no flow control, then always set RTS. This will make
1418 1.1 rearnsha * the other side happy if it mistakenly thinks we're doing
1419 1.1 rearnsha * RTS/CTS flow control.
1420 1.1 rearnsha */
1421 1.35 skrll sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS;
1422 1.1 rearnsha sc->sc_mcr_rts = 0;
1423 1.1 rearnsha sc->sc_msr_cts = 0;
1424 1.35 skrll if (ISSET(sc->sc_mcr, PL01X_MCR_DTR))
1425 1.35 skrll SET(sc->sc_mcr, PL01X_MCR_RTS);
1426 1.1 rearnsha else
1427 1.35 skrll CLR(sc->sc_mcr, PL01X_MCR_RTS);
1428 1.1 rearnsha }
1429 1.1 rearnsha sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1430 1.1 rearnsha
1431 1.1 rearnsha #if 0
1432 1.1 rearnsha if (ospeed == 0)
1433 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1434 1.1 rearnsha else
1435 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_dtr);
1436 1.1 rearnsha #endif
1437 1.1 rearnsha
1438 1.40 skrll switch (pi->pi_type) {
1439 1.40 skrll case PLCOM_TYPE_PL010:
1440 1.40 skrll sc->sc_ratel = ospeed & 0xff;
1441 1.40 skrll sc->sc_rateh = (ospeed >> 8) & 0xff;
1442 1.40 skrll break;
1443 1.40 skrll case PLCOM_TYPE_PL011:
1444 1.40 skrll sc->sc_ratel = ospeed & ((1 << 6) - 1);
1445 1.40 skrll sc->sc_rateh = ospeed >> 6;
1446 1.40 skrll break;
1447 1.40 skrll }
1448 1.1 rearnsha
1449 1.1 rearnsha /* And copy to tty. */
1450 1.40 skrll tp->t_ispeed = t->c_ospeed;
1451 1.1 rearnsha tp->t_ospeed = t->c_ospeed;
1452 1.1 rearnsha tp->t_cflag = t->c_cflag;
1453 1.1 rearnsha
1454 1.1 rearnsha if (!sc->sc_heldchange) {
1455 1.1 rearnsha if (sc->sc_tx_busy) {
1456 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1457 1.1 rearnsha sc->sc_tbc = 0;
1458 1.1 rearnsha sc->sc_heldchange = 1;
1459 1.1 rearnsha } else
1460 1.1 rearnsha plcom_loadchannelregs(sc);
1461 1.1 rearnsha }
1462 1.1 rearnsha
1463 1.1 rearnsha if (!ISSET(t->c_cflag, CHWFLOW)) {
1464 1.1 rearnsha /* Disable the high water mark. */
1465 1.1 rearnsha sc->sc_r_hiwat = 0;
1466 1.1 rearnsha sc->sc_r_lowat = 0;
1467 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1468 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1469 1.1 rearnsha plcom_schedrx(sc);
1470 1.1 rearnsha }
1471 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1472 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1473 1.1 rearnsha plcom_hwiflow(sc);
1474 1.1 rearnsha }
1475 1.1 rearnsha } else {
1476 1.1 rearnsha sc->sc_r_hiwat = plcom_rbuf_hiwat;
1477 1.1 rearnsha sc->sc_r_lowat = plcom_rbuf_lowat;
1478 1.1 rearnsha }
1479 1.1 rearnsha
1480 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1481 1.1 rearnsha
1482 1.1 rearnsha /*
1483 1.1 rearnsha * Update the tty layer's idea of the carrier bit, in case we changed
1484 1.1 rearnsha * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1485 1.1 rearnsha * explicit request.
1486 1.1 rearnsha */
1487 1.35 skrll (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD));
1488 1.1 rearnsha
1489 1.1 rearnsha #ifdef PLCOM_DEBUG
1490 1.1 rearnsha if (plcom_debug)
1491 1.1 rearnsha plcomstatus(sc, "plcomparam ");
1492 1.1 rearnsha #endif
1493 1.1 rearnsha
1494 1.1 rearnsha if (!ISSET(t->c_cflag, CHWFLOW)) {
1495 1.1 rearnsha if (sc->sc_tx_stopped) {
1496 1.1 rearnsha sc->sc_tx_stopped = 0;
1497 1.1 rearnsha plcomstart(tp);
1498 1.1 rearnsha }
1499 1.1 rearnsha }
1500 1.1 rearnsha
1501 1.1 rearnsha return 0;
1502 1.1 rearnsha }
1503 1.1 rearnsha
1504 1.1 rearnsha void
1505 1.1 rearnsha plcom_iflush(struct plcom_softc *sc)
1506 1.1 rearnsha {
1507 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1508 1.1 rearnsha #ifdef DIAGNOSTIC
1509 1.1 rearnsha int reg;
1510 1.1 rearnsha #endif
1511 1.1 rearnsha int timo;
1512 1.1 rearnsha
1513 1.1 rearnsha #ifdef DIAGNOSTIC
1514 1.1 rearnsha reg = 0xffff;
1515 1.1 rearnsha #endif
1516 1.1 rearnsha timo = 50000;
1517 1.1 rearnsha /* flush any pending I/O */
1518 1.40 skrll while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)
1519 1.1 rearnsha && --timo)
1520 1.1 rearnsha #ifdef DIAGNOSTIC
1521 1.1 rearnsha reg =
1522 1.1 rearnsha #else
1523 1.1 rearnsha (void)
1524 1.1 rearnsha #endif
1525 1.40 skrll PREAD1(pi, PL01XCOM_DR);
1526 1.1 rearnsha #ifdef DIAGNOSTIC
1527 1.1 rearnsha if (!timo)
1528 1.40 skrll aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__,
1529 1.40 skrll reg);
1530 1.1 rearnsha #endif
1531 1.1 rearnsha }
1532 1.1 rearnsha
1533 1.1 rearnsha void
1534 1.1 rearnsha plcom_loadchannelregs(struct plcom_softc *sc)
1535 1.1 rearnsha {
1536 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1537 1.1 rearnsha
1538 1.1 rearnsha /* XXXXX necessary? */
1539 1.1 rearnsha plcom_iflush(sc);
1540 1.1 rearnsha
1541 1.40 skrll switch (pi->pi_type) {
1542 1.40 skrll case PLCOM_TYPE_PL010:
1543 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
1544 1.55 jmcneill if (sc->sc_frequency != 0) {
1545 1.55 jmcneill PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel);
1546 1.55 jmcneill PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh);
1547 1.55 jmcneill }
1548 1.40 skrll PWRITE1(pi, PL010COM_LCR, sc->sc_lcr);
1549 1.40 skrll
1550 1.40 skrll /* XXX device_unit() abuse */
1551 1.40 skrll if (sc->sc_set_mcr)
1552 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
1553 1.40 skrll device_unit(sc->sc_dev),
1554 1.40 skrll sc->sc_mcr_active = sc->sc_mcr);
1555 1.40 skrll
1556 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1557 1.40 skrll break;
1558 1.40 skrll
1559 1.40 skrll case PLCOM_TYPE_PL011:
1560 1.40 skrll PWRITE4(pi, PL011COM_CR, 0);
1561 1.55 jmcneill if (sc->sc_frequency != 0) {
1562 1.55 jmcneill PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel);
1563 1.55 jmcneill PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh);
1564 1.55 jmcneill }
1565 1.40 skrll PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr);
1566 1.40 skrll sc->sc_mcr_active = sc->sc_mcr;
1567 1.40 skrll CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR));
1568 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active));
1569 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
1570 1.40 skrll break;
1571 1.40 skrll }
1572 1.1 rearnsha }
1573 1.1 rearnsha
1574 1.1 rearnsha int
1575 1.1 rearnsha plcomhwiflow(struct tty *tp, int block)
1576 1.1 rearnsha {
1577 1.28 cegger struct plcom_softc *sc =
1578 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1579 1.1 rearnsha
1580 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1581 1.1 rearnsha return 0;
1582 1.1 rearnsha
1583 1.1 rearnsha if (sc->sc_mcr_rts == 0)
1584 1.1 rearnsha return 0;
1585 1.1 rearnsha
1586 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1587 1.46 skrll
1588 1.1 rearnsha if (block) {
1589 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1590 1.1 rearnsha SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1591 1.1 rearnsha plcom_hwiflow(sc);
1592 1.1 rearnsha }
1593 1.1 rearnsha } else {
1594 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1595 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1596 1.1 rearnsha plcom_schedrx(sc);
1597 1.1 rearnsha }
1598 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1599 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1600 1.1 rearnsha plcom_hwiflow(sc);
1601 1.1 rearnsha }
1602 1.1 rearnsha }
1603 1.1 rearnsha
1604 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1605 1.1 rearnsha return 1;
1606 1.1 rearnsha }
1607 1.46 skrll
1608 1.1 rearnsha /*
1609 1.1 rearnsha * (un)block input via hw flowcontrol
1610 1.1 rearnsha */
1611 1.1 rearnsha void
1612 1.1 rearnsha plcom_hwiflow(struct plcom_softc *sc)
1613 1.1 rearnsha {
1614 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1615 1.40 skrll
1616 1.1 rearnsha if (sc->sc_mcr_rts == 0)
1617 1.1 rearnsha return;
1618 1.1 rearnsha
1619 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1620 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_rts);
1621 1.1 rearnsha CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1622 1.1 rearnsha } else {
1623 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_rts);
1624 1.1 rearnsha SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1625 1.1 rearnsha }
1626 1.40 skrll switch (pi->pi_type) {
1627 1.40 skrll case PLCOM_TYPE_PL010:
1628 1.40 skrll if (sc->sc_set_mcr)
1629 1.40 skrll /* XXX device_unit() abuse */
1630 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
1631 1.40 skrll device_unit(sc->sc_dev), sc->sc_mcr_active);
1632 1.40 skrll break;
1633 1.40 skrll case PLCOM_TYPE_PL011:
1634 1.40 skrll CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR));
1635 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active));
1636 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
1637 1.40 skrll break;
1638 1.40 skrll }
1639 1.1 rearnsha }
1640 1.1 rearnsha
1641 1.1 rearnsha
1642 1.1 rearnsha void
1643 1.1 rearnsha plcomstart(struct tty *tp)
1644 1.1 rearnsha {
1645 1.28 cegger struct plcom_softc *sc =
1646 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1647 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1648 1.1 rearnsha int s;
1649 1.1 rearnsha
1650 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1651 1.1 rearnsha return;
1652 1.1 rearnsha
1653 1.1 rearnsha s = spltty();
1654 1.1 rearnsha if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1655 1.1 rearnsha goto out;
1656 1.1 rearnsha if (sc->sc_tx_stopped)
1657 1.1 rearnsha goto out;
1658 1.1 rearnsha
1659 1.24 ad if (!ttypull(tp))
1660 1.24 ad goto out;
1661 1.1 rearnsha
1662 1.1 rearnsha /* Grab the first contiguous region of buffer space. */
1663 1.1 rearnsha {
1664 1.1 rearnsha u_char *tba;
1665 1.1 rearnsha int tbc;
1666 1.1 rearnsha
1667 1.1 rearnsha tba = tp->t_outq.c_cf;
1668 1.1 rearnsha tbc = ndqb(&tp->t_outq, 0);
1669 1.1 rearnsha
1670 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1671 1.1 rearnsha
1672 1.1 rearnsha sc->sc_tba = tba;
1673 1.1 rearnsha sc->sc_tbc = tbc;
1674 1.1 rearnsha }
1675 1.1 rearnsha
1676 1.1 rearnsha SET(tp->t_state, TS_BUSY);
1677 1.1 rearnsha sc->sc_tx_busy = 1;
1678 1.1 rearnsha
1679 1.1 rearnsha /* Enable transmit completion interrupts if necessary. */
1680 1.40 skrll switch (pi->pi_type) {
1681 1.40 skrll case PLCOM_TYPE_PL010:
1682 1.40 skrll if (!ISSET(sc->sc_cr, PL010_CR_TIE)) {
1683 1.40 skrll SET(sc->sc_cr, PL010_CR_TIE);
1684 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1685 1.40 skrll }
1686 1.40 skrll break;
1687 1.40 skrll case PLCOM_TYPE_PL011:
1688 1.40 skrll if (!ISSET(sc->sc_imsc, PL011_INT_TX)) {
1689 1.40 skrll SET(sc->sc_imsc, PL011_INT_TX);
1690 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
1691 1.40 skrll }
1692 1.40 skrll break;
1693 1.1 rearnsha }
1694 1.1 rearnsha
1695 1.1 rearnsha /* Output the first chunk of the contiguous buffer. */
1696 1.1 rearnsha {
1697 1.42 skrll int n;
1698 1.1 rearnsha
1699 1.1 rearnsha n = sc->sc_tbc;
1700 1.42 skrll if (n > sc->sc_fifolen)
1701 1.42 skrll n = sc->sc_fifolen;
1702 1.40 skrll PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n);
1703 1.1 rearnsha sc->sc_tbc -= n;
1704 1.1 rearnsha sc->sc_tba += n;
1705 1.1 rearnsha }
1706 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1707 1.1 rearnsha out:
1708 1.1 rearnsha splx(s);
1709 1.1 rearnsha return;
1710 1.1 rearnsha }
1711 1.1 rearnsha
1712 1.1 rearnsha /*
1713 1.1 rearnsha * Stop output on a line.
1714 1.1 rearnsha */
1715 1.1 rearnsha void
1716 1.1 rearnsha plcomstop(struct tty *tp, int flag)
1717 1.1 rearnsha {
1718 1.28 cegger struct plcom_softc *sc =
1719 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1720 1.1 rearnsha
1721 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1722 1.1 rearnsha if (ISSET(tp->t_state, TS_BUSY)) {
1723 1.1 rearnsha /* Stop transmitting at the next chunk. */
1724 1.1 rearnsha sc->sc_tbc = 0;
1725 1.1 rearnsha sc->sc_heldtbc = 0;
1726 1.1 rearnsha if (!ISSET(tp->t_state, TS_TTSTOP))
1727 1.1 rearnsha SET(tp->t_state, TS_FLUSH);
1728 1.1 rearnsha }
1729 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1730 1.1 rearnsha }
1731 1.1 rearnsha
1732 1.1 rearnsha void
1733 1.1 rearnsha plcomdiag(void *arg)
1734 1.1 rearnsha {
1735 1.1 rearnsha struct plcom_softc *sc = arg;
1736 1.1 rearnsha int overflows, floods;
1737 1.1 rearnsha
1738 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1739 1.1 rearnsha overflows = sc->sc_overflows;
1740 1.1 rearnsha sc->sc_overflows = 0;
1741 1.1 rearnsha floods = sc->sc_floods;
1742 1.1 rearnsha sc->sc_floods = 0;
1743 1.1 rearnsha sc->sc_errors = 0;
1744 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1745 1.1 rearnsha
1746 1.1 rearnsha log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1747 1.38 skrll device_xname(sc->sc_dev),
1748 1.1 rearnsha overflows, overflows == 1 ? "" : "s",
1749 1.1 rearnsha floods, floods == 1 ? "" : "s");
1750 1.1 rearnsha }
1751 1.1 rearnsha
1752 1.1 rearnsha integrate void
1753 1.1 rearnsha plcom_rxsoft(struct plcom_softc *sc, struct tty *tp)
1754 1.1 rearnsha {
1755 1.1 rearnsha int (*rint) (int, struct tty *) = tp->t_linesw->l_rint;
1756 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1757 1.1 rearnsha u_char *get, *end;
1758 1.1 rearnsha u_int cc, scc;
1759 1.1 rearnsha u_char rsr;
1760 1.1 rearnsha int code;
1761 1.1 rearnsha
1762 1.1 rearnsha end = sc->sc_ebuf;
1763 1.1 rearnsha get = sc->sc_rbget;
1764 1.1 rearnsha scc = cc = plcom_rbuf_size - sc->sc_rbavail;
1765 1.1 rearnsha
1766 1.1 rearnsha if (cc == plcom_rbuf_size) {
1767 1.1 rearnsha sc->sc_floods++;
1768 1.1 rearnsha if (sc->sc_errors++ == 0)
1769 1.1 rearnsha callout_reset(&sc->sc_diag_callout, 60 * hz,
1770 1.1 rearnsha plcomdiag, sc);
1771 1.1 rearnsha }
1772 1.1 rearnsha
1773 1.1 rearnsha while (cc) {
1774 1.1 rearnsha code = get[0];
1775 1.1 rearnsha rsr = get[1];
1776 1.35 skrll if (ISSET(rsr, PL01X_RSR_ERROR)) {
1777 1.35 skrll if (ISSET(rsr, PL01X_RSR_OE)) {
1778 1.1 rearnsha sc->sc_overflows++;
1779 1.1 rearnsha if (sc->sc_errors++ == 0)
1780 1.1 rearnsha callout_reset(&sc->sc_diag_callout,
1781 1.1 rearnsha 60 * hz, plcomdiag, sc);
1782 1.1 rearnsha }
1783 1.35 skrll if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE))
1784 1.1 rearnsha SET(code, TTY_FE);
1785 1.35 skrll if (ISSET(rsr, PL01X_RSR_PE))
1786 1.1 rearnsha SET(code, TTY_PE);
1787 1.1 rearnsha }
1788 1.1 rearnsha if ((*rint)(code, tp) == -1) {
1789 1.1 rearnsha /*
1790 1.1 rearnsha * The line discipline's buffer is out of space.
1791 1.1 rearnsha */
1792 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1793 1.1 rearnsha /*
1794 1.1 rearnsha * We're either not using flow control, or the
1795 1.1 rearnsha * line discipline didn't tell us to block for
1796 1.1 rearnsha * some reason. Either way, we have no way to
1797 1.1 rearnsha * know when there's more space available, so
1798 1.1 rearnsha * just drop the rest of the data.
1799 1.1 rearnsha */
1800 1.1 rearnsha get += cc << 1;
1801 1.1 rearnsha if (get >= end)
1802 1.1 rearnsha get -= plcom_rbuf_size << 1;
1803 1.1 rearnsha cc = 0;
1804 1.1 rearnsha } else {
1805 1.1 rearnsha /*
1806 1.1 rearnsha * Don't schedule any more receive processing
1807 1.1 rearnsha * until the line discipline tells us there's
1808 1.1 rearnsha * space available (through plcomhwiflow()).
1809 1.1 rearnsha * Leave the rest of the data in the input
1810 1.1 rearnsha * buffer.
1811 1.1 rearnsha */
1812 1.1 rearnsha SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1813 1.1 rearnsha }
1814 1.1 rearnsha break;
1815 1.1 rearnsha }
1816 1.1 rearnsha get += 2;
1817 1.1 rearnsha if (get >= end)
1818 1.1 rearnsha get = sc->sc_rbuf;
1819 1.1 rearnsha cc--;
1820 1.1 rearnsha }
1821 1.1 rearnsha
1822 1.1 rearnsha if (cc != scc) {
1823 1.1 rearnsha sc->sc_rbget = get;
1824 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1825 1.36 skrll
1826 1.1 rearnsha cc = sc->sc_rbavail += scc - cc;
1827 1.1 rearnsha /* Buffers should be ok again, release possible block. */
1828 1.1 rearnsha if (cc >= sc->sc_r_lowat) {
1829 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1830 1.1 rearnsha CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1831 1.40 skrll switch (pi->pi_type) {
1832 1.40 skrll case PLCOM_TYPE_PL010:
1833 1.40 skrll SET(sc->sc_cr,
1834 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE);
1835 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1836 1.40 skrll break;
1837 1.40 skrll case PLCOM_TYPE_PL011:
1838 1.40 skrll SET(sc->sc_imsc,
1839 1.40 skrll PL011_INT_RX | PL011_INT_RT);
1840 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
1841 1.40 skrll break;
1842 1.40 skrll }
1843 1.1 rearnsha }
1844 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1845 1.1 rearnsha CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1846 1.1 rearnsha plcom_hwiflow(sc);
1847 1.1 rearnsha }
1848 1.1 rearnsha }
1849 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1850 1.1 rearnsha }
1851 1.1 rearnsha }
1852 1.1 rearnsha
1853 1.1 rearnsha integrate void
1854 1.1 rearnsha plcom_txsoft(struct plcom_softc *sc, struct tty *tp)
1855 1.1 rearnsha {
1856 1.1 rearnsha
1857 1.1 rearnsha CLR(tp->t_state, TS_BUSY);
1858 1.1 rearnsha if (ISSET(tp->t_state, TS_FLUSH))
1859 1.1 rearnsha CLR(tp->t_state, TS_FLUSH);
1860 1.1 rearnsha else
1861 1.1 rearnsha ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1862 1.1 rearnsha (*tp->t_linesw->l_start)(tp);
1863 1.1 rearnsha }
1864 1.1 rearnsha
1865 1.1 rearnsha integrate void
1866 1.1 rearnsha plcom_stsoft(struct plcom_softc *sc, struct tty *tp)
1867 1.1 rearnsha {
1868 1.1 rearnsha u_char msr, delta;
1869 1.1 rearnsha
1870 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1871 1.1 rearnsha msr = sc->sc_msr;
1872 1.1 rearnsha delta = sc->sc_msr_delta;
1873 1.1 rearnsha sc->sc_msr_delta = 0;
1874 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1875 1.1 rearnsha
1876 1.1 rearnsha if (ISSET(delta, sc->sc_msr_dcd)) {
1877 1.1 rearnsha /*
1878 1.1 rearnsha * Inform the tty layer that carrier detect changed.
1879 1.1 rearnsha */
1880 1.35 skrll (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD));
1881 1.1 rearnsha }
1882 1.1 rearnsha
1883 1.1 rearnsha if (ISSET(delta, sc->sc_msr_cts)) {
1884 1.1 rearnsha /* Block or unblock output according to flow control. */
1885 1.1 rearnsha if (ISSET(msr, sc->sc_msr_cts)) {
1886 1.1 rearnsha sc->sc_tx_stopped = 0;
1887 1.1 rearnsha (*tp->t_linesw->l_start)(tp);
1888 1.1 rearnsha } else {
1889 1.1 rearnsha sc->sc_tx_stopped = 1;
1890 1.1 rearnsha }
1891 1.1 rearnsha }
1892 1.1 rearnsha
1893 1.1 rearnsha #ifdef PLCOM_DEBUG
1894 1.1 rearnsha if (plcom_debug)
1895 1.1 rearnsha plcomstatus(sc, "plcom_stsoft");
1896 1.1 rearnsha #endif
1897 1.1 rearnsha }
1898 1.1 rearnsha
1899 1.1 rearnsha void
1900 1.1 rearnsha plcomsoft(void *arg)
1901 1.1 rearnsha {
1902 1.1 rearnsha struct plcom_softc *sc = arg;
1903 1.1 rearnsha struct tty *tp;
1904 1.1 rearnsha
1905 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1906 1.1 rearnsha return;
1907 1.1 rearnsha
1908 1.21 ad tp = sc->sc_tty;
1909 1.46 skrll
1910 1.21 ad if (sc->sc_rx_ready) {
1911 1.21 ad sc->sc_rx_ready = 0;
1912 1.21 ad plcom_rxsoft(sc, tp);
1913 1.21 ad }
1914 1.1 rearnsha
1915 1.21 ad if (sc->sc_st_check) {
1916 1.21 ad sc->sc_st_check = 0;
1917 1.21 ad plcom_stsoft(sc, tp);
1918 1.21 ad }
1919 1.1 rearnsha
1920 1.21 ad if (sc->sc_tx_done) {
1921 1.21 ad sc->sc_tx_done = 0;
1922 1.21 ad plcom_txsoft(sc, tp);
1923 1.1 rearnsha }
1924 1.1 rearnsha }
1925 1.1 rearnsha
1926 1.40 skrll bool
1927 1.40 skrll plcom_intstatus(struct plcom_instance *pi, u_int *istatus)
1928 1.40 skrll {
1929 1.40 skrll bool ret = false;
1930 1.40 skrll u_int stat = 0;
1931 1.40 skrll
1932 1.40 skrll switch (pi->pi_type) {
1933 1.40 skrll case PLCOM_TYPE_PL010:
1934 1.40 skrll stat = PREAD1(pi, PL010COM_IIR);
1935 1.40 skrll ret = ISSET(stat, PL010_IIR_IMASK);
1936 1.40 skrll break;
1937 1.40 skrll case PLCOM_TYPE_PL011:
1938 1.40 skrll stat = PREAD4(pi, PL011COM_MIS);
1939 1.40 skrll ret = ISSET(stat, PL011_INT_ALLMASK);
1940 1.40 skrll break;
1941 1.40 skrll }
1942 1.40 skrll *istatus = stat;
1943 1.40 skrll
1944 1.40 skrll return ret;
1945 1.46 skrll }
1946 1.40 skrll
1947 1.1 rearnsha int
1948 1.1 rearnsha plcomintr(void *arg)
1949 1.1 rearnsha {
1950 1.1 rearnsha struct plcom_softc *sc = arg;
1951 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1952 1.1 rearnsha u_char *put, *end;
1953 1.1 rearnsha u_int cc;
1954 1.40 skrll u_int istatus = 0;
1955 1.40 skrll u_char rsr;
1956 1.40 skrll bool intr = false;
1957 1.40 skrll
1958 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
1959 1.1 rearnsha
1960 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1961 1.1 rearnsha return 0;
1962 1.1 rearnsha
1963 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1964 1.40 skrll intr = plcom_intstatus(pi, &istatus);
1965 1.40 skrll if (!intr) {
1966 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1967 1.1 rearnsha return 0;
1968 1.1 rearnsha }
1969 1.1 rearnsha
1970 1.1 rearnsha end = sc->sc_ebuf;
1971 1.1 rearnsha put = sc->sc_rbput;
1972 1.1 rearnsha cc = sc->sc_rbavail;
1973 1.1 rearnsha
1974 1.1 rearnsha do {
1975 1.40 skrll u_int msr = 0, delta, fr;
1976 1.40 skrll bool rxintr = false, txintr = false, msintr;
1977 1.1 rearnsha
1978 1.40 skrll /* don't need RI here*/
1979 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
1980 1.1 rearnsha
1981 1.35 skrll if (!ISSET(fr, PL01X_FR_RXFE) &&
1982 1.1 rearnsha !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1983 1.1 rearnsha while (cc > 0) {
1984 1.1 rearnsha int cn_trapped = 0;
1985 1.40 skrll put[0] = PREAD1(pi, PL01XCOM_DR);
1986 1.40 skrll rsr = PREAD1(pi, PL01XCOM_RSR);
1987 1.1 rearnsha /* Clear any error status. */
1988 1.35 skrll if (ISSET(rsr, PL01X_RSR_ERROR))
1989 1.40 skrll PWRITE1(pi, PL01XCOM_ECR, 0);
1990 1.35 skrll if (ISSET(rsr, PL01X_RSR_BE)) {
1991 1.10 rearnsha cn_trapped = 0;
1992 1.1 rearnsha cn_check_magic(sc->sc_tty->t_dev,
1993 1.1 rearnsha CNC_BREAK, plcom_cnm_state);
1994 1.1 rearnsha if (cn_trapped)
1995 1.1 rearnsha continue;
1996 1.1 rearnsha #if defined(KGDB)
1997 1.1 rearnsha if (ISSET(sc->sc_hwflags,
1998 1.1 rearnsha PLCOM_HW_KGDB)) {
1999 1.1 rearnsha kgdb_connect(1);
2000 1.1 rearnsha continue;
2001 1.1 rearnsha }
2002 1.1 rearnsha #endif
2003 1.1 rearnsha }
2004 1.1 rearnsha
2005 1.1 rearnsha put[1] = rsr;
2006 1.10 rearnsha cn_trapped = 0;
2007 1.40 skrll cn_check_magic(sc->sc_tty->t_dev, put[0],
2008 1.40 skrll plcom_cnm_state);
2009 1.1 rearnsha if (cn_trapped) {
2010 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2011 1.35 skrll if (ISSET(fr, PL01X_FR_RXFE))
2012 1.1 rearnsha break;
2013 1.1 rearnsha
2014 1.1 rearnsha continue;
2015 1.1 rearnsha }
2016 1.1 rearnsha put += 2;
2017 1.1 rearnsha if (put >= end)
2018 1.1 rearnsha put = sc->sc_rbuf;
2019 1.1 rearnsha cc--;
2020 1.1 rearnsha
2021 1.40 skrll /* don't need RI here*/
2022 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2023 1.35 skrll if (ISSET(fr, PL01X_FR_RXFE))
2024 1.1 rearnsha break;
2025 1.1 rearnsha }
2026 1.1 rearnsha
2027 1.1 rearnsha /*
2028 1.1 rearnsha * Current string of incoming characters ended because
2029 1.1 rearnsha * no more data was available or we ran out of space.
2030 1.1 rearnsha * Schedule a receive event if any data was received.
2031 1.1 rearnsha * If we're out of space, turn off receive interrupts.
2032 1.1 rearnsha */
2033 1.1 rearnsha sc->sc_rbput = put;
2034 1.1 rearnsha sc->sc_rbavail = cc;
2035 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
2036 1.1 rearnsha sc->sc_rx_ready = 1;
2037 1.1 rearnsha
2038 1.1 rearnsha /*
2039 1.1 rearnsha * See if we are in danger of overflowing a buffer. If
2040 1.1 rearnsha * so, use hardware flow control to ease the pressure.
2041 1.1 rearnsha */
2042 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
2043 1.1 rearnsha cc < sc->sc_r_hiwat) {
2044 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
2045 1.1 rearnsha plcom_hwiflow(sc);
2046 1.1 rearnsha }
2047 1.1 rearnsha
2048 1.1 rearnsha /*
2049 1.1 rearnsha * If we're out of space, disable receive interrupts
2050 1.1 rearnsha * until the queue has drained a bit.
2051 1.1 rearnsha */
2052 1.1 rearnsha if (!cc) {
2053 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
2054 1.40 skrll switch (pi->pi_type) {
2055 1.40 skrll case PLCOM_TYPE_PL010:
2056 1.40 skrll CLR(sc->sc_cr,
2057 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE);
2058 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
2059 1.40 skrll break;
2060 1.40 skrll case PLCOM_TYPE_PL011:
2061 1.40 skrll CLR(sc->sc_imsc,
2062 1.40 skrll PL011_INT_RT | PL011_INT_RX);
2063 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
2064 1.40 skrll break;
2065 1.40 skrll }
2066 1.1 rearnsha }
2067 1.1 rearnsha } else {
2068 1.40 skrll switch (pi->pi_type) {
2069 1.40 skrll case PLCOM_TYPE_PL010:
2070 1.40 skrll rxintr = ISSET(istatus, PL010_IIR_RIS);
2071 1.40 skrll if (rxintr) {
2072 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
2073 1.40 skrll delay(10);
2074 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
2075 1.40 skrll continue;
2076 1.40 skrll }
2077 1.40 skrll break;
2078 1.40 skrll case PLCOM_TYPE_PL011:
2079 1.40 skrll rxintr = ISSET(istatus, PL011_INT_RX);
2080 1.40 skrll if (rxintr) {
2081 1.40 skrll PWRITE4(pi, PL011COM_CR, 0);
2082 1.40 skrll delay(10);
2083 1.40 skrll PWRITE4(pi, PL011COM_CR, sc->sc_cr);
2084 1.40 skrll continue;
2085 1.40 skrll }
2086 1.40 skrll break;
2087 1.1 rearnsha }
2088 1.1 rearnsha }
2089 1.1 rearnsha
2090 1.40 skrll switch (pi->pi_type) {
2091 1.40 skrll case PLCOM_TYPE_PL010:
2092 1.40 skrll msr = PREAD1(pi, PL01XCOM_FR);
2093 1.40 skrll break;
2094 1.40 skrll case PLCOM_TYPE_PL011:
2095 1.40 skrll msr = PREAD4(pi, PL01XCOM_FR);
2096 1.40 skrll break;
2097 1.40 skrll }
2098 1.1 rearnsha delta = msr ^ sc->sc_msr;
2099 1.1 rearnsha sc->sc_msr = msr;
2100 1.40 skrll
2101 1.1 rearnsha /* Clear any pending modem status interrupt. */
2102 1.40 skrll switch (pi->pi_type) {
2103 1.40 skrll case PLCOM_TYPE_PL010:
2104 1.40 skrll msintr = ISSET(istatus, PL010_IIR_MIS);
2105 1.40 skrll if (msintr) {
2106 1.40 skrll PWRITE1(pi, PL010COM_ICR, 0);
2107 1.40 skrll }
2108 1.40 skrll break;
2109 1.40 skrll case PLCOM_TYPE_PL011:
2110 1.40 skrll msintr = ISSET(istatus, PL011_INT_MSMASK);
2111 1.40 skrll if (msintr) {
2112 1.40 skrll PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK);
2113 1.40 skrll }
2114 1.40 skrll break;
2115 1.40 skrll }
2116 1.1 rearnsha /*
2117 1.1 rearnsha * Pulse-per-second (PSS) signals on edge of DCD?
2118 1.1 rearnsha * Process these even if line discipline is ignoring DCD.
2119 1.1 rearnsha */
2120 1.1 rearnsha if (delta & sc->sc_ppsmask) {
2121 1.1 rearnsha struct timeval tv;
2122 1.26 ad mutex_spin_enter(&timecounter_lock);
2123 1.1 rearnsha if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) {
2124 1.1 rearnsha /* XXX nanotime() */
2125 1.1 rearnsha microtime(&tv);
2126 1.46 skrll TIMEVAL_TO_TIMESPEC(&tv,
2127 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
2128 1.1 rearnsha if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
2129 1.1 rearnsha timespecadd(&sc->ppsinfo.assert_timestamp,
2130 1.1 rearnsha &sc->ppsparam.assert_offset,
2131 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
2132 1.1 rearnsha }
2133 1.1 rearnsha
2134 1.1 rearnsha #ifdef PPS_SYNC
2135 1.1 rearnsha if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
2136 1.1 rearnsha hardpps(&tv, tv.tv_usec);
2137 1.1 rearnsha #endif
2138 1.1 rearnsha sc->ppsinfo.assert_sequence++;
2139 1.1 rearnsha sc->ppsinfo.current_mode = sc->ppsparam.mode;
2140 1.1 rearnsha
2141 1.1 rearnsha } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) {
2142 1.1 rearnsha /* XXX nanotime() */
2143 1.1 rearnsha microtime(&tv);
2144 1.46 skrll TIMEVAL_TO_TIMESPEC(&tv,
2145 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
2146 1.1 rearnsha if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
2147 1.1 rearnsha timespecadd(&sc->ppsinfo.clear_timestamp,
2148 1.1 rearnsha &sc->ppsparam.clear_offset,
2149 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
2150 1.1 rearnsha }
2151 1.1 rearnsha
2152 1.1 rearnsha #ifdef PPS_SYNC
2153 1.1 rearnsha if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
2154 1.1 rearnsha hardpps(&tv, tv.tv_usec);
2155 1.1 rearnsha #endif
2156 1.1 rearnsha sc->ppsinfo.clear_sequence++;
2157 1.1 rearnsha sc->ppsinfo.current_mode = sc->ppsparam.mode;
2158 1.1 rearnsha }
2159 1.26 ad mutex_spin_exit(&timecounter_lock);
2160 1.1 rearnsha }
2161 1.1 rearnsha
2162 1.1 rearnsha /*
2163 1.1 rearnsha * Process normal status changes
2164 1.1 rearnsha */
2165 1.1 rearnsha if (ISSET(delta, sc->sc_msr_mask)) {
2166 1.1 rearnsha SET(sc->sc_msr_delta, delta);
2167 1.1 rearnsha
2168 1.1 rearnsha /*
2169 1.1 rearnsha * Stop output immediately if we lose the output
2170 1.1 rearnsha * flow control signal or carrier detect.
2171 1.1 rearnsha */
2172 1.1 rearnsha if (ISSET(~msr, sc->sc_msr_mask)) {
2173 1.1 rearnsha sc->sc_tbc = 0;
2174 1.1 rearnsha sc->sc_heldtbc = 0;
2175 1.1 rearnsha #ifdef PLCOM_DEBUG
2176 1.1 rearnsha if (plcom_debug)
2177 1.1 rearnsha plcomstatus(sc, "plcomintr ");
2178 1.1 rearnsha #endif
2179 1.1 rearnsha }
2180 1.1 rearnsha
2181 1.1 rearnsha sc->sc_st_check = 1;
2182 1.1 rearnsha }
2183 1.1 rearnsha
2184 1.46 skrll /*
2185 1.1 rearnsha * Done handling any receive interrupts. See if data
2186 1.40 skrll * can be transmitted as well. Schedule tx done
2187 1.40 skrll * event if no data left and tty was marked busy.
2188 1.1 rearnsha */
2189 1.46 skrll
2190 1.40 skrll switch (pi->pi_type) {
2191 1.40 skrll case PLCOM_TYPE_PL010:
2192 1.40 skrll txintr = ISSET(istatus, PL010_IIR_TIS);
2193 1.40 skrll break;
2194 1.40 skrll case PLCOM_TYPE_PL011:
2195 1.40 skrll txintr = ISSET(istatus, PL011_INT_TX);
2196 1.40 skrll break;
2197 1.40 skrll }
2198 1.40 skrll if (txintr) {
2199 1.1 rearnsha /*
2200 1.1 rearnsha * If we've delayed a parameter change, do it
2201 1.1 rearnsha * now, and restart * output.
2202 1.1 rearnsha */
2203 1.40 skrll // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX);
2204 1.1 rearnsha if (sc->sc_heldchange) {
2205 1.1 rearnsha plcom_loadchannelregs(sc);
2206 1.1 rearnsha sc->sc_heldchange = 0;
2207 1.1 rearnsha sc->sc_tbc = sc->sc_heldtbc;
2208 1.1 rearnsha sc->sc_heldtbc = 0;
2209 1.1 rearnsha }
2210 1.1 rearnsha
2211 1.46 skrll /*
2212 1.1 rearnsha * Output the next chunk of the contiguous
2213 1.1 rearnsha * buffer, if any.
2214 1.1 rearnsha */
2215 1.1 rearnsha if (sc->sc_tbc > 0) {
2216 1.1 rearnsha int n;
2217 1.1 rearnsha
2218 1.1 rearnsha n = sc->sc_tbc;
2219 1.42 skrll if (n > sc->sc_fifolen)
2220 1.42 skrll n = sc->sc_fifolen;
2221 1.40 skrll PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n);
2222 1.1 rearnsha sc->sc_tbc -= n;
2223 1.1 rearnsha sc->sc_tba += n;
2224 1.1 rearnsha } else {
2225 1.1 rearnsha /*
2226 1.40 skrll * Disable transmit completion
2227 1.1 rearnsha * interrupts if necessary.
2228 1.1 rearnsha */
2229 1.40 skrll switch (pi->pi_type) {
2230 1.40 skrll case PLCOM_TYPE_PL010:
2231 1.40 skrll if (ISSET(sc->sc_cr, PL010_CR_TIE)) {
2232 1.40 skrll CLR(sc->sc_cr, PL010_CR_TIE);
2233 1.40 skrll PWRITE1(pi, PL010COM_CR,
2234 1.40 skrll sc->sc_cr);
2235 1.40 skrll }
2236 1.40 skrll break;
2237 1.40 skrll case PLCOM_TYPE_PL011:
2238 1.40 skrll if (ISSET(sc->sc_imsc, PL011_INT_TX)) {
2239 1.40 skrll CLR(sc->sc_imsc, PL011_INT_TX);
2240 1.40 skrll PWRITE4(pi, PL011COM_IMSC,
2241 1.40 skrll sc->sc_imsc);
2242 1.40 skrll }
2243 1.40 skrll break;
2244 1.1 rearnsha }
2245 1.1 rearnsha if (sc->sc_tx_busy) {
2246 1.1 rearnsha sc->sc_tx_busy = 0;
2247 1.1 rearnsha sc->sc_tx_done = 1;
2248 1.1 rearnsha }
2249 1.1 rearnsha }
2250 1.1 rearnsha }
2251 1.40 skrll
2252 1.40 skrll } while (plcom_intstatus(pi, &istatus));
2253 1.1 rearnsha
2254 1.36 skrll mutex_spin_exit(&sc->sc_lock);
2255 1.1 rearnsha
2256 1.1 rearnsha /* Wake up the poller. */
2257 1.25 ad softint_schedule(sc->sc_si);
2258 1.1 rearnsha
2259 1.33 tls #ifdef RND_COM
2260 1.40 skrll rnd_add_uint32(&sc->rnd_source, istatus | rsr);
2261 1.1 rearnsha #endif
2262 1.1 rearnsha
2263 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2264 1.40 skrll
2265 1.1 rearnsha return 1;
2266 1.1 rearnsha }
2267 1.1 rearnsha
2268 1.1 rearnsha /*
2269 1.1 rearnsha * The following functions are polled getc and putc routines, shared
2270 1.1 rearnsha * by the console and kgdb glue.
2271 1.46 skrll *
2272 1.1 rearnsha * The read-ahead code is so that you can detect pending in-band
2273 1.1 rearnsha * cn_magic in polled mode while doing output rather than having to
2274 1.1 rearnsha * wait until the kernel decides it needs input.
2275 1.1 rearnsha */
2276 1.1 rearnsha
2277 1.1 rearnsha #define MAX_READAHEAD 20
2278 1.1 rearnsha static int plcom_readahead[MAX_READAHEAD];
2279 1.1 rearnsha static int plcom_readaheadcount = 0;
2280 1.1 rearnsha
2281 1.1 rearnsha int
2282 1.40 skrll plcom_common_getc(dev_t dev, struct plcom_instance *pi)
2283 1.1 rearnsha {
2284 1.1 rearnsha int s = splserial();
2285 1.58 skrll u_char c;
2286 1.1 rearnsha
2287 1.1 rearnsha /* got a character from reading things earlier */
2288 1.1 rearnsha if (plcom_readaheadcount > 0) {
2289 1.1 rearnsha int i;
2290 1.1 rearnsha
2291 1.1 rearnsha c = plcom_readahead[0];
2292 1.1 rearnsha for (i = 1; i < plcom_readaheadcount; i++) {
2293 1.1 rearnsha plcom_readahead[i-1] = plcom_readahead[i];
2294 1.1 rearnsha }
2295 1.1 rearnsha plcom_readaheadcount--;
2296 1.1 rearnsha splx(s);
2297 1.1 rearnsha return c;
2298 1.1 rearnsha }
2299 1.1 rearnsha
2300 1.58 skrll if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) {
2301 1.58 skrll splx(s);
2302 1.58 skrll return -1;
2303 1.58 skrll }
2304 1.1 rearnsha
2305 1.40 skrll c = PREAD1(pi, PL01XCOM_DR);
2306 1.1 rearnsha {
2307 1.47 skrll int cn_trapped __unused = 0;
2308 1.1 rearnsha #ifdef DDB
2309 1.1 rearnsha extern int db_active;
2310 1.1 rearnsha if (!db_active)
2311 1.1 rearnsha #endif
2312 1.1 rearnsha cn_check_magic(dev, c, plcom_cnm_state);
2313 1.1 rearnsha }
2314 1.1 rearnsha splx(s);
2315 1.1 rearnsha return c;
2316 1.1 rearnsha }
2317 1.1 rearnsha
2318 1.1 rearnsha void
2319 1.40 skrll plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c)
2320 1.1 rearnsha {
2321 1.1 rearnsha int s = splserial();
2322 1.1 rearnsha int timo;
2323 1.1 rearnsha
2324 1.1 rearnsha int cin, stat;
2325 1.46 skrll if (plcom_readaheadcount < MAX_READAHEAD
2326 1.40 skrll && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) {
2327 1.47 skrll int cn_trapped __unused = 0;
2328 1.40 skrll cin = PREAD1(pi, PL01XCOM_DR);
2329 1.1 rearnsha cn_check_magic(dev, cin, plcom_cnm_state);
2330 1.1 rearnsha plcom_readahead[plcom_readaheadcount++] = cin;
2331 1.1 rearnsha }
2332 1.1 rearnsha
2333 1.1 rearnsha /* wait for any pending transmission to finish */
2334 1.1 rearnsha timo = 150000;
2335 1.53 skrll while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo)
2336 1.1 rearnsha continue;
2337 1.1 rearnsha
2338 1.40 skrll PWRITE1(pi, PL01XCOM_DR, c);
2339 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2340 1.1 rearnsha
2341 1.1 rearnsha splx(s);
2342 1.1 rearnsha }
2343 1.1 rearnsha
2344 1.1 rearnsha /*
2345 1.1 rearnsha * Initialize UART for use as console or KGDB line.
2346 1.1 rearnsha */
2347 1.1 rearnsha int
2348 1.40 skrll plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag)
2349 1.1 rearnsha {
2350 1.40 skrll u_char lcr;
2351 1.1 rearnsha
2352 1.40 skrll switch (pi->pi_type) {
2353 1.40 skrll case PLCOM_TYPE_PL010:
2354 1.40 skrll if (pi->pi_size == 0)
2355 1.40 skrll pi->pi_size = PL010COM_UART_SIZE;
2356 1.40 skrll break;
2357 1.40 skrll case PLCOM_TYPE_PL011:
2358 1.40 skrll if (pi->pi_size == 0)
2359 1.40 skrll pi->pi_size = PL011COM_UART_SIZE;
2360 1.40 skrll break;
2361 1.40 skrll default:
2362 1.40 skrll panic("Unknown plcom type");
2363 1.40 skrll }
2364 1.40 skrll
2365 1.40 skrll if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0,
2366 1.40 skrll &pi->pi_ioh))
2367 1.1 rearnsha return ENOMEM; /* ??? */
2368 1.1 rearnsha
2369 1.40 skrll lcr = cflag2lcr(cflag) | PL01X_LCR_FEN;
2370 1.40 skrll switch (pi->pi_type) {
2371 1.40 skrll case PLCOM_TYPE_PL010:
2372 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
2373 1.40 skrll
2374 1.54 jmcneill if (rate && frequency) {
2375 1.54 jmcneill rate = pl010comspeed(rate, frequency);
2376 1.54 jmcneill PWRITE1(pi, PL010COM_DLBL, (rate & 0xff));
2377 1.54 jmcneill PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff));
2378 1.54 jmcneill }
2379 1.40 skrll PWRITE1(pi, PL010COM_LCR, lcr);
2380 1.40 skrll PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN);
2381 1.40 skrll break;
2382 1.40 skrll case PLCOM_TYPE_PL011:
2383 1.40 skrll PWRITE4(pi, PL011COM_CR, 0);
2384 1.40 skrll
2385 1.54 jmcneill if (rate && frequency) {
2386 1.54 jmcneill rate = pl011comspeed(rate, frequency);
2387 1.54 jmcneill PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1));
2388 1.54 jmcneill PWRITE4(pi, PL011COM_IBRD, rate >> 6);
2389 1.54 jmcneill }
2390 1.40 skrll PWRITE1(pi, PL011COM_LCRH, lcr);
2391 1.40 skrll PWRITE4(pi, PL011COM_CR,
2392 1.40 skrll PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE);
2393 1.40 skrll break;
2394 1.40 skrll }
2395 1.1 rearnsha
2396 1.1 rearnsha #if 0
2397 1.1 rearnsha /* Ought to do something like this, but we have no sc to
2398 1.1 rearnsha dereference. */
2399 1.15 thorpej /* XXX device_unit() abuse */
2400 1.43 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev),
2401 1.35 skrll PL01X_MCR_DTR | PL01X_MCR_RTS);
2402 1.1 rearnsha #endif
2403 1.1 rearnsha
2404 1.1 rearnsha return 0;
2405 1.1 rearnsha }
2406 1.1 rearnsha
2407 1.1 rearnsha /*
2408 1.1 rearnsha * Following are all routines needed for PLCOM to act as console
2409 1.1 rearnsha */
2410 1.1 rearnsha struct consdev plcomcons = {
2411 1.1 rearnsha NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL,
2412 1.59 jmcneill plcomcnhalt, NULL, NODEV, CN_NORMAL
2413 1.1 rearnsha };
2414 1.1 rearnsha
2415 1.1 rearnsha int
2416 1.40 skrll plcomcnattach(struct plcom_instance *pi, int rate, int frequency,
2417 1.1 rearnsha tcflag_t cflag, int unit)
2418 1.1 rearnsha {
2419 1.1 rearnsha int res;
2420 1.1 rearnsha
2421 1.40 skrll plcomcons_info = *pi;
2422 1.40 skrll
2423 1.40 skrll res = plcominit(&plcomcons_info, rate, frequency, cflag);
2424 1.1 rearnsha if (res)
2425 1.1 rearnsha return res;
2426 1.1 rearnsha
2427 1.1 rearnsha cn_tab = &plcomcons;
2428 1.1 rearnsha cn_init_magic(&plcom_cnm_state);
2429 1.1 rearnsha cn_set_magic("\047\001"); /* default magic is BREAK */
2430 1.1 rearnsha
2431 1.1 rearnsha plcomconsunit = unit;
2432 1.1 rearnsha plcomconsrate = rate;
2433 1.1 rearnsha plcomconscflag = cflag;
2434 1.1 rearnsha
2435 1.1 rearnsha return 0;
2436 1.1 rearnsha }
2437 1.1 rearnsha
2438 1.1 rearnsha void
2439 1.1 rearnsha plcomcndetach(void)
2440 1.1 rearnsha {
2441 1.40 skrll
2442 1.40 skrll bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh,
2443 1.40 skrll plcomcons_info.pi_size);
2444 1.40 skrll plcomcons_info.pi_iot = NULL;
2445 1.1 rearnsha
2446 1.1 rearnsha cn_tab = NULL;
2447 1.1 rearnsha }
2448 1.1 rearnsha
2449 1.1 rearnsha int
2450 1.1 rearnsha plcomcngetc(dev_t dev)
2451 1.1 rearnsha {
2452 1.40 skrll return plcom_common_getc(dev, &plcomcons_info);
2453 1.1 rearnsha }
2454 1.1 rearnsha
2455 1.1 rearnsha /*
2456 1.1 rearnsha * Console kernel output character routine.
2457 1.1 rearnsha */
2458 1.1 rearnsha void
2459 1.1 rearnsha plcomcnputc(dev_t dev, int c)
2460 1.1 rearnsha {
2461 1.40 skrll plcom_common_putc(dev, &plcomcons_info, c);
2462 1.1 rearnsha }
2463 1.1 rearnsha
2464 1.1 rearnsha void
2465 1.1 rearnsha plcomcnpollc(dev_t dev, int on)
2466 1.1 rearnsha {
2467 1.1 rearnsha
2468 1.45 mlelstv plcom_readaheadcount = 0;
2469 1.1 rearnsha }
2470 1.1 rearnsha
2471 1.59 jmcneill void
2472 1.59 jmcneill plcomcnhalt(dev_t dev)
2473 1.59 jmcneill {
2474 1.59 jmcneill struct plcom_instance *pi = &plcomcons_info;
2475 1.59 jmcneill
2476 1.59 jmcneill switch (pi->pi_type) {
2477 1.59 jmcneill case PLCOM_TYPE_PL010:
2478 1.59 jmcneill PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN);
2479 1.59 jmcneill break;
2480 1.59 jmcneill case PLCOM_TYPE_PL011:
2481 1.59 jmcneill PWRITE4(pi, PL011COM_CR,
2482 1.59 jmcneill PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE);
2483 1.59 jmcneill PWRITE4(pi, PL011COM_IMSC, 0);
2484 1.59 jmcneill break;
2485 1.59 jmcneill }
2486 1.59 jmcneill }
2487 1.59 jmcneill
2488 1.1 rearnsha #ifdef KGDB
2489 1.1 rearnsha int
2490 1.40 skrll plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency,
2491 1.40 skrll tcflag_t cflag, int unit)
2492 1.1 rearnsha {
2493 1.1 rearnsha int res;
2494 1.1 rearnsha
2495 1.40 skrll if (pi->pi_iot == plcomcons_info.pi_iot &&
2496 1.40 skrll pi->pi_iobase == plcomcons_info.pi_iobase)
2497 1.1 rearnsha return EBUSY; /* cannot share with console */
2498 1.1 rearnsha
2499 1.40 skrll res = plcominit(pi, rate, frequency, cflag);
2500 1.1 rearnsha if (res)
2501 1.1 rearnsha return res;
2502 1.1 rearnsha
2503 1.1 rearnsha kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL);
2504 1.1 rearnsha kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2505 1.1 rearnsha
2506 1.40 skrll plcomkgdb_info.pi_iot = pi->pi_iot;
2507 1.40 skrll plcomkgdb_info.pi_ioh = pi->pi_ioh;
2508 1.40 skrll plcomkgdb_info.pi_iobase = pi->pi_iobase;
2509 1.1 rearnsha
2510 1.1 rearnsha return 0;
2511 1.1 rearnsha }
2512 1.1 rearnsha
2513 1.1 rearnsha /* ARGSUSED */
2514 1.1 rearnsha int
2515 1.1 rearnsha plcom_kgdb_getc(void *arg)
2516 1.1 rearnsha {
2517 1.44 mlelstv return plcom_common_getc(NODEV, &plcomkgdb_info);
2518 1.1 rearnsha }
2519 1.1 rearnsha
2520 1.1 rearnsha /* ARGSUSED */
2521 1.1 rearnsha void
2522 1.1 rearnsha plcom_kgdb_putc(void *arg, int c)
2523 1.1 rearnsha {
2524 1.44 mlelstv plcom_common_putc(NODEV, &plcomkgdb_info, c);
2525 1.1 rearnsha }
2526 1.1 rearnsha #endif /* KGDB */
2527 1.1 rearnsha
2528 1.1 rearnsha /* helper function to identify the plcom ports used by
2529 1.1 rearnsha console or KGDB (and not yet autoconf attached) */
2530 1.1 rearnsha int
2531 1.46 skrll plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase,
2532 1.1 rearnsha bus_space_handle_t *ioh)
2533 1.1 rearnsha {
2534 1.1 rearnsha bus_space_handle_t help;
2535 1.1 rearnsha
2536 1.1 rearnsha if (!plcomconsattached &&
2537 1.40 skrll bus_space_is_equal(iot, plcomcons_info.pi_iot) &&
2538 1.40 skrll iobase == plcomcons_info.pi_iobase)
2539 1.40 skrll help = plcomcons_info.pi_ioh;
2540 1.1 rearnsha #ifdef KGDB
2541 1.1 rearnsha else if (!plcom_kgdb_attached &&
2542 1.40 skrll bus_space_is_equal(iot, plcomkgdb_info.pi_iot) &&
2543 1.57 skrll iobase == plcomkgdb_info.pi_iobase)
2544 1.44 mlelstv help = plcomkgdb_info.pi_ioh;
2545 1.1 rearnsha #endif
2546 1.1 rearnsha else
2547 1.1 rearnsha return 0;
2548 1.1 rearnsha
2549 1.1 rearnsha if (ioh)
2550 1.1 rearnsha *ioh = help;
2551 1.1 rearnsha return 1;
2552 1.1 rearnsha }
2553