plcom.c revision 1.67 1 1.67 mlelstv /* $NetBSD: plcom.c,v 1.67 2023/01/24 06:56:40 mlelstv Exp $ */
2 1.1 rearnsha
3 1.1 rearnsha /*-
4 1.1 rearnsha * Copyright (c) 2001 ARM Ltd
5 1.1 rearnsha * All rights reserved.
6 1.1 rearnsha *
7 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
8 1.1 rearnsha * modification, are permitted provided that the following conditions
9 1.1 rearnsha * are met:
10 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
11 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
12 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
14 1.1 rearnsha * documentation and/or other materials provided with the distribution.
15 1.1 rearnsha * 3. The name of the company may not be used to endorse or promote
16 1.1 rearnsha * products derived from this software without specific prior written
17 1.1 rearnsha * permission.
18 1.1 rearnsha *
19 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1 rearnsha * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1 rearnsha * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 rearnsha * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 1.1 rearnsha * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 1.1 rearnsha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 1.1 rearnsha * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1 rearnsha * SUCH DAMAGE.
30 1.46 skrll *
31 1.40 skrll * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc.
32 1.1 rearnsha * All rights reserved.
33 1.1 rearnsha *
34 1.1 rearnsha * This code is derived from software contributed to The NetBSD Foundation
35 1.40 skrll * by Charles M. Hannum and Nick Hudson.
36 1.1 rearnsha *
37 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
38 1.1 rearnsha * modification, are permitted provided that the following conditions
39 1.1 rearnsha * are met:
40 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
41 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
42 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
44 1.1 rearnsha * documentation and/or other materials provided with the distribution.
45 1.1 rearnsha *
46 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
47 1.1 rearnsha * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
48 1.1 rearnsha * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
49 1.1 rearnsha * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
50 1.1 rearnsha * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
51 1.1 rearnsha * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
52 1.1 rearnsha * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
53 1.1 rearnsha * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
54 1.1 rearnsha * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
55 1.1 rearnsha * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56 1.1 rearnsha * POSSIBILITY OF SUCH DAMAGE.
57 1.1 rearnsha */
58 1.1 rearnsha
59 1.1 rearnsha /*
60 1.1 rearnsha * Copyright (c) 1991 The Regents of the University of California.
61 1.1 rearnsha * All rights reserved.
62 1.1 rearnsha *
63 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
64 1.1 rearnsha * modification, are permitted provided that the following conditions
65 1.1 rearnsha * are met:
66 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
67 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
68 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
69 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
70 1.1 rearnsha * documentation and/or other materials provided with the distribution.
71 1.9 agc * 3. Neither the name of the University nor the names of its contributors
72 1.1 rearnsha * may be used to endorse or promote products derived from this software
73 1.1 rearnsha * without specific prior written permission.
74 1.1 rearnsha *
75 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
76 1.1 rearnsha * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
77 1.1 rearnsha * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
78 1.1 rearnsha * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
79 1.1 rearnsha * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
80 1.1 rearnsha * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
81 1.1 rearnsha * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
82 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
83 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
84 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
85 1.1 rearnsha * SUCH DAMAGE.
86 1.1 rearnsha *
87 1.1 rearnsha * @(#)com.c 7.5 (Berkeley) 5/16/91
88 1.1 rearnsha */
89 1.1 rearnsha
90 1.1 rearnsha /*
91 1.40 skrll * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to
92 1.40 skrll * the 16C550, but have a completely different programmer's model.
93 1.1 rearnsha * Derived from the NS16550AF com driver.
94 1.1 rearnsha */
95 1.8 lukem
96 1.8 lukem #include <sys/cdefs.h>
97 1.67 mlelstv __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.67 2023/01/24 06:56:40 mlelstv Exp $");
98 1.1 rearnsha
99 1.1 rearnsha #include "opt_plcom.h"
100 1.1 rearnsha #include "opt_kgdb.h"
101 1.7 martin #include "opt_lockdebug.h"
102 1.7 martin #include "opt_multiprocessor.h"
103 1.1 rearnsha
104 1.1 rearnsha /*
105 1.1 rearnsha * Override cnmagic(9) macro before including <sys/systm.h>.
106 1.1 rearnsha * We need to know if cn_check_magic triggered debugger, so set a flag.
107 1.1 rearnsha * Callers of cn_check_magic must declare int cn_trapped = 0;
108 1.1 rearnsha * XXX: this is *ugly*!
109 1.1 rearnsha */
110 1.1 rearnsha #define cn_trap() \
111 1.1 rearnsha do { \
112 1.1 rearnsha console_debugger(); \
113 1.1 rearnsha cn_trapped = 1; \
114 1.1 rearnsha } while (/* CONSTCOND */ 0)
115 1.1 rearnsha
116 1.1 rearnsha #include <sys/param.h>
117 1.1 rearnsha #include <sys/systm.h>
118 1.1 rearnsha #include <sys/ioctl.h>
119 1.1 rearnsha #include <sys/select.h>
120 1.1 rearnsha #include <sys/tty.h>
121 1.1 rearnsha #include <sys/proc.h>
122 1.1 rearnsha #include <sys/conf.h>
123 1.1 rearnsha #include <sys/file.h>
124 1.1 rearnsha #include <sys/uio.h>
125 1.1 rearnsha #include <sys/kernel.h>
126 1.1 rearnsha #include <sys/syslog.h>
127 1.1 rearnsha #include <sys/types.h>
128 1.1 rearnsha #include <sys/device.h>
129 1.65 skrll #include <sys/kmem.h>
130 1.1 rearnsha #include <sys/timepps.h>
131 1.1 rearnsha #include <sys/vnode.h>
132 1.16 elad #include <sys/kauth.h>
133 1.25 ad #include <sys/intr.h>
134 1.25 ad #include <sys/bus.h>
135 1.40 skrll #ifdef RND_COM
136 1.52 riastrad #include <sys/rndsource.h>
137 1.40 skrll #endif
138 1.1 rearnsha
139 1.66 riastrad #include <ddb/db_active.h>
140 1.66 riastrad
141 1.1 rearnsha #include <evbarm/dev/plcomreg.h>
142 1.1 rearnsha #include <evbarm/dev/plcomvar.h>
143 1.1 rearnsha
144 1.1 rearnsha #include <dev/cons.h>
145 1.1 rearnsha
146 1.1 rearnsha static void plcom_enable_debugport (struct plcom_softc *);
147 1.1 rearnsha
148 1.1 rearnsha void plcom_config (struct plcom_softc *);
149 1.1 rearnsha void plcom_shutdown (struct plcom_softc *);
150 1.40 skrll int pl010comspeed (long, long);
151 1.40 skrll int pl011comspeed (long, long);
152 1.67 mlelstv static uint32_t cflag2lcr (tcflag_t);
153 1.1 rearnsha int plcomparam (struct tty *, struct termios *);
154 1.1 rearnsha void plcomstart (struct tty *);
155 1.1 rearnsha int plcomhwiflow (struct tty *, int);
156 1.1 rearnsha
157 1.1 rearnsha void plcom_loadchannelregs (struct plcom_softc *);
158 1.1 rearnsha void plcom_hwiflow (struct plcom_softc *);
159 1.1 rearnsha void plcom_break (struct plcom_softc *, int);
160 1.1 rearnsha void plcom_modem (struct plcom_softc *, int);
161 1.1 rearnsha void tiocm_to_plcom (struct plcom_softc *, u_long, int);
162 1.1 rearnsha int plcom_to_tiocm (struct plcom_softc *);
163 1.1 rearnsha void plcom_iflush (struct plcom_softc *);
164 1.1 rearnsha
165 1.40 skrll int plcom_common_getc (dev_t, struct plcom_instance *);
166 1.40 skrll void plcom_common_putc (dev_t, struct plcom_instance *, int);
167 1.1 rearnsha
168 1.40 skrll int plcominit (struct plcom_instance *, int, int, tcflag_t);
169 1.1 rearnsha
170 1.4 gehenna dev_type_open(plcomopen);
171 1.4 gehenna dev_type_close(plcomclose);
172 1.4 gehenna dev_type_read(plcomread);
173 1.4 gehenna dev_type_write(plcomwrite);
174 1.4 gehenna dev_type_ioctl(plcomioctl);
175 1.4 gehenna dev_type_stop(plcomstop);
176 1.4 gehenna dev_type_tty(plcomtty);
177 1.4 gehenna dev_type_poll(plcompoll);
178 1.1 rearnsha
179 1.1 rearnsha int plcomcngetc (dev_t);
180 1.1 rearnsha void plcomcnputc (dev_t, int);
181 1.1 rearnsha void plcomcnpollc (dev_t, int);
182 1.59 jmcneill void plcomcnhalt (dev_t);
183 1.1 rearnsha
184 1.1 rearnsha #define integrate static inline
185 1.1 rearnsha void plcomsoft (void *);
186 1.1 rearnsha integrate void plcom_rxsoft (struct plcom_softc *, struct tty *);
187 1.1 rearnsha integrate void plcom_txsoft (struct plcom_softc *, struct tty *);
188 1.1 rearnsha integrate void plcom_stsoft (struct plcom_softc *, struct tty *);
189 1.1 rearnsha integrate void plcom_schedrx (struct plcom_softc *);
190 1.1 rearnsha void plcomdiag (void *);
191 1.1 rearnsha
192 1.40 skrll bool plcom_intstatus(struct plcom_instance *, u_int *);
193 1.40 skrll
194 1.1 rearnsha extern struct cfdriver plcom_cd;
195 1.1 rearnsha
196 1.4 gehenna const struct cdevsw plcom_cdevsw = {
197 1.48 dholland .d_open = plcomopen,
198 1.48 dholland .d_close = plcomclose,
199 1.48 dholland .d_read = plcomread,
200 1.48 dholland .d_write = plcomwrite,
201 1.48 dholland .d_ioctl = plcomioctl,
202 1.48 dholland .d_stop = plcomstop,
203 1.48 dholland .d_tty = plcomtty,
204 1.48 dholland .d_poll = plcompoll,
205 1.48 dholland .d_mmap = nommap,
206 1.48 dholland .d_kqfilter = ttykqfilter,
207 1.49 dholland .d_discard = nodiscard,
208 1.48 dholland .d_flag = D_TTY
209 1.4 gehenna };
210 1.4 gehenna
211 1.1 rearnsha /*
212 1.1 rearnsha * Make this an option variable one can patch.
213 1.1 rearnsha * But be warned: this must be a power of 2!
214 1.1 rearnsha */
215 1.1 rearnsha u_int plcom_rbuf_size = PLCOM_RING_SIZE;
216 1.1 rearnsha
217 1.1 rearnsha /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
218 1.1 rearnsha u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4;
219 1.1 rearnsha u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4;
220 1.1 rearnsha
221 1.1 rearnsha static int plcomconsunit = -1;
222 1.40 skrll static struct plcom_instance plcomcons_info;
223 1.40 skrll
224 1.40 skrll static int plcomconsattached;
225 1.1 rearnsha static int plcomconsrate;
226 1.1 rearnsha static tcflag_t plcomconscflag;
227 1.1 rearnsha static struct cnm_state plcom_cnm_state;
228 1.1 rearnsha
229 1.1 rearnsha static int ppscap =
230 1.1 rearnsha PPS_TSFMT_TSPEC |
231 1.46 skrll PPS_CAPTUREASSERT |
232 1.1 rearnsha PPS_CAPTURECLEAR |
233 1.46 skrll #ifdef PPS_SYNC
234 1.1 rearnsha PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR |
235 1.1 rearnsha #endif /* PPS_SYNC */
236 1.1 rearnsha PPS_OFFSETASSERT | PPS_OFFSETCLEAR;
237 1.1 rearnsha
238 1.1 rearnsha #ifdef KGDB
239 1.1 rearnsha #include <sys/kgdb.h>
240 1.1 rearnsha
241 1.40 skrll static struct plcom_instance plcomkgdb_info;
242 1.1 rearnsha static int plcom_kgdb_attached;
243 1.1 rearnsha
244 1.1 rearnsha int plcom_kgdb_getc (void *);
245 1.1 rearnsha void plcom_kgdb_putc (void *, int);
246 1.1 rearnsha #endif /* KGDB */
247 1.1 rearnsha
248 1.51 christos #define PLCOMDIALOUT_MASK TTDIALOUT_MASK
249 1.1 rearnsha
250 1.51 christos #define PLCOMUNIT(x) TTUNIT(x)
251 1.51 christos #define PLCOMDIALOUT(x) TTDIALOUT(x)
252 1.1 rearnsha
253 1.1 rearnsha #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \
254 1.38 skrll device_is_active((sc)->sc_dev))
255 1.1 rearnsha
256 1.1 rearnsha #define BR BUS_SPACE_BARRIER_READ
257 1.1 rearnsha #define BW BUS_SPACE_BARRIER_WRITE
258 1.40 skrll #define PLCOM_BARRIER(pi, f) \
259 1.40 skrll bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f))
260 1.40 skrll
261 1.40 skrll static uint8_t
262 1.40 skrll pread1(struct plcom_instance *pi, bus_size_t reg)
263 1.40 skrll {
264 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS))
265 1.40 skrll return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg);
266 1.40 skrll
267 1.40 skrll return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >>
268 1.40 skrll (8 * (reg & 3));
269 1.40 skrll }
270 1.67 mlelstv
271 1.67 mlelstv static uint16_t
272 1.67 mlelstv pread2(struct plcom_instance *pi, bus_size_t reg)
273 1.67 mlelstv {
274 1.67 mlelstv if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS))
275 1.67 mlelstv return bus_space_read_2(pi->pi_iot, pi->pi_ioh, reg);
276 1.67 mlelstv
277 1.67 mlelstv return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >>
278 1.67 mlelstv (8 * (reg & 3));
279 1.67 mlelstv }
280 1.67 mlelstv
281 1.40 skrll static void
282 1.40 skrll pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val)
283 1.40 skrll {
284 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
285 1.40 skrll bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val);
286 1.40 skrll } else {
287 1.40 skrll const size_t shift = 8 * (o & 3);
288 1.40 skrll o &= -4;
289 1.40 skrll uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o);
290 1.40 skrll tmp = (val << shift) | (tmp & ~(0xff << shift));
291 1.40 skrll bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp);
292 1.40 skrll }
293 1.40 skrll }
294 1.40 skrll
295 1.40 skrll static void
296 1.67 mlelstv pwrite2(struct plcom_instance *pi, bus_size_t o, uint16_t val)
297 1.67 mlelstv {
298 1.67 mlelstv if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
299 1.67 mlelstv bus_space_write_2(pi->pi_iot, pi->pi_ioh, o, val);
300 1.67 mlelstv } else {
301 1.67 mlelstv const size_t shift = 8 * (o & 3);
302 1.67 mlelstv o &= -4;
303 1.67 mlelstv uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o);
304 1.67 mlelstv tmp = (val << shift) | (tmp & ~(0xffff << shift));
305 1.67 mlelstv bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp);
306 1.67 mlelstv }
307 1.67 mlelstv }
308 1.67 mlelstv
309 1.67 mlelstv static void
310 1.40 skrll pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap,
311 1.40 skrll bus_size_t count)
312 1.40 skrll {
313 1.40 skrll if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) {
314 1.40 skrll bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count);
315 1.40 skrll } else {
316 1.40 skrll KASSERT((o & 3) == 0);
317 1.40 skrll while (count--) {
318 1.40 skrll bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++);
319 1.40 skrll };
320 1.40 skrll }
321 1.40 skrll }
322 1.40 skrll
323 1.40 skrll #define PREAD1(pi, reg) pread1(pi, reg)
324 1.67 mlelstv #define PREAD2(pi, reg) pread2(pi, reg)
325 1.40 skrll #define PREAD4(pi, reg) \
326 1.62 tnn bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))
327 1.40 skrll
328 1.40 skrll #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val)
329 1.40 skrll #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c)
330 1.67 mlelstv #define PWRITE2(pi, reg, val) pwrite2(pi, reg, val)
331 1.40 skrll #define PWRITE4(pi, reg, val) \
332 1.62 tnn bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))
333 1.1 rearnsha
334 1.1 rearnsha int
335 1.40 skrll pl010comspeed(long speed, long frequency)
336 1.1 rearnsha {
337 1.1 rearnsha #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
338 1.1 rearnsha
339 1.1 rearnsha int x, err;
340 1.1 rearnsha
341 1.1 rearnsha #if 0
342 1.1 rearnsha if (speed == 0)
343 1.1 rearnsha return 0;
344 1.1 rearnsha #endif
345 1.1 rearnsha if (speed <= 0)
346 1.1 rearnsha return -1;
347 1.1 rearnsha x = divrnd(frequency / 16, speed);
348 1.1 rearnsha if (x <= 0)
349 1.1 rearnsha return -1;
350 1.1 rearnsha err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
351 1.1 rearnsha if (err < 0)
352 1.1 rearnsha err = -err;
353 1.1 rearnsha if (err > PLCOM_TOLERANCE)
354 1.1 rearnsha return -1;
355 1.1 rearnsha return x;
356 1.1 rearnsha
357 1.1 rearnsha #undef divrnd
358 1.1 rearnsha }
359 1.1 rearnsha
360 1.40 skrll int
361 1.40 skrll pl011comspeed(long speed, long frequency)
362 1.40 skrll {
363 1.40 skrll int denom = 16 * speed;
364 1.40 skrll int div = frequency / denom;
365 1.40 skrll int rem = frequency % denom;
366 1.46 skrll
367 1.40 skrll int ibrd = div << 6;
368 1.40 skrll int fbrd = (((8 * rem) / speed) + 1) / 2;
369 1.46 skrll
370 1.40 skrll /* Tolerance? */
371 1.40 skrll return ibrd | fbrd;
372 1.40 skrll }
373 1.40 skrll
374 1.1 rearnsha #ifdef PLCOM_DEBUG
375 1.1 rearnsha int plcom_debug = 0;
376 1.1 rearnsha
377 1.34 bsh void plcomstatus (struct plcom_softc *, const char *);
378 1.1 rearnsha void
379 1.34 bsh plcomstatus(struct plcom_softc *sc, const char *str)
380 1.1 rearnsha {
381 1.1 rearnsha struct tty *tp = sc->sc_tty;
382 1.1 rearnsha
383 1.1 rearnsha printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n",
384 1.38 skrll device_xname(sc->sc_dev), str,
385 1.1 rearnsha ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
386 1.35 skrll ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-",
387 1.1 rearnsha ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
388 1.35 skrll ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-",
389 1.1 rearnsha sc->sc_tx_stopped ? "+" : "-");
390 1.1 rearnsha
391 1.1 rearnsha printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n",
392 1.38 skrll device_xname(sc->sc_dev), str,
393 1.1 rearnsha ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
394 1.35 skrll ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-",
395 1.1 rearnsha ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
396 1.35 skrll ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-",
397 1.1 rearnsha sc->sc_rx_flags);
398 1.1 rearnsha }
399 1.1 rearnsha #endif
400 1.1 rearnsha
401 1.40 skrll #if 0
402 1.1 rearnsha int
403 1.1 rearnsha plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh)
404 1.1 rearnsha {
405 1.1 rearnsha int data;
406 1.1 rearnsha
407 1.1 rearnsha /* Disable the UART. */
408 1.1 rearnsha bus_space_write_1(iot, ioh, plcom_cr, 0);
409 1.1 rearnsha /* Make sure the FIFO is off. */
410 1.67 mlelstv bus_space_write_4(iot, ioh, plcom_lcr, PL01X_LCR_8BITS);
411 1.1 rearnsha /* Disable interrupts. */
412 1.1 rearnsha bus_space_write_1(iot, ioh, plcom_iir, 0);
413 1.1 rearnsha
414 1.1 rearnsha /* Make sure we swallow anything in the receiving register. */
415 1.1 rearnsha data = bus_space_read_1(iot, ioh, plcom_dr);
416 1.1 rearnsha
417 1.67 mlelstv if (bus_space_read_4(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS)
418 1.1 rearnsha return 0;
419 1.1 rearnsha
420 1.35 skrll data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE);
421 1.1 rearnsha
422 1.35 skrll if (data != PL01X_FR_RXFE)
423 1.1 rearnsha return 0;
424 1.1 rearnsha
425 1.1 rearnsha return 1;
426 1.1 rearnsha }
427 1.40 skrll #endif
428 1.1 rearnsha
429 1.36 skrll /*
430 1.36 skrll * No locking in this routine; it is only called during attach,
431 1.36 skrll * or with the port already locked.
432 1.36 skrll */
433 1.1 rearnsha static void
434 1.1 rearnsha plcom_enable_debugport(struct plcom_softc *sc)
435 1.1 rearnsha {
436 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
437 1.40 skrll
438 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
439 1.40 skrll SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
440 1.1 rearnsha
441 1.1 rearnsha /* Turn on line break interrupt, set carrier. */
442 1.40 skrll switch (pi->pi_type) {
443 1.40 skrll case PLCOM_TYPE_PL010:
444 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
445 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
446 1.40 skrll if (sc->sc_set_mcr) {
447 1.40 skrll /* XXX device_unit() abuse */
448 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
449 1.40 skrll device_unit(sc->sc_dev), sc->sc_mcr);
450 1.40 skrll }
451 1.40 skrll break;
452 1.40 skrll case PLCOM_TYPE_PL011:
453 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
454 1.40 skrll sc->sc_imsc = PL011_INT_RX | PL011_INT_RT;
455 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
456 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr));
457 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
458 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
459 1.40 skrll break;
460 1.40 skrll }
461 1.40 skrll
462 1.1 rearnsha }
463 1.1 rearnsha
464 1.1 rearnsha void
465 1.1 rearnsha plcom_attach_subr(struct plcom_softc *sc)
466 1.1 rearnsha {
467 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
468 1.1 rearnsha struct tty *tp;
469 1.1 rearnsha
470 1.21 ad callout_init(&sc->sc_diag_callout, 0);
471 1.36 skrll mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
472 1.1 rearnsha
473 1.40 skrll switch (pi->pi_type) {
474 1.40 skrll case PLCOM_TYPE_PL010:
475 1.40 skrll case PLCOM_TYPE_PL011:
476 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
477 1.40 skrll break;
478 1.40 skrll default:
479 1.40 skrll aprint_error_dev(sc->sc_dev,
480 1.40 skrll "Unknown plcom type: %d\n", pi->pi_type);
481 1.40 skrll return;
482 1.40 skrll }
483 1.40 skrll
484 1.1 rearnsha /* Disable interrupts before configuring the device. */
485 1.1 rearnsha sc->sc_cr = 0;
486 1.40 skrll sc->sc_imsc = 0;
487 1.1 rearnsha
488 1.40 skrll if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) &&
489 1.40 skrll pi->pi_iobase == plcomcons_info.pi_iobase) {
490 1.1 rearnsha plcomconsattached = 1;
491 1.1 rearnsha
492 1.1 rearnsha /* Make sure the console is always "hardwired". */
493 1.1 rearnsha delay(1000); /* wait for output to finish */
494 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_CONSOLE);
495 1.1 rearnsha SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
496 1.40 skrll /*
497 1.40 skrll * Must re-enable the console immediately, or we will
498 1.40 skrll * hang when trying to print.
499 1.40 skrll */
500 1.35 skrll sc->sc_cr = PL01X_CR_UARTEN;
501 1.67 mlelstv switch (pi->pi_type) {
502 1.67 mlelstv case PLCOM_TYPE_PL011:
503 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
504 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
505 1.67 mlelstv break;
506 1.67 mlelstv }
507 1.67 mlelstv }
508 1.67 mlelstv
509 1.67 mlelstv switch (pi->pi_type) {
510 1.67 mlelstv case PLCOM_TYPE_PL011:
511 1.67 mlelstv if (pi->pi_periphid == 0) {
512 1.67 mlelstv pi->pi_periphid = PREAD1(pi, PL011COM_PID0) << 0
513 1.67 mlelstv | PREAD1(pi, PL011COM_PID1) << 8
514 1.67 mlelstv | PREAD1(pi, PL011COM_PID2) << 16
515 1.67 mlelstv | PREAD1(pi, PL011COM_PID3) << 24;
516 1.67 mlelstv }
517 1.67 mlelstv aprint_debug_dev(sc->sc_dev, "PID %08x\n", pi->pi_periphid);
518 1.67 mlelstv break;
519 1.1 rearnsha }
520 1.1 rearnsha
521 1.40 skrll switch (pi->pi_type) {
522 1.40 skrll case PLCOM_TYPE_PL010:
523 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
524 1.40 skrll break;
525 1.46 skrll
526 1.40 skrll case PLCOM_TYPE_PL011:
527 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
528 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
529 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
530 1.40 skrll break;
531 1.46 skrll }
532 1.40 skrll
533 1.40 skrll if (sc->sc_fifolen == 0) {
534 1.40 skrll switch (pi->pi_type) {
535 1.40 skrll case PLCOM_TYPE_PL010:
536 1.40 skrll /*
537 1.40 skrll * The PL010 has a 16-byte fifo, but the tx interrupt
538 1.40 skrll * triggers when there is space for 8 more bytes.
539 1.40 skrll */
540 1.42 skrll sc->sc_fifolen = 8;
541 1.40 skrll break;
542 1.40 skrll case PLCOM_TYPE_PL011:
543 1.40 skrll /* Some revisions have a 32 byte TX FIFO */
544 1.67 mlelstv switch (pi->pi_periphid & (PL011_DESIGNER_MASK | PL011_HWREV_MASK)) {
545 1.67 mlelstv case PL011_DESIGNER_ARM | __SHIFTIN(0, PL011_HWREV_MASK):
546 1.67 mlelstv case PL011_DESIGNER_ARM | __SHIFTIN(1, PL011_HWREV_MASK):
547 1.67 mlelstv case PL011_DESIGNER_ARM | __SHIFTIN(2, PL011_HWREV_MASK):
548 1.67 mlelstv sc->sc_fifolen = 16;
549 1.67 mlelstv break;
550 1.67 mlelstv default:
551 1.67 mlelstv sc->sc_fifolen = 32;
552 1.67 mlelstv break;
553 1.67 mlelstv }
554 1.67 mlelstv break;
555 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
556 1.67 mlelstv /* At least 32 byte TX FIFO */
557 1.67 mlelstv sc->sc_fifolen = 32;
558 1.40 skrll break;
559 1.40 skrll }
560 1.40 skrll }
561 1.1 rearnsha
562 1.67 mlelstv /* Safe amount of bytes to fill when TX FIFO signals empty */
563 1.67 mlelstv sc->sc_burstlen = 1;
564 1.67 mlelstv
565 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) {
566 1.1 rearnsha sc->sc_fifolen = 1;
567 1.40 skrll aprint_normal_dev(sc->sc_dev, "txfifo disabled\n");
568 1.1 rearnsha }
569 1.1 rearnsha
570 1.67 mlelstv if (sc->sc_fifolen > 1) {
571 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_FIFO);
572 1.67 mlelstv aprint_normal_dev(sc->sc_dev, "txfifo %u bytes\n", sc->sc_fifolen);
573 1.67 mlelstv }
574 1.1 rearnsha
575 1.32 rmind tp = tty_alloc();
576 1.1 rearnsha tp->t_oproc = plcomstart;
577 1.1 rearnsha tp->t_param = plcomparam;
578 1.1 rearnsha tp->t_hwiflow = plcomhwiflow;
579 1.1 rearnsha
580 1.1 rearnsha sc->sc_tty = tp;
581 1.65 skrll sc->sc_rbuf = kmem_alloc(plcom_rbuf_size << 1, KM_SLEEP);
582 1.1 rearnsha sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
583 1.1 rearnsha sc->sc_rbavail = plcom_rbuf_size;
584 1.1 rearnsha sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1);
585 1.1 rearnsha
586 1.1 rearnsha tty_attach(tp);
587 1.1 rearnsha
588 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
589 1.1 rearnsha int maj;
590 1.1 rearnsha
591 1.1 rearnsha /* locate the major number */
592 1.4 gehenna maj = cdevsw_lookup_major(&plcom_cdevsw);
593 1.1 rearnsha
594 1.40 skrll tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev));
595 1.1 rearnsha
596 1.40 skrll aprint_normal_dev(sc->sc_dev, "console\n");
597 1.1 rearnsha }
598 1.1 rearnsha
599 1.1 rearnsha #ifdef KGDB
600 1.1 rearnsha /*
601 1.1 rearnsha * Allow kgdb to "take over" this port. If this is
602 1.1 rearnsha * the kgdb device, it has exclusive use.
603 1.1 rearnsha */
604 1.44 mlelstv if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) &&
605 1.40 skrll pi->pi_iobase == plcomkgdb_info.pi_iobase) {
606 1.40 skrll if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
607 1.40 skrll plcom_kgdb_attached = 1;
608 1.1 rearnsha
609 1.40 skrll SET(sc->sc_hwflags, PLCOM_HW_KGDB);
610 1.40 skrll }
611 1.40 skrll aprint_normal_dev(sc->sc_dev, "kgdb\n");
612 1.1 rearnsha }
613 1.1 rearnsha #endif
614 1.1 rearnsha
615 1.25 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc);
616 1.1 rearnsha
617 1.33 tls #ifdef RND_COM
618 1.40 skrll rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
619 1.50 tls RND_TYPE_TTY, RND_FLAG_DEFAULT);
620 1.1 rearnsha #endif
621 1.1 rearnsha
622 1.40 skrll /*
623 1.40 skrll * if there are no enable/disable functions, assume the device
624 1.40 skrll * is always enabled
625 1.40 skrll */
626 1.1 rearnsha if (!sc->enable)
627 1.1 rearnsha sc->enabled = 1;
628 1.1 rearnsha
629 1.1 rearnsha plcom_config(sc);
630 1.1 rearnsha
631 1.1 rearnsha SET(sc->sc_hwflags, PLCOM_HW_DEV_OK);
632 1.1 rearnsha }
633 1.1 rearnsha
634 1.1 rearnsha void
635 1.1 rearnsha plcom_config(struct plcom_softc *sc)
636 1.1 rearnsha {
637 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
638 1.1 rearnsha
639 1.1 rearnsha /* Disable interrupts before configuring the device. */
640 1.1 rearnsha sc->sc_cr = 0;
641 1.40 skrll sc->sc_imsc = 0;
642 1.40 skrll switch (pi->pi_type) {
643 1.40 skrll case PLCOM_TYPE_PL010:
644 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
645 1.40 skrll break;
646 1.46 skrll
647 1.40 skrll case PLCOM_TYPE_PL011:
648 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
649 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
650 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
651 1.40 skrll break;
652 1.46 skrll }
653 1.1 rearnsha
654 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
655 1.1 rearnsha plcom_enable_debugport(sc);
656 1.1 rearnsha }
657 1.1 rearnsha
658 1.1 rearnsha int
659 1.38 skrll plcom_detach(device_t self, int flags)
660 1.1 rearnsha {
661 1.38 skrll struct plcom_softc *sc = device_private(self);
662 1.1 rearnsha int maj, mn;
663 1.1 rearnsha
664 1.31 dyoung if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB))
665 1.31 dyoung return EBUSY;
666 1.31 dyoung
667 1.31 dyoung if (sc->disable != NULL && sc->enabled != 0) {
668 1.31 dyoung (*sc->disable)(sc);
669 1.31 dyoung sc->enabled = 0;
670 1.31 dyoung }
671 1.31 dyoung
672 1.1 rearnsha /* locate the major number */
673 1.4 gehenna maj = cdevsw_lookup_major(&plcom_cdevsw);
674 1.1 rearnsha
675 1.1 rearnsha /* Nuke the vnodes for any open instances. */
676 1.15 thorpej mn = device_unit(self);
677 1.1 rearnsha vdevgone(maj, mn, mn, VCHR);
678 1.1 rearnsha
679 1.1 rearnsha mn |= PLCOMDIALOUT_MASK;
680 1.1 rearnsha vdevgone(maj, mn, mn, VCHR);
681 1.1 rearnsha
682 1.40 skrll if (sc->sc_rbuf == NULL) {
683 1.40 skrll /*
684 1.40 skrll * Ring buffer allocation failed in the plcom_attach_subr,
685 1.40 skrll * only the tty is allocated, and nothing else.
686 1.46 skrll */
687 1.40 skrll tty_free(sc->sc_tty);
688 1.40 skrll return 0;
689 1.40 skrll }
690 1.40 skrll
691 1.1 rearnsha /* Free the receive buffer. */
692 1.65 skrll kmem_free(sc->sc_rbuf, sc->sc_ebuf - sc->sc_rbuf);
693 1.1 rearnsha
694 1.1 rearnsha /* Detach and free the tty. */
695 1.1 rearnsha tty_detach(sc->sc_tty);
696 1.32 rmind tty_free(sc->sc_tty);
697 1.1 rearnsha
698 1.1 rearnsha /* Unhook the soft interrupt handler. */
699 1.25 ad softint_disestablish(sc->sc_si);
700 1.1 rearnsha
701 1.33 tls #ifdef RND_COM
702 1.1 rearnsha /* Unhook the entropy source. */
703 1.1 rearnsha rnd_detach_source(&sc->rnd_source);
704 1.1 rearnsha #endif
705 1.40 skrll callout_destroy(&sc->sc_diag_callout);
706 1.1 rearnsha
707 1.36 skrll /* Destroy the lock. */
708 1.36 skrll mutex_destroy(&sc->sc_lock);
709 1.36 skrll
710 1.1 rearnsha return 0;
711 1.1 rearnsha }
712 1.1 rearnsha
713 1.1 rearnsha int
714 1.31 dyoung plcom_activate(device_t self, enum devact act)
715 1.1 rearnsha {
716 1.31 dyoung struct plcom_softc *sc = device_private(self);
717 1.1 rearnsha
718 1.1 rearnsha switch (act) {
719 1.1 rearnsha case DVACT_DEACTIVATE:
720 1.31 dyoung sc->enabled = 0;
721 1.31 dyoung return 0;
722 1.31 dyoung default:
723 1.31 dyoung return EOPNOTSUPP;
724 1.1 rearnsha }
725 1.1 rearnsha }
726 1.1 rearnsha
727 1.1 rearnsha void
728 1.1 rearnsha plcom_shutdown(struct plcom_softc *sc)
729 1.1 rearnsha {
730 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
731 1.1 rearnsha struct tty *tp = sc->sc_tty;
732 1.36 skrll mutex_spin_enter(&sc->sc_lock);
733 1.1 rearnsha
734 1.1 rearnsha /* If we were asserting flow control, then deassert it. */
735 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
736 1.1 rearnsha plcom_hwiflow(sc);
737 1.1 rearnsha
738 1.1 rearnsha /* Clear any break condition set with TIOCSBRK. */
739 1.1 rearnsha plcom_break(sc, 0);
740 1.1 rearnsha
741 1.1 rearnsha /* Turn off PPS capture on last close. */
742 1.26 ad mutex_spin_enter(&timecounter_lock);
743 1.1 rearnsha sc->sc_ppsmask = 0;
744 1.1 rearnsha sc->ppsparam.mode = 0;
745 1.26 ad mutex_spin_exit(&timecounter_lock);
746 1.1 rearnsha
747 1.1 rearnsha /*
748 1.1 rearnsha * Hang up if necessary. Wait a bit, so the other side has time to
749 1.1 rearnsha * notice even if we immediately open the port again.
750 1.1 rearnsha * Avoid tsleeping above splhigh().
751 1.1 rearnsha */
752 1.1 rearnsha if (ISSET(tp->t_cflag, HUPCL)) {
753 1.1 rearnsha plcom_modem(sc, 0);
754 1.64 jmcneill microuptime(&sc->sc_hup_pending);
755 1.63 jmcneill sc->sc_hup_pending.tv_sec++;
756 1.1 rearnsha }
757 1.1 rearnsha
758 1.40 skrll sc->sc_cr = 0;
759 1.40 skrll sc->sc_imsc = 0;
760 1.1 rearnsha /* Turn off interrupts. */
761 1.40 skrll if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
762 1.1 rearnsha /* interrupt on break */
763 1.46 skrll
764 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
765 1.40 skrll sc->sc_imsc = 0;
766 1.40 skrll switch (pi->pi_type) {
767 1.40 skrll case PLCOM_TYPE_PL010:
768 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
769 1.40 skrll break;
770 1.40 skrll case PLCOM_TYPE_PL011:
771 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
772 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE);
773 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX);
774 1.40 skrll break;
775 1.40 skrll }
776 1.40 skrll }
777 1.40 skrll switch (pi->pi_type) {
778 1.40 skrll case PLCOM_TYPE_PL010:
779 1.40 skrll SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE);
780 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
781 1.40 skrll break;
782 1.40 skrll case PLCOM_TYPE_PL011:
783 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
784 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
785 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX);
786 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
787 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
788 1.40 skrll break;
789 1.40 skrll }
790 1.1 rearnsha
791 1.36 skrll mutex_spin_exit(&sc->sc_lock);
792 1.1 rearnsha if (sc->disable) {
793 1.1 rearnsha #ifdef DIAGNOSTIC
794 1.1 rearnsha if (!sc->enabled)
795 1.1 rearnsha panic("plcom_shutdown: not enabled?");
796 1.1 rearnsha #endif
797 1.1 rearnsha (*sc->disable)(sc);
798 1.1 rearnsha sc->enabled = 0;
799 1.1 rearnsha }
800 1.1 rearnsha }
801 1.1 rearnsha
802 1.1 rearnsha int
803 1.12 christos plcomopen(dev_t dev, int flag, int mode, struct lwp *l)
804 1.1 rearnsha {
805 1.1 rearnsha struct plcom_softc *sc;
806 1.40 skrll struct plcom_instance *pi;
807 1.1 rearnsha struct tty *tp;
808 1.36 skrll int s;
809 1.1 rearnsha int error;
810 1.1 rearnsha
811 1.28 cegger sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
812 1.1 rearnsha if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) ||
813 1.1 rearnsha sc->sc_rbuf == NULL)
814 1.1 rearnsha return ENXIO;
815 1.1 rearnsha
816 1.38 skrll if (!device_is_active(sc->sc_dev))
817 1.1 rearnsha return ENXIO;
818 1.1 rearnsha
819 1.40 skrll pi = &sc->sc_pi;
820 1.40 skrll
821 1.1 rearnsha #ifdef KGDB
822 1.1 rearnsha /*
823 1.1 rearnsha * If this is the kgdb port, no other use is permitted.
824 1.1 rearnsha */
825 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB))
826 1.1 rearnsha return EBUSY;
827 1.1 rearnsha #endif
828 1.1 rearnsha
829 1.1 rearnsha tp = sc->sc_tty;
830 1.1 rearnsha
831 1.18 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
832 1.18 elad return (EBUSY);
833 1.1 rearnsha
834 1.1 rearnsha s = spltty();
835 1.1 rearnsha
836 1.1 rearnsha /*
837 1.1 rearnsha * Do the following iff this is a first open.
838 1.1 rearnsha */
839 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
840 1.1 rearnsha struct termios t;
841 1.63 jmcneill struct timeval now, diff;
842 1.1 rearnsha
843 1.1 rearnsha tp->t_dev = dev;
844 1.1 rearnsha
845 1.1 rearnsha if (sc->enable) {
846 1.1 rearnsha if ((*sc->enable)(sc)) {
847 1.1 rearnsha splx(s);
848 1.40 skrll aprint_error_dev(sc->sc_dev,
849 1.40 skrll "device enable failed\n");
850 1.1 rearnsha return EIO;
851 1.1 rearnsha }
852 1.36 skrll mutex_spin_enter(&sc->sc_lock);
853 1.1 rearnsha sc->enabled = 1;
854 1.1 rearnsha plcom_config(sc);
855 1.36 skrll } else {
856 1.36 skrll mutex_spin_enter(&sc->sc_lock);
857 1.1 rearnsha }
858 1.1 rearnsha
859 1.63 jmcneill if (timerisset(&sc->sc_hup_pending)) {
860 1.64 jmcneill microuptime(&now);
861 1.63 jmcneill while (timercmp(&now, &sc->sc_hup_pending, <)) {
862 1.63 jmcneill timersub(&sc->sc_hup_pending, &now, &diff);
863 1.63 jmcneill const int ms = diff.tv_sec * 100 +
864 1.64 jmcneill diff.tv_usec / 1000;
865 1.64 jmcneill kpause(ttclos, false, uimax(mstohz(ms), 1),
866 1.64 jmcneill &sc->sc_lock);
867 1.64 jmcneill microuptime(&now);
868 1.63 jmcneill }
869 1.63 jmcneill timerclear(&sc->sc_hup_pending);
870 1.63 jmcneill }
871 1.63 jmcneill
872 1.1 rearnsha /* Turn on interrupts. */
873 1.1 rearnsha /* IER_ERXRDY | IER_ERLS | IER_EMSC; */
874 1.1 rearnsha /* Fetch the current modem control status, needed later. */
875 1.40 skrll sc->sc_cr = PL01X_CR_UARTEN;
876 1.40 skrll switch (pi->pi_type) {
877 1.40 skrll case PLCOM_TYPE_PL010:
878 1.40 skrll SET(sc->sc_cr,
879 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE);
880 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
881 1.40 skrll sc->sc_msr = PREAD1(pi, PL01XCOM_FR);
882 1.40 skrll break;
883 1.40 skrll case PLCOM_TYPE_PL011:
884 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
885 1.40 skrll SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE);
886 1.40 skrll SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX |
887 1.40 skrll PL011_INT_MSMASK);
888 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
889 1.40 skrll sc->sc_msr = PREAD4(pi, PL01XCOM_FR);
890 1.40 skrll break;
891 1.40 skrll }
892 1.1 rearnsha
893 1.1 rearnsha /* Clear PPS capture state on first open. */
894 1.26 ad
895 1.26 ad mutex_spin_enter(&timecounter_lock);
896 1.1 rearnsha sc->sc_ppsmask = 0;
897 1.1 rearnsha sc->ppsparam.mode = 0;
898 1.26 ad mutex_spin_exit(&timecounter_lock);
899 1.1 rearnsha
900 1.39 skrll mutex_spin_exit(&sc->sc_lock);
901 1.1 rearnsha
902 1.1 rearnsha /*
903 1.1 rearnsha * Initialize the termios status to the defaults. Add in the
904 1.1 rearnsha * sticky bits from TIOCSFLAGS.
905 1.1 rearnsha */
906 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
907 1.1 rearnsha t.c_ospeed = plcomconsrate;
908 1.1 rearnsha t.c_cflag = plcomconscflag;
909 1.1 rearnsha } else {
910 1.1 rearnsha t.c_ospeed = TTYDEF_SPEED;
911 1.1 rearnsha t.c_cflag = TTYDEF_CFLAG;
912 1.1 rearnsha }
913 1.40 skrll t.c_ispeed = t.c_ospeed;
914 1.40 skrll
915 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
916 1.1 rearnsha SET(t.c_cflag, CLOCAL);
917 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
918 1.1 rearnsha SET(t.c_cflag, CRTSCTS);
919 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
920 1.1 rearnsha SET(t.c_cflag, MDMBUF);
921 1.1 rearnsha /* Make sure plcomparam() will do something. */
922 1.1 rearnsha tp->t_ospeed = 0;
923 1.1 rearnsha (void) plcomparam(tp, &t);
924 1.1 rearnsha tp->t_iflag = TTYDEF_IFLAG;
925 1.1 rearnsha tp->t_oflag = TTYDEF_OFLAG;
926 1.1 rearnsha tp->t_lflag = TTYDEF_LFLAG;
927 1.1 rearnsha ttychars(tp);
928 1.1 rearnsha ttsetwater(tp);
929 1.1 rearnsha
930 1.36 skrll mutex_spin_enter(&sc->sc_lock);
931 1.1 rearnsha
932 1.1 rearnsha /*
933 1.1 rearnsha * Turn on DTR. We must always do this, even if carrier is not
934 1.1 rearnsha * present, because otherwise we'd have to use TIOCSDTR
935 1.1 rearnsha * immediately after setting CLOCAL, which applications do not
936 1.1 rearnsha * expect. We always assert DTR while the device is open
937 1.1 rearnsha * unless explicitly requested to deassert it.
938 1.1 rearnsha */
939 1.1 rearnsha plcom_modem(sc, 1);
940 1.1 rearnsha
941 1.1 rearnsha /* Clear the input ring, and unblock. */
942 1.1 rearnsha sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
943 1.1 rearnsha sc->sc_rbavail = plcom_rbuf_size;
944 1.1 rearnsha plcom_iflush(sc);
945 1.1 rearnsha CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
946 1.1 rearnsha plcom_hwiflow(sc);
947 1.1 rearnsha
948 1.1 rearnsha #ifdef PLCOM_DEBUG
949 1.1 rearnsha if (plcom_debug)
950 1.1 rearnsha plcomstatus(sc, "plcomopen ");
951 1.1 rearnsha #endif
952 1.1 rearnsha
953 1.36 skrll mutex_spin_exit(&sc->sc_lock);
954 1.1 rearnsha }
955 1.46 skrll
956 1.1 rearnsha splx(s);
957 1.1 rearnsha
958 1.1 rearnsha error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
959 1.1 rearnsha if (error)
960 1.1 rearnsha goto bad;
961 1.1 rearnsha
962 1.1 rearnsha error = (*tp->t_linesw->l_open)(dev, tp);
963 1.1 rearnsha if (error)
964 1.1 rearnsha goto bad;
965 1.1 rearnsha
966 1.1 rearnsha return 0;
967 1.1 rearnsha
968 1.1 rearnsha bad:
969 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
970 1.1 rearnsha /*
971 1.1 rearnsha * We failed to open the device, and nobody else had it opened.
972 1.1 rearnsha * Clean up the state as appropriate.
973 1.1 rearnsha */
974 1.1 rearnsha plcom_shutdown(sc);
975 1.1 rearnsha }
976 1.1 rearnsha
977 1.1 rearnsha return error;
978 1.1 rearnsha }
979 1.46 skrll
980 1.1 rearnsha int
981 1.12 christos plcomclose(dev_t dev, int flag, int mode, struct lwp *l)
982 1.1 rearnsha {
983 1.28 cegger struct plcom_softc *sc =
984 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
985 1.1 rearnsha struct tty *tp = sc->sc_tty;
986 1.1 rearnsha
987 1.1 rearnsha /* XXX This is for cons.c. */
988 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN))
989 1.1 rearnsha return 0;
990 1.1 rearnsha
991 1.1 rearnsha (*tp->t_linesw->l_close)(tp, flag);
992 1.1 rearnsha ttyclose(tp);
993 1.1 rearnsha
994 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
995 1.1 rearnsha return 0;
996 1.1 rearnsha
997 1.1 rearnsha if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
998 1.1 rearnsha /*
999 1.1 rearnsha * Although we got a last close, the device may still be in
1000 1.1 rearnsha * use; e.g. if this was the dialout node, and there are still
1001 1.1 rearnsha * processes waiting for carrier on the non-dialout node.
1002 1.1 rearnsha */
1003 1.1 rearnsha plcom_shutdown(sc);
1004 1.1 rearnsha }
1005 1.1 rearnsha
1006 1.1 rearnsha return 0;
1007 1.1 rearnsha }
1008 1.46 skrll
1009 1.1 rearnsha int
1010 1.1 rearnsha plcomread(dev_t dev, struct uio *uio, int flag)
1011 1.1 rearnsha {
1012 1.28 cegger struct plcom_softc *sc =
1013 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
1014 1.1 rearnsha struct tty *tp = sc->sc_tty;
1015 1.1 rearnsha
1016 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1017 1.1 rearnsha return EIO;
1018 1.46 skrll
1019 1.1 rearnsha return (*tp->t_linesw->l_read)(tp, uio, flag);
1020 1.1 rearnsha }
1021 1.46 skrll
1022 1.1 rearnsha int
1023 1.1 rearnsha plcomwrite(dev_t dev, struct uio *uio, int flag)
1024 1.1 rearnsha {
1025 1.28 cegger struct plcom_softc *sc =
1026 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
1027 1.1 rearnsha struct tty *tp = sc->sc_tty;
1028 1.1 rearnsha
1029 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1030 1.1 rearnsha return EIO;
1031 1.46 skrll
1032 1.1 rearnsha return (*tp->t_linesw->l_write)(tp, uio, flag);
1033 1.1 rearnsha }
1034 1.1 rearnsha
1035 1.1 rearnsha int
1036 1.12 christos plcompoll(dev_t dev, int events, struct lwp *l)
1037 1.1 rearnsha {
1038 1.28 cegger struct plcom_softc *sc =
1039 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
1040 1.1 rearnsha struct tty *tp = sc->sc_tty;
1041 1.1 rearnsha
1042 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1043 1.1 rearnsha return EIO;
1044 1.46 skrll
1045 1.12 christos return (*tp->t_linesw->l_poll)(tp, events, l);
1046 1.1 rearnsha }
1047 1.1 rearnsha
1048 1.1 rearnsha struct tty *
1049 1.1 rearnsha plcomtty(dev_t dev)
1050 1.1 rearnsha {
1051 1.28 cegger struct plcom_softc *sc =
1052 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
1053 1.1 rearnsha struct tty *tp = sc->sc_tty;
1054 1.1 rearnsha
1055 1.1 rearnsha return tp;
1056 1.1 rearnsha }
1057 1.1 rearnsha
1058 1.1 rearnsha int
1059 1.20 christos plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
1060 1.1 rearnsha {
1061 1.28 cegger struct plcom_softc *sc =
1062 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(dev));
1063 1.40 skrll struct tty *tp;
1064 1.1 rearnsha int error;
1065 1.1 rearnsha
1066 1.40 skrll if (sc == NULL)
1067 1.40 skrll return ENXIO;
1068 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1069 1.1 rearnsha return EIO;
1070 1.1 rearnsha
1071 1.40 skrll tp = sc->sc_tty;
1072 1.40 skrll
1073 1.12 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
1074 1.3 atatat if (error != EPASSTHROUGH)
1075 1.1 rearnsha return error;
1076 1.1 rearnsha
1077 1.12 christos error = ttioctl(tp, cmd, data, flag, l);
1078 1.3 atatat if (error != EPASSTHROUGH)
1079 1.1 rearnsha return error;
1080 1.1 rearnsha
1081 1.1 rearnsha error = 0;
1082 1.40 skrll switch (cmd) {
1083 1.40 skrll case TIOCSFLAGS:
1084 1.40 skrll error = kauth_authorize_device_tty(l->l_cred,
1085 1.40 skrll KAUTH_DEVICE_TTY_PRIVSET, tp);
1086 1.40 skrll break;
1087 1.40 skrll default:
1088 1.40 skrll /* nothing */
1089 1.40 skrll break;
1090 1.40 skrll }
1091 1.40 skrll if (error) {
1092 1.40 skrll return error;
1093 1.40 skrll }
1094 1.1 rearnsha
1095 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1096 1.1 rearnsha switch (cmd) {
1097 1.1 rearnsha case TIOCSBRK:
1098 1.1 rearnsha plcom_break(sc, 1);
1099 1.1 rearnsha break;
1100 1.1 rearnsha
1101 1.1 rearnsha case TIOCCBRK:
1102 1.1 rearnsha plcom_break(sc, 0);
1103 1.1 rearnsha break;
1104 1.1 rearnsha
1105 1.1 rearnsha case TIOCSDTR:
1106 1.1 rearnsha plcom_modem(sc, 1);
1107 1.1 rearnsha break;
1108 1.1 rearnsha
1109 1.1 rearnsha case TIOCCDTR:
1110 1.1 rearnsha plcom_modem(sc, 0);
1111 1.1 rearnsha break;
1112 1.1 rearnsha
1113 1.1 rearnsha case TIOCGFLAGS:
1114 1.1 rearnsha *(int *)data = sc->sc_swflags;
1115 1.1 rearnsha break;
1116 1.1 rearnsha
1117 1.1 rearnsha case TIOCSFLAGS:
1118 1.1 rearnsha sc->sc_swflags = *(int *)data;
1119 1.1 rearnsha break;
1120 1.1 rearnsha
1121 1.1 rearnsha case TIOCMSET:
1122 1.1 rearnsha case TIOCMBIS:
1123 1.1 rearnsha case TIOCMBIC:
1124 1.1 rearnsha tiocm_to_plcom(sc, cmd, *(int *)data);
1125 1.1 rearnsha break;
1126 1.1 rearnsha
1127 1.1 rearnsha case TIOCMGET:
1128 1.1 rearnsha *(int *)data = plcom_to_tiocm(sc);
1129 1.1 rearnsha break;
1130 1.1 rearnsha
1131 1.1 rearnsha case PPS_IOC_CREATE:
1132 1.1 rearnsha break;
1133 1.1 rearnsha
1134 1.1 rearnsha case PPS_IOC_DESTROY:
1135 1.1 rearnsha break;
1136 1.1 rearnsha
1137 1.1 rearnsha case PPS_IOC_GETPARAMS: {
1138 1.1 rearnsha pps_params_t *pp;
1139 1.1 rearnsha pp = (pps_params_t *)data;
1140 1.26 ad mutex_spin_enter(&timecounter_lock);
1141 1.1 rearnsha *pp = sc->ppsparam;
1142 1.26 ad mutex_spin_exit(&timecounter_lock);
1143 1.1 rearnsha break;
1144 1.1 rearnsha }
1145 1.1 rearnsha
1146 1.1 rearnsha case PPS_IOC_SETPARAMS: {
1147 1.1 rearnsha pps_params_t *pp;
1148 1.1 rearnsha int mode;
1149 1.1 rearnsha pp = (pps_params_t *)data;
1150 1.26 ad mutex_spin_enter(&timecounter_lock);
1151 1.1 rearnsha if (pp->mode & ~ppscap) {
1152 1.1 rearnsha error = EINVAL;
1153 1.26 ad mutex_spin_exit(&timecounter_lock);
1154 1.1 rearnsha break;
1155 1.1 rearnsha }
1156 1.1 rearnsha sc->ppsparam = *pp;
1157 1.46 skrll /*
1158 1.1 rearnsha * Compute msr masks from user-specified timestamp state.
1159 1.1 rearnsha */
1160 1.1 rearnsha mode = sc->ppsparam.mode;
1161 1.1 rearnsha #ifdef PPS_SYNC
1162 1.1 rearnsha if (mode & PPS_HARDPPSONASSERT) {
1163 1.1 rearnsha mode |= PPS_CAPTUREASSERT;
1164 1.1 rearnsha /* XXX revoke any previous HARDPPS source */
1165 1.1 rearnsha }
1166 1.1 rearnsha if (mode & PPS_HARDPPSONCLEAR) {
1167 1.1 rearnsha mode |= PPS_CAPTURECLEAR;
1168 1.1 rearnsha /* XXX revoke any previous HARDPPS source */
1169 1.1 rearnsha }
1170 1.1 rearnsha #endif /* PPS_SYNC */
1171 1.1 rearnsha switch (mode & PPS_CAPTUREBOTH) {
1172 1.1 rearnsha case 0:
1173 1.1 rearnsha sc->sc_ppsmask = 0;
1174 1.1 rearnsha break;
1175 1.46 skrll
1176 1.1 rearnsha case PPS_CAPTUREASSERT:
1177 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1178 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1179 1.1 rearnsha sc->sc_ppsclear = -1;
1180 1.1 rearnsha break;
1181 1.46 skrll
1182 1.1 rearnsha case PPS_CAPTURECLEAR:
1183 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1184 1.1 rearnsha sc->sc_ppsassert = -1;
1185 1.1 rearnsha sc->sc_ppsclear = 0;
1186 1.1 rearnsha break;
1187 1.1 rearnsha
1188 1.1 rearnsha case PPS_CAPTUREBOTH:
1189 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1190 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1191 1.1 rearnsha sc->sc_ppsclear = 0;
1192 1.1 rearnsha break;
1193 1.1 rearnsha
1194 1.1 rearnsha default:
1195 1.1 rearnsha error = EINVAL;
1196 1.1 rearnsha break;
1197 1.1 rearnsha }
1198 1.26 ad mutex_spin_exit(&timecounter_lock);
1199 1.1 rearnsha break;
1200 1.1 rearnsha }
1201 1.1 rearnsha
1202 1.1 rearnsha case PPS_IOC_GETCAP:
1203 1.1 rearnsha *(int*)data = ppscap;
1204 1.1 rearnsha break;
1205 1.1 rearnsha
1206 1.1 rearnsha case PPS_IOC_FETCH: {
1207 1.1 rearnsha pps_info_t *pi;
1208 1.1 rearnsha pi = (pps_info_t *)data;
1209 1.26 ad mutex_spin_enter(&timecounter_lock);
1210 1.1 rearnsha *pi = sc->ppsinfo;
1211 1.26 ad mutex_spin_exit(&timecounter_lock);
1212 1.1 rearnsha break;
1213 1.1 rearnsha }
1214 1.1 rearnsha
1215 1.1 rearnsha case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */
1216 1.1 rearnsha /*
1217 1.1 rearnsha * Some GPS clocks models use the falling rather than
1218 1.46 skrll * rising edge as the on-the-second signal.
1219 1.1 rearnsha * The old API has no way to specify PPS polarity.
1220 1.1 rearnsha */
1221 1.26 ad mutex_spin_enter(&timecounter_lock);
1222 1.35 skrll sc->sc_ppsmask = PL01X_MSR_DCD;
1223 1.1 rearnsha #ifndef PPS_TRAILING_EDGE
1224 1.35 skrll sc->sc_ppsassert = PL01X_MSR_DCD;
1225 1.1 rearnsha sc->sc_ppsclear = -1;
1226 1.46 skrll TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1227 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
1228 1.1 rearnsha #else
1229 1.1 rearnsha sc->sc_ppsassert = -1
1230 1.1 rearnsha sc->sc_ppsclear = 0;
1231 1.46 skrll TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1232 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
1233 1.1 rearnsha #endif
1234 1.26 ad mutex_spin_exit(&timecounter_lock);
1235 1.1 rearnsha break;
1236 1.1 rearnsha
1237 1.1 rearnsha default:
1238 1.3 atatat error = EPASSTHROUGH;
1239 1.1 rearnsha break;
1240 1.1 rearnsha }
1241 1.1 rearnsha
1242 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1243 1.1 rearnsha
1244 1.1 rearnsha #ifdef PLCOM_DEBUG
1245 1.1 rearnsha if (plcom_debug)
1246 1.1 rearnsha plcomstatus(sc, "plcomioctl ");
1247 1.1 rearnsha #endif
1248 1.1 rearnsha
1249 1.1 rearnsha return error;
1250 1.1 rearnsha }
1251 1.1 rearnsha
1252 1.1 rearnsha integrate void
1253 1.1 rearnsha plcom_schedrx(struct plcom_softc *sc)
1254 1.1 rearnsha {
1255 1.1 rearnsha
1256 1.1 rearnsha sc->sc_rx_ready = 1;
1257 1.1 rearnsha
1258 1.1 rearnsha /* Wake up the poller. */
1259 1.25 ad softint_schedule(sc->sc_si);
1260 1.1 rearnsha }
1261 1.1 rearnsha
1262 1.1 rearnsha void
1263 1.1 rearnsha plcom_break(struct plcom_softc *sc, int onoff)
1264 1.1 rearnsha {
1265 1.1 rearnsha
1266 1.1 rearnsha if (onoff)
1267 1.35 skrll SET(sc->sc_lcr, PL01X_LCR_BRK);
1268 1.1 rearnsha else
1269 1.35 skrll CLR(sc->sc_lcr, PL01X_LCR_BRK);
1270 1.1 rearnsha
1271 1.1 rearnsha if (!sc->sc_heldchange) {
1272 1.1 rearnsha if (sc->sc_tx_busy) {
1273 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1274 1.1 rearnsha sc->sc_tbc = 0;
1275 1.1 rearnsha sc->sc_heldchange = 1;
1276 1.1 rearnsha } else
1277 1.1 rearnsha plcom_loadchannelregs(sc);
1278 1.1 rearnsha }
1279 1.1 rearnsha }
1280 1.1 rearnsha
1281 1.1 rearnsha void
1282 1.1 rearnsha plcom_modem(struct plcom_softc *sc, int onoff)
1283 1.1 rearnsha {
1284 1.1 rearnsha
1285 1.1 rearnsha if (sc->sc_mcr_dtr == 0)
1286 1.1 rearnsha return;
1287 1.1 rearnsha
1288 1.1 rearnsha if (onoff)
1289 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_dtr);
1290 1.1 rearnsha else
1291 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1292 1.1 rearnsha
1293 1.1 rearnsha if (!sc->sc_heldchange) {
1294 1.1 rearnsha if (sc->sc_tx_busy) {
1295 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1296 1.1 rearnsha sc->sc_tbc = 0;
1297 1.1 rearnsha sc->sc_heldchange = 1;
1298 1.1 rearnsha } else
1299 1.1 rearnsha plcom_loadchannelregs(sc);
1300 1.1 rearnsha }
1301 1.1 rearnsha }
1302 1.1 rearnsha
1303 1.1 rearnsha void
1304 1.1 rearnsha tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits)
1305 1.1 rearnsha {
1306 1.1 rearnsha u_char plcombits;
1307 1.1 rearnsha
1308 1.1 rearnsha plcombits = 0;
1309 1.1 rearnsha if (ISSET(ttybits, TIOCM_DTR))
1310 1.35 skrll SET(plcombits, PL01X_MCR_DTR);
1311 1.1 rearnsha if (ISSET(ttybits, TIOCM_RTS))
1312 1.35 skrll SET(plcombits, PL01X_MCR_RTS);
1313 1.46 skrll
1314 1.1 rearnsha switch (how) {
1315 1.1 rearnsha case TIOCMBIC:
1316 1.1 rearnsha CLR(sc->sc_mcr, plcombits);
1317 1.1 rearnsha break;
1318 1.1 rearnsha
1319 1.1 rearnsha case TIOCMBIS:
1320 1.1 rearnsha SET(sc->sc_mcr, plcombits);
1321 1.1 rearnsha break;
1322 1.1 rearnsha
1323 1.1 rearnsha case TIOCMSET:
1324 1.35 skrll CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS);
1325 1.1 rearnsha SET(sc->sc_mcr, plcombits);
1326 1.1 rearnsha break;
1327 1.1 rearnsha }
1328 1.1 rearnsha
1329 1.1 rearnsha if (!sc->sc_heldchange) {
1330 1.1 rearnsha if (sc->sc_tx_busy) {
1331 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1332 1.1 rearnsha sc->sc_tbc = 0;
1333 1.1 rearnsha sc->sc_heldchange = 1;
1334 1.1 rearnsha } else
1335 1.1 rearnsha plcom_loadchannelregs(sc);
1336 1.1 rearnsha }
1337 1.1 rearnsha }
1338 1.1 rearnsha
1339 1.1 rearnsha int
1340 1.1 rearnsha plcom_to_tiocm(struct plcom_softc *sc)
1341 1.1 rearnsha {
1342 1.1 rearnsha u_char plcombits;
1343 1.1 rearnsha int ttybits = 0;
1344 1.1 rearnsha
1345 1.1 rearnsha plcombits = sc->sc_mcr;
1346 1.35 skrll if (ISSET(plcombits, PL01X_MCR_DTR))
1347 1.1 rearnsha SET(ttybits, TIOCM_DTR);
1348 1.35 skrll if (ISSET(plcombits, PL01X_MCR_RTS))
1349 1.1 rearnsha SET(ttybits, TIOCM_RTS);
1350 1.1 rearnsha
1351 1.1 rearnsha plcombits = sc->sc_msr;
1352 1.35 skrll if (ISSET(plcombits, PL01X_MSR_DCD))
1353 1.1 rearnsha SET(ttybits, TIOCM_CD);
1354 1.35 skrll if (ISSET(plcombits, PL01X_MSR_CTS))
1355 1.1 rearnsha SET(ttybits, TIOCM_CTS);
1356 1.35 skrll if (ISSET(plcombits, PL01X_MSR_DSR))
1357 1.1 rearnsha SET(ttybits, TIOCM_DSR);
1358 1.40 skrll if (ISSET(plcombits, PL011_MSR_RI))
1359 1.40 skrll SET(ttybits, TIOCM_RI);
1360 1.1 rearnsha
1361 1.1 rearnsha if (sc->sc_cr != 0)
1362 1.1 rearnsha SET(ttybits, TIOCM_LE);
1363 1.1 rearnsha
1364 1.1 rearnsha return ttybits;
1365 1.1 rearnsha }
1366 1.1 rearnsha
1367 1.67 mlelstv static uint32_t
1368 1.1 rearnsha cflag2lcr(tcflag_t cflag)
1369 1.1 rearnsha {
1370 1.67 mlelstv uint32_t lcr = 0;
1371 1.1 rearnsha
1372 1.1 rearnsha switch (ISSET(cflag, CSIZE)) {
1373 1.1 rearnsha case CS5:
1374 1.35 skrll SET(lcr, PL01X_LCR_5BITS);
1375 1.1 rearnsha break;
1376 1.1 rearnsha case CS6:
1377 1.35 skrll SET(lcr, PL01X_LCR_6BITS);
1378 1.1 rearnsha break;
1379 1.1 rearnsha case CS7:
1380 1.35 skrll SET(lcr, PL01X_LCR_7BITS);
1381 1.1 rearnsha break;
1382 1.1 rearnsha case CS8:
1383 1.35 skrll SET(lcr, PL01X_LCR_8BITS);
1384 1.1 rearnsha break;
1385 1.1 rearnsha }
1386 1.1 rearnsha if (ISSET(cflag, PARENB)) {
1387 1.35 skrll SET(lcr, PL01X_LCR_PEN);
1388 1.1 rearnsha if (!ISSET(cflag, PARODD))
1389 1.35 skrll SET(lcr, PL01X_LCR_EPS);
1390 1.1 rearnsha }
1391 1.1 rearnsha if (ISSET(cflag, CSTOPB))
1392 1.35 skrll SET(lcr, PL01X_LCR_STP2);
1393 1.1 rearnsha
1394 1.1 rearnsha return lcr;
1395 1.1 rearnsha }
1396 1.1 rearnsha
1397 1.1 rearnsha int
1398 1.1 rearnsha plcomparam(struct tty *tp, struct termios *t)
1399 1.1 rearnsha {
1400 1.28 cegger struct plcom_softc *sc =
1401 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1402 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1403 1.67 mlelstv int ospeed = -1, lvl;
1404 1.67 mlelstv uint32_t lcr;
1405 1.1 rearnsha
1406 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1407 1.1 rearnsha return EIO;
1408 1.1 rearnsha
1409 1.40 skrll switch (pi->pi_type) {
1410 1.40 skrll case PLCOM_TYPE_PL010:
1411 1.40 skrll ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency);
1412 1.40 skrll break;
1413 1.40 skrll case PLCOM_TYPE_PL011:
1414 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1415 1.40 skrll ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency);
1416 1.40 skrll break;
1417 1.40 skrll }
1418 1.1 rearnsha
1419 1.1 rearnsha /* Check requested parameters. */
1420 1.1 rearnsha if (ospeed < 0)
1421 1.1 rearnsha return EINVAL;
1422 1.1 rearnsha if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1423 1.1 rearnsha return EINVAL;
1424 1.1 rearnsha
1425 1.1 rearnsha /*
1426 1.1 rearnsha * For the console, always force CLOCAL and !HUPCL, so that the port
1427 1.1 rearnsha * is always active.
1428 1.1 rearnsha */
1429 1.1 rearnsha if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1430 1.1 rearnsha ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) {
1431 1.1 rearnsha SET(t->c_cflag, CLOCAL);
1432 1.1 rearnsha CLR(t->c_cflag, HUPCL);
1433 1.1 rearnsha }
1434 1.1 rearnsha
1435 1.1 rearnsha /*
1436 1.1 rearnsha * If there were no changes, don't do anything. This avoids dropping
1437 1.1 rearnsha * input and improves performance when all we did was frob things like
1438 1.1 rearnsha * VMIN and VTIME.
1439 1.1 rearnsha */
1440 1.1 rearnsha if (tp->t_ospeed == t->c_ospeed &&
1441 1.1 rearnsha tp->t_cflag == t->c_cflag)
1442 1.1 rearnsha return 0;
1443 1.1 rearnsha
1444 1.35 skrll lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag);
1445 1.1 rearnsha
1446 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1447 1.1 rearnsha
1448 1.1 rearnsha sc->sc_lcr = lcr;
1449 1.1 rearnsha
1450 1.1 rearnsha /*
1451 1.1 rearnsha * PL010 has a fixed-length FIFO trigger point.
1452 1.1 rearnsha */
1453 1.1 rearnsha if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO))
1454 1.1 rearnsha sc->sc_fifo = 1;
1455 1.1 rearnsha else
1456 1.1 rearnsha sc->sc_fifo = 0;
1457 1.1 rearnsha
1458 1.67 mlelstv if (sc->sc_fifo) {
1459 1.35 skrll SET(sc->sc_lcr, PL01X_LCR_FEN);
1460 1.1 rearnsha
1461 1.67 mlelstv switch (pi->pi_type) {
1462 1.67 mlelstv case PLCOM_TYPE_PL010:
1463 1.67 mlelstv sc->sc_ifls = 0;
1464 1.67 mlelstv break;
1465 1.67 mlelstv case PLCOM_TYPE_PL011:
1466 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1467 1.67 mlelstv lvl = PL011_IFLS_3QUARTERS;
1468 1.67 mlelstv sc->sc_ifls = PL011_IFLS_RXIFLS(lvl);
1469 1.67 mlelstv
1470 1.67 mlelstv lvl = PL011_IFLS_1QUARTER;
1471 1.67 mlelstv sc->sc_ifls |= PL011_IFLS_TXIFLS(lvl);
1472 1.67 mlelstv sc->sc_burstlen = uimin(sc->sc_fifolen * 3 / 4, 1);
1473 1.67 mlelstv break;
1474 1.67 mlelstv }
1475 1.67 mlelstv } else
1476 1.67 mlelstv sc->sc_ifls = 0;
1477 1.67 mlelstv
1478 1.1 rearnsha /*
1479 1.1 rearnsha * If we're not in a mode that assumes a connection is present, then
1480 1.1 rearnsha * ignore carrier changes.
1481 1.1 rearnsha */
1482 1.1 rearnsha if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1483 1.1 rearnsha sc->sc_msr_dcd = 0;
1484 1.1 rearnsha else
1485 1.35 skrll sc->sc_msr_dcd = PL01X_MSR_DCD;
1486 1.1 rearnsha /*
1487 1.1 rearnsha * Set the flow control pins depending on the current flow control
1488 1.1 rearnsha * mode.
1489 1.1 rearnsha */
1490 1.1 rearnsha if (ISSET(t->c_cflag, CRTSCTS)) {
1491 1.35 skrll sc->sc_mcr_dtr = PL01X_MCR_DTR;
1492 1.67 mlelstv
1493 1.67 mlelstv switch (pi->pi_type) {
1494 1.67 mlelstv case PLCOM_TYPE_PL010:
1495 1.67 mlelstv sc->sc_mcr_rts = PL01X_MCR_RTS;
1496 1.67 mlelstv sc->sc_msr_cts = PL01X_MSR_CTS;
1497 1.67 mlelstv break;
1498 1.67 mlelstv case PLCOM_TYPE_PL011:
1499 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1500 1.67 mlelstv sc->sc_mcr_rts = 0;
1501 1.67 mlelstv sc->sc_msr_cts = 0;
1502 1.67 mlelstv SET(sc->sc_cr, PL011_CR_CTSEN | PL011_CR_RTSEN);
1503 1.67 mlelstv break;
1504 1.67 mlelstv }
1505 1.1 rearnsha } else if (ISSET(t->c_cflag, MDMBUF)) {
1506 1.1 rearnsha /*
1507 1.1 rearnsha * For DTR/DCD flow control, make sure we don't toggle DTR for
1508 1.1 rearnsha * carrier detection.
1509 1.1 rearnsha */
1510 1.1 rearnsha sc->sc_mcr_dtr = 0;
1511 1.35 skrll sc->sc_mcr_rts = PL01X_MCR_DTR;
1512 1.35 skrll sc->sc_msr_cts = PL01X_MSR_DCD;
1513 1.67 mlelstv
1514 1.67 mlelstv switch (pi->pi_type) {
1515 1.67 mlelstv case PLCOM_TYPE_PL011:
1516 1.67 mlelstv CLR(sc->sc_cr, PL011_CR_CTSEN | PL011_CR_RTSEN);
1517 1.67 mlelstv break;
1518 1.67 mlelstv }
1519 1.1 rearnsha } else {
1520 1.1 rearnsha /*
1521 1.1 rearnsha * If no flow control, then always set RTS. This will make
1522 1.1 rearnsha * the other side happy if it mistakenly thinks we're doing
1523 1.1 rearnsha * RTS/CTS flow control.
1524 1.1 rearnsha */
1525 1.35 skrll sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS;
1526 1.1 rearnsha sc->sc_mcr_rts = 0;
1527 1.1 rearnsha sc->sc_msr_cts = 0;
1528 1.35 skrll if (ISSET(sc->sc_mcr, PL01X_MCR_DTR))
1529 1.35 skrll SET(sc->sc_mcr, PL01X_MCR_RTS);
1530 1.1 rearnsha else
1531 1.35 skrll CLR(sc->sc_mcr, PL01X_MCR_RTS);
1532 1.67 mlelstv switch (pi->pi_type) {
1533 1.67 mlelstv case PLCOM_TYPE_PL011:
1534 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1535 1.67 mlelstv CLR(sc->sc_cr, PL011_CR_CTSEN | PL011_CR_RTSEN);
1536 1.67 mlelstv break;
1537 1.67 mlelstv }
1538 1.1 rearnsha }
1539 1.1 rearnsha sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1540 1.1 rearnsha
1541 1.1 rearnsha #if 0
1542 1.1 rearnsha if (ospeed == 0)
1543 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1544 1.1 rearnsha else
1545 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_dtr);
1546 1.1 rearnsha #endif
1547 1.1 rearnsha
1548 1.40 skrll switch (pi->pi_type) {
1549 1.40 skrll case PLCOM_TYPE_PL010:
1550 1.40 skrll sc->sc_ratel = ospeed & 0xff;
1551 1.40 skrll sc->sc_rateh = (ospeed >> 8) & 0xff;
1552 1.40 skrll break;
1553 1.40 skrll case PLCOM_TYPE_PL011:
1554 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1555 1.40 skrll sc->sc_ratel = ospeed & ((1 << 6) - 1);
1556 1.40 skrll sc->sc_rateh = ospeed >> 6;
1557 1.40 skrll break;
1558 1.40 skrll }
1559 1.1 rearnsha
1560 1.1 rearnsha /* And copy to tty. */
1561 1.40 skrll tp->t_ispeed = t->c_ospeed;
1562 1.1 rearnsha tp->t_ospeed = t->c_ospeed;
1563 1.1 rearnsha tp->t_cflag = t->c_cflag;
1564 1.1 rearnsha
1565 1.1 rearnsha if (!sc->sc_heldchange) {
1566 1.1 rearnsha if (sc->sc_tx_busy) {
1567 1.1 rearnsha sc->sc_heldtbc = sc->sc_tbc;
1568 1.1 rearnsha sc->sc_tbc = 0;
1569 1.1 rearnsha sc->sc_heldchange = 1;
1570 1.1 rearnsha } else
1571 1.1 rearnsha plcom_loadchannelregs(sc);
1572 1.1 rearnsha }
1573 1.1 rearnsha
1574 1.1 rearnsha if (!ISSET(t->c_cflag, CHWFLOW)) {
1575 1.1 rearnsha /* Disable the high water mark. */
1576 1.1 rearnsha sc->sc_r_hiwat = 0;
1577 1.1 rearnsha sc->sc_r_lowat = 0;
1578 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1579 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1580 1.1 rearnsha plcom_schedrx(sc);
1581 1.1 rearnsha }
1582 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1583 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1584 1.1 rearnsha plcom_hwiflow(sc);
1585 1.1 rearnsha }
1586 1.1 rearnsha } else {
1587 1.1 rearnsha sc->sc_r_hiwat = plcom_rbuf_hiwat;
1588 1.1 rearnsha sc->sc_r_lowat = plcom_rbuf_lowat;
1589 1.1 rearnsha }
1590 1.1 rearnsha
1591 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1592 1.1 rearnsha
1593 1.1 rearnsha /*
1594 1.1 rearnsha * Update the tty layer's idea of the carrier bit, in case we changed
1595 1.1 rearnsha * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1596 1.1 rearnsha * explicit request.
1597 1.1 rearnsha */
1598 1.35 skrll (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD));
1599 1.1 rearnsha
1600 1.1 rearnsha #ifdef PLCOM_DEBUG
1601 1.1 rearnsha if (plcom_debug)
1602 1.1 rearnsha plcomstatus(sc, "plcomparam ");
1603 1.1 rearnsha #endif
1604 1.1 rearnsha
1605 1.1 rearnsha if (!ISSET(t->c_cflag, CHWFLOW)) {
1606 1.1 rearnsha if (sc->sc_tx_stopped) {
1607 1.1 rearnsha sc->sc_tx_stopped = 0;
1608 1.1 rearnsha plcomstart(tp);
1609 1.1 rearnsha }
1610 1.1 rearnsha }
1611 1.1 rearnsha
1612 1.1 rearnsha return 0;
1613 1.1 rearnsha }
1614 1.1 rearnsha
1615 1.1 rearnsha void
1616 1.1 rearnsha plcom_iflush(struct plcom_softc *sc)
1617 1.1 rearnsha {
1618 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1619 1.1 rearnsha #ifdef DIAGNOSTIC
1620 1.1 rearnsha int reg;
1621 1.1 rearnsha #endif
1622 1.1 rearnsha int timo;
1623 1.1 rearnsha
1624 1.1 rearnsha #ifdef DIAGNOSTIC
1625 1.1 rearnsha reg = 0xffff;
1626 1.1 rearnsha #endif
1627 1.1 rearnsha timo = 50000;
1628 1.1 rearnsha /* flush any pending I/O */
1629 1.40 skrll while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)
1630 1.1 rearnsha && --timo)
1631 1.1 rearnsha #ifdef DIAGNOSTIC
1632 1.1 rearnsha reg =
1633 1.1 rearnsha #else
1634 1.1 rearnsha (void)
1635 1.1 rearnsha #endif
1636 1.40 skrll PREAD1(pi, PL01XCOM_DR);
1637 1.1 rearnsha #ifdef DIAGNOSTIC
1638 1.1 rearnsha if (!timo)
1639 1.40 skrll aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__,
1640 1.40 skrll reg);
1641 1.1 rearnsha #endif
1642 1.1 rearnsha }
1643 1.1 rearnsha
1644 1.1 rearnsha void
1645 1.1 rearnsha plcom_loadchannelregs(struct plcom_softc *sc)
1646 1.1 rearnsha {
1647 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1648 1.67 mlelstv uint16_t ifls;
1649 1.1 rearnsha
1650 1.1 rearnsha /* XXXXX necessary? */
1651 1.1 rearnsha plcom_iflush(sc);
1652 1.1 rearnsha
1653 1.40 skrll switch (pi->pi_type) {
1654 1.40 skrll case PLCOM_TYPE_PL010:
1655 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
1656 1.55 jmcneill if (sc->sc_frequency != 0) {
1657 1.55 jmcneill PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel);
1658 1.55 jmcneill PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh);
1659 1.55 jmcneill }
1660 1.40 skrll PWRITE1(pi, PL010COM_LCR, sc->sc_lcr);
1661 1.40 skrll
1662 1.40 skrll /* XXX device_unit() abuse */
1663 1.40 skrll if (sc->sc_set_mcr)
1664 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
1665 1.40 skrll device_unit(sc->sc_dev),
1666 1.40 skrll sc->sc_mcr_active = sc->sc_mcr);
1667 1.40 skrll
1668 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1669 1.40 skrll break;
1670 1.40 skrll
1671 1.40 skrll case PLCOM_TYPE_PL011:
1672 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1673 1.67 mlelstv PWRITE2(pi, PL011COM_CR, 0);
1674 1.55 jmcneill if (sc->sc_frequency != 0) {
1675 1.55 jmcneill PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel);
1676 1.55 jmcneill PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh);
1677 1.55 jmcneill }
1678 1.67 mlelstv
1679 1.67 mlelstv /* Bits 6..15 are reserved, don't modify, read as zero */
1680 1.67 mlelstv ifls = PREAD2(pi, PL011COM_IFLS) & ~PL011_IFLS_MASK;
1681 1.67 mlelstv ifls |= sc->sc_ifls & PL011_IFLS_MASK;
1682 1.67 mlelstv PWRITE2(pi, PL011COM_IFLS, ifls);
1683 1.67 mlelstv
1684 1.40 skrll PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr);
1685 1.40 skrll sc->sc_mcr_active = sc->sc_mcr;
1686 1.40 skrll CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR));
1687 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active));
1688 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
1689 1.40 skrll break;
1690 1.40 skrll }
1691 1.1 rearnsha }
1692 1.1 rearnsha
1693 1.1 rearnsha int
1694 1.1 rearnsha plcomhwiflow(struct tty *tp, int block)
1695 1.1 rearnsha {
1696 1.28 cegger struct plcom_softc *sc =
1697 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1698 1.1 rearnsha
1699 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1700 1.1 rearnsha return 0;
1701 1.1 rearnsha
1702 1.1 rearnsha if (sc->sc_mcr_rts == 0)
1703 1.1 rearnsha return 0;
1704 1.1 rearnsha
1705 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1706 1.46 skrll
1707 1.1 rearnsha if (block) {
1708 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1709 1.1 rearnsha SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1710 1.1 rearnsha plcom_hwiflow(sc);
1711 1.1 rearnsha }
1712 1.1 rearnsha } else {
1713 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1714 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1715 1.1 rearnsha plcom_schedrx(sc);
1716 1.1 rearnsha }
1717 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1718 1.1 rearnsha CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1719 1.1 rearnsha plcom_hwiflow(sc);
1720 1.1 rearnsha }
1721 1.1 rearnsha }
1722 1.1 rearnsha
1723 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1724 1.1 rearnsha return 1;
1725 1.1 rearnsha }
1726 1.46 skrll
1727 1.1 rearnsha /*
1728 1.1 rearnsha * (un)block input via hw flowcontrol
1729 1.1 rearnsha */
1730 1.1 rearnsha void
1731 1.1 rearnsha plcom_hwiflow(struct plcom_softc *sc)
1732 1.1 rearnsha {
1733 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1734 1.40 skrll
1735 1.1 rearnsha if (sc->sc_mcr_rts == 0)
1736 1.1 rearnsha return;
1737 1.1 rearnsha
1738 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1739 1.1 rearnsha CLR(sc->sc_mcr, sc->sc_mcr_rts);
1740 1.1 rearnsha CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1741 1.1 rearnsha } else {
1742 1.1 rearnsha SET(sc->sc_mcr, sc->sc_mcr_rts);
1743 1.1 rearnsha SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1744 1.1 rearnsha }
1745 1.40 skrll switch (pi->pi_type) {
1746 1.40 skrll case PLCOM_TYPE_PL010:
1747 1.40 skrll if (sc->sc_set_mcr)
1748 1.40 skrll /* XXX device_unit() abuse */
1749 1.40 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg,
1750 1.40 skrll device_unit(sc->sc_dev), sc->sc_mcr_active);
1751 1.40 skrll break;
1752 1.40 skrll case PLCOM_TYPE_PL011:
1753 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1754 1.40 skrll CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR));
1755 1.40 skrll SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active));
1756 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
1757 1.40 skrll break;
1758 1.40 skrll }
1759 1.1 rearnsha }
1760 1.1 rearnsha
1761 1.1 rearnsha
1762 1.1 rearnsha void
1763 1.1 rearnsha plcomstart(struct tty *tp)
1764 1.1 rearnsha {
1765 1.28 cegger struct plcom_softc *sc =
1766 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1767 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1768 1.1 rearnsha int s;
1769 1.1 rearnsha
1770 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
1771 1.1 rearnsha return;
1772 1.1 rearnsha
1773 1.1 rearnsha s = spltty();
1774 1.1 rearnsha if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1775 1.1 rearnsha goto out;
1776 1.1 rearnsha if (sc->sc_tx_stopped)
1777 1.1 rearnsha goto out;
1778 1.1 rearnsha
1779 1.24 ad if (!ttypull(tp))
1780 1.24 ad goto out;
1781 1.1 rearnsha
1782 1.1 rearnsha /* Grab the first contiguous region of buffer space. */
1783 1.1 rearnsha {
1784 1.1 rearnsha u_char *tba;
1785 1.1 rearnsha int tbc;
1786 1.1 rearnsha
1787 1.1 rearnsha tba = tp->t_outq.c_cf;
1788 1.1 rearnsha tbc = ndqb(&tp->t_outq, 0);
1789 1.1 rearnsha
1790 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1791 1.1 rearnsha
1792 1.1 rearnsha sc->sc_tba = tba;
1793 1.1 rearnsha sc->sc_tbc = tbc;
1794 1.1 rearnsha }
1795 1.1 rearnsha
1796 1.1 rearnsha SET(tp->t_state, TS_BUSY);
1797 1.1 rearnsha sc->sc_tx_busy = 1;
1798 1.1 rearnsha
1799 1.1 rearnsha /* Enable transmit completion interrupts if necessary. */
1800 1.40 skrll switch (pi->pi_type) {
1801 1.40 skrll case PLCOM_TYPE_PL010:
1802 1.40 skrll if (!ISSET(sc->sc_cr, PL010_CR_TIE)) {
1803 1.40 skrll SET(sc->sc_cr, PL010_CR_TIE);
1804 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1805 1.40 skrll }
1806 1.40 skrll break;
1807 1.40 skrll case PLCOM_TYPE_PL011:
1808 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1809 1.40 skrll if (!ISSET(sc->sc_imsc, PL011_INT_TX)) {
1810 1.40 skrll SET(sc->sc_imsc, PL011_INT_TX);
1811 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
1812 1.40 skrll }
1813 1.40 skrll break;
1814 1.1 rearnsha }
1815 1.1 rearnsha
1816 1.1 rearnsha /* Output the first chunk of the contiguous buffer. */
1817 1.1 rearnsha {
1818 1.42 skrll int n;
1819 1.1 rearnsha
1820 1.1 rearnsha n = sc->sc_tbc;
1821 1.67 mlelstv if (n > sc->sc_burstlen)
1822 1.67 mlelstv n = sc->sc_burstlen;
1823 1.40 skrll PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n);
1824 1.1 rearnsha sc->sc_tbc -= n;
1825 1.1 rearnsha sc->sc_tba += n;
1826 1.1 rearnsha }
1827 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1828 1.1 rearnsha out:
1829 1.1 rearnsha splx(s);
1830 1.1 rearnsha return;
1831 1.1 rearnsha }
1832 1.1 rearnsha
1833 1.1 rearnsha /*
1834 1.1 rearnsha * Stop output on a line.
1835 1.1 rearnsha */
1836 1.1 rearnsha void
1837 1.1 rearnsha plcomstop(struct tty *tp, int flag)
1838 1.1 rearnsha {
1839 1.28 cegger struct plcom_softc *sc =
1840 1.28 cegger device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev));
1841 1.1 rearnsha
1842 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1843 1.1 rearnsha if (ISSET(tp->t_state, TS_BUSY)) {
1844 1.1 rearnsha /* Stop transmitting at the next chunk. */
1845 1.1 rearnsha sc->sc_tbc = 0;
1846 1.1 rearnsha sc->sc_heldtbc = 0;
1847 1.1 rearnsha if (!ISSET(tp->t_state, TS_TTSTOP))
1848 1.1 rearnsha SET(tp->t_state, TS_FLUSH);
1849 1.1 rearnsha }
1850 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1851 1.1 rearnsha }
1852 1.1 rearnsha
1853 1.1 rearnsha void
1854 1.1 rearnsha plcomdiag(void *arg)
1855 1.1 rearnsha {
1856 1.1 rearnsha struct plcom_softc *sc = arg;
1857 1.1 rearnsha int overflows, floods;
1858 1.1 rearnsha
1859 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1860 1.1 rearnsha overflows = sc->sc_overflows;
1861 1.1 rearnsha sc->sc_overflows = 0;
1862 1.1 rearnsha floods = sc->sc_floods;
1863 1.1 rearnsha sc->sc_floods = 0;
1864 1.1 rearnsha sc->sc_errors = 0;
1865 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1866 1.1 rearnsha
1867 1.1 rearnsha log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1868 1.38 skrll device_xname(sc->sc_dev),
1869 1.1 rearnsha overflows, overflows == 1 ? "" : "s",
1870 1.1 rearnsha floods, floods == 1 ? "" : "s");
1871 1.1 rearnsha }
1872 1.1 rearnsha
1873 1.1 rearnsha integrate void
1874 1.1 rearnsha plcom_rxsoft(struct plcom_softc *sc, struct tty *tp)
1875 1.1 rearnsha {
1876 1.1 rearnsha int (*rint) (int, struct tty *) = tp->t_linesw->l_rint;
1877 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
1878 1.1 rearnsha u_char *get, *end;
1879 1.1 rearnsha u_int cc, scc;
1880 1.1 rearnsha u_char rsr;
1881 1.1 rearnsha int code;
1882 1.1 rearnsha
1883 1.1 rearnsha end = sc->sc_ebuf;
1884 1.1 rearnsha get = sc->sc_rbget;
1885 1.1 rearnsha scc = cc = plcom_rbuf_size - sc->sc_rbavail;
1886 1.1 rearnsha
1887 1.1 rearnsha if (cc == plcom_rbuf_size) {
1888 1.1 rearnsha sc->sc_floods++;
1889 1.1 rearnsha if (sc->sc_errors++ == 0)
1890 1.1 rearnsha callout_reset(&sc->sc_diag_callout, 60 * hz,
1891 1.1 rearnsha plcomdiag, sc);
1892 1.1 rearnsha }
1893 1.1 rearnsha
1894 1.1 rearnsha while (cc) {
1895 1.1 rearnsha code = get[0];
1896 1.1 rearnsha rsr = get[1];
1897 1.35 skrll if (ISSET(rsr, PL01X_RSR_ERROR)) {
1898 1.35 skrll if (ISSET(rsr, PL01X_RSR_OE)) {
1899 1.1 rearnsha sc->sc_overflows++;
1900 1.1 rearnsha if (sc->sc_errors++ == 0)
1901 1.1 rearnsha callout_reset(&sc->sc_diag_callout,
1902 1.1 rearnsha 60 * hz, plcomdiag, sc);
1903 1.1 rearnsha }
1904 1.35 skrll if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE))
1905 1.1 rearnsha SET(code, TTY_FE);
1906 1.35 skrll if (ISSET(rsr, PL01X_RSR_PE))
1907 1.1 rearnsha SET(code, TTY_PE);
1908 1.1 rearnsha }
1909 1.1 rearnsha if ((*rint)(code, tp) == -1) {
1910 1.1 rearnsha /*
1911 1.1 rearnsha * The line discipline's buffer is out of space.
1912 1.1 rearnsha */
1913 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1914 1.1 rearnsha /*
1915 1.1 rearnsha * We're either not using flow control, or the
1916 1.1 rearnsha * line discipline didn't tell us to block for
1917 1.1 rearnsha * some reason. Either way, we have no way to
1918 1.1 rearnsha * know when there's more space available, so
1919 1.1 rearnsha * just drop the rest of the data.
1920 1.1 rearnsha */
1921 1.1 rearnsha get += cc << 1;
1922 1.1 rearnsha if (get >= end)
1923 1.1 rearnsha get -= plcom_rbuf_size << 1;
1924 1.1 rearnsha cc = 0;
1925 1.1 rearnsha } else {
1926 1.1 rearnsha /*
1927 1.1 rearnsha * Don't schedule any more receive processing
1928 1.1 rearnsha * until the line discipline tells us there's
1929 1.1 rearnsha * space available (through plcomhwiflow()).
1930 1.1 rearnsha * Leave the rest of the data in the input
1931 1.1 rearnsha * buffer.
1932 1.1 rearnsha */
1933 1.1 rearnsha SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1934 1.1 rearnsha }
1935 1.1 rearnsha break;
1936 1.1 rearnsha }
1937 1.1 rearnsha get += 2;
1938 1.1 rearnsha if (get >= end)
1939 1.1 rearnsha get = sc->sc_rbuf;
1940 1.1 rearnsha cc--;
1941 1.1 rearnsha }
1942 1.1 rearnsha if (cc != scc) {
1943 1.1 rearnsha sc->sc_rbget = get;
1944 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1945 1.36 skrll
1946 1.1 rearnsha cc = sc->sc_rbavail += scc - cc;
1947 1.1 rearnsha /* Buffers should be ok again, release possible block. */
1948 1.1 rearnsha if (cc >= sc->sc_r_lowat) {
1949 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1950 1.1 rearnsha CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1951 1.40 skrll switch (pi->pi_type) {
1952 1.40 skrll case PLCOM_TYPE_PL010:
1953 1.40 skrll SET(sc->sc_cr,
1954 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE);
1955 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
1956 1.40 skrll break;
1957 1.40 skrll case PLCOM_TYPE_PL011:
1958 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
1959 1.40 skrll SET(sc->sc_imsc,
1960 1.40 skrll PL011_INT_RX | PL011_INT_RT);
1961 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
1962 1.40 skrll break;
1963 1.40 skrll }
1964 1.1 rearnsha }
1965 1.1 rearnsha if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1966 1.1 rearnsha CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1967 1.1 rearnsha plcom_hwiflow(sc);
1968 1.1 rearnsha }
1969 1.1 rearnsha }
1970 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1971 1.1 rearnsha }
1972 1.1 rearnsha }
1973 1.1 rearnsha
1974 1.1 rearnsha integrate void
1975 1.1 rearnsha plcom_txsoft(struct plcom_softc *sc, struct tty *tp)
1976 1.1 rearnsha {
1977 1.1 rearnsha
1978 1.1 rearnsha CLR(tp->t_state, TS_BUSY);
1979 1.1 rearnsha if (ISSET(tp->t_state, TS_FLUSH))
1980 1.1 rearnsha CLR(tp->t_state, TS_FLUSH);
1981 1.1 rearnsha else
1982 1.1 rearnsha ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1983 1.1 rearnsha (*tp->t_linesw->l_start)(tp);
1984 1.1 rearnsha }
1985 1.1 rearnsha
1986 1.1 rearnsha integrate void
1987 1.1 rearnsha plcom_stsoft(struct plcom_softc *sc, struct tty *tp)
1988 1.1 rearnsha {
1989 1.1 rearnsha u_char msr, delta;
1990 1.1 rearnsha
1991 1.36 skrll mutex_spin_enter(&sc->sc_lock);
1992 1.1 rearnsha msr = sc->sc_msr;
1993 1.1 rearnsha delta = sc->sc_msr_delta;
1994 1.1 rearnsha sc->sc_msr_delta = 0;
1995 1.36 skrll mutex_spin_exit(&sc->sc_lock);
1996 1.1 rearnsha
1997 1.1 rearnsha if (ISSET(delta, sc->sc_msr_dcd)) {
1998 1.1 rearnsha /*
1999 1.1 rearnsha * Inform the tty layer that carrier detect changed.
2000 1.1 rearnsha */
2001 1.35 skrll (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD));
2002 1.1 rearnsha }
2003 1.1 rearnsha
2004 1.1 rearnsha if (ISSET(delta, sc->sc_msr_cts)) {
2005 1.1 rearnsha /* Block or unblock output according to flow control. */
2006 1.1 rearnsha if (ISSET(msr, sc->sc_msr_cts)) {
2007 1.1 rearnsha sc->sc_tx_stopped = 0;
2008 1.1 rearnsha (*tp->t_linesw->l_start)(tp);
2009 1.1 rearnsha } else {
2010 1.1 rearnsha sc->sc_tx_stopped = 1;
2011 1.1 rearnsha }
2012 1.1 rearnsha }
2013 1.1 rearnsha
2014 1.1 rearnsha #ifdef PLCOM_DEBUG
2015 1.1 rearnsha if (plcom_debug)
2016 1.1 rearnsha plcomstatus(sc, "plcom_stsoft");
2017 1.1 rearnsha #endif
2018 1.1 rearnsha }
2019 1.1 rearnsha
2020 1.1 rearnsha void
2021 1.1 rearnsha plcomsoft(void *arg)
2022 1.1 rearnsha {
2023 1.1 rearnsha struct plcom_softc *sc = arg;
2024 1.1 rearnsha struct tty *tp;
2025 1.1 rearnsha
2026 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
2027 1.1 rearnsha return;
2028 1.1 rearnsha
2029 1.21 ad tp = sc->sc_tty;
2030 1.46 skrll
2031 1.21 ad if (sc->sc_rx_ready) {
2032 1.21 ad sc->sc_rx_ready = 0;
2033 1.21 ad plcom_rxsoft(sc, tp);
2034 1.21 ad }
2035 1.1 rearnsha
2036 1.21 ad if (sc->sc_st_check) {
2037 1.21 ad sc->sc_st_check = 0;
2038 1.21 ad plcom_stsoft(sc, tp);
2039 1.21 ad }
2040 1.1 rearnsha
2041 1.21 ad if (sc->sc_tx_done) {
2042 1.21 ad sc->sc_tx_done = 0;
2043 1.21 ad plcom_txsoft(sc, tp);
2044 1.1 rearnsha }
2045 1.1 rearnsha }
2046 1.1 rearnsha
2047 1.40 skrll bool
2048 1.40 skrll plcom_intstatus(struct plcom_instance *pi, u_int *istatus)
2049 1.40 skrll {
2050 1.40 skrll bool ret = false;
2051 1.40 skrll u_int stat = 0;
2052 1.40 skrll
2053 1.40 skrll switch (pi->pi_type) {
2054 1.40 skrll case PLCOM_TYPE_PL010:
2055 1.40 skrll stat = PREAD1(pi, PL010COM_IIR);
2056 1.40 skrll ret = ISSET(stat, PL010_IIR_IMASK);
2057 1.40 skrll break;
2058 1.40 skrll case PLCOM_TYPE_PL011:
2059 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2060 1.40 skrll stat = PREAD4(pi, PL011COM_MIS);
2061 1.40 skrll ret = ISSET(stat, PL011_INT_ALLMASK);
2062 1.40 skrll break;
2063 1.40 skrll }
2064 1.40 skrll *istatus = stat;
2065 1.40 skrll
2066 1.40 skrll return ret;
2067 1.46 skrll }
2068 1.40 skrll
2069 1.1 rearnsha int
2070 1.1 rearnsha plcomintr(void *arg)
2071 1.1 rearnsha {
2072 1.1 rearnsha struct plcom_softc *sc = arg;
2073 1.40 skrll struct plcom_instance *pi = &sc->sc_pi;
2074 1.1 rearnsha u_char *put, *end;
2075 1.1 rearnsha u_int cc;
2076 1.40 skrll u_int istatus = 0;
2077 1.40 skrll u_char rsr;
2078 1.40 skrll bool intr = false;
2079 1.40 skrll
2080 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2081 1.1 rearnsha
2082 1.1 rearnsha if (PLCOM_ISALIVE(sc) == 0)
2083 1.1 rearnsha return 0;
2084 1.1 rearnsha
2085 1.36 skrll mutex_spin_enter(&sc->sc_lock);
2086 1.40 skrll intr = plcom_intstatus(pi, &istatus);
2087 1.40 skrll if (!intr) {
2088 1.36 skrll mutex_spin_exit(&sc->sc_lock);
2089 1.1 rearnsha return 0;
2090 1.1 rearnsha }
2091 1.1 rearnsha
2092 1.1 rearnsha end = sc->sc_ebuf;
2093 1.1 rearnsha put = sc->sc_rbput;
2094 1.1 rearnsha cc = sc->sc_rbavail;
2095 1.1 rearnsha
2096 1.1 rearnsha do {
2097 1.40 skrll u_int msr = 0, delta, fr;
2098 1.40 skrll bool rxintr = false, txintr = false, msintr;
2099 1.1 rearnsha
2100 1.40 skrll /* don't need RI here*/
2101 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2102 1.1 rearnsha
2103 1.35 skrll if (!ISSET(fr, PL01X_FR_RXFE) &&
2104 1.1 rearnsha !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
2105 1.1 rearnsha while (cc > 0) {
2106 1.1 rearnsha int cn_trapped = 0;
2107 1.40 skrll put[0] = PREAD1(pi, PL01XCOM_DR);
2108 1.40 skrll rsr = PREAD1(pi, PL01XCOM_RSR);
2109 1.1 rearnsha /* Clear any error status. */
2110 1.35 skrll if (ISSET(rsr, PL01X_RSR_ERROR))
2111 1.40 skrll PWRITE1(pi, PL01XCOM_ECR, 0);
2112 1.67 mlelstv
2113 1.35 skrll if (ISSET(rsr, PL01X_RSR_BE)) {
2114 1.10 rearnsha cn_trapped = 0;
2115 1.1 rearnsha cn_check_magic(sc->sc_tty->t_dev,
2116 1.1 rearnsha CNC_BREAK, plcom_cnm_state);
2117 1.1 rearnsha if (cn_trapped)
2118 1.1 rearnsha continue;
2119 1.1 rearnsha #if defined(KGDB)
2120 1.1 rearnsha if (ISSET(sc->sc_hwflags,
2121 1.1 rearnsha PLCOM_HW_KGDB)) {
2122 1.1 rearnsha kgdb_connect(1);
2123 1.1 rearnsha continue;
2124 1.1 rearnsha }
2125 1.1 rearnsha #endif
2126 1.1 rearnsha }
2127 1.1 rearnsha
2128 1.1 rearnsha put[1] = rsr;
2129 1.10 rearnsha cn_trapped = 0;
2130 1.40 skrll cn_check_magic(sc->sc_tty->t_dev, put[0],
2131 1.40 skrll plcom_cnm_state);
2132 1.1 rearnsha if (cn_trapped) {
2133 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2134 1.35 skrll if (ISSET(fr, PL01X_FR_RXFE))
2135 1.1 rearnsha break;
2136 1.1 rearnsha
2137 1.1 rearnsha continue;
2138 1.1 rearnsha }
2139 1.1 rearnsha put += 2;
2140 1.1 rearnsha if (put >= end)
2141 1.1 rearnsha put = sc->sc_rbuf;
2142 1.1 rearnsha cc--;
2143 1.1 rearnsha
2144 1.40 skrll /* don't need RI here*/
2145 1.40 skrll fr = PREAD1(pi, PL01XCOM_FR);
2146 1.35 skrll if (ISSET(fr, PL01X_FR_RXFE))
2147 1.1 rearnsha break;
2148 1.1 rearnsha }
2149 1.1 rearnsha
2150 1.1 rearnsha /*
2151 1.1 rearnsha * Current string of incoming characters ended because
2152 1.1 rearnsha * no more data was available or we ran out of space.
2153 1.1 rearnsha * Schedule a receive event if any data was received.
2154 1.1 rearnsha * If we're out of space, turn off receive interrupts.
2155 1.1 rearnsha */
2156 1.1 rearnsha sc->sc_rbput = put;
2157 1.1 rearnsha sc->sc_rbavail = cc;
2158 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
2159 1.1 rearnsha sc->sc_rx_ready = 1;
2160 1.1 rearnsha
2161 1.1 rearnsha /*
2162 1.1 rearnsha * See if we are in danger of overflowing a buffer. If
2163 1.1 rearnsha * so, use hardware flow control to ease the pressure.
2164 1.1 rearnsha */
2165 1.1 rearnsha if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
2166 1.1 rearnsha cc < sc->sc_r_hiwat) {
2167 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
2168 1.1 rearnsha plcom_hwiflow(sc);
2169 1.1 rearnsha }
2170 1.1 rearnsha
2171 1.1 rearnsha /*
2172 1.1 rearnsha * If we're out of space, disable receive interrupts
2173 1.1 rearnsha * until the queue has drained a bit.
2174 1.1 rearnsha */
2175 1.1 rearnsha if (!cc) {
2176 1.1 rearnsha SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
2177 1.40 skrll switch (pi->pi_type) {
2178 1.40 skrll case PLCOM_TYPE_PL010:
2179 1.40 skrll CLR(sc->sc_cr,
2180 1.40 skrll PL010_CR_RIE | PL010_CR_RTIE);
2181 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
2182 1.40 skrll break;
2183 1.40 skrll case PLCOM_TYPE_PL011:
2184 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2185 1.40 skrll CLR(sc->sc_imsc,
2186 1.40 skrll PL011_INT_RT | PL011_INT_RX);
2187 1.40 skrll PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc);
2188 1.40 skrll break;
2189 1.40 skrll }
2190 1.1 rearnsha }
2191 1.1 rearnsha } else {
2192 1.40 skrll switch (pi->pi_type) {
2193 1.40 skrll case PLCOM_TYPE_PL010:
2194 1.40 skrll rxintr = ISSET(istatus, PL010_IIR_RIS);
2195 1.40 skrll if (rxintr) {
2196 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
2197 1.40 skrll delay(10);
2198 1.40 skrll PWRITE1(pi, PL010COM_CR, sc->sc_cr);
2199 1.40 skrll continue;
2200 1.40 skrll }
2201 1.40 skrll break;
2202 1.40 skrll case PLCOM_TYPE_PL011:
2203 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2204 1.40 skrll rxintr = ISSET(istatus, PL011_INT_RX);
2205 1.40 skrll if (rxintr) {
2206 1.67 mlelstv PWRITE2(pi, PL011COM_CR, 0);
2207 1.40 skrll delay(10);
2208 1.67 mlelstv PWRITE2(pi, PL011COM_CR, sc->sc_cr);
2209 1.40 skrll continue;
2210 1.40 skrll }
2211 1.40 skrll break;
2212 1.1 rearnsha }
2213 1.1 rearnsha }
2214 1.1 rearnsha
2215 1.40 skrll switch (pi->pi_type) {
2216 1.40 skrll case PLCOM_TYPE_PL010:
2217 1.40 skrll msr = PREAD1(pi, PL01XCOM_FR);
2218 1.40 skrll break;
2219 1.40 skrll case PLCOM_TYPE_PL011:
2220 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2221 1.40 skrll msr = PREAD4(pi, PL01XCOM_FR);
2222 1.40 skrll break;
2223 1.40 skrll }
2224 1.1 rearnsha delta = msr ^ sc->sc_msr;
2225 1.1 rearnsha sc->sc_msr = msr;
2226 1.40 skrll
2227 1.1 rearnsha /* Clear any pending modem status interrupt. */
2228 1.40 skrll switch (pi->pi_type) {
2229 1.40 skrll case PLCOM_TYPE_PL010:
2230 1.40 skrll msintr = ISSET(istatus, PL010_IIR_MIS);
2231 1.40 skrll if (msintr) {
2232 1.40 skrll PWRITE1(pi, PL010COM_ICR, 0);
2233 1.40 skrll }
2234 1.40 skrll break;
2235 1.40 skrll case PLCOM_TYPE_PL011:
2236 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2237 1.40 skrll msintr = ISSET(istatus, PL011_INT_MSMASK);
2238 1.40 skrll if (msintr) {
2239 1.40 skrll PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK);
2240 1.40 skrll }
2241 1.40 skrll break;
2242 1.40 skrll }
2243 1.1 rearnsha /*
2244 1.1 rearnsha * Pulse-per-second (PSS) signals on edge of DCD?
2245 1.1 rearnsha * Process these even if line discipline is ignoring DCD.
2246 1.1 rearnsha */
2247 1.1 rearnsha if (delta & sc->sc_ppsmask) {
2248 1.1 rearnsha struct timeval tv;
2249 1.26 ad mutex_spin_enter(&timecounter_lock);
2250 1.1 rearnsha if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) {
2251 1.1 rearnsha /* XXX nanotime() */
2252 1.1 rearnsha microtime(&tv);
2253 1.46 skrll TIMEVAL_TO_TIMESPEC(&tv,
2254 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
2255 1.1 rearnsha if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
2256 1.1 rearnsha timespecadd(&sc->ppsinfo.assert_timestamp,
2257 1.1 rearnsha &sc->ppsparam.assert_offset,
2258 1.1 rearnsha &sc->ppsinfo.assert_timestamp);
2259 1.1 rearnsha }
2260 1.1 rearnsha
2261 1.1 rearnsha #ifdef PPS_SYNC
2262 1.1 rearnsha if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
2263 1.1 rearnsha hardpps(&tv, tv.tv_usec);
2264 1.1 rearnsha #endif
2265 1.1 rearnsha sc->ppsinfo.assert_sequence++;
2266 1.1 rearnsha sc->ppsinfo.current_mode = sc->ppsparam.mode;
2267 1.1 rearnsha
2268 1.1 rearnsha } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) {
2269 1.1 rearnsha /* XXX nanotime() */
2270 1.1 rearnsha microtime(&tv);
2271 1.46 skrll TIMEVAL_TO_TIMESPEC(&tv,
2272 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
2273 1.1 rearnsha if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
2274 1.1 rearnsha timespecadd(&sc->ppsinfo.clear_timestamp,
2275 1.1 rearnsha &sc->ppsparam.clear_offset,
2276 1.1 rearnsha &sc->ppsinfo.clear_timestamp);
2277 1.1 rearnsha }
2278 1.1 rearnsha
2279 1.1 rearnsha #ifdef PPS_SYNC
2280 1.1 rearnsha if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
2281 1.1 rearnsha hardpps(&tv, tv.tv_usec);
2282 1.1 rearnsha #endif
2283 1.1 rearnsha sc->ppsinfo.clear_sequence++;
2284 1.1 rearnsha sc->ppsinfo.current_mode = sc->ppsparam.mode;
2285 1.1 rearnsha }
2286 1.26 ad mutex_spin_exit(&timecounter_lock);
2287 1.1 rearnsha }
2288 1.1 rearnsha
2289 1.1 rearnsha /*
2290 1.1 rearnsha * Process normal status changes
2291 1.1 rearnsha */
2292 1.1 rearnsha if (ISSET(delta, sc->sc_msr_mask)) {
2293 1.1 rearnsha SET(sc->sc_msr_delta, delta);
2294 1.1 rearnsha
2295 1.1 rearnsha /*
2296 1.1 rearnsha * Stop output immediately if we lose the output
2297 1.1 rearnsha * flow control signal or carrier detect.
2298 1.1 rearnsha */
2299 1.1 rearnsha if (ISSET(~msr, sc->sc_msr_mask)) {
2300 1.1 rearnsha sc->sc_tbc = 0;
2301 1.1 rearnsha sc->sc_heldtbc = 0;
2302 1.1 rearnsha #ifdef PLCOM_DEBUG
2303 1.1 rearnsha if (plcom_debug)
2304 1.1 rearnsha plcomstatus(sc, "plcomintr ");
2305 1.1 rearnsha #endif
2306 1.1 rearnsha }
2307 1.1 rearnsha
2308 1.1 rearnsha sc->sc_st_check = 1;
2309 1.1 rearnsha }
2310 1.1 rearnsha
2311 1.46 skrll /*
2312 1.1 rearnsha * Done handling any receive interrupts. See if data
2313 1.40 skrll * can be transmitted as well. Schedule tx done
2314 1.40 skrll * event if no data left and tty was marked busy.
2315 1.1 rearnsha */
2316 1.46 skrll
2317 1.40 skrll switch (pi->pi_type) {
2318 1.40 skrll case PLCOM_TYPE_PL010:
2319 1.40 skrll txintr = ISSET(istatus, PL010_IIR_TIS);
2320 1.40 skrll break;
2321 1.40 skrll case PLCOM_TYPE_PL011:
2322 1.40 skrll txintr = ISSET(istatus, PL011_INT_TX);
2323 1.40 skrll break;
2324 1.40 skrll }
2325 1.40 skrll if (txintr) {
2326 1.1 rearnsha /*
2327 1.1 rearnsha * If we've delayed a parameter change, do it
2328 1.1 rearnsha * now, and restart * output.
2329 1.1 rearnsha */
2330 1.40 skrll // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX);
2331 1.1 rearnsha if (sc->sc_heldchange) {
2332 1.1 rearnsha plcom_loadchannelregs(sc);
2333 1.1 rearnsha sc->sc_heldchange = 0;
2334 1.1 rearnsha sc->sc_tbc = sc->sc_heldtbc;
2335 1.1 rearnsha sc->sc_heldtbc = 0;
2336 1.1 rearnsha }
2337 1.1 rearnsha
2338 1.46 skrll /*
2339 1.1 rearnsha * Output the next chunk of the contiguous
2340 1.1 rearnsha * buffer, if any.
2341 1.1 rearnsha */
2342 1.1 rearnsha if (sc->sc_tbc > 0) {
2343 1.1 rearnsha int n;
2344 1.1 rearnsha
2345 1.1 rearnsha n = sc->sc_tbc;
2346 1.67 mlelstv if (n > sc->sc_burstlen)
2347 1.67 mlelstv n = sc->sc_burstlen;
2348 1.40 skrll PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n);
2349 1.1 rearnsha sc->sc_tbc -= n;
2350 1.1 rearnsha sc->sc_tba += n;
2351 1.1 rearnsha } else {
2352 1.1 rearnsha /*
2353 1.40 skrll * Disable transmit completion
2354 1.1 rearnsha * interrupts if necessary.
2355 1.1 rearnsha */
2356 1.40 skrll switch (pi->pi_type) {
2357 1.40 skrll case PLCOM_TYPE_PL010:
2358 1.40 skrll if (ISSET(sc->sc_cr, PL010_CR_TIE)) {
2359 1.40 skrll CLR(sc->sc_cr, PL010_CR_TIE);
2360 1.40 skrll PWRITE1(pi, PL010COM_CR,
2361 1.40 skrll sc->sc_cr);
2362 1.40 skrll }
2363 1.40 skrll break;
2364 1.40 skrll case PLCOM_TYPE_PL011:
2365 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2366 1.40 skrll if (ISSET(sc->sc_imsc, PL011_INT_TX)) {
2367 1.40 skrll CLR(sc->sc_imsc, PL011_INT_TX);
2368 1.40 skrll PWRITE4(pi, PL011COM_IMSC,
2369 1.40 skrll sc->sc_imsc);
2370 1.40 skrll }
2371 1.40 skrll break;
2372 1.1 rearnsha }
2373 1.1 rearnsha if (sc->sc_tx_busy) {
2374 1.1 rearnsha sc->sc_tx_busy = 0;
2375 1.1 rearnsha sc->sc_tx_done = 1;
2376 1.1 rearnsha }
2377 1.1 rearnsha }
2378 1.1 rearnsha }
2379 1.40 skrll
2380 1.40 skrll } while (plcom_intstatus(pi, &istatus));
2381 1.1 rearnsha
2382 1.36 skrll mutex_spin_exit(&sc->sc_lock);
2383 1.1 rearnsha
2384 1.1 rearnsha /* Wake up the poller. */
2385 1.67 mlelstv if ((sc->sc_rx_ready | sc->sc_st_check | sc->sc_tx_done) != 0)
2386 1.67 mlelstv softint_schedule(sc->sc_si);
2387 1.1 rearnsha
2388 1.33 tls #ifdef RND_COM
2389 1.40 skrll rnd_add_uint32(&sc->rnd_source, istatus | rsr);
2390 1.1 rearnsha #endif
2391 1.1 rearnsha
2392 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2393 1.40 skrll
2394 1.1 rearnsha return 1;
2395 1.1 rearnsha }
2396 1.1 rearnsha
2397 1.1 rearnsha /*
2398 1.1 rearnsha * The following functions are polled getc and putc routines, shared
2399 1.1 rearnsha * by the console and kgdb glue.
2400 1.46 skrll *
2401 1.1 rearnsha * The read-ahead code is so that you can detect pending in-band
2402 1.1 rearnsha * cn_magic in polled mode while doing output rather than having to
2403 1.1 rearnsha * wait until the kernel decides it needs input.
2404 1.1 rearnsha */
2405 1.1 rearnsha
2406 1.1 rearnsha #define MAX_READAHEAD 20
2407 1.1 rearnsha static int plcom_readahead[MAX_READAHEAD];
2408 1.1 rearnsha static int plcom_readaheadcount = 0;
2409 1.1 rearnsha
2410 1.1 rearnsha int
2411 1.40 skrll plcom_common_getc(dev_t dev, struct plcom_instance *pi)
2412 1.1 rearnsha {
2413 1.1 rearnsha int s = splserial();
2414 1.58 skrll u_char c;
2415 1.1 rearnsha
2416 1.1 rearnsha /* got a character from reading things earlier */
2417 1.1 rearnsha if (plcom_readaheadcount > 0) {
2418 1.1 rearnsha int i;
2419 1.1 rearnsha
2420 1.1 rearnsha c = plcom_readahead[0];
2421 1.1 rearnsha for (i = 1; i < plcom_readaheadcount; i++) {
2422 1.1 rearnsha plcom_readahead[i-1] = plcom_readahead[i];
2423 1.1 rearnsha }
2424 1.1 rearnsha plcom_readaheadcount--;
2425 1.1 rearnsha splx(s);
2426 1.1 rearnsha return c;
2427 1.1 rearnsha }
2428 1.1 rearnsha
2429 1.58 skrll if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) {
2430 1.58 skrll splx(s);
2431 1.58 skrll return -1;
2432 1.58 skrll }
2433 1.1 rearnsha
2434 1.40 skrll c = PREAD1(pi, PL01XCOM_DR);
2435 1.1 rearnsha {
2436 1.47 skrll int cn_trapped __unused = 0;
2437 1.66 riastrad
2438 1.1 rearnsha if (!db_active)
2439 1.1 rearnsha cn_check_magic(dev, c, plcom_cnm_state);
2440 1.1 rearnsha }
2441 1.1 rearnsha splx(s);
2442 1.1 rearnsha return c;
2443 1.1 rearnsha }
2444 1.1 rearnsha
2445 1.1 rearnsha void
2446 1.40 skrll plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c)
2447 1.1 rearnsha {
2448 1.1 rearnsha int s = splserial();
2449 1.1 rearnsha int timo;
2450 1.1 rearnsha
2451 1.1 rearnsha int cin, stat;
2452 1.46 skrll if (plcom_readaheadcount < MAX_READAHEAD
2453 1.40 skrll && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) {
2454 1.47 skrll int cn_trapped __unused = 0;
2455 1.40 skrll cin = PREAD1(pi, PL01XCOM_DR);
2456 1.1 rearnsha cn_check_magic(dev, cin, plcom_cnm_state);
2457 1.1 rearnsha plcom_readahead[plcom_readaheadcount++] = cin;
2458 1.1 rearnsha }
2459 1.1 rearnsha
2460 1.1 rearnsha /* wait for any pending transmission to finish */
2461 1.1 rearnsha timo = 150000;
2462 1.53 skrll while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo)
2463 1.1 rearnsha continue;
2464 1.1 rearnsha
2465 1.40 skrll PWRITE1(pi, PL01XCOM_DR, c);
2466 1.40 skrll PLCOM_BARRIER(pi, BR | BW);
2467 1.1 rearnsha
2468 1.1 rearnsha splx(s);
2469 1.1 rearnsha }
2470 1.1 rearnsha
2471 1.1 rearnsha /*
2472 1.1 rearnsha * Initialize UART for use as console or KGDB line.
2473 1.1 rearnsha */
2474 1.1 rearnsha int
2475 1.40 skrll plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag)
2476 1.1 rearnsha {
2477 1.67 mlelstv uint32_t lcr;
2478 1.1 rearnsha
2479 1.40 skrll switch (pi->pi_type) {
2480 1.40 skrll case PLCOM_TYPE_PL010:
2481 1.40 skrll if (pi->pi_size == 0)
2482 1.40 skrll pi->pi_size = PL010COM_UART_SIZE;
2483 1.40 skrll break;
2484 1.40 skrll case PLCOM_TYPE_PL011:
2485 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2486 1.40 skrll if (pi->pi_size == 0)
2487 1.40 skrll pi->pi_size = PL011COM_UART_SIZE;
2488 1.40 skrll break;
2489 1.40 skrll default:
2490 1.40 skrll panic("Unknown plcom type");
2491 1.40 skrll }
2492 1.40 skrll
2493 1.40 skrll if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0,
2494 1.40 skrll &pi->pi_ioh))
2495 1.1 rearnsha return ENOMEM; /* ??? */
2496 1.1 rearnsha
2497 1.40 skrll lcr = cflag2lcr(cflag) | PL01X_LCR_FEN;
2498 1.40 skrll switch (pi->pi_type) {
2499 1.40 skrll case PLCOM_TYPE_PL010:
2500 1.40 skrll PWRITE1(pi, PL010COM_CR, 0);
2501 1.40 skrll
2502 1.54 jmcneill if (rate && frequency) {
2503 1.54 jmcneill rate = pl010comspeed(rate, frequency);
2504 1.54 jmcneill PWRITE1(pi, PL010COM_DLBL, (rate & 0xff));
2505 1.54 jmcneill PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff));
2506 1.54 jmcneill }
2507 1.40 skrll PWRITE1(pi, PL010COM_LCR, lcr);
2508 1.40 skrll PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN);
2509 1.40 skrll break;
2510 1.40 skrll case PLCOM_TYPE_PL011:
2511 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2512 1.67 mlelstv PWRITE2(pi, PL011COM_CR, 0);
2513 1.40 skrll
2514 1.54 jmcneill if (rate && frequency) {
2515 1.54 jmcneill rate = pl011comspeed(rate, frequency);
2516 1.54 jmcneill PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1));
2517 1.54 jmcneill PWRITE4(pi, PL011COM_IBRD, rate >> 6);
2518 1.54 jmcneill }
2519 1.40 skrll PWRITE1(pi, PL011COM_LCRH, lcr);
2520 1.67 mlelstv PWRITE2(pi, PL011COM_CR,
2521 1.40 skrll PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE);
2522 1.40 skrll break;
2523 1.40 skrll }
2524 1.1 rearnsha
2525 1.1 rearnsha #if 0
2526 1.1 rearnsha /* Ought to do something like this, but we have no sc to
2527 1.1 rearnsha dereference. */
2528 1.15 thorpej /* XXX device_unit() abuse */
2529 1.43 skrll sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev),
2530 1.35 skrll PL01X_MCR_DTR | PL01X_MCR_RTS);
2531 1.1 rearnsha #endif
2532 1.1 rearnsha
2533 1.1 rearnsha return 0;
2534 1.1 rearnsha }
2535 1.1 rearnsha
2536 1.1 rearnsha /*
2537 1.1 rearnsha * Following are all routines needed for PLCOM to act as console
2538 1.1 rearnsha */
2539 1.1 rearnsha struct consdev plcomcons = {
2540 1.1 rearnsha NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL,
2541 1.59 jmcneill plcomcnhalt, NULL, NODEV, CN_NORMAL
2542 1.1 rearnsha };
2543 1.1 rearnsha
2544 1.1 rearnsha int
2545 1.40 skrll plcomcnattach(struct plcom_instance *pi, int rate, int frequency,
2546 1.1 rearnsha tcflag_t cflag, int unit)
2547 1.1 rearnsha {
2548 1.1 rearnsha int res;
2549 1.1 rearnsha
2550 1.40 skrll plcomcons_info = *pi;
2551 1.40 skrll
2552 1.40 skrll res = plcominit(&plcomcons_info, rate, frequency, cflag);
2553 1.1 rearnsha if (res)
2554 1.1 rearnsha return res;
2555 1.1 rearnsha
2556 1.1 rearnsha cn_tab = &plcomcons;
2557 1.1 rearnsha cn_init_magic(&plcom_cnm_state);
2558 1.1 rearnsha cn_set_magic("\047\001"); /* default magic is BREAK */
2559 1.1 rearnsha
2560 1.1 rearnsha plcomconsunit = unit;
2561 1.1 rearnsha plcomconsrate = rate;
2562 1.1 rearnsha plcomconscflag = cflag;
2563 1.1 rearnsha
2564 1.1 rearnsha return 0;
2565 1.1 rearnsha }
2566 1.1 rearnsha
2567 1.1 rearnsha void
2568 1.1 rearnsha plcomcndetach(void)
2569 1.1 rearnsha {
2570 1.40 skrll
2571 1.40 skrll bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh,
2572 1.40 skrll plcomcons_info.pi_size);
2573 1.40 skrll plcomcons_info.pi_iot = NULL;
2574 1.1 rearnsha
2575 1.1 rearnsha cn_tab = NULL;
2576 1.1 rearnsha }
2577 1.1 rearnsha
2578 1.1 rearnsha int
2579 1.1 rearnsha plcomcngetc(dev_t dev)
2580 1.1 rearnsha {
2581 1.40 skrll return plcom_common_getc(dev, &plcomcons_info);
2582 1.1 rearnsha }
2583 1.1 rearnsha
2584 1.1 rearnsha /*
2585 1.1 rearnsha * Console kernel output character routine.
2586 1.1 rearnsha */
2587 1.1 rearnsha void
2588 1.1 rearnsha plcomcnputc(dev_t dev, int c)
2589 1.1 rearnsha {
2590 1.40 skrll plcom_common_putc(dev, &plcomcons_info, c);
2591 1.1 rearnsha }
2592 1.1 rearnsha
2593 1.1 rearnsha void
2594 1.1 rearnsha plcomcnpollc(dev_t dev, int on)
2595 1.1 rearnsha {
2596 1.1 rearnsha
2597 1.45 mlelstv plcom_readaheadcount = 0;
2598 1.1 rearnsha }
2599 1.1 rearnsha
2600 1.59 jmcneill void
2601 1.59 jmcneill plcomcnhalt(dev_t dev)
2602 1.59 jmcneill {
2603 1.59 jmcneill struct plcom_instance *pi = &plcomcons_info;
2604 1.59 jmcneill
2605 1.59 jmcneill switch (pi->pi_type) {
2606 1.59 jmcneill case PLCOM_TYPE_PL010:
2607 1.59 jmcneill PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN);
2608 1.59 jmcneill break;
2609 1.59 jmcneill case PLCOM_TYPE_PL011:
2610 1.67 mlelstv case PLCOM_TYPE_GENERIC_UART:
2611 1.67 mlelstv PWRITE2(pi, PL011COM_CR,
2612 1.59 jmcneill PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE);
2613 1.59 jmcneill PWRITE4(pi, PL011COM_IMSC, 0);
2614 1.59 jmcneill break;
2615 1.59 jmcneill }
2616 1.59 jmcneill }
2617 1.59 jmcneill
2618 1.1 rearnsha #ifdef KGDB
2619 1.1 rearnsha int
2620 1.40 skrll plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency,
2621 1.40 skrll tcflag_t cflag, int unit)
2622 1.1 rearnsha {
2623 1.1 rearnsha int res;
2624 1.1 rearnsha
2625 1.40 skrll if (pi->pi_iot == plcomcons_info.pi_iot &&
2626 1.40 skrll pi->pi_iobase == plcomcons_info.pi_iobase)
2627 1.1 rearnsha return EBUSY; /* cannot share with console */
2628 1.1 rearnsha
2629 1.40 skrll res = plcominit(pi, rate, frequency, cflag);
2630 1.1 rearnsha if (res)
2631 1.1 rearnsha return res;
2632 1.1 rearnsha
2633 1.1 rearnsha kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL);
2634 1.1 rearnsha kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2635 1.1 rearnsha
2636 1.40 skrll plcomkgdb_info.pi_iot = pi->pi_iot;
2637 1.40 skrll plcomkgdb_info.pi_ioh = pi->pi_ioh;
2638 1.40 skrll plcomkgdb_info.pi_iobase = pi->pi_iobase;
2639 1.1 rearnsha
2640 1.1 rearnsha return 0;
2641 1.1 rearnsha }
2642 1.1 rearnsha
2643 1.1 rearnsha /* ARGSUSED */
2644 1.1 rearnsha int
2645 1.1 rearnsha plcom_kgdb_getc(void *arg)
2646 1.1 rearnsha {
2647 1.44 mlelstv return plcom_common_getc(NODEV, &plcomkgdb_info);
2648 1.1 rearnsha }
2649 1.1 rearnsha
2650 1.1 rearnsha /* ARGSUSED */
2651 1.1 rearnsha void
2652 1.1 rearnsha plcom_kgdb_putc(void *arg, int c)
2653 1.1 rearnsha {
2654 1.44 mlelstv plcom_common_putc(NODEV, &plcomkgdb_info, c);
2655 1.1 rearnsha }
2656 1.1 rearnsha #endif /* KGDB */
2657 1.1 rearnsha
2658 1.1 rearnsha /* helper function to identify the plcom ports used by
2659 1.1 rearnsha console or KGDB (and not yet autoconf attached) */
2660 1.1 rearnsha int
2661 1.46 skrll plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase,
2662 1.1 rearnsha bus_space_handle_t *ioh)
2663 1.1 rearnsha {
2664 1.1 rearnsha bus_space_handle_t help;
2665 1.1 rearnsha
2666 1.1 rearnsha if (!plcomconsattached &&
2667 1.40 skrll bus_space_is_equal(iot, plcomcons_info.pi_iot) &&
2668 1.40 skrll iobase == plcomcons_info.pi_iobase)
2669 1.40 skrll help = plcomcons_info.pi_ioh;
2670 1.1 rearnsha #ifdef KGDB
2671 1.1 rearnsha else if (!plcom_kgdb_attached &&
2672 1.40 skrll bus_space_is_equal(iot, plcomkgdb_info.pi_iot) &&
2673 1.57 skrll iobase == plcomkgdb_info.pi_iobase)
2674 1.44 mlelstv help = plcomkgdb_info.pi_ioh;
2675 1.1 rearnsha #endif
2676 1.1 rearnsha else
2677 1.1 rearnsha return 0;
2678 1.1 rearnsha
2679 1.1 rearnsha if (ioh)
2680 1.1 rearnsha *ioh = help;
2681 1.1 rearnsha return 1;
2682 1.1 rearnsha }
2683