plcom.c revision 1.46
1 /* $NetBSD: plcom.c,v 1.46 2013/09/05 07:09:14 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.46 2013/09/05 07:09:14 skrll Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 #include "rnd.h" 106 107 /* 108 * Override cnmagic(9) macro before including <sys/systm.h>. 109 * We need to know if cn_check_magic triggered debugger, so set a flag. 110 * Callers of cn_check_magic must declare int cn_trapped = 0; 111 * XXX: this is *ugly*! 112 */ 113 #define cn_trap() \ 114 do { \ 115 console_debugger(); \ 116 cn_trapped = 1; \ 117 } while (/* CONSTCOND */ 0) 118 119 #include <sys/param.h> 120 #include <sys/systm.h> 121 #include <sys/ioctl.h> 122 #include <sys/select.h> 123 #include <sys/tty.h> 124 #include <sys/proc.h> 125 #include <sys/conf.h> 126 #include <sys/file.h> 127 #include <sys/uio.h> 128 #include <sys/kernel.h> 129 #include <sys/syslog.h> 130 #include <sys/types.h> 131 #include <sys/device.h> 132 #include <sys/malloc.h> 133 #include <sys/timepps.h> 134 #include <sys/vnode.h> 135 #include <sys/kauth.h> 136 #include <sys/intr.h> 137 #include <sys/bus.h> 138 #ifdef RND_COM 139 #include <sys/rnd.h> 140 #endif 141 142 #include <evbarm/dev/plcomreg.h> 143 #include <evbarm/dev/plcomvar.h> 144 145 #include <dev/cons.h> 146 147 static void plcom_enable_debugport (struct plcom_softc *); 148 149 void plcom_config (struct plcom_softc *); 150 void plcom_shutdown (struct plcom_softc *); 151 int pl010comspeed (long, long); 152 int pl011comspeed (long, long); 153 static u_char cflag2lcr (tcflag_t); 154 int plcomparam (struct tty *, struct termios *); 155 void plcomstart (struct tty *); 156 int plcomhwiflow (struct tty *, int); 157 158 void plcom_loadchannelregs (struct plcom_softc *); 159 void plcom_hwiflow (struct plcom_softc *); 160 void plcom_break (struct plcom_softc *, int); 161 void plcom_modem (struct plcom_softc *, int); 162 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 163 int plcom_to_tiocm (struct plcom_softc *); 164 void plcom_iflush (struct plcom_softc *); 165 166 int plcom_common_getc (dev_t, struct plcom_instance *); 167 void plcom_common_putc (dev_t, struct plcom_instance *, int); 168 169 int plcominit (struct plcom_instance *, int, int, tcflag_t); 170 171 dev_type_open(plcomopen); 172 dev_type_close(plcomclose); 173 dev_type_read(plcomread); 174 dev_type_write(plcomwrite); 175 dev_type_ioctl(plcomioctl); 176 dev_type_stop(plcomstop); 177 dev_type_tty(plcomtty); 178 dev_type_poll(plcompoll); 179 180 int plcomcngetc (dev_t); 181 void plcomcnputc (dev_t, int); 182 void plcomcnpollc (dev_t, int); 183 184 #define integrate static inline 185 void plcomsoft (void *); 186 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 188 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 189 integrate void plcom_schedrx (struct plcom_softc *); 190 void plcomdiag (void *); 191 192 bool plcom_intstatus(struct plcom_instance *, u_int *); 193 194 extern struct cfdriver plcom_cd; 195 196 const struct cdevsw plcom_cdevsw = { 197 plcomopen, plcomclose, plcomread, plcomwrite, plcomioctl, 198 plcomstop, plcomtty, plcompoll, nommap, ttykqfilter, D_TTY 199 }; 200 201 /* 202 * Make this an option variable one can patch. 203 * But be warned: this must be a power of 2! 204 */ 205 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 206 207 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 208 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 209 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 210 211 static int plcomconsunit = -1; 212 static struct plcom_instance plcomcons_info; 213 214 static int plcomconsattached; 215 static int plcomconsrate; 216 static tcflag_t plcomconscflag; 217 static struct cnm_state plcom_cnm_state; 218 219 static int ppscap = 220 PPS_TSFMT_TSPEC | 221 PPS_CAPTUREASSERT | 222 PPS_CAPTURECLEAR | 223 #ifdef PPS_SYNC 224 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 225 #endif /* PPS_SYNC */ 226 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 227 228 #ifdef KGDB 229 #include <sys/kgdb.h> 230 231 static struct plcom_instance plcomkgdb_info; 232 static int plcom_kgdb_attached; 233 234 int plcom_kgdb_getc (void *); 235 void plcom_kgdb_putc (void *, int); 236 #endif /* KGDB */ 237 238 #define PLCOMUNIT_MASK 0x7ffff 239 #define PLCOMDIALOUT_MASK 0x80000 240 241 #define PLCOMUNIT(x) (minor(x) & PLCOMUNIT_MASK) 242 #define PLCOMDIALOUT(x) (minor(x) & PLCOMDIALOUT_MASK) 243 244 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 245 device_is_active((sc)->sc_dev)) 246 247 #define BR BUS_SPACE_BARRIER_READ 248 #define BW BUS_SPACE_BARRIER_WRITE 249 #define PLCOM_BARRIER(pi, f) \ 250 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 251 252 static uint8_t 253 pread1(struct plcom_instance *pi, bus_size_t reg) 254 { 255 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 256 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 257 258 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 259 (8 * (reg & 3)); 260 } 261 int nhcr; 262 static void 263 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 264 { 265 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 266 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 267 } else { 268 const size_t shift = 8 * (o & 3); 269 o &= -4; 270 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 271 tmp = (val << shift) | (tmp & ~(0xff << shift)); 272 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 273 } 274 } 275 276 static void 277 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 278 bus_size_t count) 279 { 280 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 281 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 282 } else { 283 KASSERT((o & 3) == 0); 284 while (count--) { 285 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 286 }; 287 } 288 } 289 290 #define PREAD1(pi, reg) pread1(pi, reg) 291 #define PREAD4(pi, reg) \ 292 (bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))) 293 294 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 295 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 296 #define PWRITE4(pi, reg, val) \ 297 (bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))) 298 299 int 300 pl010comspeed(long speed, long frequency) 301 { 302 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 303 304 int x, err; 305 306 #if 0 307 if (speed == 0) 308 return 0; 309 #endif 310 if (speed <= 0) 311 return -1; 312 x = divrnd(frequency / 16, speed); 313 if (x <= 0) 314 return -1; 315 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 316 if (err < 0) 317 err = -err; 318 if (err > PLCOM_TOLERANCE) 319 return -1; 320 return x; 321 322 #undef divrnd 323 } 324 325 int 326 pl011comspeed(long speed, long frequency) 327 { 328 int denom = 16 * speed; 329 int div = frequency / denom; 330 int rem = frequency % denom; 331 332 int ibrd = div << 6; 333 int fbrd = (((8 * rem) / speed) + 1) / 2; 334 335 /* Tolerance? */ 336 return ibrd | fbrd; 337 } 338 339 #ifdef PLCOM_DEBUG 340 int plcom_debug = 0; 341 342 void plcomstatus (struct plcom_softc *, const char *); 343 void 344 plcomstatus(struct plcom_softc *sc, const char *str) 345 { 346 struct tty *tp = sc->sc_tty; 347 348 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 349 device_xname(sc->sc_dev), str, 350 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 351 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 352 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 353 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 354 sc->sc_tx_stopped ? "+" : "-"); 355 356 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 357 device_xname(sc->sc_dev), str, 358 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 359 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 360 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 361 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 362 sc->sc_rx_flags); 363 } 364 #endif 365 366 #if 0 367 int 368 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 369 { 370 int data; 371 372 /* Disable the UART. */ 373 bus_space_write_1(iot, ioh, plcom_cr, 0); 374 /* Make sure the FIFO is off. */ 375 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 376 /* Disable interrupts. */ 377 bus_space_write_1(iot, ioh, plcom_iir, 0); 378 379 /* Make sure we swallow anything in the receiving register. */ 380 data = bus_space_read_1(iot, ioh, plcom_dr); 381 382 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 383 return 0; 384 385 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 386 387 if (data != PL01X_FR_RXFE) 388 return 0; 389 390 return 1; 391 } 392 #endif 393 394 /* 395 * No locking in this routine; it is only called during attach, 396 * or with the port already locked. 397 */ 398 static void 399 plcom_enable_debugport(struct plcom_softc *sc) 400 { 401 struct plcom_instance *pi = &sc->sc_pi; 402 403 sc->sc_cr = PL01X_CR_UARTEN; 404 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 405 406 /* Turn on line break interrupt, set carrier. */ 407 switch (pi->pi_type) { 408 case PLCOM_TYPE_PL010: 409 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 410 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 411 if (sc->sc_set_mcr) { 412 /* XXX device_unit() abuse */ 413 sc->sc_set_mcr(sc->sc_set_mcr_arg, 414 device_unit(sc->sc_dev), sc->sc_mcr); 415 } 416 break; 417 case PLCOM_TYPE_PL011: 418 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 419 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 420 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 421 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 422 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 423 break; 424 } 425 426 } 427 428 void 429 plcom_attach_subr(struct plcom_softc *sc) 430 { 431 struct plcom_instance *pi = &sc->sc_pi; 432 struct tty *tp; 433 434 aprint_naive("\n"); 435 436 callout_init(&sc->sc_diag_callout, 0); 437 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 438 439 switch (pi->pi_type) { 440 case PLCOM_TYPE_PL010: 441 case PLCOM_TYPE_PL011: 442 break; 443 default: 444 aprint_error_dev(sc->sc_dev, 445 "Unknown plcom type: %d\n", pi->pi_type); 446 return; 447 } 448 449 /* Disable interrupts before configuring the device. */ 450 sc->sc_cr = 0; 451 sc->sc_imsc = 0; 452 453 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 454 pi->pi_iobase == plcomcons_info.pi_iobase) { 455 plcomconsattached = 1; 456 457 /* Make sure the console is always "hardwired". */ 458 delay(1000); /* wait for output to finish */ 459 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 460 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 461 /* 462 * Must re-enable the console immediately, or we will 463 * hang when trying to print. 464 */ 465 sc->sc_cr = PL01X_CR_UARTEN; 466 if (pi->pi_type == PLCOM_TYPE_PL011) 467 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 468 } 469 470 switch (pi->pi_type) { 471 case PLCOM_TYPE_PL010: 472 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 473 break; 474 475 case PLCOM_TYPE_PL011: 476 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 477 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 478 break; 479 } 480 481 if (sc->sc_fifolen == 0) { 482 switch (pi->pi_type) { 483 case PLCOM_TYPE_PL010: 484 /* 485 * The PL010 has a 16-byte fifo, but the tx interrupt 486 * triggers when there is space for 8 more bytes. 487 */ 488 sc->sc_fifolen = 8; 489 break; 490 case PLCOM_TYPE_PL011: 491 /* Some revisions have a 32 byte TX FIFO */ 492 sc->sc_fifolen = 16; 493 break; 494 } 495 } 496 aprint_normal("\n"); 497 498 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 499 sc->sc_fifolen = 1; 500 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 501 } 502 503 if (sc->sc_fifolen > 1) 504 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 505 506 tp = tty_alloc(); 507 tp->t_oproc = plcomstart; 508 tp->t_param = plcomparam; 509 tp->t_hwiflow = plcomhwiflow; 510 511 sc->sc_tty = tp; 512 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 513 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 514 sc->sc_rbavail = plcom_rbuf_size; 515 if (sc->sc_rbuf == NULL) { 516 aprint_error_dev(sc->sc_dev, 517 "unable to allocate ring buffer\n"); 518 return; 519 } 520 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 521 522 tty_attach(tp); 523 524 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 525 int maj; 526 527 /* locate the major number */ 528 maj = cdevsw_lookup_major(&plcom_cdevsw); 529 530 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 531 532 aprint_normal_dev(sc->sc_dev, "console\n"); 533 } 534 535 #ifdef KGDB 536 /* 537 * Allow kgdb to "take over" this port. If this is 538 * the kgdb device, it has exclusive use. 539 */ 540 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 541 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 542 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 543 plcom_kgdb_attached = 1; 544 545 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 546 } 547 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 548 } 549 #endif 550 551 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 552 553 #ifdef RND_COM 554 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 555 RND_TYPE_TTY, 0); 556 #endif 557 558 /* 559 * if there are no enable/disable functions, assume the device 560 * is always enabled 561 */ 562 if (!sc->enable) 563 sc->enabled = 1; 564 565 plcom_config(sc); 566 567 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 568 } 569 570 void 571 plcom_config(struct plcom_softc *sc) 572 { 573 struct plcom_instance *pi = &sc->sc_pi; 574 575 /* Disable interrupts before configuring the device. */ 576 sc->sc_cr = 0; 577 sc->sc_imsc = 0; 578 switch (pi->pi_type) { 579 case PLCOM_TYPE_PL010: 580 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 581 break; 582 583 case PLCOM_TYPE_PL011: 584 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 585 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 586 break; 587 } 588 589 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 590 plcom_enable_debugport(sc); 591 } 592 593 int 594 plcom_detach(device_t self, int flags) 595 { 596 struct plcom_softc *sc = device_private(self); 597 int maj, mn; 598 599 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 600 return EBUSY; 601 602 if (sc->disable != NULL && sc->enabled != 0) { 603 (*sc->disable)(sc); 604 sc->enabled = 0; 605 } 606 607 /* locate the major number */ 608 maj = cdevsw_lookup_major(&plcom_cdevsw); 609 610 /* Nuke the vnodes for any open instances. */ 611 mn = device_unit(self); 612 vdevgone(maj, mn, mn, VCHR); 613 614 mn |= PLCOMDIALOUT_MASK; 615 vdevgone(maj, mn, mn, VCHR); 616 617 if (sc->sc_rbuf == NULL) { 618 /* 619 * Ring buffer allocation failed in the plcom_attach_subr, 620 * only the tty is allocated, and nothing else. 621 */ 622 tty_free(sc->sc_tty); 623 return 0; 624 } 625 626 /* Free the receive buffer. */ 627 free(sc->sc_rbuf, M_DEVBUF); 628 629 /* Detach and free the tty. */ 630 tty_detach(sc->sc_tty); 631 tty_free(sc->sc_tty); 632 633 /* Unhook the soft interrupt handler. */ 634 softint_disestablish(sc->sc_si); 635 636 #ifdef RND_COM 637 /* Unhook the entropy source. */ 638 rnd_detach_source(&sc->rnd_source); 639 #endif 640 callout_destroy(&sc->sc_diag_callout); 641 642 /* Destroy the lock. */ 643 mutex_destroy(&sc->sc_lock); 644 645 return 0; 646 } 647 648 int 649 plcom_activate(device_t self, enum devact act) 650 { 651 struct plcom_softc *sc = device_private(self); 652 653 switch (act) { 654 case DVACT_DEACTIVATE: 655 sc->enabled = 0; 656 return 0; 657 default: 658 return EOPNOTSUPP; 659 } 660 } 661 662 void 663 plcom_shutdown(struct plcom_softc *sc) 664 { 665 struct plcom_instance *pi = &sc->sc_pi; 666 struct tty *tp = sc->sc_tty; 667 mutex_spin_enter(&sc->sc_lock); 668 669 /* If we were asserting flow control, then deassert it. */ 670 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 671 plcom_hwiflow(sc); 672 673 /* Clear any break condition set with TIOCSBRK. */ 674 plcom_break(sc, 0); 675 676 /* Turn off PPS capture on last close. */ 677 mutex_spin_enter(&timecounter_lock); 678 sc->sc_ppsmask = 0; 679 sc->ppsparam.mode = 0; 680 mutex_spin_exit(&timecounter_lock); 681 682 /* 683 * Hang up if necessary. Wait a bit, so the other side has time to 684 * notice even if we immediately open the port again. 685 * Avoid tsleeping above splhigh(). 686 */ 687 if (ISSET(tp->t_cflag, HUPCL)) { 688 plcom_modem(sc, 0); 689 mutex_spin_exit(&sc->sc_lock); 690 /* XXX will only timeout */ 691 (void) kpause(ttclos, false, hz, NULL); 692 mutex_spin_enter(&sc->sc_lock); 693 } 694 695 sc->sc_cr = 0; 696 sc->sc_imsc = 0; 697 /* Turn off interrupts. */ 698 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 699 /* interrupt on break */ 700 701 sc->sc_cr = PL01X_CR_UARTEN; 702 sc->sc_imsc = 0; 703 switch (pi->pi_type) { 704 case PLCOM_TYPE_PL010: 705 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 706 break; 707 case PLCOM_TYPE_PL011: 708 SET(sc->sc_cr, PL011_CR_RXE); 709 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 710 break; 711 } 712 } 713 switch (pi->pi_type) { 714 case PLCOM_TYPE_PL010: 715 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 716 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 717 break; 718 case PLCOM_TYPE_PL011: 719 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 720 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 721 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 722 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 723 break; 724 } 725 726 mutex_spin_exit(&sc->sc_lock); 727 if (sc->disable) { 728 #ifdef DIAGNOSTIC 729 if (!sc->enabled) 730 panic("plcom_shutdown: not enabled?"); 731 #endif 732 (*sc->disable)(sc); 733 sc->enabled = 0; 734 } 735 } 736 737 int 738 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 739 { 740 struct plcom_softc *sc; 741 struct plcom_instance *pi; 742 struct tty *tp; 743 int s; 744 int error; 745 746 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 747 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 748 sc->sc_rbuf == NULL) 749 return ENXIO; 750 751 if (!device_is_active(sc->sc_dev)) 752 return ENXIO; 753 754 pi = &sc->sc_pi; 755 756 #ifdef KGDB 757 /* 758 * If this is the kgdb port, no other use is permitted. 759 */ 760 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 761 return EBUSY; 762 #endif 763 764 tp = sc->sc_tty; 765 766 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 767 return (EBUSY); 768 769 s = spltty(); 770 771 /* 772 * Do the following iff this is a first open. 773 */ 774 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 775 struct termios t; 776 777 tp->t_dev = dev; 778 779 if (sc->enable) { 780 if ((*sc->enable)(sc)) { 781 splx(s); 782 aprint_error_dev(sc->sc_dev, 783 "device enable failed\n"); 784 return EIO; 785 } 786 mutex_spin_enter(&sc->sc_lock); 787 sc->enabled = 1; 788 plcom_config(sc); 789 } else { 790 mutex_spin_enter(&sc->sc_lock); 791 } 792 793 /* Turn on interrupts. */ 794 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 795 /* Fetch the current modem control status, needed later. */ 796 sc->sc_cr = PL01X_CR_UARTEN; 797 switch (pi->pi_type) { 798 case PLCOM_TYPE_PL010: 799 SET(sc->sc_cr, 800 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 801 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 802 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 803 break; 804 case PLCOM_TYPE_PL011: 805 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 806 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 807 PL011_INT_MSMASK); 808 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 809 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 810 break; 811 } 812 813 /* Clear PPS capture state on first open. */ 814 815 mutex_spin_enter(&timecounter_lock); 816 sc->sc_ppsmask = 0; 817 sc->ppsparam.mode = 0; 818 mutex_spin_exit(&timecounter_lock); 819 820 mutex_spin_exit(&sc->sc_lock); 821 822 /* 823 * Initialize the termios status to the defaults. Add in the 824 * sticky bits from TIOCSFLAGS. 825 */ 826 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 827 t.c_ospeed = plcomconsrate; 828 t.c_cflag = plcomconscflag; 829 } else { 830 t.c_ospeed = TTYDEF_SPEED; 831 t.c_cflag = TTYDEF_CFLAG; 832 } 833 t.c_ispeed = t.c_ospeed; 834 835 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 836 SET(t.c_cflag, CLOCAL); 837 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 838 SET(t.c_cflag, CRTSCTS); 839 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 840 SET(t.c_cflag, MDMBUF); 841 /* Make sure plcomparam() will do something. */ 842 tp->t_ospeed = 0; 843 (void) plcomparam(tp, &t); 844 tp->t_iflag = TTYDEF_IFLAG; 845 tp->t_oflag = TTYDEF_OFLAG; 846 tp->t_lflag = TTYDEF_LFLAG; 847 ttychars(tp); 848 ttsetwater(tp); 849 850 mutex_spin_enter(&sc->sc_lock); 851 852 /* 853 * Turn on DTR. We must always do this, even if carrier is not 854 * present, because otherwise we'd have to use TIOCSDTR 855 * immediately after setting CLOCAL, which applications do not 856 * expect. We always assert DTR while the device is open 857 * unless explicitly requested to deassert it. 858 */ 859 plcom_modem(sc, 1); 860 861 /* Clear the input ring, and unblock. */ 862 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 863 sc->sc_rbavail = plcom_rbuf_size; 864 plcom_iflush(sc); 865 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 866 plcom_hwiflow(sc); 867 868 #ifdef PLCOM_DEBUG 869 if (plcom_debug) 870 plcomstatus(sc, "plcomopen "); 871 #endif 872 873 mutex_spin_exit(&sc->sc_lock); 874 } 875 876 splx(s); 877 878 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 879 if (error) 880 goto bad; 881 882 error = (*tp->t_linesw->l_open)(dev, tp); 883 if (error) 884 goto bad; 885 886 return 0; 887 888 bad: 889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 890 /* 891 * We failed to open the device, and nobody else had it opened. 892 * Clean up the state as appropriate. 893 */ 894 plcom_shutdown(sc); 895 } 896 897 return error; 898 } 899 900 int 901 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 902 { 903 struct plcom_softc *sc = 904 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 905 struct tty *tp = sc->sc_tty; 906 907 /* XXX This is for cons.c. */ 908 if (!ISSET(tp->t_state, TS_ISOPEN)) 909 return 0; 910 911 (*tp->t_linesw->l_close)(tp, flag); 912 ttyclose(tp); 913 914 if (PLCOM_ISALIVE(sc) == 0) 915 return 0; 916 917 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 918 /* 919 * Although we got a last close, the device may still be in 920 * use; e.g. if this was the dialout node, and there are still 921 * processes waiting for carrier on the non-dialout node. 922 */ 923 plcom_shutdown(sc); 924 } 925 926 return 0; 927 } 928 929 int 930 plcomread(dev_t dev, struct uio *uio, int flag) 931 { 932 struct plcom_softc *sc = 933 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 934 struct tty *tp = sc->sc_tty; 935 936 if (PLCOM_ISALIVE(sc) == 0) 937 return EIO; 938 939 return (*tp->t_linesw->l_read)(tp, uio, flag); 940 } 941 942 int 943 plcomwrite(dev_t dev, struct uio *uio, int flag) 944 { 945 struct plcom_softc *sc = 946 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 if (PLCOM_ISALIVE(sc) == 0) 950 return EIO; 951 952 return (*tp->t_linesw->l_write)(tp, uio, flag); 953 } 954 955 int 956 plcompoll(dev_t dev, int events, struct lwp *l) 957 { 958 struct plcom_softc *sc = 959 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 if (PLCOM_ISALIVE(sc) == 0) 963 return EIO; 964 965 return (*tp->t_linesw->l_poll)(tp, events, l); 966 } 967 968 struct tty * 969 plcomtty(dev_t dev) 970 { 971 struct plcom_softc *sc = 972 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 973 struct tty *tp = sc->sc_tty; 974 975 return tp; 976 } 977 978 int 979 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 980 { 981 struct plcom_softc *sc = 982 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 983 struct tty *tp; 984 int error; 985 986 if (sc == NULL) 987 return ENXIO; 988 if (PLCOM_ISALIVE(sc) == 0) 989 return EIO; 990 991 tp = sc->sc_tty; 992 993 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 994 if (error != EPASSTHROUGH) 995 return error; 996 997 error = ttioctl(tp, cmd, data, flag, l); 998 if (error != EPASSTHROUGH) 999 return error; 1000 1001 error = 0; 1002 switch (cmd) { 1003 case TIOCSFLAGS: 1004 error = kauth_authorize_device_tty(l->l_cred, 1005 KAUTH_DEVICE_TTY_PRIVSET, tp); 1006 break; 1007 default: 1008 /* nothing */ 1009 break; 1010 } 1011 if (error) { 1012 return error; 1013 } 1014 1015 mutex_spin_enter(&sc->sc_lock); 1016 switch (cmd) { 1017 case TIOCSBRK: 1018 plcom_break(sc, 1); 1019 break; 1020 1021 case TIOCCBRK: 1022 plcom_break(sc, 0); 1023 break; 1024 1025 case TIOCSDTR: 1026 plcom_modem(sc, 1); 1027 break; 1028 1029 case TIOCCDTR: 1030 plcom_modem(sc, 0); 1031 break; 1032 1033 case TIOCGFLAGS: 1034 *(int *)data = sc->sc_swflags; 1035 break; 1036 1037 case TIOCSFLAGS: 1038 sc->sc_swflags = *(int *)data; 1039 break; 1040 1041 case TIOCMSET: 1042 case TIOCMBIS: 1043 case TIOCMBIC: 1044 tiocm_to_plcom(sc, cmd, *(int *)data); 1045 break; 1046 1047 case TIOCMGET: 1048 *(int *)data = plcom_to_tiocm(sc); 1049 break; 1050 1051 case PPS_IOC_CREATE: 1052 break; 1053 1054 case PPS_IOC_DESTROY: 1055 break; 1056 1057 case PPS_IOC_GETPARAMS: { 1058 pps_params_t *pp; 1059 pp = (pps_params_t *)data; 1060 mutex_spin_enter(&timecounter_lock); 1061 *pp = sc->ppsparam; 1062 mutex_spin_exit(&timecounter_lock); 1063 break; 1064 } 1065 1066 case PPS_IOC_SETPARAMS: { 1067 pps_params_t *pp; 1068 int mode; 1069 pp = (pps_params_t *)data; 1070 mutex_spin_enter(&timecounter_lock); 1071 if (pp->mode & ~ppscap) { 1072 error = EINVAL; 1073 mutex_spin_exit(&timecounter_lock); 1074 break; 1075 } 1076 sc->ppsparam = *pp; 1077 /* 1078 * Compute msr masks from user-specified timestamp state. 1079 */ 1080 mode = sc->ppsparam.mode; 1081 #ifdef PPS_SYNC 1082 if (mode & PPS_HARDPPSONASSERT) { 1083 mode |= PPS_CAPTUREASSERT; 1084 /* XXX revoke any previous HARDPPS source */ 1085 } 1086 if (mode & PPS_HARDPPSONCLEAR) { 1087 mode |= PPS_CAPTURECLEAR; 1088 /* XXX revoke any previous HARDPPS source */ 1089 } 1090 #endif /* PPS_SYNC */ 1091 switch (mode & PPS_CAPTUREBOTH) { 1092 case 0: 1093 sc->sc_ppsmask = 0; 1094 break; 1095 1096 case PPS_CAPTUREASSERT: 1097 sc->sc_ppsmask = PL01X_MSR_DCD; 1098 sc->sc_ppsassert = PL01X_MSR_DCD; 1099 sc->sc_ppsclear = -1; 1100 break; 1101 1102 case PPS_CAPTURECLEAR: 1103 sc->sc_ppsmask = PL01X_MSR_DCD; 1104 sc->sc_ppsassert = -1; 1105 sc->sc_ppsclear = 0; 1106 break; 1107 1108 case PPS_CAPTUREBOTH: 1109 sc->sc_ppsmask = PL01X_MSR_DCD; 1110 sc->sc_ppsassert = PL01X_MSR_DCD; 1111 sc->sc_ppsclear = 0; 1112 break; 1113 1114 default: 1115 error = EINVAL; 1116 break; 1117 } 1118 mutex_spin_exit(&timecounter_lock); 1119 break; 1120 } 1121 1122 case PPS_IOC_GETCAP: 1123 *(int*)data = ppscap; 1124 break; 1125 1126 case PPS_IOC_FETCH: { 1127 pps_info_t *pi; 1128 pi = (pps_info_t *)data; 1129 mutex_spin_enter(&timecounter_lock); 1130 *pi = sc->ppsinfo; 1131 mutex_spin_exit(&timecounter_lock); 1132 break; 1133 } 1134 1135 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1136 /* 1137 * Some GPS clocks models use the falling rather than 1138 * rising edge as the on-the-second signal. 1139 * The old API has no way to specify PPS polarity. 1140 */ 1141 mutex_spin_enter(&timecounter_lock); 1142 sc->sc_ppsmask = PL01X_MSR_DCD; 1143 #ifndef PPS_TRAILING_EDGE 1144 sc->sc_ppsassert = PL01X_MSR_DCD; 1145 sc->sc_ppsclear = -1; 1146 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1147 &sc->ppsinfo.assert_timestamp); 1148 #else 1149 sc->sc_ppsassert = -1 1150 sc->sc_ppsclear = 0; 1151 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1152 &sc->ppsinfo.clear_timestamp); 1153 #endif 1154 mutex_spin_exit(&timecounter_lock); 1155 break; 1156 1157 default: 1158 error = EPASSTHROUGH; 1159 break; 1160 } 1161 1162 mutex_spin_exit(&sc->sc_lock); 1163 1164 #ifdef PLCOM_DEBUG 1165 if (plcom_debug) 1166 plcomstatus(sc, "plcomioctl "); 1167 #endif 1168 1169 return error; 1170 } 1171 1172 integrate void 1173 plcom_schedrx(struct plcom_softc *sc) 1174 { 1175 1176 sc->sc_rx_ready = 1; 1177 1178 /* Wake up the poller. */ 1179 softint_schedule(sc->sc_si); 1180 } 1181 1182 void 1183 plcom_break(struct plcom_softc *sc, int onoff) 1184 { 1185 1186 if (onoff) 1187 SET(sc->sc_lcr, PL01X_LCR_BRK); 1188 else 1189 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1190 1191 if (!sc->sc_heldchange) { 1192 if (sc->sc_tx_busy) { 1193 sc->sc_heldtbc = sc->sc_tbc; 1194 sc->sc_tbc = 0; 1195 sc->sc_heldchange = 1; 1196 } else 1197 plcom_loadchannelregs(sc); 1198 } 1199 } 1200 1201 void 1202 plcom_modem(struct plcom_softc *sc, int onoff) 1203 { 1204 1205 if (sc->sc_mcr_dtr == 0) 1206 return; 1207 1208 if (onoff) 1209 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1210 else 1211 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1212 1213 if (!sc->sc_heldchange) { 1214 if (sc->sc_tx_busy) { 1215 sc->sc_heldtbc = sc->sc_tbc; 1216 sc->sc_tbc = 0; 1217 sc->sc_heldchange = 1; 1218 } else 1219 plcom_loadchannelregs(sc); 1220 } 1221 } 1222 1223 void 1224 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1225 { 1226 u_char plcombits; 1227 1228 plcombits = 0; 1229 if (ISSET(ttybits, TIOCM_DTR)) 1230 SET(plcombits, PL01X_MCR_DTR); 1231 if (ISSET(ttybits, TIOCM_RTS)) 1232 SET(plcombits, PL01X_MCR_RTS); 1233 1234 switch (how) { 1235 case TIOCMBIC: 1236 CLR(sc->sc_mcr, plcombits); 1237 break; 1238 1239 case TIOCMBIS: 1240 SET(sc->sc_mcr, plcombits); 1241 break; 1242 1243 case TIOCMSET: 1244 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1245 SET(sc->sc_mcr, plcombits); 1246 break; 1247 } 1248 1249 if (!sc->sc_heldchange) { 1250 if (sc->sc_tx_busy) { 1251 sc->sc_heldtbc = sc->sc_tbc; 1252 sc->sc_tbc = 0; 1253 sc->sc_heldchange = 1; 1254 } else 1255 plcom_loadchannelregs(sc); 1256 } 1257 } 1258 1259 int 1260 plcom_to_tiocm(struct plcom_softc *sc) 1261 { 1262 u_char plcombits; 1263 int ttybits = 0; 1264 1265 plcombits = sc->sc_mcr; 1266 if (ISSET(plcombits, PL01X_MCR_DTR)) 1267 SET(ttybits, TIOCM_DTR); 1268 if (ISSET(plcombits, PL01X_MCR_RTS)) 1269 SET(ttybits, TIOCM_RTS); 1270 1271 plcombits = sc->sc_msr; 1272 if (ISSET(plcombits, PL01X_MSR_DCD)) 1273 SET(ttybits, TIOCM_CD); 1274 if (ISSET(plcombits, PL01X_MSR_CTS)) 1275 SET(ttybits, TIOCM_CTS); 1276 if (ISSET(plcombits, PL01X_MSR_DSR)) 1277 SET(ttybits, TIOCM_DSR); 1278 if (ISSET(plcombits, PL011_MSR_RI)) 1279 SET(ttybits, TIOCM_RI); 1280 1281 if (sc->sc_cr != 0) 1282 SET(ttybits, TIOCM_LE); 1283 1284 return ttybits; 1285 } 1286 1287 static u_char 1288 cflag2lcr(tcflag_t cflag) 1289 { 1290 u_char lcr = 0; 1291 1292 switch (ISSET(cflag, CSIZE)) { 1293 case CS5: 1294 SET(lcr, PL01X_LCR_5BITS); 1295 break; 1296 case CS6: 1297 SET(lcr, PL01X_LCR_6BITS); 1298 break; 1299 case CS7: 1300 SET(lcr, PL01X_LCR_7BITS); 1301 break; 1302 case CS8: 1303 SET(lcr, PL01X_LCR_8BITS); 1304 break; 1305 } 1306 if (ISSET(cflag, PARENB)) { 1307 SET(lcr, PL01X_LCR_PEN); 1308 if (!ISSET(cflag, PARODD)) 1309 SET(lcr, PL01X_LCR_EPS); 1310 } 1311 if (ISSET(cflag, CSTOPB)) 1312 SET(lcr, PL01X_LCR_STP2); 1313 1314 return lcr; 1315 } 1316 1317 int 1318 plcomparam(struct tty *tp, struct termios *t) 1319 { 1320 struct plcom_softc *sc = 1321 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1322 struct plcom_instance *pi = &sc->sc_pi; 1323 int ospeed = -1; 1324 u_char lcr; 1325 1326 if (PLCOM_ISALIVE(sc) == 0) 1327 return EIO; 1328 1329 switch (pi->pi_type) { 1330 case PLCOM_TYPE_PL010: 1331 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1332 break; 1333 case PLCOM_TYPE_PL011: 1334 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1335 break; 1336 } 1337 1338 /* Check requested parameters. */ 1339 if (ospeed < 0) 1340 return EINVAL; 1341 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1342 return EINVAL; 1343 1344 /* 1345 * For the console, always force CLOCAL and !HUPCL, so that the port 1346 * is always active. 1347 */ 1348 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1349 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1350 SET(t->c_cflag, CLOCAL); 1351 CLR(t->c_cflag, HUPCL); 1352 } 1353 1354 /* 1355 * If there were no changes, don't do anything. This avoids dropping 1356 * input and improves performance when all we did was frob things like 1357 * VMIN and VTIME. 1358 */ 1359 if (tp->t_ospeed == t->c_ospeed && 1360 tp->t_cflag == t->c_cflag) 1361 return 0; 1362 1363 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1364 1365 mutex_spin_enter(&sc->sc_lock); 1366 1367 sc->sc_lcr = lcr; 1368 1369 /* 1370 * PL010 has a fixed-length FIFO trigger point. 1371 */ 1372 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1373 sc->sc_fifo = 1; 1374 else 1375 sc->sc_fifo = 0; 1376 1377 if (sc->sc_fifo) 1378 SET(sc->sc_lcr, PL01X_LCR_FEN); 1379 1380 /* 1381 * If we're not in a mode that assumes a connection is present, then 1382 * ignore carrier changes. 1383 */ 1384 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1385 sc->sc_msr_dcd = 0; 1386 else 1387 sc->sc_msr_dcd = PL01X_MSR_DCD; 1388 /* 1389 * Set the flow control pins depending on the current flow control 1390 * mode. 1391 */ 1392 if (ISSET(t->c_cflag, CRTSCTS)) { 1393 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1394 sc->sc_mcr_rts = PL01X_MCR_RTS; 1395 sc->sc_msr_cts = PL01X_MSR_CTS; 1396 } else if (ISSET(t->c_cflag, MDMBUF)) { 1397 /* 1398 * For DTR/DCD flow control, make sure we don't toggle DTR for 1399 * carrier detection. 1400 */ 1401 sc->sc_mcr_dtr = 0; 1402 sc->sc_mcr_rts = PL01X_MCR_DTR; 1403 sc->sc_msr_cts = PL01X_MSR_DCD; 1404 } else { 1405 /* 1406 * If no flow control, then always set RTS. This will make 1407 * the other side happy if it mistakenly thinks we're doing 1408 * RTS/CTS flow control. 1409 */ 1410 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1411 sc->sc_mcr_rts = 0; 1412 sc->sc_msr_cts = 0; 1413 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1414 SET(sc->sc_mcr, PL01X_MCR_RTS); 1415 else 1416 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1417 } 1418 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1419 1420 #if 0 1421 if (ospeed == 0) 1422 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1423 else 1424 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1425 #endif 1426 1427 switch (pi->pi_type) { 1428 case PLCOM_TYPE_PL010: 1429 sc->sc_ratel = ospeed & 0xff; 1430 sc->sc_rateh = (ospeed >> 8) & 0xff; 1431 break; 1432 case PLCOM_TYPE_PL011: 1433 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1434 sc->sc_rateh = ospeed >> 6; 1435 break; 1436 } 1437 1438 /* And copy to tty. */ 1439 tp->t_ispeed = t->c_ospeed; 1440 tp->t_ospeed = t->c_ospeed; 1441 tp->t_cflag = t->c_cflag; 1442 1443 if (!sc->sc_heldchange) { 1444 if (sc->sc_tx_busy) { 1445 sc->sc_heldtbc = sc->sc_tbc; 1446 sc->sc_tbc = 0; 1447 sc->sc_heldchange = 1; 1448 } else 1449 plcom_loadchannelregs(sc); 1450 } 1451 1452 if (!ISSET(t->c_cflag, CHWFLOW)) { 1453 /* Disable the high water mark. */ 1454 sc->sc_r_hiwat = 0; 1455 sc->sc_r_lowat = 0; 1456 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1457 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1458 plcom_schedrx(sc); 1459 } 1460 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1461 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1462 plcom_hwiflow(sc); 1463 } 1464 } else { 1465 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1466 sc->sc_r_lowat = plcom_rbuf_lowat; 1467 } 1468 1469 mutex_spin_exit(&sc->sc_lock); 1470 1471 /* 1472 * Update the tty layer's idea of the carrier bit, in case we changed 1473 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1474 * explicit request. 1475 */ 1476 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1477 1478 #ifdef PLCOM_DEBUG 1479 if (plcom_debug) 1480 plcomstatus(sc, "plcomparam "); 1481 #endif 1482 1483 if (!ISSET(t->c_cflag, CHWFLOW)) { 1484 if (sc->sc_tx_stopped) { 1485 sc->sc_tx_stopped = 0; 1486 plcomstart(tp); 1487 } 1488 } 1489 1490 return 0; 1491 } 1492 1493 void 1494 plcom_iflush(struct plcom_softc *sc) 1495 { 1496 struct plcom_instance *pi = &sc->sc_pi; 1497 #ifdef DIAGNOSTIC 1498 int reg; 1499 #endif 1500 int timo; 1501 1502 #ifdef DIAGNOSTIC 1503 reg = 0xffff; 1504 #endif 1505 timo = 50000; 1506 /* flush any pending I/O */ 1507 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1508 && --timo) 1509 #ifdef DIAGNOSTIC 1510 reg = 1511 #else 1512 (void) 1513 #endif 1514 PREAD1(pi, PL01XCOM_DR); 1515 #ifdef DIAGNOSTIC 1516 if (!timo) 1517 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1518 reg); 1519 #endif 1520 } 1521 1522 void 1523 plcom_loadchannelregs(struct plcom_softc *sc) 1524 { 1525 struct plcom_instance *pi = &sc->sc_pi; 1526 1527 /* XXXXX necessary? */ 1528 plcom_iflush(sc); 1529 1530 switch (pi->pi_type) { 1531 case PLCOM_TYPE_PL010: 1532 PWRITE1(pi, PL010COM_CR, 0); 1533 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1534 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1535 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1536 1537 /* XXX device_unit() abuse */ 1538 if (sc->sc_set_mcr) 1539 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1540 device_unit(sc->sc_dev), 1541 sc->sc_mcr_active = sc->sc_mcr); 1542 1543 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1544 break; 1545 1546 case PLCOM_TYPE_PL011: 1547 PWRITE4(pi, PL011COM_CR, 0); 1548 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1549 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1550 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1551 sc->sc_mcr_active = sc->sc_mcr; 1552 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1553 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1554 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1555 break; 1556 } 1557 } 1558 1559 int 1560 plcomhwiflow(struct tty *tp, int block) 1561 { 1562 struct plcom_softc *sc = 1563 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1564 1565 if (PLCOM_ISALIVE(sc) == 0) 1566 return 0; 1567 1568 if (sc->sc_mcr_rts == 0) 1569 return 0; 1570 1571 mutex_spin_enter(&sc->sc_lock); 1572 1573 if (block) { 1574 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1575 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1576 plcom_hwiflow(sc); 1577 } 1578 } else { 1579 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1580 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1581 plcom_schedrx(sc); 1582 } 1583 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1584 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1585 plcom_hwiflow(sc); 1586 } 1587 } 1588 1589 mutex_spin_exit(&sc->sc_lock); 1590 return 1; 1591 } 1592 1593 /* 1594 * (un)block input via hw flowcontrol 1595 */ 1596 void 1597 plcom_hwiflow(struct plcom_softc *sc) 1598 { 1599 struct plcom_instance *pi = &sc->sc_pi; 1600 1601 if (sc->sc_mcr_rts == 0) 1602 return; 1603 1604 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1605 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1606 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1607 } else { 1608 SET(sc->sc_mcr, sc->sc_mcr_rts); 1609 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1610 } 1611 switch (pi->pi_type) { 1612 case PLCOM_TYPE_PL010: 1613 if (sc->sc_set_mcr) 1614 /* XXX device_unit() abuse */ 1615 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1616 device_unit(sc->sc_dev), sc->sc_mcr_active); 1617 break; 1618 case PLCOM_TYPE_PL011: 1619 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1620 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1621 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1622 break; 1623 } 1624 } 1625 1626 1627 void 1628 plcomstart(struct tty *tp) 1629 { 1630 struct plcom_softc *sc = 1631 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1632 struct plcom_instance *pi = &sc->sc_pi; 1633 int s; 1634 1635 if (PLCOM_ISALIVE(sc) == 0) 1636 return; 1637 1638 s = spltty(); 1639 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1640 goto out; 1641 if (sc->sc_tx_stopped) 1642 goto out; 1643 1644 if (!ttypull(tp)) 1645 goto out; 1646 1647 /* Grab the first contiguous region of buffer space. */ 1648 { 1649 u_char *tba; 1650 int tbc; 1651 1652 tba = tp->t_outq.c_cf; 1653 tbc = ndqb(&tp->t_outq, 0); 1654 1655 mutex_spin_enter(&sc->sc_lock); 1656 1657 sc->sc_tba = tba; 1658 sc->sc_tbc = tbc; 1659 } 1660 1661 SET(tp->t_state, TS_BUSY); 1662 sc->sc_tx_busy = 1; 1663 1664 /* Enable transmit completion interrupts if necessary. */ 1665 switch (pi->pi_type) { 1666 case PLCOM_TYPE_PL010: 1667 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1668 SET(sc->sc_cr, PL010_CR_TIE); 1669 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1670 } 1671 break; 1672 case PLCOM_TYPE_PL011: 1673 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1674 SET(sc->sc_imsc, PL011_INT_TX); 1675 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1676 } 1677 break; 1678 } 1679 1680 /* Output the first chunk of the contiguous buffer. */ 1681 { 1682 int n; 1683 1684 n = sc->sc_tbc; 1685 if (n > sc->sc_fifolen) 1686 n = sc->sc_fifolen; 1687 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1688 sc->sc_tbc -= n; 1689 sc->sc_tba += n; 1690 } 1691 mutex_spin_exit(&sc->sc_lock); 1692 out: 1693 splx(s); 1694 return; 1695 } 1696 1697 /* 1698 * Stop output on a line. 1699 */ 1700 void 1701 plcomstop(struct tty *tp, int flag) 1702 { 1703 struct plcom_softc *sc = 1704 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1705 1706 mutex_spin_enter(&sc->sc_lock); 1707 if (ISSET(tp->t_state, TS_BUSY)) { 1708 /* Stop transmitting at the next chunk. */ 1709 sc->sc_tbc = 0; 1710 sc->sc_heldtbc = 0; 1711 if (!ISSET(tp->t_state, TS_TTSTOP)) 1712 SET(tp->t_state, TS_FLUSH); 1713 } 1714 mutex_spin_exit(&sc->sc_lock); 1715 } 1716 1717 void 1718 plcomdiag(void *arg) 1719 { 1720 struct plcom_softc *sc = arg; 1721 int overflows, floods; 1722 1723 mutex_spin_enter(&sc->sc_lock); 1724 overflows = sc->sc_overflows; 1725 sc->sc_overflows = 0; 1726 floods = sc->sc_floods; 1727 sc->sc_floods = 0; 1728 sc->sc_errors = 0; 1729 mutex_spin_exit(&sc->sc_lock); 1730 1731 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1732 device_xname(sc->sc_dev), 1733 overflows, overflows == 1 ? "" : "s", 1734 floods, floods == 1 ? "" : "s"); 1735 } 1736 1737 integrate void 1738 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1739 { 1740 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1741 struct plcom_instance *pi = &sc->sc_pi; 1742 u_char *get, *end; 1743 u_int cc, scc; 1744 u_char rsr; 1745 int code; 1746 1747 end = sc->sc_ebuf; 1748 get = sc->sc_rbget; 1749 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1750 1751 if (cc == plcom_rbuf_size) { 1752 sc->sc_floods++; 1753 if (sc->sc_errors++ == 0) 1754 callout_reset(&sc->sc_diag_callout, 60 * hz, 1755 plcomdiag, sc); 1756 } 1757 1758 while (cc) { 1759 code = get[0]; 1760 rsr = get[1]; 1761 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1762 if (ISSET(rsr, PL01X_RSR_OE)) { 1763 sc->sc_overflows++; 1764 if (sc->sc_errors++ == 0) 1765 callout_reset(&sc->sc_diag_callout, 1766 60 * hz, plcomdiag, sc); 1767 } 1768 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1769 SET(code, TTY_FE); 1770 if (ISSET(rsr, PL01X_RSR_PE)) 1771 SET(code, TTY_PE); 1772 } 1773 if ((*rint)(code, tp) == -1) { 1774 /* 1775 * The line discipline's buffer is out of space. 1776 */ 1777 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1778 /* 1779 * We're either not using flow control, or the 1780 * line discipline didn't tell us to block for 1781 * some reason. Either way, we have no way to 1782 * know when there's more space available, so 1783 * just drop the rest of the data. 1784 */ 1785 get += cc << 1; 1786 if (get >= end) 1787 get -= plcom_rbuf_size << 1; 1788 cc = 0; 1789 } else { 1790 /* 1791 * Don't schedule any more receive processing 1792 * until the line discipline tells us there's 1793 * space available (through plcomhwiflow()). 1794 * Leave the rest of the data in the input 1795 * buffer. 1796 */ 1797 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1798 } 1799 break; 1800 } 1801 get += 2; 1802 if (get >= end) 1803 get = sc->sc_rbuf; 1804 cc--; 1805 } 1806 1807 if (cc != scc) { 1808 sc->sc_rbget = get; 1809 mutex_spin_enter(&sc->sc_lock); 1810 1811 cc = sc->sc_rbavail += scc - cc; 1812 /* Buffers should be ok again, release possible block. */ 1813 if (cc >= sc->sc_r_lowat) { 1814 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1815 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1816 switch (pi->pi_type) { 1817 case PLCOM_TYPE_PL010: 1818 SET(sc->sc_cr, 1819 PL010_CR_RIE | PL010_CR_RTIE); 1820 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1821 break; 1822 case PLCOM_TYPE_PL011: 1823 SET(sc->sc_imsc, 1824 PL011_INT_RX | PL011_INT_RT); 1825 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1826 break; 1827 } 1828 } 1829 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1830 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1831 plcom_hwiflow(sc); 1832 } 1833 } 1834 mutex_spin_exit(&sc->sc_lock); 1835 } 1836 } 1837 1838 integrate void 1839 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1840 { 1841 1842 CLR(tp->t_state, TS_BUSY); 1843 if (ISSET(tp->t_state, TS_FLUSH)) 1844 CLR(tp->t_state, TS_FLUSH); 1845 else 1846 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1847 (*tp->t_linesw->l_start)(tp); 1848 } 1849 1850 integrate void 1851 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1852 { 1853 u_char msr, delta; 1854 1855 mutex_spin_enter(&sc->sc_lock); 1856 msr = sc->sc_msr; 1857 delta = sc->sc_msr_delta; 1858 sc->sc_msr_delta = 0; 1859 mutex_spin_exit(&sc->sc_lock); 1860 1861 if (ISSET(delta, sc->sc_msr_dcd)) { 1862 /* 1863 * Inform the tty layer that carrier detect changed. 1864 */ 1865 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1866 } 1867 1868 if (ISSET(delta, sc->sc_msr_cts)) { 1869 /* Block or unblock output according to flow control. */ 1870 if (ISSET(msr, sc->sc_msr_cts)) { 1871 sc->sc_tx_stopped = 0; 1872 (*tp->t_linesw->l_start)(tp); 1873 } else { 1874 sc->sc_tx_stopped = 1; 1875 } 1876 } 1877 1878 #ifdef PLCOM_DEBUG 1879 if (plcom_debug) 1880 plcomstatus(sc, "plcom_stsoft"); 1881 #endif 1882 } 1883 1884 void 1885 plcomsoft(void *arg) 1886 { 1887 struct plcom_softc *sc = arg; 1888 struct tty *tp; 1889 1890 if (PLCOM_ISALIVE(sc) == 0) 1891 return; 1892 1893 tp = sc->sc_tty; 1894 1895 if (sc->sc_rx_ready) { 1896 sc->sc_rx_ready = 0; 1897 plcom_rxsoft(sc, tp); 1898 } 1899 1900 if (sc->sc_st_check) { 1901 sc->sc_st_check = 0; 1902 plcom_stsoft(sc, tp); 1903 } 1904 1905 if (sc->sc_tx_done) { 1906 sc->sc_tx_done = 0; 1907 plcom_txsoft(sc, tp); 1908 } 1909 } 1910 1911 bool 1912 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1913 { 1914 bool ret = false; 1915 u_int stat = 0; 1916 1917 switch (pi->pi_type) { 1918 case PLCOM_TYPE_PL010: 1919 stat = PREAD1(pi, PL010COM_IIR); 1920 ret = ISSET(stat, PL010_IIR_IMASK); 1921 break; 1922 case PLCOM_TYPE_PL011: 1923 stat = PREAD4(pi, PL011COM_MIS); 1924 ret = ISSET(stat, PL011_INT_ALLMASK); 1925 break; 1926 } 1927 *istatus = stat; 1928 1929 return ret; 1930 } 1931 1932 int 1933 plcomintr(void *arg) 1934 { 1935 struct plcom_softc *sc = arg; 1936 struct plcom_instance *pi = &sc->sc_pi; 1937 u_char *put, *end; 1938 u_int cc; 1939 u_int istatus = 0; 1940 u_char rsr; 1941 bool intr = false; 1942 1943 PLCOM_BARRIER(pi, BR | BW); 1944 1945 if (PLCOM_ISALIVE(sc) == 0) 1946 return 0; 1947 1948 mutex_spin_enter(&sc->sc_lock); 1949 intr = plcom_intstatus(pi, &istatus); 1950 if (!intr) { 1951 mutex_spin_exit(&sc->sc_lock); 1952 return 0; 1953 } 1954 1955 end = sc->sc_ebuf; 1956 put = sc->sc_rbput; 1957 cc = sc->sc_rbavail; 1958 1959 do { 1960 u_int msr = 0, delta, fr; 1961 bool rxintr = false, txintr = false, msintr; 1962 1963 /* don't need RI here*/ 1964 fr = PREAD1(pi, PL01XCOM_FR); 1965 1966 if (!ISSET(fr, PL01X_FR_RXFE) && 1967 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1968 while (cc > 0) { 1969 int cn_trapped = 0; 1970 put[0] = PREAD1(pi, PL01XCOM_DR); 1971 rsr = PREAD1(pi, PL01XCOM_RSR); 1972 /* Clear any error status. */ 1973 if (ISSET(rsr, PL01X_RSR_ERROR)) 1974 PWRITE1(pi, PL01XCOM_ECR, 0); 1975 if (ISSET(rsr, PL01X_RSR_BE)) { 1976 cn_trapped = 0; 1977 cn_check_magic(sc->sc_tty->t_dev, 1978 CNC_BREAK, plcom_cnm_state); 1979 if (cn_trapped) 1980 continue; 1981 #if defined(KGDB) 1982 if (ISSET(sc->sc_hwflags, 1983 PLCOM_HW_KGDB)) { 1984 kgdb_connect(1); 1985 continue; 1986 } 1987 #endif 1988 } 1989 1990 put[1] = rsr; 1991 cn_trapped = 0; 1992 cn_check_magic(sc->sc_tty->t_dev, put[0], 1993 plcom_cnm_state); 1994 if (cn_trapped) { 1995 fr = PREAD1(pi, PL01XCOM_FR); 1996 if (ISSET(fr, PL01X_FR_RXFE)) 1997 break; 1998 1999 continue; 2000 } 2001 put += 2; 2002 if (put >= end) 2003 put = sc->sc_rbuf; 2004 cc--; 2005 2006 /* don't need RI here*/ 2007 fr = PREAD1(pi, PL01XCOM_FR); 2008 if (ISSET(fr, PL01X_FR_RXFE)) 2009 break; 2010 } 2011 2012 /* 2013 * Current string of incoming characters ended because 2014 * no more data was available or we ran out of space. 2015 * Schedule a receive event if any data was received. 2016 * If we're out of space, turn off receive interrupts. 2017 */ 2018 sc->sc_rbput = put; 2019 sc->sc_rbavail = cc; 2020 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2021 sc->sc_rx_ready = 1; 2022 2023 /* 2024 * See if we are in danger of overflowing a buffer. If 2025 * so, use hardware flow control to ease the pressure. 2026 */ 2027 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2028 cc < sc->sc_r_hiwat) { 2029 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2030 plcom_hwiflow(sc); 2031 } 2032 2033 /* 2034 * If we're out of space, disable receive interrupts 2035 * until the queue has drained a bit. 2036 */ 2037 if (!cc) { 2038 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2039 switch (pi->pi_type) { 2040 case PLCOM_TYPE_PL010: 2041 CLR(sc->sc_cr, 2042 PL010_CR_RIE | PL010_CR_RTIE); 2043 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2044 break; 2045 case PLCOM_TYPE_PL011: 2046 CLR(sc->sc_imsc, 2047 PL011_INT_RT | PL011_INT_RX); 2048 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2049 break; 2050 } 2051 } 2052 } else { 2053 switch (pi->pi_type) { 2054 case PLCOM_TYPE_PL010: 2055 rxintr = ISSET(istatus, PL010_IIR_RIS); 2056 if (rxintr) { 2057 PWRITE1(pi, PL010COM_CR, 0); 2058 delay(10); 2059 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2060 continue; 2061 } 2062 break; 2063 case PLCOM_TYPE_PL011: 2064 rxintr = ISSET(istatus, PL011_INT_RX); 2065 if (rxintr) { 2066 PWRITE4(pi, PL011COM_CR, 0); 2067 delay(10); 2068 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2069 continue; 2070 } 2071 break; 2072 } 2073 } 2074 2075 switch (pi->pi_type) { 2076 case PLCOM_TYPE_PL010: 2077 msr = PREAD1(pi, PL01XCOM_FR); 2078 break; 2079 case PLCOM_TYPE_PL011: 2080 msr = PREAD4(pi, PL01XCOM_FR); 2081 break; 2082 } 2083 delta = msr ^ sc->sc_msr; 2084 sc->sc_msr = msr; 2085 2086 /* Clear any pending modem status interrupt. */ 2087 switch (pi->pi_type) { 2088 case PLCOM_TYPE_PL010: 2089 msintr = ISSET(istatus, PL010_IIR_MIS); 2090 if (msintr) { 2091 PWRITE1(pi, PL010COM_ICR, 0); 2092 } 2093 break; 2094 case PLCOM_TYPE_PL011: 2095 msintr = ISSET(istatus, PL011_INT_MSMASK); 2096 if (msintr) { 2097 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2098 } 2099 break; 2100 } 2101 /* 2102 * Pulse-per-second (PSS) signals on edge of DCD? 2103 * Process these even if line discipline is ignoring DCD. 2104 */ 2105 if (delta & sc->sc_ppsmask) { 2106 struct timeval tv; 2107 mutex_spin_enter(&timecounter_lock); 2108 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2109 /* XXX nanotime() */ 2110 microtime(&tv); 2111 TIMEVAL_TO_TIMESPEC(&tv, 2112 &sc->ppsinfo.assert_timestamp); 2113 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2114 timespecadd(&sc->ppsinfo.assert_timestamp, 2115 &sc->ppsparam.assert_offset, 2116 &sc->ppsinfo.assert_timestamp); 2117 } 2118 2119 #ifdef PPS_SYNC 2120 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2121 hardpps(&tv, tv.tv_usec); 2122 #endif 2123 sc->ppsinfo.assert_sequence++; 2124 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2125 2126 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2127 /* XXX nanotime() */ 2128 microtime(&tv); 2129 TIMEVAL_TO_TIMESPEC(&tv, 2130 &sc->ppsinfo.clear_timestamp); 2131 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2132 timespecadd(&sc->ppsinfo.clear_timestamp, 2133 &sc->ppsparam.clear_offset, 2134 &sc->ppsinfo.clear_timestamp); 2135 } 2136 2137 #ifdef PPS_SYNC 2138 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2139 hardpps(&tv, tv.tv_usec); 2140 #endif 2141 sc->ppsinfo.clear_sequence++; 2142 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2143 } 2144 mutex_spin_exit(&timecounter_lock); 2145 } 2146 2147 /* 2148 * Process normal status changes 2149 */ 2150 if (ISSET(delta, sc->sc_msr_mask)) { 2151 SET(sc->sc_msr_delta, delta); 2152 2153 /* 2154 * Stop output immediately if we lose the output 2155 * flow control signal or carrier detect. 2156 */ 2157 if (ISSET(~msr, sc->sc_msr_mask)) { 2158 sc->sc_tbc = 0; 2159 sc->sc_heldtbc = 0; 2160 #ifdef PLCOM_DEBUG 2161 if (plcom_debug) 2162 plcomstatus(sc, "plcomintr "); 2163 #endif 2164 } 2165 2166 sc->sc_st_check = 1; 2167 } 2168 2169 /* 2170 * Done handling any receive interrupts. See if data 2171 * can be transmitted as well. Schedule tx done 2172 * event if no data left and tty was marked busy. 2173 */ 2174 2175 switch (pi->pi_type) { 2176 case PLCOM_TYPE_PL010: 2177 txintr = ISSET(istatus, PL010_IIR_TIS); 2178 break; 2179 case PLCOM_TYPE_PL011: 2180 txintr = ISSET(istatus, PL011_INT_TX); 2181 break; 2182 } 2183 if (txintr) { 2184 /* 2185 * If we've delayed a parameter change, do it 2186 * now, and restart * output. 2187 */ 2188 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2189 if (sc->sc_heldchange) { 2190 plcom_loadchannelregs(sc); 2191 sc->sc_heldchange = 0; 2192 sc->sc_tbc = sc->sc_heldtbc; 2193 sc->sc_heldtbc = 0; 2194 } 2195 2196 /* 2197 * Output the next chunk of the contiguous 2198 * buffer, if any. 2199 */ 2200 if (sc->sc_tbc > 0) { 2201 int n; 2202 2203 n = sc->sc_tbc; 2204 if (n > sc->sc_fifolen) 2205 n = sc->sc_fifolen; 2206 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2207 sc->sc_tbc -= n; 2208 sc->sc_tba += n; 2209 } else { 2210 /* 2211 * Disable transmit completion 2212 * interrupts if necessary. 2213 */ 2214 switch (pi->pi_type) { 2215 case PLCOM_TYPE_PL010: 2216 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2217 CLR(sc->sc_cr, PL010_CR_TIE); 2218 PWRITE1(pi, PL010COM_CR, 2219 sc->sc_cr); 2220 } 2221 break; 2222 case PLCOM_TYPE_PL011: 2223 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2224 CLR(sc->sc_imsc, PL011_INT_TX); 2225 PWRITE4(pi, PL011COM_IMSC, 2226 sc->sc_imsc); 2227 } 2228 break; 2229 } 2230 if (sc->sc_tx_busy) { 2231 sc->sc_tx_busy = 0; 2232 sc->sc_tx_done = 1; 2233 } 2234 } 2235 } 2236 2237 } while (plcom_intstatus(pi, &istatus)); 2238 2239 mutex_spin_exit(&sc->sc_lock); 2240 2241 /* Wake up the poller. */ 2242 softint_schedule(sc->sc_si); 2243 2244 #ifdef RND_COM 2245 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2246 #endif 2247 2248 PLCOM_BARRIER(pi, BR | BW); 2249 2250 return 1; 2251 } 2252 2253 /* 2254 * The following functions are polled getc and putc routines, shared 2255 * by the console and kgdb glue. 2256 * 2257 * The read-ahead code is so that you can detect pending in-band 2258 * cn_magic in polled mode while doing output rather than having to 2259 * wait until the kernel decides it needs input. 2260 */ 2261 2262 #define MAX_READAHEAD 20 2263 static int plcom_readahead[MAX_READAHEAD]; 2264 static int plcom_readaheadcount = 0; 2265 2266 int 2267 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2268 { 2269 int s = splserial(); 2270 u_char stat, c; 2271 2272 /* got a character from reading things earlier */ 2273 if (plcom_readaheadcount > 0) { 2274 int i; 2275 2276 c = plcom_readahead[0]; 2277 for (i = 1; i < plcom_readaheadcount; i++) { 2278 plcom_readahead[i-1] = plcom_readahead[i]; 2279 } 2280 plcom_readaheadcount--; 2281 splx(s); 2282 return c; 2283 } 2284 2285 /* block until a character becomes available */ 2286 while (ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) 2287 ; 2288 2289 c = PREAD1(pi, PL01XCOM_DR); 2290 { 2291 int cn_trapped = 0; /* unused */ 2292 #ifdef DDB 2293 extern int db_active; 2294 if (!db_active) 2295 #endif 2296 cn_check_magic(dev, c, plcom_cnm_state); 2297 } 2298 splx(s); 2299 return c; 2300 } 2301 2302 void 2303 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2304 { 2305 int s = splserial(); 2306 int timo; 2307 2308 int cin, stat; 2309 if (plcom_readaheadcount < MAX_READAHEAD 2310 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2311 int cn_trapped = 0; 2312 cin = PREAD1(pi, PL01XCOM_DR); 2313 cn_check_magic(dev, cin, plcom_cnm_state); 2314 plcom_readahead[plcom_readaheadcount++] = cin; 2315 } 2316 2317 /* wait for any pending transmission to finish */ 2318 timo = 150000; 2319 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2320 continue; 2321 2322 PWRITE1(pi, PL01XCOM_DR, c); 2323 PLCOM_BARRIER(pi, BR | BW); 2324 2325 /* wait for this transmission to complete */ 2326 timo = 1500000; 2327 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2328 continue; 2329 2330 splx(s); 2331 } 2332 2333 /* 2334 * Initialize UART for use as console or KGDB line. 2335 */ 2336 int 2337 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2338 { 2339 u_char lcr; 2340 2341 switch (pi->pi_type) { 2342 case PLCOM_TYPE_PL010: 2343 if (pi->pi_size == 0) 2344 pi->pi_size = PL010COM_UART_SIZE; 2345 break; 2346 case PLCOM_TYPE_PL011: 2347 if (pi->pi_size == 0) 2348 pi->pi_size = PL011COM_UART_SIZE; 2349 break; 2350 default: 2351 panic("Unknown plcom type"); 2352 } 2353 2354 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2355 &pi->pi_ioh)) 2356 return ENOMEM; /* ??? */ 2357 2358 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2359 switch (pi->pi_type) { 2360 case PLCOM_TYPE_PL010: 2361 PWRITE1(pi, PL010COM_CR, 0); 2362 2363 rate = pl010comspeed(rate, frequency); 2364 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2365 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2366 PWRITE1(pi, PL010COM_LCR, lcr); 2367 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2368 break; 2369 case PLCOM_TYPE_PL011: 2370 PWRITE4(pi, PL011COM_CR, 0); 2371 2372 rate = pl011comspeed(rate, frequency); 2373 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2374 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2375 PWRITE1(pi, PL011COM_LCRH, lcr); 2376 PWRITE4(pi, PL011COM_CR, 2377 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2378 break; 2379 } 2380 2381 #if 0 2382 /* Ought to do something like this, but we have no sc to 2383 dereference. */ 2384 /* XXX device_unit() abuse */ 2385 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2386 PL01X_MCR_DTR | PL01X_MCR_RTS); 2387 #endif 2388 2389 return 0; 2390 } 2391 2392 /* 2393 * Following are all routines needed for PLCOM to act as console 2394 */ 2395 struct consdev plcomcons = { 2396 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2397 NULL, NULL, NODEV, CN_NORMAL 2398 }; 2399 2400 int 2401 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2402 tcflag_t cflag, int unit) 2403 { 2404 int res; 2405 2406 plcomcons_info = *pi; 2407 2408 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2409 if (res) 2410 return res; 2411 2412 cn_tab = &plcomcons; 2413 cn_init_magic(&plcom_cnm_state); 2414 cn_set_magic("\047\001"); /* default magic is BREAK */ 2415 2416 plcomconsunit = unit; 2417 plcomconsrate = rate; 2418 plcomconscflag = cflag; 2419 2420 return 0; 2421 } 2422 2423 void 2424 plcomcndetach(void) 2425 { 2426 2427 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2428 plcomcons_info.pi_size); 2429 plcomcons_info.pi_iot = NULL; 2430 2431 cn_tab = NULL; 2432 } 2433 2434 int 2435 plcomcngetc(dev_t dev) 2436 { 2437 return plcom_common_getc(dev, &plcomcons_info); 2438 } 2439 2440 /* 2441 * Console kernel output character routine. 2442 */ 2443 void 2444 plcomcnputc(dev_t dev, int c) 2445 { 2446 plcom_common_putc(dev, &plcomcons_info, c); 2447 } 2448 2449 void 2450 plcomcnpollc(dev_t dev, int on) 2451 { 2452 2453 plcom_readaheadcount = 0; 2454 } 2455 2456 #ifdef KGDB 2457 int 2458 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2459 tcflag_t cflag, int unit) 2460 { 2461 int res; 2462 2463 if (pi->pi_iot == plcomcons_info.pi_iot && 2464 pi->pi_iobase == plcomcons_info.pi_iobase) 2465 return EBUSY; /* cannot share with console */ 2466 2467 res = plcominit(pi, rate, frequency, cflag); 2468 if (res) 2469 return res; 2470 2471 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2472 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2473 2474 plcomkgdb_info.pi_iot = pi->pi_iot; 2475 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2476 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2477 2478 return 0; 2479 } 2480 2481 /* ARGSUSED */ 2482 int 2483 plcom_kgdb_getc(void *arg) 2484 { 2485 return plcom_common_getc(NODEV, &plcomkgdb_info); 2486 } 2487 2488 /* ARGSUSED */ 2489 void 2490 plcom_kgdb_putc(void *arg, int c) 2491 { 2492 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2493 } 2494 #endif /* KGDB */ 2495 2496 /* helper function to identify the plcom ports used by 2497 console or KGDB (and not yet autoconf attached) */ 2498 int 2499 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2500 bus_space_handle_t *ioh) 2501 { 2502 bus_space_handle_t help; 2503 2504 if (!plcomconsattached && 2505 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2506 iobase == plcomcons_info.pi_iobase) 2507 help = plcomcons_info.pi_ioh; 2508 #ifdef KGDB 2509 else if (!plcom_kgdb_attached && 2510 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2511 iobase == plcomkgdb_info.pi_iobase) 2512 help = plcomkgdb_info.pi_ioh; 2513 #endif 2514 else 2515 return 0; 2516 2517 if (ioh) 2518 *ioh = help; 2519 return 1; 2520 } 2521
Indexes created Tue Sep 23 14:10:03 GMT 2025