plcom.c revision 1.50
1 /* $NetBSD: plcom.c,v 1.50 2014/08/10 16:44:34 tls Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.50 2014/08/10 16:44:34 tls Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 #include "rnd.h" 106 107 /* 108 * Override cnmagic(9) macro before including <sys/systm.h>. 109 * We need to know if cn_check_magic triggered debugger, so set a flag. 110 * Callers of cn_check_magic must declare int cn_trapped = 0; 111 * XXX: this is *ugly*! 112 */ 113 #define cn_trap() \ 114 do { \ 115 console_debugger(); \ 116 cn_trapped = 1; \ 117 } while (/* CONSTCOND */ 0) 118 119 #include <sys/param.h> 120 #include <sys/systm.h> 121 #include <sys/ioctl.h> 122 #include <sys/select.h> 123 #include <sys/tty.h> 124 #include <sys/proc.h> 125 #include <sys/conf.h> 126 #include <sys/file.h> 127 #include <sys/uio.h> 128 #include <sys/kernel.h> 129 #include <sys/syslog.h> 130 #include <sys/types.h> 131 #include <sys/device.h> 132 #include <sys/malloc.h> 133 #include <sys/timepps.h> 134 #include <sys/vnode.h> 135 #include <sys/kauth.h> 136 #include <sys/intr.h> 137 #include <sys/bus.h> 138 #ifdef RND_COM 139 #include <sys/rnd.h> 140 #endif 141 142 #include <evbarm/dev/plcomreg.h> 143 #include <evbarm/dev/plcomvar.h> 144 145 #include <dev/cons.h> 146 147 static void plcom_enable_debugport (struct plcom_softc *); 148 149 void plcom_config (struct plcom_softc *); 150 void plcom_shutdown (struct plcom_softc *); 151 int pl010comspeed (long, long); 152 int pl011comspeed (long, long); 153 static u_char cflag2lcr (tcflag_t); 154 int plcomparam (struct tty *, struct termios *); 155 void plcomstart (struct tty *); 156 int plcomhwiflow (struct tty *, int); 157 158 void plcom_loadchannelregs (struct plcom_softc *); 159 void plcom_hwiflow (struct plcom_softc *); 160 void plcom_break (struct plcom_softc *, int); 161 void plcom_modem (struct plcom_softc *, int); 162 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 163 int plcom_to_tiocm (struct plcom_softc *); 164 void plcom_iflush (struct plcom_softc *); 165 166 int plcom_common_getc (dev_t, struct plcom_instance *); 167 void plcom_common_putc (dev_t, struct plcom_instance *, int); 168 169 int plcominit (struct plcom_instance *, int, int, tcflag_t); 170 171 dev_type_open(plcomopen); 172 dev_type_close(plcomclose); 173 dev_type_read(plcomread); 174 dev_type_write(plcomwrite); 175 dev_type_ioctl(plcomioctl); 176 dev_type_stop(plcomstop); 177 dev_type_tty(plcomtty); 178 dev_type_poll(plcompoll); 179 180 int plcomcngetc (dev_t); 181 void plcomcnputc (dev_t, int); 182 void plcomcnpollc (dev_t, int); 183 184 #define integrate static inline 185 void plcomsoft (void *); 186 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 188 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 189 integrate void plcom_schedrx (struct plcom_softc *); 190 void plcomdiag (void *); 191 192 bool plcom_intstatus(struct plcom_instance *, u_int *); 193 194 extern struct cfdriver plcom_cd; 195 196 const struct cdevsw plcom_cdevsw = { 197 .d_open = plcomopen, 198 .d_close = plcomclose, 199 .d_read = plcomread, 200 .d_write = plcomwrite, 201 .d_ioctl = plcomioctl, 202 .d_stop = plcomstop, 203 .d_tty = plcomtty, 204 .d_poll = plcompoll, 205 .d_mmap = nommap, 206 .d_kqfilter = ttykqfilter, 207 .d_discard = nodiscard, 208 .d_flag = D_TTY 209 }; 210 211 /* 212 * Make this an option variable one can patch. 213 * But be warned: this must be a power of 2! 214 */ 215 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 216 217 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 218 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 219 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 220 221 static int plcomconsunit = -1; 222 static struct plcom_instance plcomcons_info; 223 224 static int plcomconsattached; 225 static int plcomconsrate; 226 static tcflag_t plcomconscflag; 227 static struct cnm_state plcom_cnm_state; 228 229 static int ppscap = 230 PPS_TSFMT_TSPEC | 231 PPS_CAPTUREASSERT | 232 PPS_CAPTURECLEAR | 233 #ifdef PPS_SYNC 234 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 235 #endif /* PPS_SYNC */ 236 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 237 238 #ifdef KGDB 239 #include <sys/kgdb.h> 240 241 static struct plcom_instance plcomkgdb_info; 242 static int plcom_kgdb_attached; 243 244 int plcom_kgdb_getc (void *); 245 void plcom_kgdb_putc (void *, int); 246 #endif /* KGDB */ 247 248 #define PLCOMUNIT_MASK 0x7ffff 249 #define PLCOMDIALOUT_MASK 0x80000 250 251 #define PLCOMUNIT(x) (minor(x) & PLCOMUNIT_MASK) 252 #define PLCOMDIALOUT(x) (minor(x) & PLCOMDIALOUT_MASK) 253 254 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 255 device_is_active((sc)->sc_dev)) 256 257 #define BR BUS_SPACE_BARRIER_READ 258 #define BW BUS_SPACE_BARRIER_WRITE 259 #define PLCOM_BARRIER(pi, f) \ 260 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 261 262 static uint8_t 263 pread1(struct plcom_instance *pi, bus_size_t reg) 264 { 265 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 266 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 267 268 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 269 (8 * (reg & 3)); 270 } 271 int nhcr; 272 static void 273 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 274 { 275 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 276 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 277 } else { 278 const size_t shift = 8 * (o & 3); 279 o &= -4; 280 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 281 tmp = (val << shift) | (tmp & ~(0xff << shift)); 282 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 283 } 284 } 285 286 static void 287 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 288 bus_size_t count) 289 { 290 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 291 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 292 } else { 293 KASSERT((o & 3) == 0); 294 while (count--) { 295 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 296 }; 297 } 298 } 299 300 #define PREAD1(pi, reg) pread1(pi, reg) 301 #define PREAD4(pi, reg) \ 302 (bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))) 303 304 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 305 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 306 #define PWRITE4(pi, reg, val) \ 307 (bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))) 308 309 int 310 pl010comspeed(long speed, long frequency) 311 { 312 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 313 314 int x, err; 315 316 #if 0 317 if (speed == 0) 318 return 0; 319 #endif 320 if (speed <= 0) 321 return -1; 322 x = divrnd(frequency / 16, speed); 323 if (x <= 0) 324 return -1; 325 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 326 if (err < 0) 327 err = -err; 328 if (err > PLCOM_TOLERANCE) 329 return -1; 330 return x; 331 332 #undef divrnd 333 } 334 335 int 336 pl011comspeed(long speed, long frequency) 337 { 338 int denom = 16 * speed; 339 int div = frequency / denom; 340 int rem = frequency % denom; 341 342 int ibrd = div << 6; 343 int fbrd = (((8 * rem) / speed) + 1) / 2; 344 345 /* Tolerance? */ 346 return ibrd | fbrd; 347 } 348 349 #ifdef PLCOM_DEBUG 350 int plcom_debug = 0; 351 352 void plcomstatus (struct plcom_softc *, const char *); 353 void 354 plcomstatus(struct plcom_softc *sc, const char *str) 355 { 356 struct tty *tp = sc->sc_tty; 357 358 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 359 device_xname(sc->sc_dev), str, 360 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 361 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 362 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 363 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 364 sc->sc_tx_stopped ? "+" : "-"); 365 366 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 367 device_xname(sc->sc_dev), str, 368 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 369 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 370 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 371 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 372 sc->sc_rx_flags); 373 } 374 #endif 375 376 #if 0 377 int 378 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 379 { 380 int data; 381 382 /* Disable the UART. */ 383 bus_space_write_1(iot, ioh, plcom_cr, 0); 384 /* Make sure the FIFO is off. */ 385 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 386 /* Disable interrupts. */ 387 bus_space_write_1(iot, ioh, plcom_iir, 0); 388 389 /* Make sure we swallow anything in the receiving register. */ 390 data = bus_space_read_1(iot, ioh, plcom_dr); 391 392 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 393 return 0; 394 395 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 396 397 if (data != PL01X_FR_RXFE) 398 return 0; 399 400 return 1; 401 } 402 #endif 403 404 /* 405 * No locking in this routine; it is only called during attach, 406 * or with the port already locked. 407 */ 408 static void 409 plcom_enable_debugport(struct plcom_softc *sc) 410 { 411 struct plcom_instance *pi = &sc->sc_pi; 412 413 sc->sc_cr = PL01X_CR_UARTEN; 414 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 415 416 /* Turn on line break interrupt, set carrier. */ 417 switch (pi->pi_type) { 418 case PLCOM_TYPE_PL010: 419 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 420 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 421 if (sc->sc_set_mcr) { 422 /* XXX device_unit() abuse */ 423 sc->sc_set_mcr(sc->sc_set_mcr_arg, 424 device_unit(sc->sc_dev), sc->sc_mcr); 425 } 426 break; 427 case PLCOM_TYPE_PL011: 428 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 429 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 430 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 431 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 432 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 433 break; 434 } 435 436 } 437 438 void 439 plcom_attach_subr(struct plcom_softc *sc) 440 { 441 struct plcom_instance *pi = &sc->sc_pi; 442 struct tty *tp; 443 444 aprint_naive("\n"); 445 446 callout_init(&sc->sc_diag_callout, 0); 447 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 448 449 switch (pi->pi_type) { 450 case PLCOM_TYPE_PL010: 451 case PLCOM_TYPE_PL011: 452 break; 453 default: 454 aprint_error_dev(sc->sc_dev, 455 "Unknown plcom type: %d\n", pi->pi_type); 456 return; 457 } 458 459 /* Disable interrupts before configuring the device. */ 460 sc->sc_cr = 0; 461 sc->sc_imsc = 0; 462 463 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 464 pi->pi_iobase == plcomcons_info.pi_iobase) { 465 plcomconsattached = 1; 466 467 /* Make sure the console is always "hardwired". */ 468 delay(1000); /* wait for output to finish */ 469 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 470 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 471 /* 472 * Must re-enable the console immediately, or we will 473 * hang when trying to print. 474 */ 475 sc->sc_cr = PL01X_CR_UARTEN; 476 if (pi->pi_type == PLCOM_TYPE_PL011) 477 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 478 } 479 480 switch (pi->pi_type) { 481 case PLCOM_TYPE_PL010: 482 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 483 break; 484 485 case PLCOM_TYPE_PL011: 486 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 487 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 488 break; 489 } 490 491 if (sc->sc_fifolen == 0) { 492 switch (pi->pi_type) { 493 case PLCOM_TYPE_PL010: 494 /* 495 * The PL010 has a 16-byte fifo, but the tx interrupt 496 * triggers when there is space for 8 more bytes. 497 */ 498 sc->sc_fifolen = 8; 499 break; 500 case PLCOM_TYPE_PL011: 501 /* Some revisions have a 32 byte TX FIFO */ 502 sc->sc_fifolen = 16; 503 break; 504 } 505 } 506 aprint_normal("\n"); 507 508 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 509 sc->sc_fifolen = 1; 510 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 511 } 512 513 if (sc->sc_fifolen > 1) 514 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 515 516 tp = tty_alloc(); 517 tp->t_oproc = plcomstart; 518 tp->t_param = plcomparam; 519 tp->t_hwiflow = plcomhwiflow; 520 521 sc->sc_tty = tp; 522 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 523 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 524 sc->sc_rbavail = plcom_rbuf_size; 525 if (sc->sc_rbuf == NULL) { 526 aprint_error_dev(sc->sc_dev, 527 "unable to allocate ring buffer\n"); 528 return; 529 } 530 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 531 532 tty_attach(tp); 533 534 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 535 int maj; 536 537 /* locate the major number */ 538 maj = cdevsw_lookup_major(&plcom_cdevsw); 539 540 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 541 542 aprint_normal_dev(sc->sc_dev, "console\n"); 543 } 544 545 #ifdef KGDB 546 /* 547 * Allow kgdb to "take over" this port. If this is 548 * the kgdb device, it has exclusive use. 549 */ 550 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 551 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 552 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 553 plcom_kgdb_attached = 1; 554 555 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 556 } 557 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 558 } 559 #endif 560 561 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 562 563 #ifdef RND_COM 564 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 565 RND_TYPE_TTY, RND_FLAG_DEFAULT); 566 #endif 567 568 /* 569 * if there are no enable/disable functions, assume the device 570 * is always enabled 571 */ 572 if (!sc->enable) 573 sc->enabled = 1; 574 575 plcom_config(sc); 576 577 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 578 } 579 580 void 581 plcom_config(struct plcom_softc *sc) 582 { 583 struct plcom_instance *pi = &sc->sc_pi; 584 585 /* Disable interrupts before configuring the device. */ 586 sc->sc_cr = 0; 587 sc->sc_imsc = 0; 588 switch (pi->pi_type) { 589 case PLCOM_TYPE_PL010: 590 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 591 break; 592 593 case PLCOM_TYPE_PL011: 594 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 595 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 596 break; 597 } 598 599 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 600 plcom_enable_debugport(sc); 601 } 602 603 int 604 plcom_detach(device_t self, int flags) 605 { 606 struct plcom_softc *sc = device_private(self); 607 int maj, mn; 608 609 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 610 return EBUSY; 611 612 if (sc->disable != NULL && sc->enabled != 0) { 613 (*sc->disable)(sc); 614 sc->enabled = 0; 615 } 616 617 /* locate the major number */ 618 maj = cdevsw_lookup_major(&plcom_cdevsw); 619 620 /* Nuke the vnodes for any open instances. */ 621 mn = device_unit(self); 622 vdevgone(maj, mn, mn, VCHR); 623 624 mn |= PLCOMDIALOUT_MASK; 625 vdevgone(maj, mn, mn, VCHR); 626 627 if (sc->sc_rbuf == NULL) { 628 /* 629 * Ring buffer allocation failed in the plcom_attach_subr, 630 * only the tty is allocated, and nothing else. 631 */ 632 tty_free(sc->sc_tty); 633 return 0; 634 } 635 636 /* Free the receive buffer. */ 637 free(sc->sc_rbuf, M_DEVBUF); 638 639 /* Detach and free the tty. */ 640 tty_detach(sc->sc_tty); 641 tty_free(sc->sc_tty); 642 643 /* Unhook the soft interrupt handler. */ 644 softint_disestablish(sc->sc_si); 645 646 #ifdef RND_COM 647 /* Unhook the entropy source. */ 648 rnd_detach_source(&sc->rnd_source); 649 #endif 650 callout_destroy(&sc->sc_diag_callout); 651 652 /* Destroy the lock. */ 653 mutex_destroy(&sc->sc_lock); 654 655 return 0; 656 } 657 658 int 659 plcom_activate(device_t self, enum devact act) 660 { 661 struct plcom_softc *sc = device_private(self); 662 663 switch (act) { 664 case DVACT_DEACTIVATE: 665 sc->enabled = 0; 666 return 0; 667 default: 668 return EOPNOTSUPP; 669 } 670 } 671 672 void 673 plcom_shutdown(struct plcom_softc *sc) 674 { 675 struct plcom_instance *pi = &sc->sc_pi; 676 struct tty *tp = sc->sc_tty; 677 mutex_spin_enter(&sc->sc_lock); 678 679 /* If we were asserting flow control, then deassert it. */ 680 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 681 plcom_hwiflow(sc); 682 683 /* Clear any break condition set with TIOCSBRK. */ 684 plcom_break(sc, 0); 685 686 /* Turn off PPS capture on last close. */ 687 mutex_spin_enter(&timecounter_lock); 688 sc->sc_ppsmask = 0; 689 sc->ppsparam.mode = 0; 690 mutex_spin_exit(&timecounter_lock); 691 692 /* 693 * Hang up if necessary. Wait a bit, so the other side has time to 694 * notice even if we immediately open the port again. 695 * Avoid tsleeping above splhigh(). 696 */ 697 if (ISSET(tp->t_cflag, HUPCL)) { 698 plcom_modem(sc, 0); 699 mutex_spin_exit(&sc->sc_lock); 700 /* XXX will only timeout */ 701 (void) kpause(ttclos, false, hz, NULL); 702 mutex_spin_enter(&sc->sc_lock); 703 } 704 705 sc->sc_cr = 0; 706 sc->sc_imsc = 0; 707 /* Turn off interrupts. */ 708 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 709 /* interrupt on break */ 710 711 sc->sc_cr = PL01X_CR_UARTEN; 712 sc->sc_imsc = 0; 713 switch (pi->pi_type) { 714 case PLCOM_TYPE_PL010: 715 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 716 break; 717 case PLCOM_TYPE_PL011: 718 SET(sc->sc_cr, PL011_CR_RXE); 719 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 720 break; 721 } 722 } 723 switch (pi->pi_type) { 724 case PLCOM_TYPE_PL010: 725 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 726 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 727 break; 728 case PLCOM_TYPE_PL011: 729 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 730 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 731 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 732 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 733 break; 734 } 735 736 mutex_spin_exit(&sc->sc_lock); 737 if (sc->disable) { 738 #ifdef DIAGNOSTIC 739 if (!sc->enabled) 740 panic("plcom_shutdown: not enabled?"); 741 #endif 742 (*sc->disable)(sc); 743 sc->enabled = 0; 744 } 745 } 746 747 int 748 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 749 { 750 struct plcom_softc *sc; 751 struct plcom_instance *pi; 752 struct tty *tp; 753 int s; 754 int error; 755 756 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 757 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 758 sc->sc_rbuf == NULL) 759 return ENXIO; 760 761 if (!device_is_active(sc->sc_dev)) 762 return ENXIO; 763 764 pi = &sc->sc_pi; 765 766 #ifdef KGDB 767 /* 768 * If this is the kgdb port, no other use is permitted. 769 */ 770 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 771 return EBUSY; 772 #endif 773 774 tp = sc->sc_tty; 775 776 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 777 return (EBUSY); 778 779 s = spltty(); 780 781 /* 782 * Do the following iff this is a first open. 783 */ 784 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 785 struct termios t; 786 787 tp->t_dev = dev; 788 789 if (sc->enable) { 790 if ((*sc->enable)(sc)) { 791 splx(s); 792 aprint_error_dev(sc->sc_dev, 793 "device enable failed\n"); 794 return EIO; 795 } 796 mutex_spin_enter(&sc->sc_lock); 797 sc->enabled = 1; 798 plcom_config(sc); 799 } else { 800 mutex_spin_enter(&sc->sc_lock); 801 } 802 803 /* Turn on interrupts. */ 804 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 805 /* Fetch the current modem control status, needed later. */ 806 sc->sc_cr = PL01X_CR_UARTEN; 807 switch (pi->pi_type) { 808 case PLCOM_TYPE_PL010: 809 SET(sc->sc_cr, 810 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 811 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 812 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 813 break; 814 case PLCOM_TYPE_PL011: 815 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 816 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 817 PL011_INT_MSMASK); 818 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 819 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 820 break; 821 } 822 823 /* Clear PPS capture state on first open. */ 824 825 mutex_spin_enter(&timecounter_lock); 826 sc->sc_ppsmask = 0; 827 sc->ppsparam.mode = 0; 828 mutex_spin_exit(&timecounter_lock); 829 830 mutex_spin_exit(&sc->sc_lock); 831 832 /* 833 * Initialize the termios status to the defaults. Add in the 834 * sticky bits from TIOCSFLAGS. 835 */ 836 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 837 t.c_ospeed = plcomconsrate; 838 t.c_cflag = plcomconscflag; 839 } else { 840 t.c_ospeed = TTYDEF_SPEED; 841 t.c_cflag = TTYDEF_CFLAG; 842 } 843 t.c_ispeed = t.c_ospeed; 844 845 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 846 SET(t.c_cflag, CLOCAL); 847 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 848 SET(t.c_cflag, CRTSCTS); 849 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 850 SET(t.c_cflag, MDMBUF); 851 /* Make sure plcomparam() will do something. */ 852 tp->t_ospeed = 0; 853 (void) plcomparam(tp, &t); 854 tp->t_iflag = TTYDEF_IFLAG; 855 tp->t_oflag = TTYDEF_OFLAG; 856 tp->t_lflag = TTYDEF_LFLAG; 857 ttychars(tp); 858 ttsetwater(tp); 859 860 mutex_spin_enter(&sc->sc_lock); 861 862 /* 863 * Turn on DTR. We must always do this, even if carrier is not 864 * present, because otherwise we'd have to use TIOCSDTR 865 * immediately after setting CLOCAL, which applications do not 866 * expect. We always assert DTR while the device is open 867 * unless explicitly requested to deassert it. 868 */ 869 plcom_modem(sc, 1); 870 871 /* Clear the input ring, and unblock. */ 872 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 873 sc->sc_rbavail = plcom_rbuf_size; 874 plcom_iflush(sc); 875 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 876 plcom_hwiflow(sc); 877 878 #ifdef PLCOM_DEBUG 879 if (plcom_debug) 880 plcomstatus(sc, "plcomopen "); 881 #endif 882 883 mutex_spin_exit(&sc->sc_lock); 884 } 885 886 splx(s); 887 888 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 889 if (error) 890 goto bad; 891 892 error = (*tp->t_linesw->l_open)(dev, tp); 893 if (error) 894 goto bad; 895 896 return 0; 897 898 bad: 899 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 900 /* 901 * We failed to open the device, and nobody else had it opened. 902 * Clean up the state as appropriate. 903 */ 904 plcom_shutdown(sc); 905 } 906 907 return error; 908 } 909 910 int 911 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 912 { 913 struct plcom_softc *sc = 914 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 915 struct tty *tp = sc->sc_tty; 916 917 /* XXX This is for cons.c. */ 918 if (!ISSET(tp->t_state, TS_ISOPEN)) 919 return 0; 920 921 (*tp->t_linesw->l_close)(tp, flag); 922 ttyclose(tp); 923 924 if (PLCOM_ISALIVE(sc) == 0) 925 return 0; 926 927 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 928 /* 929 * Although we got a last close, the device may still be in 930 * use; e.g. if this was the dialout node, and there are still 931 * processes waiting for carrier on the non-dialout node. 932 */ 933 plcom_shutdown(sc); 934 } 935 936 return 0; 937 } 938 939 int 940 plcomread(dev_t dev, struct uio *uio, int flag) 941 { 942 struct plcom_softc *sc = 943 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 944 struct tty *tp = sc->sc_tty; 945 946 if (PLCOM_ISALIVE(sc) == 0) 947 return EIO; 948 949 return (*tp->t_linesw->l_read)(tp, uio, flag); 950 } 951 952 int 953 plcomwrite(dev_t dev, struct uio *uio, int flag) 954 { 955 struct plcom_softc *sc = 956 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 957 struct tty *tp = sc->sc_tty; 958 959 if (PLCOM_ISALIVE(sc) == 0) 960 return EIO; 961 962 return (*tp->t_linesw->l_write)(tp, uio, flag); 963 } 964 965 int 966 plcompoll(dev_t dev, int events, struct lwp *l) 967 { 968 struct plcom_softc *sc = 969 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 970 struct tty *tp = sc->sc_tty; 971 972 if (PLCOM_ISALIVE(sc) == 0) 973 return EIO; 974 975 return (*tp->t_linesw->l_poll)(tp, events, l); 976 } 977 978 struct tty * 979 plcomtty(dev_t dev) 980 { 981 struct plcom_softc *sc = 982 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 983 struct tty *tp = sc->sc_tty; 984 985 return tp; 986 } 987 988 int 989 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 990 { 991 struct plcom_softc *sc = 992 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 993 struct tty *tp; 994 int error; 995 996 if (sc == NULL) 997 return ENXIO; 998 if (PLCOM_ISALIVE(sc) == 0) 999 return EIO; 1000 1001 tp = sc->sc_tty; 1002 1003 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1004 if (error != EPASSTHROUGH) 1005 return error; 1006 1007 error = ttioctl(tp, cmd, data, flag, l); 1008 if (error != EPASSTHROUGH) 1009 return error; 1010 1011 error = 0; 1012 switch (cmd) { 1013 case TIOCSFLAGS: 1014 error = kauth_authorize_device_tty(l->l_cred, 1015 KAUTH_DEVICE_TTY_PRIVSET, tp); 1016 break; 1017 default: 1018 /* nothing */ 1019 break; 1020 } 1021 if (error) { 1022 return error; 1023 } 1024 1025 mutex_spin_enter(&sc->sc_lock); 1026 switch (cmd) { 1027 case TIOCSBRK: 1028 plcom_break(sc, 1); 1029 break; 1030 1031 case TIOCCBRK: 1032 plcom_break(sc, 0); 1033 break; 1034 1035 case TIOCSDTR: 1036 plcom_modem(sc, 1); 1037 break; 1038 1039 case TIOCCDTR: 1040 plcom_modem(sc, 0); 1041 break; 1042 1043 case TIOCGFLAGS: 1044 *(int *)data = sc->sc_swflags; 1045 break; 1046 1047 case TIOCSFLAGS: 1048 sc->sc_swflags = *(int *)data; 1049 break; 1050 1051 case TIOCMSET: 1052 case TIOCMBIS: 1053 case TIOCMBIC: 1054 tiocm_to_plcom(sc, cmd, *(int *)data); 1055 break; 1056 1057 case TIOCMGET: 1058 *(int *)data = plcom_to_tiocm(sc); 1059 break; 1060 1061 case PPS_IOC_CREATE: 1062 break; 1063 1064 case PPS_IOC_DESTROY: 1065 break; 1066 1067 case PPS_IOC_GETPARAMS: { 1068 pps_params_t *pp; 1069 pp = (pps_params_t *)data; 1070 mutex_spin_enter(&timecounter_lock); 1071 *pp = sc->ppsparam; 1072 mutex_spin_exit(&timecounter_lock); 1073 break; 1074 } 1075 1076 case PPS_IOC_SETPARAMS: { 1077 pps_params_t *pp; 1078 int mode; 1079 pp = (pps_params_t *)data; 1080 mutex_spin_enter(&timecounter_lock); 1081 if (pp->mode & ~ppscap) { 1082 error = EINVAL; 1083 mutex_spin_exit(&timecounter_lock); 1084 break; 1085 } 1086 sc->ppsparam = *pp; 1087 /* 1088 * Compute msr masks from user-specified timestamp state. 1089 */ 1090 mode = sc->ppsparam.mode; 1091 #ifdef PPS_SYNC 1092 if (mode & PPS_HARDPPSONASSERT) { 1093 mode |= PPS_CAPTUREASSERT; 1094 /* XXX revoke any previous HARDPPS source */ 1095 } 1096 if (mode & PPS_HARDPPSONCLEAR) { 1097 mode |= PPS_CAPTURECLEAR; 1098 /* XXX revoke any previous HARDPPS source */ 1099 } 1100 #endif /* PPS_SYNC */ 1101 switch (mode & PPS_CAPTUREBOTH) { 1102 case 0: 1103 sc->sc_ppsmask = 0; 1104 break; 1105 1106 case PPS_CAPTUREASSERT: 1107 sc->sc_ppsmask = PL01X_MSR_DCD; 1108 sc->sc_ppsassert = PL01X_MSR_DCD; 1109 sc->sc_ppsclear = -1; 1110 break; 1111 1112 case PPS_CAPTURECLEAR: 1113 sc->sc_ppsmask = PL01X_MSR_DCD; 1114 sc->sc_ppsassert = -1; 1115 sc->sc_ppsclear = 0; 1116 break; 1117 1118 case PPS_CAPTUREBOTH: 1119 sc->sc_ppsmask = PL01X_MSR_DCD; 1120 sc->sc_ppsassert = PL01X_MSR_DCD; 1121 sc->sc_ppsclear = 0; 1122 break; 1123 1124 default: 1125 error = EINVAL; 1126 break; 1127 } 1128 mutex_spin_exit(&timecounter_lock); 1129 break; 1130 } 1131 1132 case PPS_IOC_GETCAP: 1133 *(int*)data = ppscap; 1134 break; 1135 1136 case PPS_IOC_FETCH: { 1137 pps_info_t *pi; 1138 pi = (pps_info_t *)data; 1139 mutex_spin_enter(&timecounter_lock); 1140 *pi = sc->ppsinfo; 1141 mutex_spin_exit(&timecounter_lock); 1142 break; 1143 } 1144 1145 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1146 /* 1147 * Some GPS clocks models use the falling rather than 1148 * rising edge as the on-the-second signal. 1149 * The old API has no way to specify PPS polarity. 1150 */ 1151 mutex_spin_enter(&timecounter_lock); 1152 sc->sc_ppsmask = PL01X_MSR_DCD; 1153 #ifndef PPS_TRAILING_EDGE 1154 sc->sc_ppsassert = PL01X_MSR_DCD; 1155 sc->sc_ppsclear = -1; 1156 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1157 &sc->ppsinfo.assert_timestamp); 1158 #else 1159 sc->sc_ppsassert = -1 1160 sc->sc_ppsclear = 0; 1161 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1162 &sc->ppsinfo.clear_timestamp); 1163 #endif 1164 mutex_spin_exit(&timecounter_lock); 1165 break; 1166 1167 default: 1168 error = EPASSTHROUGH; 1169 break; 1170 } 1171 1172 mutex_spin_exit(&sc->sc_lock); 1173 1174 #ifdef PLCOM_DEBUG 1175 if (plcom_debug) 1176 plcomstatus(sc, "plcomioctl "); 1177 #endif 1178 1179 return error; 1180 } 1181 1182 integrate void 1183 plcom_schedrx(struct plcom_softc *sc) 1184 { 1185 1186 sc->sc_rx_ready = 1; 1187 1188 /* Wake up the poller. */ 1189 softint_schedule(sc->sc_si); 1190 } 1191 1192 void 1193 plcom_break(struct plcom_softc *sc, int onoff) 1194 { 1195 1196 if (onoff) 1197 SET(sc->sc_lcr, PL01X_LCR_BRK); 1198 else 1199 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1200 1201 if (!sc->sc_heldchange) { 1202 if (sc->sc_tx_busy) { 1203 sc->sc_heldtbc = sc->sc_tbc; 1204 sc->sc_tbc = 0; 1205 sc->sc_heldchange = 1; 1206 } else 1207 plcom_loadchannelregs(sc); 1208 } 1209 } 1210 1211 void 1212 plcom_modem(struct plcom_softc *sc, int onoff) 1213 { 1214 1215 if (sc->sc_mcr_dtr == 0) 1216 return; 1217 1218 if (onoff) 1219 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1220 else 1221 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1222 1223 if (!sc->sc_heldchange) { 1224 if (sc->sc_tx_busy) { 1225 sc->sc_heldtbc = sc->sc_tbc; 1226 sc->sc_tbc = 0; 1227 sc->sc_heldchange = 1; 1228 } else 1229 plcom_loadchannelregs(sc); 1230 } 1231 } 1232 1233 void 1234 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1235 { 1236 u_char plcombits; 1237 1238 plcombits = 0; 1239 if (ISSET(ttybits, TIOCM_DTR)) 1240 SET(plcombits, PL01X_MCR_DTR); 1241 if (ISSET(ttybits, TIOCM_RTS)) 1242 SET(plcombits, PL01X_MCR_RTS); 1243 1244 switch (how) { 1245 case TIOCMBIC: 1246 CLR(sc->sc_mcr, plcombits); 1247 break; 1248 1249 case TIOCMBIS: 1250 SET(sc->sc_mcr, plcombits); 1251 break; 1252 1253 case TIOCMSET: 1254 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1255 SET(sc->sc_mcr, plcombits); 1256 break; 1257 } 1258 1259 if (!sc->sc_heldchange) { 1260 if (sc->sc_tx_busy) { 1261 sc->sc_heldtbc = sc->sc_tbc; 1262 sc->sc_tbc = 0; 1263 sc->sc_heldchange = 1; 1264 } else 1265 plcom_loadchannelregs(sc); 1266 } 1267 } 1268 1269 int 1270 plcom_to_tiocm(struct plcom_softc *sc) 1271 { 1272 u_char plcombits; 1273 int ttybits = 0; 1274 1275 plcombits = sc->sc_mcr; 1276 if (ISSET(plcombits, PL01X_MCR_DTR)) 1277 SET(ttybits, TIOCM_DTR); 1278 if (ISSET(plcombits, PL01X_MCR_RTS)) 1279 SET(ttybits, TIOCM_RTS); 1280 1281 plcombits = sc->sc_msr; 1282 if (ISSET(plcombits, PL01X_MSR_DCD)) 1283 SET(ttybits, TIOCM_CD); 1284 if (ISSET(plcombits, PL01X_MSR_CTS)) 1285 SET(ttybits, TIOCM_CTS); 1286 if (ISSET(plcombits, PL01X_MSR_DSR)) 1287 SET(ttybits, TIOCM_DSR); 1288 if (ISSET(plcombits, PL011_MSR_RI)) 1289 SET(ttybits, TIOCM_RI); 1290 1291 if (sc->sc_cr != 0) 1292 SET(ttybits, TIOCM_LE); 1293 1294 return ttybits; 1295 } 1296 1297 static u_char 1298 cflag2lcr(tcflag_t cflag) 1299 { 1300 u_char lcr = 0; 1301 1302 switch (ISSET(cflag, CSIZE)) { 1303 case CS5: 1304 SET(lcr, PL01X_LCR_5BITS); 1305 break; 1306 case CS6: 1307 SET(lcr, PL01X_LCR_6BITS); 1308 break; 1309 case CS7: 1310 SET(lcr, PL01X_LCR_7BITS); 1311 break; 1312 case CS8: 1313 SET(lcr, PL01X_LCR_8BITS); 1314 break; 1315 } 1316 if (ISSET(cflag, PARENB)) { 1317 SET(lcr, PL01X_LCR_PEN); 1318 if (!ISSET(cflag, PARODD)) 1319 SET(lcr, PL01X_LCR_EPS); 1320 } 1321 if (ISSET(cflag, CSTOPB)) 1322 SET(lcr, PL01X_LCR_STP2); 1323 1324 return lcr; 1325 } 1326 1327 int 1328 plcomparam(struct tty *tp, struct termios *t) 1329 { 1330 struct plcom_softc *sc = 1331 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1332 struct plcom_instance *pi = &sc->sc_pi; 1333 int ospeed = -1; 1334 u_char lcr; 1335 1336 if (PLCOM_ISALIVE(sc) == 0) 1337 return EIO; 1338 1339 switch (pi->pi_type) { 1340 case PLCOM_TYPE_PL010: 1341 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1342 break; 1343 case PLCOM_TYPE_PL011: 1344 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1345 break; 1346 } 1347 1348 /* Check requested parameters. */ 1349 if (ospeed < 0) 1350 return EINVAL; 1351 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1352 return EINVAL; 1353 1354 /* 1355 * For the console, always force CLOCAL and !HUPCL, so that the port 1356 * is always active. 1357 */ 1358 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1359 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1360 SET(t->c_cflag, CLOCAL); 1361 CLR(t->c_cflag, HUPCL); 1362 } 1363 1364 /* 1365 * If there were no changes, don't do anything. This avoids dropping 1366 * input and improves performance when all we did was frob things like 1367 * VMIN and VTIME. 1368 */ 1369 if (tp->t_ospeed == t->c_ospeed && 1370 tp->t_cflag == t->c_cflag) 1371 return 0; 1372 1373 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1374 1375 mutex_spin_enter(&sc->sc_lock); 1376 1377 sc->sc_lcr = lcr; 1378 1379 /* 1380 * PL010 has a fixed-length FIFO trigger point. 1381 */ 1382 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1383 sc->sc_fifo = 1; 1384 else 1385 sc->sc_fifo = 0; 1386 1387 if (sc->sc_fifo) 1388 SET(sc->sc_lcr, PL01X_LCR_FEN); 1389 1390 /* 1391 * If we're not in a mode that assumes a connection is present, then 1392 * ignore carrier changes. 1393 */ 1394 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1395 sc->sc_msr_dcd = 0; 1396 else 1397 sc->sc_msr_dcd = PL01X_MSR_DCD; 1398 /* 1399 * Set the flow control pins depending on the current flow control 1400 * mode. 1401 */ 1402 if (ISSET(t->c_cflag, CRTSCTS)) { 1403 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1404 sc->sc_mcr_rts = PL01X_MCR_RTS; 1405 sc->sc_msr_cts = PL01X_MSR_CTS; 1406 } else if (ISSET(t->c_cflag, MDMBUF)) { 1407 /* 1408 * For DTR/DCD flow control, make sure we don't toggle DTR for 1409 * carrier detection. 1410 */ 1411 sc->sc_mcr_dtr = 0; 1412 sc->sc_mcr_rts = PL01X_MCR_DTR; 1413 sc->sc_msr_cts = PL01X_MSR_DCD; 1414 } else { 1415 /* 1416 * If no flow control, then always set RTS. This will make 1417 * the other side happy if it mistakenly thinks we're doing 1418 * RTS/CTS flow control. 1419 */ 1420 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1421 sc->sc_mcr_rts = 0; 1422 sc->sc_msr_cts = 0; 1423 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1424 SET(sc->sc_mcr, PL01X_MCR_RTS); 1425 else 1426 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1427 } 1428 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1429 1430 #if 0 1431 if (ospeed == 0) 1432 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1433 else 1434 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1435 #endif 1436 1437 switch (pi->pi_type) { 1438 case PLCOM_TYPE_PL010: 1439 sc->sc_ratel = ospeed & 0xff; 1440 sc->sc_rateh = (ospeed >> 8) & 0xff; 1441 break; 1442 case PLCOM_TYPE_PL011: 1443 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1444 sc->sc_rateh = ospeed >> 6; 1445 break; 1446 } 1447 1448 /* And copy to tty. */ 1449 tp->t_ispeed = t->c_ospeed; 1450 tp->t_ospeed = t->c_ospeed; 1451 tp->t_cflag = t->c_cflag; 1452 1453 if (!sc->sc_heldchange) { 1454 if (sc->sc_tx_busy) { 1455 sc->sc_heldtbc = sc->sc_tbc; 1456 sc->sc_tbc = 0; 1457 sc->sc_heldchange = 1; 1458 } else 1459 plcom_loadchannelregs(sc); 1460 } 1461 1462 if (!ISSET(t->c_cflag, CHWFLOW)) { 1463 /* Disable the high water mark. */ 1464 sc->sc_r_hiwat = 0; 1465 sc->sc_r_lowat = 0; 1466 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1467 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1468 plcom_schedrx(sc); 1469 } 1470 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1471 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1472 plcom_hwiflow(sc); 1473 } 1474 } else { 1475 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1476 sc->sc_r_lowat = plcom_rbuf_lowat; 1477 } 1478 1479 mutex_spin_exit(&sc->sc_lock); 1480 1481 /* 1482 * Update the tty layer's idea of the carrier bit, in case we changed 1483 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1484 * explicit request. 1485 */ 1486 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1487 1488 #ifdef PLCOM_DEBUG 1489 if (plcom_debug) 1490 plcomstatus(sc, "plcomparam "); 1491 #endif 1492 1493 if (!ISSET(t->c_cflag, CHWFLOW)) { 1494 if (sc->sc_tx_stopped) { 1495 sc->sc_tx_stopped = 0; 1496 plcomstart(tp); 1497 } 1498 } 1499 1500 return 0; 1501 } 1502 1503 void 1504 plcom_iflush(struct plcom_softc *sc) 1505 { 1506 struct plcom_instance *pi = &sc->sc_pi; 1507 #ifdef DIAGNOSTIC 1508 int reg; 1509 #endif 1510 int timo; 1511 1512 #ifdef DIAGNOSTIC 1513 reg = 0xffff; 1514 #endif 1515 timo = 50000; 1516 /* flush any pending I/O */ 1517 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1518 && --timo) 1519 #ifdef DIAGNOSTIC 1520 reg = 1521 #else 1522 (void) 1523 #endif 1524 PREAD1(pi, PL01XCOM_DR); 1525 #ifdef DIAGNOSTIC 1526 if (!timo) 1527 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1528 reg); 1529 #endif 1530 } 1531 1532 void 1533 plcom_loadchannelregs(struct plcom_softc *sc) 1534 { 1535 struct plcom_instance *pi = &sc->sc_pi; 1536 1537 /* XXXXX necessary? */ 1538 plcom_iflush(sc); 1539 1540 switch (pi->pi_type) { 1541 case PLCOM_TYPE_PL010: 1542 PWRITE1(pi, PL010COM_CR, 0); 1543 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1544 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1545 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1546 1547 /* XXX device_unit() abuse */ 1548 if (sc->sc_set_mcr) 1549 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1550 device_unit(sc->sc_dev), 1551 sc->sc_mcr_active = sc->sc_mcr); 1552 1553 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1554 break; 1555 1556 case PLCOM_TYPE_PL011: 1557 PWRITE4(pi, PL011COM_CR, 0); 1558 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1559 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1560 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1561 sc->sc_mcr_active = sc->sc_mcr; 1562 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1563 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1564 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1565 break; 1566 } 1567 } 1568 1569 int 1570 plcomhwiflow(struct tty *tp, int block) 1571 { 1572 struct plcom_softc *sc = 1573 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1574 1575 if (PLCOM_ISALIVE(sc) == 0) 1576 return 0; 1577 1578 if (sc->sc_mcr_rts == 0) 1579 return 0; 1580 1581 mutex_spin_enter(&sc->sc_lock); 1582 1583 if (block) { 1584 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1585 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1586 plcom_hwiflow(sc); 1587 } 1588 } else { 1589 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1590 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1591 plcom_schedrx(sc); 1592 } 1593 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1594 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1595 plcom_hwiflow(sc); 1596 } 1597 } 1598 1599 mutex_spin_exit(&sc->sc_lock); 1600 return 1; 1601 } 1602 1603 /* 1604 * (un)block input via hw flowcontrol 1605 */ 1606 void 1607 plcom_hwiflow(struct plcom_softc *sc) 1608 { 1609 struct plcom_instance *pi = &sc->sc_pi; 1610 1611 if (sc->sc_mcr_rts == 0) 1612 return; 1613 1614 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1615 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1616 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1617 } else { 1618 SET(sc->sc_mcr, sc->sc_mcr_rts); 1619 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1620 } 1621 switch (pi->pi_type) { 1622 case PLCOM_TYPE_PL010: 1623 if (sc->sc_set_mcr) 1624 /* XXX device_unit() abuse */ 1625 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1626 device_unit(sc->sc_dev), sc->sc_mcr_active); 1627 break; 1628 case PLCOM_TYPE_PL011: 1629 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1630 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1631 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1632 break; 1633 } 1634 } 1635 1636 1637 void 1638 plcomstart(struct tty *tp) 1639 { 1640 struct plcom_softc *sc = 1641 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1642 struct plcom_instance *pi = &sc->sc_pi; 1643 int s; 1644 1645 if (PLCOM_ISALIVE(sc) == 0) 1646 return; 1647 1648 s = spltty(); 1649 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1650 goto out; 1651 if (sc->sc_tx_stopped) 1652 goto out; 1653 1654 if (!ttypull(tp)) 1655 goto out; 1656 1657 /* Grab the first contiguous region of buffer space. */ 1658 { 1659 u_char *tba; 1660 int tbc; 1661 1662 tba = tp->t_outq.c_cf; 1663 tbc = ndqb(&tp->t_outq, 0); 1664 1665 mutex_spin_enter(&sc->sc_lock); 1666 1667 sc->sc_tba = tba; 1668 sc->sc_tbc = tbc; 1669 } 1670 1671 SET(tp->t_state, TS_BUSY); 1672 sc->sc_tx_busy = 1; 1673 1674 /* Enable transmit completion interrupts if necessary. */ 1675 switch (pi->pi_type) { 1676 case PLCOM_TYPE_PL010: 1677 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1678 SET(sc->sc_cr, PL010_CR_TIE); 1679 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1680 } 1681 break; 1682 case PLCOM_TYPE_PL011: 1683 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1684 SET(sc->sc_imsc, PL011_INT_TX); 1685 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1686 } 1687 break; 1688 } 1689 1690 /* Output the first chunk of the contiguous buffer. */ 1691 { 1692 int n; 1693 1694 n = sc->sc_tbc; 1695 if (n > sc->sc_fifolen) 1696 n = sc->sc_fifolen; 1697 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1698 sc->sc_tbc -= n; 1699 sc->sc_tba += n; 1700 } 1701 mutex_spin_exit(&sc->sc_lock); 1702 out: 1703 splx(s); 1704 return; 1705 } 1706 1707 /* 1708 * Stop output on a line. 1709 */ 1710 void 1711 plcomstop(struct tty *tp, int flag) 1712 { 1713 struct plcom_softc *sc = 1714 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1715 1716 mutex_spin_enter(&sc->sc_lock); 1717 if (ISSET(tp->t_state, TS_BUSY)) { 1718 /* Stop transmitting at the next chunk. */ 1719 sc->sc_tbc = 0; 1720 sc->sc_heldtbc = 0; 1721 if (!ISSET(tp->t_state, TS_TTSTOP)) 1722 SET(tp->t_state, TS_FLUSH); 1723 } 1724 mutex_spin_exit(&sc->sc_lock); 1725 } 1726 1727 void 1728 plcomdiag(void *arg) 1729 { 1730 struct plcom_softc *sc = arg; 1731 int overflows, floods; 1732 1733 mutex_spin_enter(&sc->sc_lock); 1734 overflows = sc->sc_overflows; 1735 sc->sc_overflows = 0; 1736 floods = sc->sc_floods; 1737 sc->sc_floods = 0; 1738 sc->sc_errors = 0; 1739 mutex_spin_exit(&sc->sc_lock); 1740 1741 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1742 device_xname(sc->sc_dev), 1743 overflows, overflows == 1 ? "" : "s", 1744 floods, floods == 1 ? "" : "s"); 1745 } 1746 1747 integrate void 1748 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1749 { 1750 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1751 struct plcom_instance *pi = &sc->sc_pi; 1752 u_char *get, *end; 1753 u_int cc, scc; 1754 u_char rsr; 1755 int code; 1756 1757 end = sc->sc_ebuf; 1758 get = sc->sc_rbget; 1759 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1760 1761 if (cc == plcom_rbuf_size) { 1762 sc->sc_floods++; 1763 if (sc->sc_errors++ == 0) 1764 callout_reset(&sc->sc_diag_callout, 60 * hz, 1765 plcomdiag, sc); 1766 } 1767 1768 while (cc) { 1769 code = get[0]; 1770 rsr = get[1]; 1771 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1772 if (ISSET(rsr, PL01X_RSR_OE)) { 1773 sc->sc_overflows++; 1774 if (sc->sc_errors++ == 0) 1775 callout_reset(&sc->sc_diag_callout, 1776 60 * hz, plcomdiag, sc); 1777 } 1778 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1779 SET(code, TTY_FE); 1780 if (ISSET(rsr, PL01X_RSR_PE)) 1781 SET(code, TTY_PE); 1782 } 1783 if ((*rint)(code, tp) == -1) { 1784 /* 1785 * The line discipline's buffer is out of space. 1786 */ 1787 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1788 /* 1789 * We're either not using flow control, or the 1790 * line discipline didn't tell us to block for 1791 * some reason. Either way, we have no way to 1792 * know when there's more space available, so 1793 * just drop the rest of the data. 1794 */ 1795 get += cc << 1; 1796 if (get >= end) 1797 get -= plcom_rbuf_size << 1; 1798 cc = 0; 1799 } else { 1800 /* 1801 * Don't schedule any more receive processing 1802 * until the line discipline tells us there's 1803 * space available (through plcomhwiflow()). 1804 * Leave the rest of the data in the input 1805 * buffer. 1806 */ 1807 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1808 } 1809 break; 1810 } 1811 get += 2; 1812 if (get >= end) 1813 get = sc->sc_rbuf; 1814 cc--; 1815 } 1816 1817 if (cc != scc) { 1818 sc->sc_rbget = get; 1819 mutex_spin_enter(&sc->sc_lock); 1820 1821 cc = sc->sc_rbavail += scc - cc; 1822 /* Buffers should be ok again, release possible block. */ 1823 if (cc >= sc->sc_r_lowat) { 1824 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1825 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1826 switch (pi->pi_type) { 1827 case PLCOM_TYPE_PL010: 1828 SET(sc->sc_cr, 1829 PL010_CR_RIE | PL010_CR_RTIE); 1830 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1831 break; 1832 case PLCOM_TYPE_PL011: 1833 SET(sc->sc_imsc, 1834 PL011_INT_RX | PL011_INT_RT); 1835 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1836 break; 1837 } 1838 } 1839 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1840 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1841 plcom_hwiflow(sc); 1842 } 1843 } 1844 mutex_spin_exit(&sc->sc_lock); 1845 } 1846 } 1847 1848 integrate void 1849 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1850 { 1851 1852 CLR(tp->t_state, TS_BUSY); 1853 if (ISSET(tp->t_state, TS_FLUSH)) 1854 CLR(tp->t_state, TS_FLUSH); 1855 else 1856 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1857 (*tp->t_linesw->l_start)(tp); 1858 } 1859 1860 integrate void 1861 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1862 { 1863 u_char msr, delta; 1864 1865 mutex_spin_enter(&sc->sc_lock); 1866 msr = sc->sc_msr; 1867 delta = sc->sc_msr_delta; 1868 sc->sc_msr_delta = 0; 1869 mutex_spin_exit(&sc->sc_lock); 1870 1871 if (ISSET(delta, sc->sc_msr_dcd)) { 1872 /* 1873 * Inform the tty layer that carrier detect changed. 1874 */ 1875 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1876 } 1877 1878 if (ISSET(delta, sc->sc_msr_cts)) { 1879 /* Block or unblock output according to flow control. */ 1880 if (ISSET(msr, sc->sc_msr_cts)) { 1881 sc->sc_tx_stopped = 0; 1882 (*tp->t_linesw->l_start)(tp); 1883 } else { 1884 sc->sc_tx_stopped = 1; 1885 } 1886 } 1887 1888 #ifdef PLCOM_DEBUG 1889 if (plcom_debug) 1890 plcomstatus(sc, "plcom_stsoft"); 1891 #endif 1892 } 1893 1894 void 1895 plcomsoft(void *arg) 1896 { 1897 struct plcom_softc *sc = arg; 1898 struct tty *tp; 1899 1900 if (PLCOM_ISALIVE(sc) == 0) 1901 return; 1902 1903 tp = sc->sc_tty; 1904 1905 if (sc->sc_rx_ready) { 1906 sc->sc_rx_ready = 0; 1907 plcom_rxsoft(sc, tp); 1908 } 1909 1910 if (sc->sc_st_check) { 1911 sc->sc_st_check = 0; 1912 plcom_stsoft(sc, tp); 1913 } 1914 1915 if (sc->sc_tx_done) { 1916 sc->sc_tx_done = 0; 1917 plcom_txsoft(sc, tp); 1918 } 1919 } 1920 1921 bool 1922 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1923 { 1924 bool ret = false; 1925 u_int stat = 0; 1926 1927 switch (pi->pi_type) { 1928 case PLCOM_TYPE_PL010: 1929 stat = PREAD1(pi, PL010COM_IIR); 1930 ret = ISSET(stat, PL010_IIR_IMASK); 1931 break; 1932 case PLCOM_TYPE_PL011: 1933 stat = PREAD4(pi, PL011COM_MIS); 1934 ret = ISSET(stat, PL011_INT_ALLMASK); 1935 break; 1936 } 1937 *istatus = stat; 1938 1939 return ret; 1940 } 1941 1942 int 1943 plcomintr(void *arg) 1944 { 1945 struct plcom_softc *sc = arg; 1946 struct plcom_instance *pi = &sc->sc_pi; 1947 u_char *put, *end; 1948 u_int cc; 1949 u_int istatus = 0; 1950 u_char rsr; 1951 bool intr = false; 1952 1953 PLCOM_BARRIER(pi, BR | BW); 1954 1955 if (PLCOM_ISALIVE(sc) == 0) 1956 return 0; 1957 1958 mutex_spin_enter(&sc->sc_lock); 1959 intr = plcom_intstatus(pi, &istatus); 1960 if (!intr) { 1961 mutex_spin_exit(&sc->sc_lock); 1962 return 0; 1963 } 1964 1965 end = sc->sc_ebuf; 1966 put = sc->sc_rbput; 1967 cc = sc->sc_rbavail; 1968 1969 do { 1970 u_int msr = 0, delta, fr; 1971 bool rxintr = false, txintr = false, msintr; 1972 1973 /* don't need RI here*/ 1974 fr = PREAD1(pi, PL01XCOM_FR); 1975 1976 if (!ISSET(fr, PL01X_FR_RXFE) && 1977 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1978 while (cc > 0) { 1979 int cn_trapped = 0; 1980 put[0] = PREAD1(pi, PL01XCOM_DR); 1981 rsr = PREAD1(pi, PL01XCOM_RSR); 1982 /* Clear any error status. */ 1983 if (ISSET(rsr, PL01X_RSR_ERROR)) 1984 PWRITE1(pi, PL01XCOM_ECR, 0); 1985 if (ISSET(rsr, PL01X_RSR_BE)) { 1986 cn_trapped = 0; 1987 cn_check_magic(sc->sc_tty->t_dev, 1988 CNC_BREAK, plcom_cnm_state); 1989 if (cn_trapped) 1990 continue; 1991 #if defined(KGDB) 1992 if (ISSET(sc->sc_hwflags, 1993 PLCOM_HW_KGDB)) { 1994 kgdb_connect(1); 1995 continue; 1996 } 1997 #endif 1998 } 1999 2000 put[1] = rsr; 2001 cn_trapped = 0; 2002 cn_check_magic(sc->sc_tty->t_dev, put[0], 2003 plcom_cnm_state); 2004 if (cn_trapped) { 2005 fr = PREAD1(pi, PL01XCOM_FR); 2006 if (ISSET(fr, PL01X_FR_RXFE)) 2007 break; 2008 2009 continue; 2010 } 2011 put += 2; 2012 if (put >= end) 2013 put = sc->sc_rbuf; 2014 cc--; 2015 2016 /* don't need RI here*/ 2017 fr = PREAD1(pi, PL01XCOM_FR); 2018 if (ISSET(fr, PL01X_FR_RXFE)) 2019 break; 2020 } 2021 2022 /* 2023 * Current string of incoming characters ended because 2024 * no more data was available or we ran out of space. 2025 * Schedule a receive event if any data was received. 2026 * If we're out of space, turn off receive interrupts. 2027 */ 2028 sc->sc_rbput = put; 2029 sc->sc_rbavail = cc; 2030 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2031 sc->sc_rx_ready = 1; 2032 2033 /* 2034 * See if we are in danger of overflowing a buffer. If 2035 * so, use hardware flow control to ease the pressure. 2036 */ 2037 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2038 cc < sc->sc_r_hiwat) { 2039 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2040 plcom_hwiflow(sc); 2041 } 2042 2043 /* 2044 * If we're out of space, disable receive interrupts 2045 * until the queue has drained a bit. 2046 */ 2047 if (!cc) { 2048 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2049 switch (pi->pi_type) { 2050 case PLCOM_TYPE_PL010: 2051 CLR(sc->sc_cr, 2052 PL010_CR_RIE | PL010_CR_RTIE); 2053 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2054 break; 2055 case PLCOM_TYPE_PL011: 2056 CLR(sc->sc_imsc, 2057 PL011_INT_RT | PL011_INT_RX); 2058 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2059 break; 2060 } 2061 } 2062 } else { 2063 switch (pi->pi_type) { 2064 case PLCOM_TYPE_PL010: 2065 rxintr = ISSET(istatus, PL010_IIR_RIS); 2066 if (rxintr) { 2067 PWRITE1(pi, PL010COM_CR, 0); 2068 delay(10); 2069 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2070 continue; 2071 } 2072 break; 2073 case PLCOM_TYPE_PL011: 2074 rxintr = ISSET(istatus, PL011_INT_RX); 2075 if (rxintr) { 2076 PWRITE4(pi, PL011COM_CR, 0); 2077 delay(10); 2078 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2079 continue; 2080 } 2081 break; 2082 } 2083 } 2084 2085 switch (pi->pi_type) { 2086 case PLCOM_TYPE_PL010: 2087 msr = PREAD1(pi, PL01XCOM_FR); 2088 break; 2089 case PLCOM_TYPE_PL011: 2090 msr = PREAD4(pi, PL01XCOM_FR); 2091 break; 2092 } 2093 delta = msr ^ sc->sc_msr; 2094 sc->sc_msr = msr; 2095 2096 /* Clear any pending modem status interrupt. */ 2097 switch (pi->pi_type) { 2098 case PLCOM_TYPE_PL010: 2099 msintr = ISSET(istatus, PL010_IIR_MIS); 2100 if (msintr) { 2101 PWRITE1(pi, PL010COM_ICR, 0); 2102 } 2103 break; 2104 case PLCOM_TYPE_PL011: 2105 msintr = ISSET(istatus, PL011_INT_MSMASK); 2106 if (msintr) { 2107 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2108 } 2109 break; 2110 } 2111 /* 2112 * Pulse-per-second (PSS) signals on edge of DCD? 2113 * Process these even if line discipline is ignoring DCD. 2114 */ 2115 if (delta & sc->sc_ppsmask) { 2116 struct timeval tv; 2117 mutex_spin_enter(&timecounter_lock); 2118 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2119 /* XXX nanotime() */ 2120 microtime(&tv); 2121 TIMEVAL_TO_TIMESPEC(&tv, 2122 &sc->ppsinfo.assert_timestamp); 2123 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2124 timespecadd(&sc->ppsinfo.assert_timestamp, 2125 &sc->ppsparam.assert_offset, 2126 &sc->ppsinfo.assert_timestamp); 2127 } 2128 2129 #ifdef PPS_SYNC 2130 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2131 hardpps(&tv, tv.tv_usec); 2132 #endif 2133 sc->ppsinfo.assert_sequence++; 2134 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2135 2136 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2137 /* XXX nanotime() */ 2138 microtime(&tv); 2139 TIMEVAL_TO_TIMESPEC(&tv, 2140 &sc->ppsinfo.clear_timestamp); 2141 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2142 timespecadd(&sc->ppsinfo.clear_timestamp, 2143 &sc->ppsparam.clear_offset, 2144 &sc->ppsinfo.clear_timestamp); 2145 } 2146 2147 #ifdef PPS_SYNC 2148 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2149 hardpps(&tv, tv.tv_usec); 2150 #endif 2151 sc->ppsinfo.clear_sequence++; 2152 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2153 } 2154 mutex_spin_exit(&timecounter_lock); 2155 } 2156 2157 /* 2158 * Process normal status changes 2159 */ 2160 if (ISSET(delta, sc->sc_msr_mask)) { 2161 SET(sc->sc_msr_delta, delta); 2162 2163 /* 2164 * Stop output immediately if we lose the output 2165 * flow control signal or carrier detect. 2166 */ 2167 if (ISSET(~msr, sc->sc_msr_mask)) { 2168 sc->sc_tbc = 0; 2169 sc->sc_heldtbc = 0; 2170 #ifdef PLCOM_DEBUG 2171 if (plcom_debug) 2172 plcomstatus(sc, "plcomintr "); 2173 #endif 2174 } 2175 2176 sc->sc_st_check = 1; 2177 } 2178 2179 /* 2180 * Done handling any receive interrupts. See if data 2181 * can be transmitted as well. Schedule tx done 2182 * event if no data left and tty was marked busy. 2183 */ 2184 2185 switch (pi->pi_type) { 2186 case PLCOM_TYPE_PL010: 2187 txintr = ISSET(istatus, PL010_IIR_TIS); 2188 break; 2189 case PLCOM_TYPE_PL011: 2190 txintr = ISSET(istatus, PL011_INT_TX); 2191 break; 2192 } 2193 if (txintr) { 2194 /* 2195 * If we've delayed a parameter change, do it 2196 * now, and restart * output. 2197 */ 2198 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2199 if (sc->sc_heldchange) { 2200 plcom_loadchannelregs(sc); 2201 sc->sc_heldchange = 0; 2202 sc->sc_tbc = sc->sc_heldtbc; 2203 sc->sc_heldtbc = 0; 2204 } 2205 2206 /* 2207 * Output the next chunk of the contiguous 2208 * buffer, if any. 2209 */ 2210 if (sc->sc_tbc > 0) { 2211 int n; 2212 2213 n = sc->sc_tbc; 2214 if (n > sc->sc_fifolen) 2215 n = sc->sc_fifolen; 2216 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2217 sc->sc_tbc -= n; 2218 sc->sc_tba += n; 2219 } else { 2220 /* 2221 * Disable transmit completion 2222 * interrupts if necessary. 2223 */ 2224 switch (pi->pi_type) { 2225 case PLCOM_TYPE_PL010: 2226 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2227 CLR(sc->sc_cr, PL010_CR_TIE); 2228 PWRITE1(pi, PL010COM_CR, 2229 sc->sc_cr); 2230 } 2231 break; 2232 case PLCOM_TYPE_PL011: 2233 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2234 CLR(sc->sc_imsc, PL011_INT_TX); 2235 PWRITE4(pi, PL011COM_IMSC, 2236 sc->sc_imsc); 2237 } 2238 break; 2239 } 2240 if (sc->sc_tx_busy) { 2241 sc->sc_tx_busy = 0; 2242 sc->sc_tx_done = 1; 2243 } 2244 } 2245 } 2246 2247 } while (plcom_intstatus(pi, &istatus)); 2248 2249 mutex_spin_exit(&sc->sc_lock); 2250 2251 /* Wake up the poller. */ 2252 softint_schedule(sc->sc_si); 2253 2254 #ifdef RND_COM 2255 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2256 #endif 2257 2258 PLCOM_BARRIER(pi, BR | BW); 2259 2260 return 1; 2261 } 2262 2263 /* 2264 * The following functions are polled getc and putc routines, shared 2265 * by the console and kgdb glue. 2266 * 2267 * The read-ahead code is so that you can detect pending in-band 2268 * cn_magic in polled mode while doing output rather than having to 2269 * wait until the kernel decides it needs input. 2270 */ 2271 2272 #define MAX_READAHEAD 20 2273 static int plcom_readahead[MAX_READAHEAD]; 2274 static int plcom_readaheadcount = 0; 2275 2276 int 2277 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2278 { 2279 int s = splserial(); 2280 u_char stat, c; 2281 2282 /* got a character from reading things earlier */ 2283 if (plcom_readaheadcount > 0) { 2284 int i; 2285 2286 c = plcom_readahead[0]; 2287 for (i = 1; i < plcom_readaheadcount; i++) { 2288 plcom_readahead[i-1] = plcom_readahead[i]; 2289 } 2290 plcom_readaheadcount--; 2291 splx(s); 2292 return c; 2293 } 2294 2295 /* block until a character becomes available */ 2296 while (ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) 2297 ; 2298 2299 c = PREAD1(pi, PL01XCOM_DR); 2300 { 2301 int cn_trapped __unused = 0; 2302 #ifdef DDB 2303 extern int db_active; 2304 if (!db_active) 2305 #endif 2306 cn_check_magic(dev, c, plcom_cnm_state); 2307 } 2308 splx(s); 2309 return c; 2310 } 2311 2312 void 2313 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2314 { 2315 int s = splserial(); 2316 int timo; 2317 2318 int cin, stat; 2319 if (plcom_readaheadcount < MAX_READAHEAD 2320 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2321 int cn_trapped __unused = 0; 2322 cin = PREAD1(pi, PL01XCOM_DR); 2323 cn_check_magic(dev, cin, plcom_cnm_state); 2324 plcom_readahead[plcom_readaheadcount++] = cin; 2325 } 2326 2327 /* wait for any pending transmission to finish */ 2328 timo = 150000; 2329 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2330 continue; 2331 2332 PWRITE1(pi, PL01XCOM_DR, c); 2333 PLCOM_BARRIER(pi, BR | BW); 2334 2335 /* wait for this transmission to complete */ 2336 timo = 1500000; 2337 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2338 continue; 2339 2340 splx(s); 2341 } 2342 2343 /* 2344 * Initialize UART for use as console or KGDB line. 2345 */ 2346 int 2347 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2348 { 2349 u_char lcr; 2350 2351 switch (pi->pi_type) { 2352 case PLCOM_TYPE_PL010: 2353 if (pi->pi_size == 0) 2354 pi->pi_size = PL010COM_UART_SIZE; 2355 break; 2356 case PLCOM_TYPE_PL011: 2357 if (pi->pi_size == 0) 2358 pi->pi_size = PL011COM_UART_SIZE; 2359 break; 2360 default: 2361 panic("Unknown plcom type"); 2362 } 2363 2364 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2365 &pi->pi_ioh)) 2366 return ENOMEM; /* ??? */ 2367 2368 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2369 switch (pi->pi_type) { 2370 case PLCOM_TYPE_PL010: 2371 PWRITE1(pi, PL010COM_CR, 0); 2372 2373 rate = pl010comspeed(rate, frequency); 2374 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2375 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2376 PWRITE1(pi, PL010COM_LCR, lcr); 2377 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2378 break; 2379 case PLCOM_TYPE_PL011: 2380 PWRITE4(pi, PL011COM_CR, 0); 2381 2382 rate = pl011comspeed(rate, frequency); 2383 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2384 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2385 PWRITE1(pi, PL011COM_LCRH, lcr); 2386 PWRITE4(pi, PL011COM_CR, 2387 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2388 break; 2389 } 2390 2391 #if 0 2392 /* Ought to do something like this, but we have no sc to 2393 dereference. */ 2394 /* XXX device_unit() abuse */ 2395 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2396 PL01X_MCR_DTR | PL01X_MCR_RTS); 2397 #endif 2398 2399 return 0; 2400 } 2401 2402 /* 2403 * Following are all routines needed for PLCOM to act as console 2404 */ 2405 struct consdev plcomcons = { 2406 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2407 NULL, NULL, NODEV, CN_NORMAL 2408 }; 2409 2410 int 2411 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2412 tcflag_t cflag, int unit) 2413 { 2414 int res; 2415 2416 plcomcons_info = *pi; 2417 2418 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2419 if (res) 2420 return res; 2421 2422 cn_tab = &plcomcons; 2423 cn_init_magic(&plcom_cnm_state); 2424 cn_set_magic("\047\001"); /* default magic is BREAK */ 2425 2426 plcomconsunit = unit; 2427 plcomconsrate = rate; 2428 plcomconscflag = cflag; 2429 2430 return 0; 2431 } 2432 2433 void 2434 plcomcndetach(void) 2435 { 2436 2437 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2438 plcomcons_info.pi_size); 2439 plcomcons_info.pi_iot = NULL; 2440 2441 cn_tab = NULL; 2442 } 2443 2444 int 2445 plcomcngetc(dev_t dev) 2446 { 2447 return plcom_common_getc(dev, &plcomcons_info); 2448 } 2449 2450 /* 2451 * Console kernel output character routine. 2452 */ 2453 void 2454 plcomcnputc(dev_t dev, int c) 2455 { 2456 plcom_common_putc(dev, &plcomcons_info, c); 2457 } 2458 2459 void 2460 plcomcnpollc(dev_t dev, int on) 2461 { 2462 2463 plcom_readaheadcount = 0; 2464 } 2465 2466 #ifdef KGDB 2467 int 2468 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2469 tcflag_t cflag, int unit) 2470 { 2471 int res; 2472 2473 if (pi->pi_iot == plcomcons_info.pi_iot && 2474 pi->pi_iobase == plcomcons_info.pi_iobase) 2475 return EBUSY; /* cannot share with console */ 2476 2477 res = plcominit(pi, rate, frequency, cflag); 2478 if (res) 2479 return res; 2480 2481 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2482 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2483 2484 plcomkgdb_info.pi_iot = pi->pi_iot; 2485 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2486 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2487 2488 return 0; 2489 } 2490 2491 /* ARGSUSED */ 2492 int 2493 plcom_kgdb_getc(void *arg) 2494 { 2495 return plcom_common_getc(NODEV, &plcomkgdb_info); 2496 } 2497 2498 /* ARGSUSED */ 2499 void 2500 plcom_kgdb_putc(void *arg, int c) 2501 { 2502 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2503 } 2504 #endif /* KGDB */ 2505 2506 /* helper function to identify the plcom ports used by 2507 console or KGDB (and not yet autoconf attached) */ 2508 int 2509 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2510 bus_space_handle_t *ioh) 2511 { 2512 bus_space_handle_t help; 2513 2514 if (!plcomconsattached && 2515 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2516 iobase == plcomcons_info.pi_iobase) 2517 help = plcomcons_info.pi_ioh; 2518 #ifdef KGDB 2519 else if (!plcom_kgdb_attached && 2520 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2521 iobase == plcomkgdb_info.pi_iobase) 2522 help = plcomkgdb_info.pi_ioh; 2523 #endif 2524 else 2525 return 0; 2526 2527 if (ioh) 2528 *ioh = help; 2529 return 1; 2530 } 2531
Indexes created Fri Sep 26 20:09:58 GMT 2025