plcom.c revision 1.55
1 /* $NetBSD: plcom.c,v 1.55 2018/10/12 23:57:00 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.55 2018/10/12 23:57:00 jmcneill Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 /* 106 * Override cnmagic(9) macro before including <sys/systm.h>. 107 * We need to know if cn_check_magic triggered debugger, so set a flag. 108 * Callers of cn_check_magic must declare int cn_trapped = 0; 109 * XXX: this is *ugly*! 110 */ 111 #define cn_trap() \ 112 do { \ 113 console_debugger(); \ 114 cn_trapped = 1; \ 115 } while (/* CONSTCOND */ 0) 116 117 #include <sys/param.h> 118 #include <sys/systm.h> 119 #include <sys/ioctl.h> 120 #include <sys/select.h> 121 #include <sys/tty.h> 122 #include <sys/proc.h> 123 #include <sys/conf.h> 124 #include <sys/file.h> 125 #include <sys/uio.h> 126 #include <sys/kernel.h> 127 #include <sys/syslog.h> 128 #include <sys/types.h> 129 #include <sys/device.h> 130 #include <sys/malloc.h> 131 #include <sys/timepps.h> 132 #include <sys/vnode.h> 133 #include <sys/kauth.h> 134 #include <sys/intr.h> 135 #include <sys/bus.h> 136 #ifdef RND_COM 137 #include <sys/rndsource.h> 138 #endif 139 140 #include <evbarm/dev/plcomreg.h> 141 #include <evbarm/dev/plcomvar.h> 142 143 #include <dev/cons.h> 144 145 static void plcom_enable_debugport (struct plcom_softc *); 146 147 void plcom_config (struct plcom_softc *); 148 void plcom_shutdown (struct plcom_softc *); 149 int pl010comspeed (long, long); 150 int pl011comspeed (long, long); 151 static u_char cflag2lcr (tcflag_t); 152 int plcomparam (struct tty *, struct termios *); 153 void plcomstart (struct tty *); 154 int plcomhwiflow (struct tty *, int); 155 156 void plcom_loadchannelregs (struct plcom_softc *); 157 void plcom_hwiflow (struct plcom_softc *); 158 void plcom_break (struct plcom_softc *, int); 159 void plcom_modem (struct plcom_softc *, int); 160 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 161 int plcom_to_tiocm (struct plcom_softc *); 162 void plcom_iflush (struct plcom_softc *); 163 164 int plcom_common_getc (dev_t, struct plcom_instance *); 165 void plcom_common_putc (dev_t, struct plcom_instance *, int); 166 167 int plcominit (struct plcom_instance *, int, int, tcflag_t); 168 169 dev_type_open(plcomopen); 170 dev_type_close(plcomclose); 171 dev_type_read(plcomread); 172 dev_type_write(plcomwrite); 173 dev_type_ioctl(plcomioctl); 174 dev_type_stop(plcomstop); 175 dev_type_tty(plcomtty); 176 dev_type_poll(plcompoll); 177 178 int plcomcngetc (dev_t); 179 void plcomcnputc (dev_t, int); 180 void plcomcnpollc (dev_t, int); 181 182 #define integrate static inline 183 void plcomsoft (void *); 184 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 185 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 186 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_schedrx (struct plcom_softc *); 188 void plcomdiag (void *); 189 190 bool plcom_intstatus(struct plcom_instance *, u_int *); 191 192 extern struct cfdriver plcom_cd; 193 194 const struct cdevsw plcom_cdevsw = { 195 .d_open = plcomopen, 196 .d_close = plcomclose, 197 .d_read = plcomread, 198 .d_write = plcomwrite, 199 .d_ioctl = plcomioctl, 200 .d_stop = plcomstop, 201 .d_tty = plcomtty, 202 .d_poll = plcompoll, 203 .d_mmap = nommap, 204 .d_kqfilter = ttykqfilter, 205 .d_discard = nodiscard, 206 .d_flag = D_TTY 207 }; 208 209 /* 210 * Make this an option variable one can patch. 211 * But be warned: this must be a power of 2! 212 */ 213 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 214 215 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 216 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 217 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 218 219 static int plcomconsunit = -1; 220 static struct plcom_instance plcomcons_info; 221 222 static int plcomconsattached; 223 static int plcomconsrate; 224 static tcflag_t plcomconscflag; 225 static struct cnm_state plcom_cnm_state; 226 227 static int ppscap = 228 PPS_TSFMT_TSPEC | 229 PPS_CAPTUREASSERT | 230 PPS_CAPTURECLEAR | 231 #ifdef PPS_SYNC 232 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 233 #endif /* PPS_SYNC */ 234 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 235 236 #ifdef KGDB 237 #include <sys/kgdb.h> 238 239 static struct plcom_instance plcomkgdb_info; 240 static int plcom_kgdb_attached; 241 242 int plcom_kgdb_getc (void *); 243 void plcom_kgdb_putc (void *, int); 244 #endif /* KGDB */ 245 246 #define PLCOMDIALOUT_MASK TTDIALOUT_MASK 247 248 #define PLCOMUNIT(x) TTUNIT(x) 249 #define PLCOMDIALOUT(x) TTDIALOUT(x) 250 251 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 device_is_active((sc)->sc_dev)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define PLCOM_BARRIER(pi, f) \ 257 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 258 259 static uint8_t 260 pread1(struct plcom_instance *pi, bus_size_t reg) 261 { 262 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 263 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 264 265 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 266 (8 * (reg & 3)); 267 } 268 int nhcr; 269 static void 270 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 271 { 272 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 273 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 274 } else { 275 const size_t shift = 8 * (o & 3); 276 o &= -4; 277 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 278 tmp = (val << shift) | (tmp & ~(0xff << shift)); 279 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 280 } 281 } 282 283 static void 284 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 285 bus_size_t count) 286 { 287 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 288 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 289 } else { 290 KASSERT((o & 3) == 0); 291 while (count--) { 292 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 293 }; 294 } 295 } 296 297 #define PREAD1(pi, reg) pread1(pi, reg) 298 #define PREAD4(pi, reg) \ 299 (bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))) 300 301 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 302 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 303 #define PWRITE4(pi, reg, val) \ 304 (bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))) 305 306 int 307 pl010comspeed(long speed, long frequency) 308 { 309 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 310 311 int x, err; 312 313 #if 0 314 if (speed == 0) 315 return 0; 316 #endif 317 if (speed <= 0) 318 return -1; 319 x = divrnd(frequency / 16, speed); 320 if (x <= 0) 321 return -1; 322 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 323 if (err < 0) 324 err = -err; 325 if (err > PLCOM_TOLERANCE) 326 return -1; 327 return x; 328 329 #undef divrnd 330 } 331 332 int 333 pl011comspeed(long speed, long frequency) 334 { 335 int denom = 16 * speed; 336 int div = frequency / denom; 337 int rem = frequency % denom; 338 339 int ibrd = div << 6; 340 int fbrd = (((8 * rem) / speed) + 1) / 2; 341 342 /* Tolerance? */ 343 return ibrd | fbrd; 344 } 345 346 #ifdef PLCOM_DEBUG 347 int plcom_debug = 0; 348 349 void plcomstatus (struct plcom_softc *, const char *); 350 void 351 plcomstatus(struct plcom_softc *sc, const char *str) 352 { 353 struct tty *tp = sc->sc_tty; 354 355 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 356 device_xname(sc->sc_dev), str, 357 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 358 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 359 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 360 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 361 sc->sc_tx_stopped ? "+" : "-"); 362 363 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 364 device_xname(sc->sc_dev), str, 365 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 366 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 367 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 368 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 369 sc->sc_rx_flags); 370 } 371 #endif 372 373 #if 0 374 int 375 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 376 { 377 int data; 378 379 /* Disable the UART. */ 380 bus_space_write_1(iot, ioh, plcom_cr, 0); 381 /* Make sure the FIFO is off. */ 382 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 383 /* Disable interrupts. */ 384 bus_space_write_1(iot, ioh, plcom_iir, 0); 385 386 /* Make sure we swallow anything in the receiving register. */ 387 data = bus_space_read_1(iot, ioh, plcom_dr); 388 389 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 390 return 0; 391 392 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 393 394 if (data != PL01X_FR_RXFE) 395 return 0; 396 397 return 1; 398 } 399 #endif 400 401 /* 402 * No locking in this routine; it is only called during attach, 403 * or with the port already locked. 404 */ 405 static void 406 plcom_enable_debugport(struct plcom_softc *sc) 407 { 408 struct plcom_instance *pi = &sc->sc_pi; 409 410 sc->sc_cr = PL01X_CR_UARTEN; 411 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 412 413 /* Turn on line break interrupt, set carrier. */ 414 switch (pi->pi_type) { 415 case PLCOM_TYPE_PL010: 416 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 417 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 418 if (sc->sc_set_mcr) { 419 /* XXX device_unit() abuse */ 420 sc->sc_set_mcr(sc->sc_set_mcr_arg, 421 device_unit(sc->sc_dev), sc->sc_mcr); 422 } 423 break; 424 case PLCOM_TYPE_PL011: 425 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 426 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 427 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 428 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 429 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 430 break; 431 } 432 433 } 434 435 void 436 plcom_attach_subr(struct plcom_softc *sc) 437 { 438 struct plcom_instance *pi = &sc->sc_pi; 439 struct tty *tp; 440 441 aprint_naive("\n"); 442 443 callout_init(&sc->sc_diag_callout, 0); 444 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 445 446 switch (pi->pi_type) { 447 case PLCOM_TYPE_PL010: 448 case PLCOM_TYPE_PL011: 449 break; 450 default: 451 aprint_error_dev(sc->sc_dev, 452 "Unknown plcom type: %d\n", pi->pi_type); 453 return; 454 } 455 456 /* Disable interrupts before configuring the device. */ 457 sc->sc_cr = 0; 458 sc->sc_imsc = 0; 459 460 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 461 pi->pi_iobase == plcomcons_info.pi_iobase) { 462 plcomconsattached = 1; 463 464 /* Make sure the console is always "hardwired". */ 465 delay(1000); /* wait for output to finish */ 466 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 467 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 468 /* 469 * Must re-enable the console immediately, or we will 470 * hang when trying to print. 471 */ 472 sc->sc_cr = PL01X_CR_UARTEN; 473 if (pi->pi_type == PLCOM_TYPE_PL011) 474 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 475 } 476 477 switch (pi->pi_type) { 478 case PLCOM_TYPE_PL010: 479 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 480 break; 481 482 case PLCOM_TYPE_PL011: 483 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 484 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 485 break; 486 } 487 488 if (sc->sc_fifolen == 0) { 489 switch (pi->pi_type) { 490 case PLCOM_TYPE_PL010: 491 /* 492 * The PL010 has a 16-byte fifo, but the tx interrupt 493 * triggers when there is space for 8 more bytes. 494 */ 495 sc->sc_fifolen = 8; 496 break; 497 case PLCOM_TYPE_PL011: 498 /* Some revisions have a 32 byte TX FIFO */ 499 sc->sc_fifolen = 16; 500 break; 501 } 502 } 503 aprint_normal("\n"); 504 505 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 506 sc->sc_fifolen = 1; 507 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 508 } 509 510 if (sc->sc_fifolen > 1) 511 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 512 513 tp = tty_alloc(); 514 tp->t_oproc = plcomstart; 515 tp->t_param = plcomparam; 516 tp->t_hwiflow = plcomhwiflow; 517 518 sc->sc_tty = tp; 519 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 520 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 521 sc->sc_rbavail = plcom_rbuf_size; 522 if (sc->sc_rbuf == NULL) { 523 aprint_error_dev(sc->sc_dev, 524 "unable to allocate ring buffer\n"); 525 return; 526 } 527 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 528 529 tty_attach(tp); 530 531 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 532 int maj; 533 534 /* locate the major number */ 535 maj = cdevsw_lookup_major(&plcom_cdevsw); 536 537 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 538 539 aprint_normal_dev(sc->sc_dev, "console\n"); 540 } 541 542 #ifdef KGDB 543 /* 544 * Allow kgdb to "take over" this port. If this is 545 * the kgdb device, it has exclusive use. 546 */ 547 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 548 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 549 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 550 plcom_kgdb_attached = 1; 551 552 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 553 } 554 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 555 } 556 #endif 557 558 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 559 560 #ifdef RND_COM 561 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 562 RND_TYPE_TTY, RND_FLAG_DEFAULT); 563 #endif 564 565 /* 566 * if there are no enable/disable functions, assume the device 567 * is always enabled 568 */ 569 if (!sc->enable) 570 sc->enabled = 1; 571 572 plcom_config(sc); 573 574 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 575 } 576 577 void 578 plcom_config(struct plcom_softc *sc) 579 { 580 struct plcom_instance *pi = &sc->sc_pi; 581 582 /* Disable interrupts before configuring the device. */ 583 sc->sc_cr = 0; 584 sc->sc_imsc = 0; 585 switch (pi->pi_type) { 586 case PLCOM_TYPE_PL010: 587 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 588 break; 589 590 case PLCOM_TYPE_PL011: 591 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 592 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 593 break; 594 } 595 596 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 597 plcom_enable_debugport(sc); 598 } 599 600 int 601 plcom_detach(device_t self, int flags) 602 { 603 struct plcom_softc *sc = device_private(self); 604 int maj, mn; 605 606 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 607 return EBUSY; 608 609 if (sc->disable != NULL && sc->enabled != 0) { 610 (*sc->disable)(sc); 611 sc->enabled = 0; 612 } 613 614 /* locate the major number */ 615 maj = cdevsw_lookup_major(&plcom_cdevsw); 616 617 /* Nuke the vnodes for any open instances. */ 618 mn = device_unit(self); 619 vdevgone(maj, mn, mn, VCHR); 620 621 mn |= PLCOMDIALOUT_MASK; 622 vdevgone(maj, mn, mn, VCHR); 623 624 if (sc->sc_rbuf == NULL) { 625 /* 626 * Ring buffer allocation failed in the plcom_attach_subr, 627 * only the tty is allocated, and nothing else. 628 */ 629 tty_free(sc->sc_tty); 630 return 0; 631 } 632 633 /* Free the receive buffer. */ 634 free(sc->sc_rbuf, M_DEVBUF); 635 636 /* Detach and free the tty. */ 637 tty_detach(sc->sc_tty); 638 tty_free(sc->sc_tty); 639 640 /* Unhook the soft interrupt handler. */ 641 softint_disestablish(sc->sc_si); 642 643 #ifdef RND_COM 644 /* Unhook the entropy source. */ 645 rnd_detach_source(&sc->rnd_source); 646 #endif 647 callout_destroy(&sc->sc_diag_callout); 648 649 /* Destroy the lock. */ 650 mutex_destroy(&sc->sc_lock); 651 652 return 0; 653 } 654 655 int 656 plcom_activate(device_t self, enum devact act) 657 { 658 struct plcom_softc *sc = device_private(self); 659 660 switch (act) { 661 case DVACT_DEACTIVATE: 662 sc->enabled = 0; 663 return 0; 664 default: 665 return EOPNOTSUPP; 666 } 667 } 668 669 void 670 plcom_shutdown(struct plcom_softc *sc) 671 { 672 struct plcom_instance *pi = &sc->sc_pi; 673 struct tty *tp = sc->sc_tty; 674 mutex_spin_enter(&sc->sc_lock); 675 676 /* If we were asserting flow control, then deassert it. */ 677 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 678 plcom_hwiflow(sc); 679 680 /* Clear any break condition set with TIOCSBRK. */ 681 plcom_break(sc, 0); 682 683 /* Turn off PPS capture on last close. */ 684 mutex_spin_enter(&timecounter_lock); 685 sc->sc_ppsmask = 0; 686 sc->ppsparam.mode = 0; 687 mutex_spin_exit(&timecounter_lock); 688 689 /* 690 * Hang up if necessary. Wait a bit, so the other side has time to 691 * notice even if we immediately open the port again. 692 * Avoid tsleeping above splhigh(). 693 */ 694 if (ISSET(tp->t_cflag, HUPCL)) { 695 plcom_modem(sc, 0); 696 mutex_spin_exit(&sc->sc_lock); 697 /* XXX will only timeout */ 698 (void) kpause(ttclos, false, hz, NULL); 699 mutex_spin_enter(&sc->sc_lock); 700 } 701 702 sc->sc_cr = 0; 703 sc->sc_imsc = 0; 704 /* Turn off interrupts. */ 705 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 706 /* interrupt on break */ 707 708 sc->sc_cr = PL01X_CR_UARTEN; 709 sc->sc_imsc = 0; 710 switch (pi->pi_type) { 711 case PLCOM_TYPE_PL010: 712 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 713 break; 714 case PLCOM_TYPE_PL011: 715 SET(sc->sc_cr, PL011_CR_RXE); 716 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 717 break; 718 } 719 } 720 switch (pi->pi_type) { 721 case PLCOM_TYPE_PL010: 722 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 723 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 724 break; 725 case PLCOM_TYPE_PL011: 726 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 727 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 728 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 729 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 730 break; 731 } 732 733 mutex_spin_exit(&sc->sc_lock); 734 if (sc->disable) { 735 #ifdef DIAGNOSTIC 736 if (!sc->enabled) 737 panic("plcom_shutdown: not enabled?"); 738 #endif 739 (*sc->disable)(sc); 740 sc->enabled = 0; 741 } 742 } 743 744 int 745 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 746 { 747 struct plcom_softc *sc; 748 struct plcom_instance *pi; 749 struct tty *tp; 750 int s; 751 int error; 752 753 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 754 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 755 sc->sc_rbuf == NULL) 756 return ENXIO; 757 758 if (!device_is_active(sc->sc_dev)) 759 return ENXIO; 760 761 pi = &sc->sc_pi; 762 763 #ifdef KGDB 764 /* 765 * If this is the kgdb port, no other use is permitted. 766 */ 767 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 768 return EBUSY; 769 #endif 770 771 tp = sc->sc_tty; 772 773 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 774 return (EBUSY); 775 776 s = spltty(); 777 778 /* 779 * Do the following iff this is a first open. 780 */ 781 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 782 struct termios t; 783 784 tp->t_dev = dev; 785 786 if (sc->enable) { 787 if ((*sc->enable)(sc)) { 788 splx(s); 789 aprint_error_dev(sc->sc_dev, 790 "device enable failed\n"); 791 return EIO; 792 } 793 mutex_spin_enter(&sc->sc_lock); 794 sc->enabled = 1; 795 plcom_config(sc); 796 } else { 797 mutex_spin_enter(&sc->sc_lock); 798 } 799 800 /* Turn on interrupts. */ 801 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 802 /* Fetch the current modem control status, needed later. */ 803 sc->sc_cr = PL01X_CR_UARTEN; 804 switch (pi->pi_type) { 805 case PLCOM_TYPE_PL010: 806 SET(sc->sc_cr, 807 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 808 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 809 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 810 break; 811 case PLCOM_TYPE_PL011: 812 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 813 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 814 PL011_INT_MSMASK); 815 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 816 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 817 break; 818 } 819 820 /* Clear PPS capture state on first open. */ 821 822 mutex_spin_enter(&timecounter_lock); 823 sc->sc_ppsmask = 0; 824 sc->ppsparam.mode = 0; 825 mutex_spin_exit(&timecounter_lock); 826 827 mutex_spin_exit(&sc->sc_lock); 828 829 /* 830 * Initialize the termios status to the defaults. Add in the 831 * sticky bits from TIOCSFLAGS. 832 */ 833 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 834 t.c_ospeed = plcomconsrate; 835 t.c_cflag = plcomconscflag; 836 } else { 837 t.c_ospeed = TTYDEF_SPEED; 838 t.c_cflag = TTYDEF_CFLAG; 839 } 840 t.c_ispeed = t.c_ospeed; 841 842 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 843 SET(t.c_cflag, CLOCAL); 844 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 845 SET(t.c_cflag, CRTSCTS); 846 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 847 SET(t.c_cflag, MDMBUF); 848 /* Make sure plcomparam() will do something. */ 849 tp->t_ospeed = 0; 850 (void) plcomparam(tp, &t); 851 tp->t_iflag = TTYDEF_IFLAG; 852 tp->t_oflag = TTYDEF_OFLAG; 853 tp->t_lflag = TTYDEF_LFLAG; 854 ttychars(tp); 855 ttsetwater(tp); 856 857 mutex_spin_enter(&sc->sc_lock); 858 859 /* 860 * Turn on DTR. We must always do this, even if carrier is not 861 * present, because otherwise we'd have to use TIOCSDTR 862 * immediately after setting CLOCAL, which applications do not 863 * expect. We always assert DTR while the device is open 864 * unless explicitly requested to deassert it. 865 */ 866 plcom_modem(sc, 1); 867 868 /* Clear the input ring, and unblock. */ 869 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 870 sc->sc_rbavail = plcom_rbuf_size; 871 plcom_iflush(sc); 872 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 873 plcom_hwiflow(sc); 874 875 #ifdef PLCOM_DEBUG 876 if (plcom_debug) 877 plcomstatus(sc, "plcomopen "); 878 #endif 879 880 mutex_spin_exit(&sc->sc_lock); 881 } 882 883 splx(s); 884 885 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 886 if (error) 887 goto bad; 888 889 error = (*tp->t_linesw->l_open)(dev, tp); 890 if (error) 891 goto bad; 892 893 return 0; 894 895 bad: 896 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 897 /* 898 * We failed to open the device, and nobody else had it opened. 899 * Clean up the state as appropriate. 900 */ 901 plcom_shutdown(sc); 902 } 903 904 return error; 905 } 906 907 int 908 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 909 { 910 struct plcom_softc *sc = 911 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 912 struct tty *tp = sc->sc_tty; 913 914 /* XXX This is for cons.c. */ 915 if (!ISSET(tp->t_state, TS_ISOPEN)) 916 return 0; 917 918 (*tp->t_linesw->l_close)(tp, flag); 919 ttyclose(tp); 920 921 if (PLCOM_ISALIVE(sc) == 0) 922 return 0; 923 924 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 925 /* 926 * Although we got a last close, the device may still be in 927 * use; e.g. if this was the dialout node, and there are still 928 * processes waiting for carrier on the non-dialout node. 929 */ 930 plcom_shutdown(sc); 931 } 932 933 return 0; 934 } 935 936 int 937 plcomread(dev_t dev, struct uio *uio, int flag) 938 { 939 struct plcom_softc *sc = 940 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 941 struct tty *tp = sc->sc_tty; 942 943 if (PLCOM_ISALIVE(sc) == 0) 944 return EIO; 945 946 return (*tp->t_linesw->l_read)(tp, uio, flag); 947 } 948 949 int 950 plcomwrite(dev_t dev, struct uio *uio, int flag) 951 { 952 struct plcom_softc *sc = 953 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 954 struct tty *tp = sc->sc_tty; 955 956 if (PLCOM_ISALIVE(sc) == 0) 957 return EIO; 958 959 return (*tp->t_linesw->l_write)(tp, uio, flag); 960 } 961 962 int 963 plcompoll(dev_t dev, int events, struct lwp *l) 964 { 965 struct plcom_softc *sc = 966 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 967 struct tty *tp = sc->sc_tty; 968 969 if (PLCOM_ISALIVE(sc) == 0) 970 return EIO; 971 972 return (*tp->t_linesw->l_poll)(tp, events, l); 973 } 974 975 struct tty * 976 plcomtty(dev_t dev) 977 { 978 struct plcom_softc *sc = 979 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 980 struct tty *tp = sc->sc_tty; 981 982 return tp; 983 } 984 985 int 986 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 987 { 988 struct plcom_softc *sc = 989 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 990 struct tty *tp; 991 int error; 992 993 if (sc == NULL) 994 return ENXIO; 995 if (PLCOM_ISALIVE(sc) == 0) 996 return EIO; 997 998 tp = sc->sc_tty; 999 1000 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1001 if (error != EPASSTHROUGH) 1002 return error; 1003 1004 error = ttioctl(tp, cmd, data, flag, l); 1005 if (error != EPASSTHROUGH) 1006 return error; 1007 1008 error = 0; 1009 switch (cmd) { 1010 case TIOCSFLAGS: 1011 error = kauth_authorize_device_tty(l->l_cred, 1012 KAUTH_DEVICE_TTY_PRIVSET, tp); 1013 break; 1014 default: 1015 /* nothing */ 1016 break; 1017 } 1018 if (error) { 1019 return error; 1020 } 1021 1022 mutex_spin_enter(&sc->sc_lock); 1023 switch (cmd) { 1024 case TIOCSBRK: 1025 plcom_break(sc, 1); 1026 break; 1027 1028 case TIOCCBRK: 1029 plcom_break(sc, 0); 1030 break; 1031 1032 case TIOCSDTR: 1033 plcom_modem(sc, 1); 1034 break; 1035 1036 case TIOCCDTR: 1037 plcom_modem(sc, 0); 1038 break; 1039 1040 case TIOCGFLAGS: 1041 *(int *)data = sc->sc_swflags; 1042 break; 1043 1044 case TIOCSFLAGS: 1045 sc->sc_swflags = *(int *)data; 1046 break; 1047 1048 case TIOCMSET: 1049 case TIOCMBIS: 1050 case TIOCMBIC: 1051 tiocm_to_plcom(sc, cmd, *(int *)data); 1052 break; 1053 1054 case TIOCMGET: 1055 *(int *)data = plcom_to_tiocm(sc); 1056 break; 1057 1058 case PPS_IOC_CREATE: 1059 break; 1060 1061 case PPS_IOC_DESTROY: 1062 break; 1063 1064 case PPS_IOC_GETPARAMS: { 1065 pps_params_t *pp; 1066 pp = (pps_params_t *)data; 1067 mutex_spin_enter(&timecounter_lock); 1068 *pp = sc->ppsparam; 1069 mutex_spin_exit(&timecounter_lock); 1070 break; 1071 } 1072 1073 case PPS_IOC_SETPARAMS: { 1074 pps_params_t *pp; 1075 int mode; 1076 pp = (pps_params_t *)data; 1077 mutex_spin_enter(&timecounter_lock); 1078 if (pp->mode & ~ppscap) { 1079 error = EINVAL; 1080 mutex_spin_exit(&timecounter_lock); 1081 break; 1082 } 1083 sc->ppsparam = *pp; 1084 /* 1085 * Compute msr masks from user-specified timestamp state. 1086 */ 1087 mode = sc->ppsparam.mode; 1088 #ifdef PPS_SYNC 1089 if (mode & PPS_HARDPPSONASSERT) { 1090 mode |= PPS_CAPTUREASSERT; 1091 /* XXX revoke any previous HARDPPS source */ 1092 } 1093 if (mode & PPS_HARDPPSONCLEAR) { 1094 mode |= PPS_CAPTURECLEAR; 1095 /* XXX revoke any previous HARDPPS source */ 1096 } 1097 #endif /* PPS_SYNC */ 1098 switch (mode & PPS_CAPTUREBOTH) { 1099 case 0: 1100 sc->sc_ppsmask = 0; 1101 break; 1102 1103 case PPS_CAPTUREASSERT: 1104 sc->sc_ppsmask = PL01X_MSR_DCD; 1105 sc->sc_ppsassert = PL01X_MSR_DCD; 1106 sc->sc_ppsclear = -1; 1107 break; 1108 1109 case PPS_CAPTURECLEAR: 1110 sc->sc_ppsmask = PL01X_MSR_DCD; 1111 sc->sc_ppsassert = -1; 1112 sc->sc_ppsclear = 0; 1113 break; 1114 1115 case PPS_CAPTUREBOTH: 1116 sc->sc_ppsmask = PL01X_MSR_DCD; 1117 sc->sc_ppsassert = PL01X_MSR_DCD; 1118 sc->sc_ppsclear = 0; 1119 break; 1120 1121 default: 1122 error = EINVAL; 1123 break; 1124 } 1125 mutex_spin_exit(&timecounter_lock); 1126 break; 1127 } 1128 1129 case PPS_IOC_GETCAP: 1130 *(int*)data = ppscap; 1131 break; 1132 1133 case PPS_IOC_FETCH: { 1134 pps_info_t *pi; 1135 pi = (pps_info_t *)data; 1136 mutex_spin_enter(&timecounter_lock); 1137 *pi = sc->ppsinfo; 1138 mutex_spin_exit(&timecounter_lock); 1139 break; 1140 } 1141 1142 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1143 /* 1144 * Some GPS clocks models use the falling rather than 1145 * rising edge as the on-the-second signal. 1146 * The old API has no way to specify PPS polarity. 1147 */ 1148 mutex_spin_enter(&timecounter_lock); 1149 sc->sc_ppsmask = PL01X_MSR_DCD; 1150 #ifndef PPS_TRAILING_EDGE 1151 sc->sc_ppsassert = PL01X_MSR_DCD; 1152 sc->sc_ppsclear = -1; 1153 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1154 &sc->ppsinfo.assert_timestamp); 1155 #else 1156 sc->sc_ppsassert = -1 1157 sc->sc_ppsclear = 0; 1158 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1159 &sc->ppsinfo.clear_timestamp); 1160 #endif 1161 mutex_spin_exit(&timecounter_lock); 1162 break; 1163 1164 default: 1165 error = EPASSTHROUGH; 1166 break; 1167 } 1168 1169 mutex_spin_exit(&sc->sc_lock); 1170 1171 #ifdef PLCOM_DEBUG 1172 if (plcom_debug) 1173 plcomstatus(sc, "plcomioctl "); 1174 #endif 1175 1176 return error; 1177 } 1178 1179 integrate void 1180 plcom_schedrx(struct plcom_softc *sc) 1181 { 1182 1183 sc->sc_rx_ready = 1; 1184 1185 /* Wake up the poller. */ 1186 softint_schedule(sc->sc_si); 1187 } 1188 1189 void 1190 plcom_break(struct plcom_softc *sc, int onoff) 1191 { 1192 1193 if (onoff) 1194 SET(sc->sc_lcr, PL01X_LCR_BRK); 1195 else 1196 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1197 1198 if (!sc->sc_heldchange) { 1199 if (sc->sc_tx_busy) { 1200 sc->sc_heldtbc = sc->sc_tbc; 1201 sc->sc_tbc = 0; 1202 sc->sc_heldchange = 1; 1203 } else 1204 plcom_loadchannelregs(sc); 1205 } 1206 } 1207 1208 void 1209 plcom_modem(struct plcom_softc *sc, int onoff) 1210 { 1211 1212 if (sc->sc_mcr_dtr == 0) 1213 return; 1214 1215 if (onoff) 1216 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1217 else 1218 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1219 1220 if (!sc->sc_heldchange) { 1221 if (sc->sc_tx_busy) { 1222 sc->sc_heldtbc = sc->sc_tbc; 1223 sc->sc_tbc = 0; 1224 sc->sc_heldchange = 1; 1225 } else 1226 plcom_loadchannelregs(sc); 1227 } 1228 } 1229 1230 void 1231 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1232 { 1233 u_char plcombits; 1234 1235 plcombits = 0; 1236 if (ISSET(ttybits, TIOCM_DTR)) 1237 SET(plcombits, PL01X_MCR_DTR); 1238 if (ISSET(ttybits, TIOCM_RTS)) 1239 SET(plcombits, PL01X_MCR_RTS); 1240 1241 switch (how) { 1242 case TIOCMBIC: 1243 CLR(sc->sc_mcr, plcombits); 1244 break; 1245 1246 case TIOCMBIS: 1247 SET(sc->sc_mcr, plcombits); 1248 break; 1249 1250 case TIOCMSET: 1251 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1252 SET(sc->sc_mcr, plcombits); 1253 break; 1254 } 1255 1256 if (!sc->sc_heldchange) { 1257 if (sc->sc_tx_busy) { 1258 sc->sc_heldtbc = sc->sc_tbc; 1259 sc->sc_tbc = 0; 1260 sc->sc_heldchange = 1; 1261 } else 1262 plcom_loadchannelregs(sc); 1263 } 1264 } 1265 1266 int 1267 plcom_to_tiocm(struct plcom_softc *sc) 1268 { 1269 u_char plcombits; 1270 int ttybits = 0; 1271 1272 plcombits = sc->sc_mcr; 1273 if (ISSET(plcombits, PL01X_MCR_DTR)) 1274 SET(ttybits, TIOCM_DTR); 1275 if (ISSET(plcombits, PL01X_MCR_RTS)) 1276 SET(ttybits, TIOCM_RTS); 1277 1278 plcombits = sc->sc_msr; 1279 if (ISSET(plcombits, PL01X_MSR_DCD)) 1280 SET(ttybits, TIOCM_CD); 1281 if (ISSET(plcombits, PL01X_MSR_CTS)) 1282 SET(ttybits, TIOCM_CTS); 1283 if (ISSET(plcombits, PL01X_MSR_DSR)) 1284 SET(ttybits, TIOCM_DSR); 1285 if (ISSET(plcombits, PL011_MSR_RI)) 1286 SET(ttybits, TIOCM_RI); 1287 1288 if (sc->sc_cr != 0) 1289 SET(ttybits, TIOCM_LE); 1290 1291 return ttybits; 1292 } 1293 1294 static u_char 1295 cflag2lcr(tcflag_t cflag) 1296 { 1297 u_char lcr = 0; 1298 1299 switch (ISSET(cflag, CSIZE)) { 1300 case CS5: 1301 SET(lcr, PL01X_LCR_5BITS); 1302 break; 1303 case CS6: 1304 SET(lcr, PL01X_LCR_6BITS); 1305 break; 1306 case CS7: 1307 SET(lcr, PL01X_LCR_7BITS); 1308 break; 1309 case CS8: 1310 SET(lcr, PL01X_LCR_8BITS); 1311 break; 1312 } 1313 if (ISSET(cflag, PARENB)) { 1314 SET(lcr, PL01X_LCR_PEN); 1315 if (!ISSET(cflag, PARODD)) 1316 SET(lcr, PL01X_LCR_EPS); 1317 } 1318 if (ISSET(cflag, CSTOPB)) 1319 SET(lcr, PL01X_LCR_STP2); 1320 1321 return lcr; 1322 } 1323 1324 int 1325 plcomparam(struct tty *tp, struct termios *t) 1326 { 1327 struct plcom_softc *sc = 1328 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1329 struct plcom_instance *pi = &sc->sc_pi; 1330 int ospeed = -1; 1331 u_char lcr; 1332 1333 if (PLCOM_ISALIVE(sc) == 0) 1334 return EIO; 1335 1336 switch (pi->pi_type) { 1337 case PLCOM_TYPE_PL010: 1338 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1339 break; 1340 case PLCOM_TYPE_PL011: 1341 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1342 break; 1343 } 1344 1345 /* Check requested parameters. */ 1346 if (ospeed < 0) 1347 return EINVAL; 1348 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1349 return EINVAL; 1350 1351 /* 1352 * For the console, always force CLOCAL and !HUPCL, so that the port 1353 * is always active. 1354 */ 1355 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1356 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1357 SET(t->c_cflag, CLOCAL); 1358 CLR(t->c_cflag, HUPCL); 1359 } 1360 1361 /* 1362 * If there were no changes, don't do anything. This avoids dropping 1363 * input and improves performance when all we did was frob things like 1364 * VMIN and VTIME. 1365 */ 1366 if (tp->t_ospeed == t->c_ospeed && 1367 tp->t_cflag == t->c_cflag) 1368 return 0; 1369 1370 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1371 1372 mutex_spin_enter(&sc->sc_lock); 1373 1374 sc->sc_lcr = lcr; 1375 1376 /* 1377 * PL010 has a fixed-length FIFO trigger point. 1378 */ 1379 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1380 sc->sc_fifo = 1; 1381 else 1382 sc->sc_fifo = 0; 1383 1384 if (sc->sc_fifo) 1385 SET(sc->sc_lcr, PL01X_LCR_FEN); 1386 1387 /* 1388 * If we're not in a mode that assumes a connection is present, then 1389 * ignore carrier changes. 1390 */ 1391 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1392 sc->sc_msr_dcd = 0; 1393 else 1394 sc->sc_msr_dcd = PL01X_MSR_DCD; 1395 /* 1396 * Set the flow control pins depending on the current flow control 1397 * mode. 1398 */ 1399 if (ISSET(t->c_cflag, CRTSCTS)) { 1400 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1401 sc->sc_mcr_rts = PL01X_MCR_RTS; 1402 sc->sc_msr_cts = PL01X_MSR_CTS; 1403 } else if (ISSET(t->c_cflag, MDMBUF)) { 1404 /* 1405 * For DTR/DCD flow control, make sure we don't toggle DTR for 1406 * carrier detection. 1407 */ 1408 sc->sc_mcr_dtr = 0; 1409 sc->sc_mcr_rts = PL01X_MCR_DTR; 1410 sc->sc_msr_cts = PL01X_MSR_DCD; 1411 } else { 1412 /* 1413 * If no flow control, then always set RTS. This will make 1414 * the other side happy if it mistakenly thinks we're doing 1415 * RTS/CTS flow control. 1416 */ 1417 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1418 sc->sc_mcr_rts = 0; 1419 sc->sc_msr_cts = 0; 1420 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1421 SET(sc->sc_mcr, PL01X_MCR_RTS); 1422 else 1423 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1424 } 1425 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1426 1427 #if 0 1428 if (ospeed == 0) 1429 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1430 else 1431 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1432 #endif 1433 1434 switch (pi->pi_type) { 1435 case PLCOM_TYPE_PL010: 1436 sc->sc_ratel = ospeed & 0xff; 1437 sc->sc_rateh = (ospeed >> 8) & 0xff; 1438 break; 1439 case PLCOM_TYPE_PL011: 1440 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1441 sc->sc_rateh = ospeed >> 6; 1442 break; 1443 } 1444 1445 /* And copy to tty. */ 1446 tp->t_ispeed = t->c_ospeed; 1447 tp->t_ospeed = t->c_ospeed; 1448 tp->t_cflag = t->c_cflag; 1449 1450 if (!sc->sc_heldchange) { 1451 if (sc->sc_tx_busy) { 1452 sc->sc_heldtbc = sc->sc_tbc; 1453 sc->sc_tbc = 0; 1454 sc->sc_heldchange = 1; 1455 } else 1456 plcom_loadchannelregs(sc); 1457 } 1458 1459 if (!ISSET(t->c_cflag, CHWFLOW)) { 1460 /* Disable the high water mark. */ 1461 sc->sc_r_hiwat = 0; 1462 sc->sc_r_lowat = 0; 1463 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1464 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1465 plcom_schedrx(sc); 1466 } 1467 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1468 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1469 plcom_hwiflow(sc); 1470 } 1471 } else { 1472 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1473 sc->sc_r_lowat = plcom_rbuf_lowat; 1474 } 1475 1476 mutex_spin_exit(&sc->sc_lock); 1477 1478 /* 1479 * Update the tty layer's idea of the carrier bit, in case we changed 1480 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1481 * explicit request. 1482 */ 1483 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1484 1485 #ifdef PLCOM_DEBUG 1486 if (plcom_debug) 1487 plcomstatus(sc, "plcomparam "); 1488 #endif 1489 1490 if (!ISSET(t->c_cflag, CHWFLOW)) { 1491 if (sc->sc_tx_stopped) { 1492 sc->sc_tx_stopped = 0; 1493 plcomstart(tp); 1494 } 1495 } 1496 1497 return 0; 1498 } 1499 1500 void 1501 plcom_iflush(struct plcom_softc *sc) 1502 { 1503 struct plcom_instance *pi = &sc->sc_pi; 1504 #ifdef DIAGNOSTIC 1505 int reg; 1506 #endif 1507 int timo; 1508 1509 #ifdef DIAGNOSTIC 1510 reg = 0xffff; 1511 #endif 1512 timo = 50000; 1513 /* flush any pending I/O */ 1514 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1515 && --timo) 1516 #ifdef DIAGNOSTIC 1517 reg = 1518 #else 1519 (void) 1520 #endif 1521 PREAD1(pi, PL01XCOM_DR); 1522 #ifdef DIAGNOSTIC 1523 if (!timo) 1524 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1525 reg); 1526 #endif 1527 } 1528 1529 void 1530 plcom_loadchannelregs(struct plcom_softc *sc) 1531 { 1532 struct plcom_instance *pi = &sc->sc_pi; 1533 1534 /* XXXXX necessary? */ 1535 plcom_iflush(sc); 1536 1537 switch (pi->pi_type) { 1538 case PLCOM_TYPE_PL010: 1539 PWRITE1(pi, PL010COM_CR, 0); 1540 if (sc->sc_frequency != 0) { 1541 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1542 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1543 } 1544 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1545 1546 /* XXX device_unit() abuse */ 1547 if (sc->sc_set_mcr) 1548 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1549 device_unit(sc->sc_dev), 1550 sc->sc_mcr_active = sc->sc_mcr); 1551 1552 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1553 break; 1554 1555 case PLCOM_TYPE_PL011: 1556 PWRITE4(pi, PL011COM_CR, 0); 1557 if (sc->sc_frequency != 0) { 1558 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1559 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1560 } 1561 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1562 sc->sc_mcr_active = sc->sc_mcr; 1563 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1564 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1565 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1566 break; 1567 } 1568 } 1569 1570 int 1571 plcomhwiflow(struct tty *tp, int block) 1572 { 1573 struct plcom_softc *sc = 1574 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1575 1576 if (PLCOM_ISALIVE(sc) == 0) 1577 return 0; 1578 1579 if (sc->sc_mcr_rts == 0) 1580 return 0; 1581 1582 mutex_spin_enter(&sc->sc_lock); 1583 1584 if (block) { 1585 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1586 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1587 plcom_hwiflow(sc); 1588 } 1589 } else { 1590 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1591 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1592 plcom_schedrx(sc); 1593 } 1594 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1595 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1596 plcom_hwiflow(sc); 1597 } 1598 } 1599 1600 mutex_spin_exit(&sc->sc_lock); 1601 return 1; 1602 } 1603 1604 /* 1605 * (un)block input via hw flowcontrol 1606 */ 1607 void 1608 plcom_hwiflow(struct plcom_softc *sc) 1609 { 1610 struct plcom_instance *pi = &sc->sc_pi; 1611 1612 if (sc->sc_mcr_rts == 0) 1613 return; 1614 1615 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1616 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1617 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1618 } else { 1619 SET(sc->sc_mcr, sc->sc_mcr_rts); 1620 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1621 } 1622 switch (pi->pi_type) { 1623 case PLCOM_TYPE_PL010: 1624 if (sc->sc_set_mcr) 1625 /* XXX device_unit() abuse */ 1626 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1627 device_unit(sc->sc_dev), sc->sc_mcr_active); 1628 break; 1629 case PLCOM_TYPE_PL011: 1630 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1631 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1632 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1633 break; 1634 } 1635 } 1636 1637 1638 void 1639 plcomstart(struct tty *tp) 1640 { 1641 struct plcom_softc *sc = 1642 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1643 struct plcom_instance *pi = &sc->sc_pi; 1644 int s; 1645 1646 if (PLCOM_ISALIVE(sc) == 0) 1647 return; 1648 1649 s = spltty(); 1650 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1651 goto out; 1652 if (sc->sc_tx_stopped) 1653 goto out; 1654 1655 if (!ttypull(tp)) 1656 goto out; 1657 1658 /* Grab the first contiguous region of buffer space. */ 1659 { 1660 u_char *tba; 1661 int tbc; 1662 1663 tba = tp->t_outq.c_cf; 1664 tbc = ndqb(&tp->t_outq, 0); 1665 1666 mutex_spin_enter(&sc->sc_lock); 1667 1668 sc->sc_tba = tba; 1669 sc->sc_tbc = tbc; 1670 } 1671 1672 SET(tp->t_state, TS_BUSY); 1673 sc->sc_tx_busy = 1; 1674 1675 /* Enable transmit completion interrupts if necessary. */ 1676 switch (pi->pi_type) { 1677 case PLCOM_TYPE_PL010: 1678 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1679 SET(sc->sc_cr, PL010_CR_TIE); 1680 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1681 } 1682 break; 1683 case PLCOM_TYPE_PL011: 1684 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1685 SET(sc->sc_imsc, PL011_INT_TX); 1686 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1687 } 1688 break; 1689 } 1690 1691 /* Output the first chunk of the contiguous buffer. */ 1692 { 1693 int n; 1694 1695 n = sc->sc_tbc; 1696 if (n > sc->sc_fifolen) 1697 n = sc->sc_fifolen; 1698 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1699 sc->sc_tbc -= n; 1700 sc->sc_tba += n; 1701 } 1702 mutex_spin_exit(&sc->sc_lock); 1703 out: 1704 splx(s); 1705 return; 1706 } 1707 1708 /* 1709 * Stop output on a line. 1710 */ 1711 void 1712 plcomstop(struct tty *tp, int flag) 1713 { 1714 struct plcom_softc *sc = 1715 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1716 1717 mutex_spin_enter(&sc->sc_lock); 1718 if (ISSET(tp->t_state, TS_BUSY)) { 1719 /* Stop transmitting at the next chunk. */ 1720 sc->sc_tbc = 0; 1721 sc->sc_heldtbc = 0; 1722 if (!ISSET(tp->t_state, TS_TTSTOP)) 1723 SET(tp->t_state, TS_FLUSH); 1724 } 1725 mutex_spin_exit(&sc->sc_lock); 1726 } 1727 1728 void 1729 plcomdiag(void *arg) 1730 { 1731 struct plcom_softc *sc = arg; 1732 int overflows, floods; 1733 1734 mutex_spin_enter(&sc->sc_lock); 1735 overflows = sc->sc_overflows; 1736 sc->sc_overflows = 0; 1737 floods = sc->sc_floods; 1738 sc->sc_floods = 0; 1739 sc->sc_errors = 0; 1740 mutex_spin_exit(&sc->sc_lock); 1741 1742 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1743 device_xname(sc->sc_dev), 1744 overflows, overflows == 1 ? "" : "s", 1745 floods, floods == 1 ? "" : "s"); 1746 } 1747 1748 integrate void 1749 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1750 { 1751 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1752 struct plcom_instance *pi = &sc->sc_pi; 1753 u_char *get, *end; 1754 u_int cc, scc; 1755 u_char rsr; 1756 int code; 1757 1758 end = sc->sc_ebuf; 1759 get = sc->sc_rbget; 1760 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1761 1762 if (cc == plcom_rbuf_size) { 1763 sc->sc_floods++; 1764 if (sc->sc_errors++ == 0) 1765 callout_reset(&sc->sc_diag_callout, 60 * hz, 1766 plcomdiag, sc); 1767 } 1768 1769 while (cc) { 1770 code = get[0]; 1771 rsr = get[1]; 1772 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1773 if (ISSET(rsr, PL01X_RSR_OE)) { 1774 sc->sc_overflows++; 1775 if (sc->sc_errors++ == 0) 1776 callout_reset(&sc->sc_diag_callout, 1777 60 * hz, plcomdiag, sc); 1778 } 1779 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1780 SET(code, TTY_FE); 1781 if (ISSET(rsr, PL01X_RSR_PE)) 1782 SET(code, TTY_PE); 1783 } 1784 if ((*rint)(code, tp) == -1) { 1785 /* 1786 * The line discipline's buffer is out of space. 1787 */ 1788 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1789 /* 1790 * We're either not using flow control, or the 1791 * line discipline didn't tell us to block for 1792 * some reason. Either way, we have no way to 1793 * know when there's more space available, so 1794 * just drop the rest of the data. 1795 */ 1796 get += cc << 1; 1797 if (get >= end) 1798 get -= plcom_rbuf_size << 1; 1799 cc = 0; 1800 } else { 1801 /* 1802 * Don't schedule any more receive processing 1803 * until the line discipline tells us there's 1804 * space available (through plcomhwiflow()). 1805 * Leave the rest of the data in the input 1806 * buffer. 1807 */ 1808 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1809 } 1810 break; 1811 } 1812 get += 2; 1813 if (get >= end) 1814 get = sc->sc_rbuf; 1815 cc--; 1816 } 1817 1818 if (cc != scc) { 1819 sc->sc_rbget = get; 1820 mutex_spin_enter(&sc->sc_lock); 1821 1822 cc = sc->sc_rbavail += scc - cc; 1823 /* Buffers should be ok again, release possible block. */ 1824 if (cc >= sc->sc_r_lowat) { 1825 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1826 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1827 switch (pi->pi_type) { 1828 case PLCOM_TYPE_PL010: 1829 SET(sc->sc_cr, 1830 PL010_CR_RIE | PL010_CR_RTIE); 1831 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1832 break; 1833 case PLCOM_TYPE_PL011: 1834 SET(sc->sc_imsc, 1835 PL011_INT_RX | PL011_INT_RT); 1836 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1837 break; 1838 } 1839 } 1840 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1841 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1842 plcom_hwiflow(sc); 1843 } 1844 } 1845 mutex_spin_exit(&sc->sc_lock); 1846 } 1847 } 1848 1849 integrate void 1850 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1851 { 1852 1853 CLR(tp->t_state, TS_BUSY); 1854 if (ISSET(tp->t_state, TS_FLUSH)) 1855 CLR(tp->t_state, TS_FLUSH); 1856 else 1857 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1858 (*tp->t_linesw->l_start)(tp); 1859 } 1860 1861 integrate void 1862 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1863 { 1864 u_char msr, delta; 1865 1866 mutex_spin_enter(&sc->sc_lock); 1867 msr = sc->sc_msr; 1868 delta = sc->sc_msr_delta; 1869 sc->sc_msr_delta = 0; 1870 mutex_spin_exit(&sc->sc_lock); 1871 1872 if (ISSET(delta, sc->sc_msr_dcd)) { 1873 /* 1874 * Inform the tty layer that carrier detect changed. 1875 */ 1876 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1877 } 1878 1879 if (ISSET(delta, sc->sc_msr_cts)) { 1880 /* Block or unblock output according to flow control. */ 1881 if (ISSET(msr, sc->sc_msr_cts)) { 1882 sc->sc_tx_stopped = 0; 1883 (*tp->t_linesw->l_start)(tp); 1884 } else { 1885 sc->sc_tx_stopped = 1; 1886 } 1887 } 1888 1889 #ifdef PLCOM_DEBUG 1890 if (plcom_debug) 1891 plcomstatus(sc, "plcom_stsoft"); 1892 #endif 1893 } 1894 1895 void 1896 plcomsoft(void *arg) 1897 { 1898 struct plcom_softc *sc = arg; 1899 struct tty *tp; 1900 1901 if (PLCOM_ISALIVE(sc) == 0) 1902 return; 1903 1904 tp = sc->sc_tty; 1905 1906 if (sc->sc_rx_ready) { 1907 sc->sc_rx_ready = 0; 1908 plcom_rxsoft(sc, tp); 1909 } 1910 1911 if (sc->sc_st_check) { 1912 sc->sc_st_check = 0; 1913 plcom_stsoft(sc, tp); 1914 } 1915 1916 if (sc->sc_tx_done) { 1917 sc->sc_tx_done = 0; 1918 plcom_txsoft(sc, tp); 1919 } 1920 } 1921 1922 bool 1923 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1924 { 1925 bool ret = false; 1926 u_int stat = 0; 1927 1928 switch (pi->pi_type) { 1929 case PLCOM_TYPE_PL010: 1930 stat = PREAD1(pi, PL010COM_IIR); 1931 ret = ISSET(stat, PL010_IIR_IMASK); 1932 break; 1933 case PLCOM_TYPE_PL011: 1934 stat = PREAD4(pi, PL011COM_MIS); 1935 ret = ISSET(stat, PL011_INT_ALLMASK); 1936 break; 1937 } 1938 *istatus = stat; 1939 1940 return ret; 1941 } 1942 1943 int 1944 plcomintr(void *arg) 1945 { 1946 struct plcom_softc *sc = arg; 1947 struct plcom_instance *pi = &sc->sc_pi; 1948 u_char *put, *end; 1949 u_int cc; 1950 u_int istatus = 0; 1951 u_char rsr; 1952 bool intr = false; 1953 1954 PLCOM_BARRIER(pi, BR | BW); 1955 1956 if (PLCOM_ISALIVE(sc) == 0) 1957 return 0; 1958 1959 mutex_spin_enter(&sc->sc_lock); 1960 intr = plcom_intstatus(pi, &istatus); 1961 if (!intr) { 1962 mutex_spin_exit(&sc->sc_lock); 1963 return 0; 1964 } 1965 1966 end = sc->sc_ebuf; 1967 put = sc->sc_rbput; 1968 cc = sc->sc_rbavail; 1969 1970 do { 1971 u_int msr = 0, delta, fr; 1972 bool rxintr = false, txintr = false, msintr; 1973 1974 /* don't need RI here*/ 1975 fr = PREAD1(pi, PL01XCOM_FR); 1976 1977 if (!ISSET(fr, PL01X_FR_RXFE) && 1978 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1979 while (cc > 0) { 1980 int cn_trapped = 0; 1981 put[0] = PREAD1(pi, PL01XCOM_DR); 1982 rsr = PREAD1(pi, PL01XCOM_RSR); 1983 /* Clear any error status. */ 1984 if (ISSET(rsr, PL01X_RSR_ERROR)) 1985 PWRITE1(pi, PL01XCOM_ECR, 0); 1986 if (ISSET(rsr, PL01X_RSR_BE)) { 1987 cn_trapped = 0; 1988 cn_check_magic(sc->sc_tty->t_dev, 1989 CNC_BREAK, plcom_cnm_state); 1990 if (cn_trapped) 1991 continue; 1992 #if defined(KGDB) 1993 if (ISSET(sc->sc_hwflags, 1994 PLCOM_HW_KGDB)) { 1995 kgdb_connect(1); 1996 continue; 1997 } 1998 #endif 1999 } 2000 2001 put[1] = rsr; 2002 cn_trapped = 0; 2003 cn_check_magic(sc->sc_tty->t_dev, put[0], 2004 plcom_cnm_state); 2005 if (cn_trapped) { 2006 fr = PREAD1(pi, PL01XCOM_FR); 2007 if (ISSET(fr, PL01X_FR_RXFE)) 2008 break; 2009 2010 continue; 2011 } 2012 put += 2; 2013 if (put >= end) 2014 put = sc->sc_rbuf; 2015 cc--; 2016 2017 /* don't need RI here*/ 2018 fr = PREAD1(pi, PL01XCOM_FR); 2019 if (ISSET(fr, PL01X_FR_RXFE)) 2020 break; 2021 } 2022 2023 /* 2024 * Current string of incoming characters ended because 2025 * no more data was available or we ran out of space. 2026 * Schedule a receive event if any data was received. 2027 * If we're out of space, turn off receive interrupts. 2028 */ 2029 sc->sc_rbput = put; 2030 sc->sc_rbavail = cc; 2031 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2032 sc->sc_rx_ready = 1; 2033 2034 /* 2035 * See if we are in danger of overflowing a buffer. If 2036 * so, use hardware flow control to ease the pressure. 2037 */ 2038 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2039 cc < sc->sc_r_hiwat) { 2040 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2041 plcom_hwiflow(sc); 2042 } 2043 2044 /* 2045 * If we're out of space, disable receive interrupts 2046 * until the queue has drained a bit. 2047 */ 2048 if (!cc) { 2049 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2050 switch (pi->pi_type) { 2051 case PLCOM_TYPE_PL010: 2052 CLR(sc->sc_cr, 2053 PL010_CR_RIE | PL010_CR_RTIE); 2054 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2055 break; 2056 case PLCOM_TYPE_PL011: 2057 CLR(sc->sc_imsc, 2058 PL011_INT_RT | PL011_INT_RX); 2059 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2060 break; 2061 } 2062 } 2063 } else { 2064 switch (pi->pi_type) { 2065 case PLCOM_TYPE_PL010: 2066 rxintr = ISSET(istatus, PL010_IIR_RIS); 2067 if (rxintr) { 2068 PWRITE1(pi, PL010COM_CR, 0); 2069 delay(10); 2070 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2071 continue; 2072 } 2073 break; 2074 case PLCOM_TYPE_PL011: 2075 rxintr = ISSET(istatus, PL011_INT_RX); 2076 if (rxintr) { 2077 PWRITE4(pi, PL011COM_CR, 0); 2078 delay(10); 2079 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2080 continue; 2081 } 2082 break; 2083 } 2084 } 2085 2086 switch (pi->pi_type) { 2087 case PLCOM_TYPE_PL010: 2088 msr = PREAD1(pi, PL01XCOM_FR); 2089 break; 2090 case PLCOM_TYPE_PL011: 2091 msr = PREAD4(pi, PL01XCOM_FR); 2092 break; 2093 } 2094 delta = msr ^ sc->sc_msr; 2095 sc->sc_msr = msr; 2096 2097 /* Clear any pending modem status interrupt. */ 2098 switch (pi->pi_type) { 2099 case PLCOM_TYPE_PL010: 2100 msintr = ISSET(istatus, PL010_IIR_MIS); 2101 if (msintr) { 2102 PWRITE1(pi, PL010COM_ICR, 0); 2103 } 2104 break; 2105 case PLCOM_TYPE_PL011: 2106 msintr = ISSET(istatus, PL011_INT_MSMASK); 2107 if (msintr) { 2108 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2109 } 2110 break; 2111 } 2112 /* 2113 * Pulse-per-second (PSS) signals on edge of DCD? 2114 * Process these even if line discipline is ignoring DCD. 2115 */ 2116 if (delta & sc->sc_ppsmask) { 2117 struct timeval tv; 2118 mutex_spin_enter(&timecounter_lock); 2119 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2120 /* XXX nanotime() */ 2121 microtime(&tv); 2122 TIMEVAL_TO_TIMESPEC(&tv, 2123 &sc->ppsinfo.assert_timestamp); 2124 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2125 timespecadd(&sc->ppsinfo.assert_timestamp, 2126 &sc->ppsparam.assert_offset, 2127 &sc->ppsinfo.assert_timestamp); 2128 } 2129 2130 #ifdef PPS_SYNC 2131 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2132 hardpps(&tv, tv.tv_usec); 2133 #endif 2134 sc->ppsinfo.assert_sequence++; 2135 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2136 2137 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2138 /* XXX nanotime() */ 2139 microtime(&tv); 2140 TIMEVAL_TO_TIMESPEC(&tv, 2141 &sc->ppsinfo.clear_timestamp); 2142 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2143 timespecadd(&sc->ppsinfo.clear_timestamp, 2144 &sc->ppsparam.clear_offset, 2145 &sc->ppsinfo.clear_timestamp); 2146 } 2147 2148 #ifdef PPS_SYNC 2149 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2150 hardpps(&tv, tv.tv_usec); 2151 #endif 2152 sc->ppsinfo.clear_sequence++; 2153 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2154 } 2155 mutex_spin_exit(&timecounter_lock); 2156 } 2157 2158 /* 2159 * Process normal status changes 2160 */ 2161 if (ISSET(delta, sc->sc_msr_mask)) { 2162 SET(sc->sc_msr_delta, delta); 2163 2164 /* 2165 * Stop output immediately if we lose the output 2166 * flow control signal or carrier detect. 2167 */ 2168 if (ISSET(~msr, sc->sc_msr_mask)) { 2169 sc->sc_tbc = 0; 2170 sc->sc_heldtbc = 0; 2171 #ifdef PLCOM_DEBUG 2172 if (plcom_debug) 2173 plcomstatus(sc, "plcomintr "); 2174 #endif 2175 } 2176 2177 sc->sc_st_check = 1; 2178 } 2179 2180 /* 2181 * Done handling any receive interrupts. See if data 2182 * can be transmitted as well. Schedule tx done 2183 * event if no data left and tty was marked busy. 2184 */ 2185 2186 switch (pi->pi_type) { 2187 case PLCOM_TYPE_PL010: 2188 txintr = ISSET(istatus, PL010_IIR_TIS); 2189 break; 2190 case PLCOM_TYPE_PL011: 2191 txintr = ISSET(istatus, PL011_INT_TX); 2192 break; 2193 } 2194 if (txintr) { 2195 /* 2196 * If we've delayed a parameter change, do it 2197 * now, and restart * output. 2198 */ 2199 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2200 if (sc->sc_heldchange) { 2201 plcom_loadchannelregs(sc); 2202 sc->sc_heldchange = 0; 2203 sc->sc_tbc = sc->sc_heldtbc; 2204 sc->sc_heldtbc = 0; 2205 } 2206 2207 /* 2208 * Output the next chunk of the contiguous 2209 * buffer, if any. 2210 */ 2211 if (sc->sc_tbc > 0) { 2212 int n; 2213 2214 n = sc->sc_tbc; 2215 if (n > sc->sc_fifolen) 2216 n = sc->sc_fifolen; 2217 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2218 sc->sc_tbc -= n; 2219 sc->sc_tba += n; 2220 } else { 2221 /* 2222 * Disable transmit completion 2223 * interrupts if necessary. 2224 */ 2225 switch (pi->pi_type) { 2226 case PLCOM_TYPE_PL010: 2227 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2228 CLR(sc->sc_cr, PL010_CR_TIE); 2229 PWRITE1(pi, PL010COM_CR, 2230 sc->sc_cr); 2231 } 2232 break; 2233 case PLCOM_TYPE_PL011: 2234 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2235 CLR(sc->sc_imsc, PL011_INT_TX); 2236 PWRITE4(pi, PL011COM_IMSC, 2237 sc->sc_imsc); 2238 } 2239 break; 2240 } 2241 if (sc->sc_tx_busy) { 2242 sc->sc_tx_busy = 0; 2243 sc->sc_tx_done = 1; 2244 } 2245 } 2246 } 2247 2248 } while (plcom_intstatus(pi, &istatus)); 2249 2250 mutex_spin_exit(&sc->sc_lock); 2251 2252 /* Wake up the poller. */ 2253 softint_schedule(sc->sc_si); 2254 2255 #ifdef RND_COM 2256 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2257 #endif 2258 2259 PLCOM_BARRIER(pi, BR | BW); 2260 2261 return 1; 2262 } 2263 2264 /* 2265 * The following functions are polled getc and putc routines, shared 2266 * by the console and kgdb glue. 2267 * 2268 * The read-ahead code is so that you can detect pending in-band 2269 * cn_magic in polled mode while doing output rather than having to 2270 * wait until the kernel decides it needs input. 2271 */ 2272 2273 #define MAX_READAHEAD 20 2274 static int plcom_readahead[MAX_READAHEAD]; 2275 static int plcom_readaheadcount = 0; 2276 2277 int 2278 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2279 { 2280 int s = splserial(); 2281 u_char stat, c; 2282 2283 /* got a character from reading things earlier */ 2284 if (plcom_readaheadcount > 0) { 2285 int i; 2286 2287 c = plcom_readahead[0]; 2288 for (i = 1; i < plcom_readaheadcount; i++) { 2289 plcom_readahead[i-1] = plcom_readahead[i]; 2290 } 2291 plcom_readaheadcount--; 2292 splx(s); 2293 return c; 2294 } 2295 2296 /* block until a character becomes available */ 2297 while (ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) 2298 ; 2299 2300 c = PREAD1(pi, PL01XCOM_DR); 2301 { 2302 int cn_trapped __unused = 0; 2303 #ifdef DDB 2304 extern int db_active; 2305 if (!db_active) 2306 #endif 2307 cn_check_magic(dev, c, plcom_cnm_state); 2308 } 2309 splx(s); 2310 return c; 2311 } 2312 2313 void 2314 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2315 { 2316 int s = splserial(); 2317 int timo; 2318 2319 int cin, stat; 2320 if (plcom_readaheadcount < MAX_READAHEAD 2321 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2322 int cn_trapped __unused = 0; 2323 cin = PREAD1(pi, PL01XCOM_DR); 2324 cn_check_magic(dev, cin, plcom_cnm_state); 2325 plcom_readahead[plcom_readaheadcount++] = cin; 2326 } 2327 2328 /* wait for any pending transmission to finish */ 2329 timo = 150000; 2330 while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo) 2331 continue; 2332 2333 PWRITE1(pi, PL01XCOM_DR, c); 2334 PLCOM_BARRIER(pi, BR | BW); 2335 2336 /* wait for this transmission to complete */ 2337 timo = 1500000; 2338 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2339 continue; 2340 2341 splx(s); 2342 } 2343 2344 /* 2345 * Initialize UART for use as console or KGDB line. 2346 */ 2347 int 2348 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2349 { 2350 u_char lcr; 2351 2352 switch (pi->pi_type) { 2353 case PLCOM_TYPE_PL010: 2354 if (pi->pi_size == 0) 2355 pi->pi_size = PL010COM_UART_SIZE; 2356 break; 2357 case PLCOM_TYPE_PL011: 2358 if (pi->pi_size == 0) 2359 pi->pi_size = PL011COM_UART_SIZE; 2360 break; 2361 default: 2362 panic("Unknown plcom type"); 2363 } 2364 2365 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2366 &pi->pi_ioh)) 2367 return ENOMEM; /* ??? */ 2368 2369 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2370 switch (pi->pi_type) { 2371 case PLCOM_TYPE_PL010: 2372 PWRITE1(pi, PL010COM_CR, 0); 2373 2374 if (rate && frequency) { 2375 rate = pl010comspeed(rate, frequency); 2376 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2377 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2378 } 2379 PWRITE1(pi, PL010COM_LCR, lcr); 2380 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2381 break; 2382 case PLCOM_TYPE_PL011: 2383 PWRITE4(pi, PL011COM_CR, 0); 2384 2385 if (rate && frequency) { 2386 rate = pl011comspeed(rate, frequency); 2387 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2388 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2389 } 2390 PWRITE1(pi, PL011COM_LCRH, lcr); 2391 PWRITE4(pi, PL011COM_CR, 2392 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2393 break; 2394 } 2395 2396 #if 0 2397 /* Ought to do something like this, but we have no sc to 2398 dereference. */ 2399 /* XXX device_unit() abuse */ 2400 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2401 PL01X_MCR_DTR | PL01X_MCR_RTS); 2402 #endif 2403 2404 return 0; 2405 } 2406 2407 /* 2408 * Following are all routines needed for PLCOM to act as console 2409 */ 2410 struct consdev plcomcons = { 2411 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2412 NULL, NULL, NODEV, CN_NORMAL 2413 }; 2414 2415 int 2416 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2417 tcflag_t cflag, int unit) 2418 { 2419 int res; 2420 2421 plcomcons_info = *pi; 2422 2423 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2424 if (res) 2425 return res; 2426 2427 cn_tab = &plcomcons; 2428 cn_init_magic(&plcom_cnm_state); 2429 cn_set_magic("\047\001"); /* default magic is BREAK */ 2430 2431 plcomconsunit = unit; 2432 plcomconsrate = rate; 2433 plcomconscflag = cflag; 2434 2435 return 0; 2436 } 2437 2438 void 2439 plcomcndetach(void) 2440 { 2441 2442 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2443 plcomcons_info.pi_size); 2444 plcomcons_info.pi_iot = NULL; 2445 2446 cn_tab = NULL; 2447 } 2448 2449 int 2450 plcomcngetc(dev_t dev) 2451 { 2452 return plcom_common_getc(dev, &plcomcons_info); 2453 } 2454 2455 /* 2456 * Console kernel output character routine. 2457 */ 2458 void 2459 plcomcnputc(dev_t dev, int c) 2460 { 2461 plcom_common_putc(dev, &plcomcons_info, c); 2462 } 2463 2464 void 2465 plcomcnpollc(dev_t dev, int on) 2466 { 2467 2468 plcom_readaheadcount = 0; 2469 } 2470 2471 #ifdef KGDB 2472 int 2473 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2474 tcflag_t cflag, int unit) 2475 { 2476 int res; 2477 2478 if (pi->pi_iot == plcomcons_info.pi_iot && 2479 pi->pi_iobase == plcomcons_info.pi_iobase) 2480 return EBUSY; /* cannot share with console */ 2481 2482 res = plcominit(pi, rate, frequency, cflag); 2483 if (res) 2484 return res; 2485 2486 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2487 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2488 2489 plcomkgdb_info.pi_iot = pi->pi_iot; 2490 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2491 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2492 2493 return 0; 2494 } 2495 2496 /* ARGSUSED */ 2497 int 2498 plcom_kgdb_getc(void *arg) 2499 { 2500 return plcom_common_getc(NODEV, &plcomkgdb_info); 2501 } 2502 2503 /* ARGSUSED */ 2504 void 2505 plcom_kgdb_putc(void *arg, int c) 2506 { 2507 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2508 } 2509 #endif /* KGDB */ 2510 2511 /* helper function to identify the plcom ports used by 2512 console or KGDB (and not yet autoconf attached) */ 2513 int 2514 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2515 bus_space_handle_t *ioh) 2516 { 2517 bus_space_handle_t help; 2518 2519 if (!plcomconsattached && 2520 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2521 iobase == plcomcons_info.pi_iobase) 2522 help = plcomcons_info.pi_ioh; 2523 #ifdef KGDB 2524 else if (!plcom_kgdb_attached && 2525 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2526 iobase == plcomkgdb_info.pi_iobase) 2527 help = plcomkgdb_info.pi_ioh; 2528 #endif 2529 else 2530 return 0; 2531 2532 if (ioh) 2533 *ioh = help; 2534 return 1; 2535 } 2536
Indexes created Tue Sep 23 14:10:03 GMT 2025