plcom.c revision 1.58
1 /* $NetBSD: plcom.c,v 1.58 2019/07/23 12:13:47 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.58 2019/07/23 12:13:47 skrll Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 /* 106 * Override cnmagic(9) macro before including <sys/systm.h>. 107 * We need to know if cn_check_magic triggered debugger, so set a flag. 108 * Callers of cn_check_magic must declare int cn_trapped = 0; 109 * XXX: this is *ugly*! 110 */ 111 #define cn_trap() \ 112 do { \ 113 console_debugger(); \ 114 cn_trapped = 1; \ 115 } while (/* CONSTCOND */ 0) 116 117 #include <sys/param.h> 118 #include <sys/systm.h> 119 #include <sys/ioctl.h> 120 #include <sys/select.h> 121 #include <sys/tty.h> 122 #include <sys/proc.h> 123 #include <sys/conf.h> 124 #include <sys/file.h> 125 #include <sys/uio.h> 126 #include <sys/kernel.h> 127 #include <sys/syslog.h> 128 #include <sys/types.h> 129 #include <sys/device.h> 130 #include <sys/malloc.h> 131 #include <sys/timepps.h> 132 #include <sys/vnode.h> 133 #include <sys/kauth.h> 134 #include <sys/intr.h> 135 #include <sys/bus.h> 136 #ifdef RND_COM 137 #include <sys/rndsource.h> 138 #endif 139 140 #include <evbarm/dev/plcomreg.h> 141 #include <evbarm/dev/plcomvar.h> 142 143 #include <dev/cons.h> 144 145 static void plcom_enable_debugport (struct plcom_softc *); 146 147 void plcom_config (struct plcom_softc *); 148 void plcom_shutdown (struct plcom_softc *); 149 int pl010comspeed (long, long); 150 int pl011comspeed (long, long); 151 static u_char cflag2lcr (tcflag_t); 152 int plcomparam (struct tty *, struct termios *); 153 void plcomstart (struct tty *); 154 int plcomhwiflow (struct tty *, int); 155 156 void plcom_loadchannelregs (struct plcom_softc *); 157 void plcom_hwiflow (struct plcom_softc *); 158 void plcom_break (struct plcom_softc *, int); 159 void plcom_modem (struct plcom_softc *, int); 160 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 161 int plcom_to_tiocm (struct plcom_softc *); 162 void plcom_iflush (struct plcom_softc *); 163 164 int plcom_common_getc (dev_t, struct plcom_instance *); 165 void plcom_common_putc (dev_t, struct plcom_instance *, int); 166 167 int plcominit (struct plcom_instance *, int, int, tcflag_t); 168 169 dev_type_open(plcomopen); 170 dev_type_close(plcomclose); 171 dev_type_read(plcomread); 172 dev_type_write(plcomwrite); 173 dev_type_ioctl(plcomioctl); 174 dev_type_stop(plcomstop); 175 dev_type_tty(plcomtty); 176 dev_type_poll(plcompoll); 177 178 int plcomcngetc (dev_t); 179 void plcomcnputc (dev_t, int); 180 void plcomcnpollc (dev_t, int); 181 182 #define integrate static inline 183 void plcomsoft (void *); 184 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 185 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 186 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_schedrx (struct plcom_softc *); 188 void plcomdiag (void *); 189 190 bool plcom_intstatus(struct plcom_instance *, u_int *); 191 192 extern struct cfdriver plcom_cd; 193 194 const struct cdevsw plcom_cdevsw = { 195 .d_open = plcomopen, 196 .d_close = plcomclose, 197 .d_read = plcomread, 198 .d_write = plcomwrite, 199 .d_ioctl = plcomioctl, 200 .d_stop = plcomstop, 201 .d_tty = plcomtty, 202 .d_poll = plcompoll, 203 .d_mmap = nommap, 204 .d_kqfilter = ttykqfilter, 205 .d_discard = nodiscard, 206 .d_flag = D_TTY 207 }; 208 209 /* 210 * Make this an option variable one can patch. 211 * But be warned: this must be a power of 2! 212 */ 213 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 214 215 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 216 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 217 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 218 219 static int plcomconsunit = -1; 220 static struct plcom_instance plcomcons_info; 221 222 static int plcomconsattached; 223 static int plcomconsrate; 224 static tcflag_t plcomconscflag; 225 static struct cnm_state plcom_cnm_state; 226 227 static int ppscap = 228 PPS_TSFMT_TSPEC | 229 PPS_CAPTUREASSERT | 230 PPS_CAPTURECLEAR | 231 #ifdef PPS_SYNC 232 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 233 #endif /* PPS_SYNC */ 234 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 235 236 #ifdef KGDB 237 #include <sys/kgdb.h> 238 239 static struct plcom_instance plcomkgdb_info; 240 static int plcom_kgdb_attached; 241 242 int plcom_kgdb_getc (void *); 243 void plcom_kgdb_putc (void *, int); 244 #endif /* KGDB */ 245 246 #define PLCOMDIALOUT_MASK TTDIALOUT_MASK 247 248 #define PLCOMUNIT(x) TTUNIT(x) 249 #define PLCOMDIALOUT(x) TTDIALOUT(x) 250 251 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 252 device_is_active((sc)->sc_dev)) 253 254 #define BR BUS_SPACE_BARRIER_READ 255 #define BW BUS_SPACE_BARRIER_WRITE 256 #define PLCOM_BARRIER(pi, f) \ 257 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 258 259 static uint8_t 260 pread1(struct plcom_instance *pi, bus_size_t reg) 261 { 262 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 263 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 264 265 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 266 (8 * (reg & 3)); 267 } 268 int nhcr; 269 static void 270 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 271 { 272 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 273 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 274 } else { 275 const size_t shift = 8 * (o & 3); 276 o &= -4; 277 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 278 tmp = (val << shift) | (tmp & ~(0xff << shift)); 279 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 280 } 281 } 282 283 static void 284 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 285 bus_size_t count) 286 { 287 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 288 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 289 } else { 290 KASSERT((o & 3) == 0); 291 while (count--) { 292 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 293 }; 294 } 295 } 296 297 #define PREAD1(pi, reg) pread1(pi, reg) 298 #define PREAD4(pi, reg) \ 299 (bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))) 300 301 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 302 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 303 #define PWRITE4(pi, reg, val) \ 304 (bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))) 305 306 int 307 pl010comspeed(long speed, long frequency) 308 { 309 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 310 311 int x, err; 312 313 #if 0 314 if (speed == 0) 315 return 0; 316 #endif 317 if (speed <= 0) 318 return -1; 319 x = divrnd(frequency / 16, speed); 320 if (x <= 0) 321 return -1; 322 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 323 if (err < 0) 324 err = -err; 325 if (err > PLCOM_TOLERANCE) 326 return -1; 327 return x; 328 329 #undef divrnd 330 } 331 332 int 333 pl011comspeed(long speed, long frequency) 334 { 335 int denom = 16 * speed; 336 int div = frequency / denom; 337 int rem = frequency % denom; 338 339 int ibrd = div << 6; 340 int fbrd = (((8 * rem) / speed) + 1) / 2; 341 342 /* Tolerance? */ 343 return ibrd | fbrd; 344 } 345 346 #ifdef PLCOM_DEBUG 347 int plcom_debug = 0; 348 349 void plcomstatus (struct plcom_softc *, const char *); 350 void 351 plcomstatus(struct plcom_softc *sc, const char *str) 352 { 353 struct tty *tp = sc->sc_tty; 354 355 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 356 device_xname(sc->sc_dev), str, 357 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 358 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 359 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 360 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 361 sc->sc_tx_stopped ? "+" : "-"); 362 363 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 364 device_xname(sc->sc_dev), str, 365 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 366 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 367 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 368 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 369 sc->sc_rx_flags); 370 } 371 #endif 372 373 #if 0 374 int 375 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 376 { 377 int data; 378 379 /* Disable the UART. */ 380 bus_space_write_1(iot, ioh, plcom_cr, 0); 381 /* Make sure the FIFO is off. */ 382 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 383 /* Disable interrupts. */ 384 bus_space_write_1(iot, ioh, plcom_iir, 0); 385 386 /* Make sure we swallow anything in the receiving register. */ 387 data = bus_space_read_1(iot, ioh, plcom_dr); 388 389 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 390 return 0; 391 392 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 393 394 if (data != PL01X_FR_RXFE) 395 return 0; 396 397 return 1; 398 } 399 #endif 400 401 /* 402 * No locking in this routine; it is only called during attach, 403 * or with the port already locked. 404 */ 405 static void 406 plcom_enable_debugport(struct plcom_softc *sc) 407 { 408 struct plcom_instance *pi = &sc->sc_pi; 409 410 sc->sc_cr = PL01X_CR_UARTEN; 411 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 412 413 /* Turn on line break interrupt, set carrier. */ 414 switch (pi->pi_type) { 415 case PLCOM_TYPE_PL010: 416 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 417 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 418 if (sc->sc_set_mcr) { 419 /* XXX device_unit() abuse */ 420 sc->sc_set_mcr(sc->sc_set_mcr_arg, 421 device_unit(sc->sc_dev), sc->sc_mcr); 422 } 423 break; 424 case PLCOM_TYPE_PL011: 425 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 426 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 427 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 428 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 429 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 430 break; 431 } 432 433 } 434 435 void 436 plcom_attach_subr(struct plcom_softc *sc) 437 { 438 struct plcom_instance *pi = &sc->sc_pi; 439 struct tty *tp; 440 441 callout_init(&sc->sc_diag_callout, 0); 442 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 443 444 switch (pi->pi_type) { 445 case PLCOM_TYPE_PL010: 446 case PLCOM_TYPE_PL011: 447 break; 448 default: 449 aprint_error_dev(sc->sc_dev, 450 "Unknown plcom type: %d\n", pi->pi_type); 451 return; 452 } 453 454 /* Disable interrupts before configuring the device. */ 455 sc->sc_cr = 0; 456 sc->sc_imsc = 0; 457 458 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 459 pi->pi_iobase == plcomcons_info.pi_iobase) { 460 plcomconsattached = 1; 461 462 /* Make sure the console is always "hardwired". */ 463 delay(1000); /* wait for output to finish */ 464 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 465 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 466 /* 467 * Must re-enable the console immediately, or we will 468 * hang when trying to print. 469 */ 470 sc->sc_cr = PL01X_CR_UARTEN; 471 if (pi->pi_type == PLCOM_TYPE_PL011) 472 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 473 } 474 475 switch (pi->pi_type) { 476 case PLCOM_TYPE_PL010: 477 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 478 break; 479 480 case PLCOM_TYPE_PL011: 481 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 482 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 483 break; 484 } 485 486 if (sc->sc_fifolen == 0) { 487 switch (pi->pi_type) { 488 case PLCOM_TYPE_PL010: 489 /* 490 * The PL010 has a 16-byte fifo, but the tx interrupt 491 * triggers when there is space for 8 more bytes. 492 */ 493 sc->sc_fifolen = 8; 494 break; 495 case PLCOM_TYPE_PL011: 496 /* Some revisions have a 32 byte TX FIFO */ 497 sc->sc_fifolen = 16; 498 break; 499 } 500 } 501 502 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 503 sc->sc_fifolen = 1; 504 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 505 } 506 507 if (sc->sc_fifolen > 1) 508 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 509 510 tp = tty_alloc(); 511 tp->t_oproc = plcomstart; 512 tp->t_param = plcomparam; 513 tp->t_hwiflow = plcomhwiflow; 514 515 sc->sc_tty = tp; 516 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 517 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 518 sc->sc_rbavail = plcom_rbuf_size; 519 if (sc->sc_rbuf == NULL) { 520 aprint_error_dev(sc->sc_dev, 521 "unable to allocate ring buffer\n"); 522 return; 523 } 524 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 525 526 tty_attach(tp); 527 528 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 529 int maj; 530 531 /* locate the major number */ 532 maj = cdevsw_lookup_major(&plcom_cdevsw); 533 534 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 535 536 aprint_normal_dev(sc->sc_dev, "console\n"); 537 } 538 539 #ifdef KGDB 540 /* 541 * Allow kgdb to "take over" this port. If this is 542 * the kgdb device, it has exclusive use. 543 */ 544 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 545 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 546 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 547 plcom_kgdb_attached = 1; 548 549 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 550 } 551 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 552 } 553 #endif 554 555 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 556 557 #ifdef RND_COM 558 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 559 RND_TYPE_TTY, RND_FLAG_DEFAULT); 560 #endif 561 562 /* 563 * if there are no enable/disable functions, assume the device 564 * is always enabled 565 */ 566 if (!sc->enable) 567 sc->enabled = 1; 568 569 plcom_config(sc); 570 571 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 572 } 573 574 void 575 plcom_config(struct plcom_softc *sc) 576 { 577 struct plcom_instance *pi = &sc->sc_pi; 578 579 /* Disable interrupts before configuring the device. */ 580 sc->sc_cr = 0; 581 sc->sc_imsc = 0; 582 switch (pi->pi_type) { 583 case PLCOM_TYPE_PL010: 584 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 585 break; 586 587 case PLCOM_TYPE_PL011: 588 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 589 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 590 break; 591 } 592 593 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 594 plcom_enable_debugport(sc); 595 } 596 597 int 598 plcom_detach(device_t self, int flags) 599 { 600 struct plcom_softc *sc = device_private(self); 601 int maj, mn; 602 603 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 604 return EBUSY; 605 606 if (sc->disable != NULL && sc->enabled != 0) { 607 (*sc->disable)(sc); 608 sc->enabled = 0; 609 } 610 611 /* locate the major number */ 612 maj = cdevsw_lookup_major(&plcom_cdevsw); 613 614 /* Nuke the vnodes for any open instances. */ 615 mn = device_unit(self); 616 vdevgone(maj, mn, mn, VCHR); 617 618 mn |= PLCOMDIALOUT_MASK; 619 vdevgone(maj, mn, mn, VCHR); 620 621 if (sc->sc_rbuf == NULL) { 622 /* 623 * Ring buffer allocation failed in the plcom_attach_subr, 624 * only the tty is allocated, and nothing else. 625 */ 626 tty_free(sc->sc_tty); 627 return 0; 628 } 629 630 /* Free the receive buffer. */ 631 free(sc->sc_rbuf, M_DEVBUF); 632 633 /* Detach and free the tty. */ 634 tty_detach(sc->sc_tty); 635 tty_free(sc->sc_tty); 636 637 /* Unhook the soft interrupt handler. */ 638 softint_disestablish(sc->sc_si); 639 640 #ifdef RND_COM 641 /* Unhook the entropy source. */ 642 rnd_detach_source(&sc->rnd_source); 643 #endif 644 callout_destroy(&sc->sc_diag_callout); 645 646 /* Destroy the lock. */ 647 mutex_destroy(&sc->sc_lock); 648 649 return 0; 650 } 651 652 int 653 plcom_activate(device_t self, enum devact act) 654 { 655 struct plcom_softc *sc = device_private(self); 656 657 switch (act) { 658 case DVACT_DEACTIVATE: 659 sc->enabled = 0; 660 return 0; 661 default: 662 return EOPNOTSUPP; 663 } 664 } 665 666 void 667 plcom_shutdown(struct plcom_softc *sc) 668 { 669 struct plcom_instance *pi = &sc->sc_pi; 670 struct tty *tp = sc->sc_tty; 671 mutex_spin_enter(&sc->sc_lock); 672 673 /* If we were asserting flow control, then deassert it. */ 674 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 675 plcom_hwiflow(sc); 676 677 /* Clear any break condition set with TIOCSBRK. */ 678 plcom_break(sc, 0); 679 680 /* Turn off PPS capture on last close. */ 681 mutex_spin_enter(&timecounter_lock); 682 sc->sc_ppsmask = 0; 683 sc->ppsparam.mode = 0; 684 mutex_spin_exit(&timecounter_lock); 685 686 /* 687 * Hang up if necessary. Wait a bit, so the other side has time to 688 * notice even if we immediately open the port again. 689 * Avoid tsleeping above splhigh(). 690 */ 691 if (ISSET(tp->t_cflag, HUPCL)) { 692 plcom_modem(sc, 0); 693 mutex_spin_exit(&sc->sc_lock); 694 /* XXX will only timeout */ 695 (void) kpause(ttclos, false, hz, NULL); 696 mutex_spin_enter(&sc->sc_lock); 697 } 698 699 sc->sc_cr = 0; 700 sc->sc_imsc = 0; 701 /* Turn off interrupts. */ 702 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 703 /* interrupt on break */ 704 705 sc->sc_cr = PL01X_CR_UARTEN; 706 sc->sc_imsc = 0; 707 switch (pi->pi_type) { 708 case PLCOM_TYPE_PL010: 709 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 710 break; 711 case PLCOM_TYPE_PL011: 712 SET(sc->sc_cr, PL011_CR_RXE); 713 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 714 break; 715 } 716 } 717 switch (pi->pi_type) { 718 case PLCOM_TYPE_PL010: 719 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 720 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 721 break; 722 case PLCOM_TYPE_PL011: 723 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 724 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 725 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 726 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 727 break; 728 } 729 730 mutex_spin_exit(&sc->sc_lock); 731 if (sc->disable) { 732 #ifdef DIAGNOSTIC 733 if (!sc->enabled) 734 panic("plcom_shutdown: not enabled?"); 735 #endif 736 (*sc->disable)(sc); 737 sc->enabled = 0; 738 } 739 } 740 741 int 742 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 743 { 744 struct plcom_softc *sc; 745 struct plcom_instance *pi; 746 struct tty *tp; 747 int s; 748 int error; 749 750 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 751 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 752 sc->sc_rbuf == NULL) 753 return ENXIO; 754 755 if (!device_is_active(sc->sc_dev)) 756 return ENXIO; 757 758 pi = &sc->sc_pi; 759 760 #ifdef KGDB 761 /* 762 * If this is the kgdb port, no other use is permitted. 763 */ 764 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 765 return EBUSY; 766 #endif 767 768 tp = sc->sc_tty; 769 770 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 771 return (EBUSY); 772 773 s = spltty(); 774 775 /* 776 * Do the following iff this is a first open. 777 */ 778 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 779 struct termios t; 780 781 tp->t_dev = dev; 782 783 if (sc->enable) { 784 if ((*sc->enable)(sc)) { 785 splx(s); 786 aprint_error_dev(sc->sc_dev, 787 "device enable failed\n"); 788 return EIO; 789 } 790 mutex_spin_enter(&sc->sc_lock); 791 sc->enabled = 1; 792 plcom_config(sc); 793 } else { 794 mutex_spin_enter(&sc->sc_lock); 795 } 796 797 /* Turn on interrupts. */ 798 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 799 /* Fetch the current modem control status, needed later. */ 800 sc->sc_cr = PL01X_CR_UARTEN; 801 switch (pi->pi_type) { 802 case PLCOM_TYPE_PL010: 803 SET(sc->sc_cr, 804 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 805 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 806 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 807 break; 808 case PLCOM_TYPE_PL011: 809 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 810 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 811 PL011_INT_MSMASK); 812 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 813 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 814 break; 815 } 816 817 /* Clear PPS capture state on first open. */ 818 819 mutex_spin_enter(&timecounter_lock); 820 sc->sc_ppsmask = 0; 821 sc->ppsparam.mode = 0; 822 mutex_spin_exit(&timecounter_lock); 823 824 mutex_spin_exit(&sc->sc_lock); 825 826 /* 827 * Initialize the termios status to the defaults. Add in the 828 * sticky bits from TIOCSFLAGS. 829 */ 830 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 831 t.c_ospeed = plcomconsrate; 832 t.c_cflag = plcomconscflag; 833 } else { 834 t.c_ospeed = TTYDEF_SPEED; 835 t.c_cflag = TTYDEF_CFLAG; 836 } 837 t.c_ispeed = t.c_ospeed; 838 839 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 840 SET(t.c_cflag, CLOCAL); 841 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 842 SET(t.c_cflag, CRTSCTS); 843 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 844 SET(t.c_cflag, MDMBUF); 845 /* Make sure plcomparam() will do something. */ 846 tp->t_ospeed = 0; 847 (void) plcomparam(tp, &t); 848 tp->t_iflag = TTYDEF_IFLAG; 849 tp->t_oflag = TTYDEF_OFLAG; 850 tp->t_lflag = TTYDEF_LFLAG; 851 ttychars(tp); 852 ttsetwater(tp); 853 854 mutex_spin_enter(&sc->sc_lock); 855 856 /* 857 * Turn on DTR. We must always do this, even if carrier is not 858 * present, because otherwise we'd have to use TIOCSDTR 859 * immediately after setting CLOCAL, which applications do not 860 * expect. We always assert DTR while the device is open 861 * unless explicitly requested to deassert it. 862 */ 863 plcom_modem(sc, 1); 864 865 /* Clear the input ring, and unblock. */ 866 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 867 sc->sc_rbavail = plcom_rbuf_size; 868 plcom_iflush(sc); 869 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 870 plcom_hwiflow(sc); 871 872 #ifdef PLCOM_DEBUG 873 if (plcom_debug) 874 plcomstatus(sc, "plcomopen "); 875 #endif 876 877 mutex_spin_exit(&sc->sc_lock); 878 } 879 880 splx(s); 881 882 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 883 if (error) 884 goto bad; 885 886 error = (*tp->t_linesw->l_open)(dev, tp); 887 if (error) 888 goto bad; 889 890 return 0; 891 892 bad: 893 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 894 /* 895 * We failed to open the device, and nobody else had it opened. 896 * Clean up the state as appropriate. 897 */ 898 plcom_shutdown(sc); 899 } 900 901 return error; 902 } 903 904 int 905 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 906 { 907 struct plcom_softc *sc = 908 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 909 struct tty *tp = sc->sc_tty; 910 911 /* XXX This is for cons.c. */ 912 if (!ISSET(tp->t_state, TS_ISOPEN)) 913 return 0; 914 915 (*tp->t_linesw->l_close)(tp, flag); 916 ttyclose(tp); 917 918 if (PLCOM_ISALIVE(sc) == 0) 919 return 0; 920 921 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 922 /* 923 * Although we got a last close, the device may still be in 924 * use; e.g. if this was the dialout node, and there are still 925 * processes waiting for carrier on the non-dialout node. 926 */ 927 plcom_shutdown(sc); 928 } 929 930 return 0; 931 } 932 933 int 934 plcomread(dev_t dev, struct uio *uio, int flag) 935 { 936 struct plcom_softc *sc = 937 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 938 struct tty *tp = sc->sc_tty; 939 940 if (PLCOM_ISALIVE(sc) == 0) 941 return EIO; 942 943 return (*tp->t_linesw->l_read)(tp, uio, flag); 944 } 945 946 int 947 plcomwrite(dev_t dev, struct uio *uio, int flag) 948 { 949 struct plcom_softc *sc = 950 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 951 struct tty *tp = sc->sc_tty; 952 953 if (PLCOM_ISALIVE(sc) == 0) 954 return EIO; 955 956 return (*tp->t_linesw->l_write)(tp, uio, flag); 957 } 958 959 int 960 plcompoll(dev_t dev, int events, struct lwp *l) 961 { 962 struct plcom_softc *sc = 963 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 964 struct tty *tp = sc->sc_tty; 965 966 if (PLCOM_ISALIVE(sc) == 0) 967 return EIO; 968 969 return (*tp->t_linesw->l_poll)(tp, events, l); 970 } 971 972 struct tty * 973 plcomtty(dev_t dev) 974 { 975 struct plcom_softc *sc = 976 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 977 struct tty *tp = sc->sc_tty; 978 979 return tp; 980 } 981 982 int 983 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 984 { 985 struct plcom_softc *sc = 986 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 987 struct tty *tp; 988 int error; 989 990 if (sc == NULL) 991 return ENXIO; 992 if (PLCOM_ISALIVE(sc) == 0) 993 return EIO; 994 995 tp = sc->sc_tty; 996 997 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 998 if (error != EPASSTHROUGH) 999 return error; 1000 1001 error = ttioctl(tp, cmd, data, flag, l); 1002 if (error != EPASSTHROUGH) 1003 return error; 1004 1005 error = 0; 1006 switch (cmd) { 1007 case TIOCSFLAGS: 1008 error = kauth_authorize_device_tty(l->l_cred, 1009 KAUTH_DEVICE_TTY_PRIVSET, tp); 1010 break; 1011 default: 1012 /* nothing */ 1013 break; 1014 } 1015 if (error) { 1016 return error; 1017 } 1018 1019 mutex_spin_enter(&sc->sc_lock); 1020 switch (cmd) { 1021 case TIOCSBRK: 1022 plcom_break(sc, 1); 1023 break; 1024 1025 case TIOCCBRK: 1026 plcom_break(sc, 0); 1027 break; 1028 1029 case TIOCSDTR: 1030 plcom_modem(sc, 1); 1031 break; 1032 1033 case TIOCCDTR: 1034 plcom_modem(sc, 0); 1035 break; 1036 1037 case TIOCGFLAGS: 1038 *(int *)data = sc->sc_swflags; 1039 break; 1040 1041 case TIOCSFLAGS: 1042 sc->sc_swflags = *(int *)data; 1043 break; 1044 1045 case TIOCMSET: 1046 case TIOCMBIS: 1047 case TIOCMBIC: 1048 tiocm_to_plcom(sc, cmd, *(int *)data); 1049 break; 1050 1051 case TIOCMGET: 1052 *(int *)data = plcom_to_tiocm(sc); 1053 break; 1054 1055 case PPS_IOC_CREATE: 1056 break; 1057 1058 case PPS_IOC_DESTROY: 1059 break; 1060 1061 case PPS_IOC_GETPARAMS: { 1062 pps_params_t *pp; 1063 pp = (pps_params_t *)data; 1064 mutex_spin_enter(&timecounter_lock); 1065 *pp = sc->ppsparam; 1066 mutex_spin_exit(&timecounter_lock); 1067 break; 1068 } 1069 1070 case PPS_IOC_SETPARAMS: { 1071 pps_params_t *pp; 1072 int mode; 1073 pp = (pps_params_t *)data; 1074 mutex_spin_enter(&timecounter_lock); 1075 if (pp->mode & ~ppscap) { 1076 error = EINVAL; 1077 mutex_spin_exit(&timecounter_lock); 1078 break; 1079 } 1080 sc->ppsparam = *pp; 1081 /* 1082 * Compute msr masks from user-specified timestamp state. 1083 */ 1084 mode = sc->ppsparam.mode; 1085 #ifdef PPS_SYNC 1086 if (mode & PPS_HARDPPSONASSERT) { 1087 mode |= PPS_CAPTUREASSERT; 1088 /* XXX revoke any previous HARDPPS source */ 1089 } 1090 if (mode & PPS_HARDPPSONCLEAR) { 1091 mode |= PPS_CAPTURECLEAR; 1092 /* XXX revoke any previous HARDPPS source */ 1093 } 1094 #endif /* PPS_SYNC */ 1095 switch (mode & PPS_CAPTUREBOTH) { 1096 case 0: 1097 sc->sc_ppsmask = 0; 1098 break; 1099 1100 case PPS_CAPTUREASSERT: 1101 sc->sc_ppsmask = PL01X_MSR_DCD; 1102 sc->sc_ppsassert = PL01X_MSR_DCD; 1103 sc->sc_ppsclear = -1; 1104 break; 1105 1106 case PPS_CAPTURECLEAR: 1107 sc->sc_ppsmask = PL01X_MSR_DCD; 1108 sc->sc_ppsassert = -1; 1109 sc->sc_ppsclear = 0; 1110 break; 1111 1112 case PPS_CAPTUREBOTH: 1113 sc->sc_ppsmask = PL01X_MSR_DCD; 1114 sc->sc_ppsassert = PL01X_MSR_DCD; 1115 sc->sc_ppsclear = 0; 1116 break; 1117 1118 default: 1119 error = EINVAL; 1120 break; 1121 } 1122 mutex_spin_exit(&timecounter_lock); 1123 break; 1124 } 1125 1126 case PPS_IOC_GETCAP: 1127 *(int*)data = ppscap; 1128 break; 1129 1130 case PPS_IOC_FETCH: { 1131 pps_info_t *pi; 1132 pi = (pps_info_t *)data; 1133 mutex_spin_enter(&timecounter_lock); 1134 *pi = sc->ppsinfo; 1135 mutex_spin_exit(&timecounter_lock); 1136 break; 1137 } 1138 1139 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1140 /* 1141 * Some GPS clocks models use the falling rather than 1142 * rising edge as the on-the-second signal. 1143 * The old API has no way to specify PPS polarity. 1144 */ 1145 mutex_spin_enter(&timecounter_lock); 1146 sc->sc_ppsmask = PL01X_MSR_DCD; 1147 #ifndef PPS_TRAILING_EDGE 1148 sc->sc_ppsassert = PL01X_MSR_DCD; 1149 sc->sc_ppsclear = -1; 1150 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1151 &sc->ppsinfo.assert_timestamp); 1152 #else 1153 sc->sc_ppsassert = -1 1154 sc->sc_ppsclear = 0; 1155 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1156 &sc->ppsinfo.clear_timestamp); 1157 #endif 1158 mutex_spin_exit(&timecounter_lock); 1159 break; 1160 1161 default: 1162 error = EPASSTHROUGH; 1163 break; 1164 } 1165 1166 mutex_spin_exit(&sc->sc_lock); 1167 1168 #ifdef PLCOM_DEBUG 1169 if (plcom_debug) 1170 plcomstatus(sc, "plcomioctl "); 1171 #endif 1172 1173 return error; 1174 } 1175 1176 integrate void 1177 plcom_schedrx(struct plcom_softc *sc) 1178 { 1179 1180 sc->sc_rx_ready = 1; 1181 1182 /* Wake up the poller. */ 1183 softint_schedule(sc->sc_si); 1184 } 1185 1186 void 1187 plcom_break(struct plcom_softc *sc, int onoff) 1188 { 1189 1190 if (onoff) 1191 SET(sc->sc_lcr, PL01X_LCR_BRK); 1192 else 1193 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1194 1195 if (!sc->sc_heldchange) { 1196 if (sc->sc_tx_busy) { 1197 sc->sc_heldtbc = sc->sc_tbc; 1198 sc->sc_tbc = 0; 1199 sc->sc_heldchange = 1; 1200 } else 1201 plcom_loadchannelregs(sc); 1202 } 1203 } 1204 1205 void 1206 plcom_modem(struct plcom_softc *sc, int onoff) 1207 { 1208 1209 if (sc->sc_mcr_dtr == 0) 1210 return; 1211 1212 if (onoff) 1213 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1214 else 1215 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1216 1217 if (!sc->sc_heldchange) { 1218 if (sc->sc_tx_busy) { 1219 sc->sc_heldtbc = sc->sc_tbc; 1220 sc->sc_tbc = 0; 1221 sc->sc_heldchange = 1; 1222 } else 1223 plcom_loadchannelregs(sc); 1224 } 1225 } 1226 1227 void 1228 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1229 { 1230 u_char plcombits; 1231 1232 plcombits = 0; 1233 if (ISSET(ttybits, TIOCM_DTR)) 1234 SET(plcombits, PL01X_MCR_DTR); 1235 if (ISSET(ttybits, TIOCM_RTS)) 1236 SET(plcombits, PL01X_MCR_RTS); 1237 1238 switch (how) { 1239 case TIOCMBIC: 1240 CLR(sc->sc_mcr, plcombits); 1241 break; 1242 1243 case TIOCMBIS: 1244 SET(sc->sc_mcr, plcombits); 1245 break; 1246 1247 case TIOCMSET: 1248 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1249 SET(sc->sc_mcr, plcombits); 1250 break; 1251 } 1252 1253 if (!sc->sc_heldchange) { 1254 if (sc->sc_tx_busy) { 1255 sc->sc_heldtbc = sc->sc_tbc; 1256 sc->sc_tbc = 0; 1257 sc->sc_heldchange = 1; 1258 } else 1259 plcom_loadchannelregs(sc); 1260 } 1261 } 1262 1263 int 1264 plcom_to_tiocm(struct plcom_softc *sc) 1265 { 1266 u_char plcombits; 1267 int ttybits = 0; 1268 1269 plcombits = sc->sc_mcr; 1270 if (ISSET(plcombits, PL01X_MCR_DTR)) 1271 SET(ttybits, TIOCM_DTR); 1272 if (ISSET(plcombits, PL01X_MCR_RTS)) 1273 SET(ttybits, TIOCM_RTS); 1274 1275 plcombits = sc->sc_msr; 1276 if (ISSET(plcombits, PL01X_MSR_DCD)) 1277 SET(ttybits, TIOCM_CD); 1278 if (ISSET(plcombits, PL01X_MSR_CTS)) 1279 SET(ttybits, TIOCM_CTS); 1280 if (ISSET(plcombits, PL01X_MSR_DSR)) 1281 SET(ttybits, TIOCM_DSR); 1282 if (ISSET(plcombits, PL011_MSR_RI)) 1283 SET(ttybits, TIOCM_RI); 1284 1285 if (sc->sc_cr != 0) 1286 SET(ttybits, TIOCM_LE); 1287 1288 return ttybits; 1289 } 1290 1291 static u_char 1292 cflag2lcr(tcflag_t cflag) 1293 { 1294 u_char lcr = 0; 1295 1296 switch (ISSET(cflag, CSIZE)) { 1297 case CS5: 1298 SET(lcr, PL01X_LCR_5BITS); 1299 break; 1300 case CS6: 1301 SET(lcr, PL01X_LCR_6BITS); 1302 break; 1303 case CS7: 1304 SET(lcr, PL01X_LCR_7BITS); 1305 break; 1306 case CS8: 1307 SET(lcr, PL01X_LCR_8BITS); 1308 break; 1309 } 1310 if (ISSET(cflag, PARENB)) { 1311 SET(lcr, PL01X_LCR_PEN); 1312 if (!ISSET(cflag, PARODD)) 1313 SET(lcr, PL01X_LCR_EPS); 1314 } 1315 if (ISSET(cflag, CSTOPB)) 1316 SET(lcr, PL01X_LCR_STP2); 1317 1318 return lcr; 1319 } 1320 1321 int 1322 plcomparam(struct tty *tp, struct termios *t) 1323 { 1324 struct plcom_softc *sc = 1325 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1326 struct plcom_instance *pi = &sc->sc_pi; 1327 int ospeed = -1; 1328 u_char lcr; 1329 1330 if (PLCOM_ISALIVE(sc) == 0) 1331 return EIO; 1332 1333 switch (pi->pi_type) { 1334 case PLCOM_TYPE_PL010: 1335 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1336 break; 1337 case PLCOM_TYPE_PL011: 1338 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1339 break; 1340 } 1341 1342 /* Check requested parameters. */ 1343 if (ospeed < 0) 1344 return EINVAL; 1345 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1346 return EINVAL; 1347 1348 /* 1349 * For the console, always force CLOCAL and !HUPCL, so that the port 1350 * is always active. 1351 */ 1352 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1353 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1354 SET(t->c_cflag, CLOCAL); 1355 CLR(t->c_cflag, HUPCL); 1356 } 1357 1358 /* 1359 * If there were no changes, don't do anything. This avoids dropping 1360 * input and improves performance when all we did was frob things like 1361 * VMIN and VTIME. 1362 */ 1363 if (tp->t_ospeed == t->c_ospeed && 1364 tp->t_cflag == t->c_cflag) 1365 return 0; 1366 1367 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1368 1369 mutex_spin_enter(&sc->sc_lock); 1370 1371 sc->sc_lcr = lcr; 1372 1373 /* 1374 * PL010 has a fixed-length FIFO trigger point. 1375 */ 1376 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1377 sc->sc_fifo = 1; 1378 else 1379 sc->sc_fifo = 0; 1380 1381 if (sc->sc_fifo) 1382 SET(sc->sc_lcr, PL01X_LCR_FEN); 1383 1384 /* 1385 * If we're not in a mode that assumes a connection is present, then 1386 * ignore carrier changes. 1387 */ 1388 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1389 sc->sc_msr_dcd = 0; 1390 else 1391 sc->sc_msr_dcd = PL01X_MSR_DCD; 1392 /* 1393 * Set the flow control pins depending on the current flow control 1394 * mode. 1395 */ 1396 if (ISSET(t->c_cflag, CRTSCTS)) { 1397 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1398 sc->sc_mcr_rts = PL01X_MCR_RTS; 1399 sc->sc_msr_cts = PL01X_MSR_CTS; 1400 } else if (ISSET(t->c_cflag, MDMBUF)) { 1401 /* 1402 * For DTR/DCD flow control, make sure we don't toggle DTR for 1403 * carrier detection. 1404 */ 1405 sc->sc_mcr_dtr = 0; 1406 sc->sc_mcr_rts = PL01X_MCR_DTR; 1407 sc->sc_msr_cts = PL01X_MSR_DCD; 1408 } else { 1409 /* 1410 * If no flow control, then always set RTS. This will make 1411 * the other side happy if it mistakenly thinks we're doing 1412 * RTS/CTS flow control. 1413 */ 1414 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1415 sc->sc_mcr_rts = 0; 1416 sc->sc_msr_cts = 0; 1417 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1418 SET(sc->sc_mcr, PL01X_MCR_RTS); 1419 else 1420 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1421 } 1422 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1423 1424 #if 0 1425 if (ospeed == 0) 1426 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1427 else 1428 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1429 #endif 1430 1431 switch (pi->pi_type) { 1432 case PLCOM_TYPE_PL010: 1433 sc->sc_ratel = ospeed & 0xff; 1434 sc->sc_rateh = (ospeed >> 8) & 0xff; 1435 break; 1436 case PLCOM_TYPE_PL011: 1437 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1438 sc->sc_rateh = ospeed >> 6; 1439 break; 1440 } 1441 1442 /* And copy to tty. */ 1443 tp->t_ispeed = t->c_ospeed; 1444 tp->t_ospeed = t->c_ospeed; 1445 tp->t_cflag = t->c_cflag; 1446 1447 if (!sc->sc_heldchange) { 1448 if (sc->sc_tx_busy) { 1449 sc->sc_heldtbc = sc->sc_tbc; 1450 sc->sc_tbc = 0; 1451 sc->sc_heldchange = 1; 1452 } else 1453 plcom_loadchannelregs(sc); 1454 } 1455 1456 if (!ISSET(t->c_cflag, CHWFLOW)) { 1457 /* Disable the high water mark. */ 1458 sc->sc_r_hiwat = 0; 1459 sc->sc_r_lowat = 0; 1460 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1461 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1462 plcom_schedrx(sc); 1463 } 1464 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1465 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1466 plcom_hwiflow(sc); 1467 } 1468 } else { 1469 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1470 sc->sc_r_lowat = plcom_rbuf_lowat; 1471 } 1472 1473 mutex_spin_exit(&sc->sc_lock); 1474 1475 /* 1476 * Update the tty layer's idea of the carrier bit, in case we changed 1477 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1478 * explicit request. 1479 */ 1480 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1481 1482 #ifdef PLCOM_DEBUG 1483 if (plcom_debug) 1484 plcomstatus(sc, "plcomparam "); 1485 #endif 1486 1487 if (!ISSET(t->c_cflag, CHWFLOW)) { 1488 if (sc->sc_tx_stopped) { 1489 sc->sc_tx_stopped = 0; 1490 plcomstart(tp); 1491 } 1492 } 1493 1494 return 0; 1495 } 1496 1497 void 1498 plcom_iflush(struct plcom_softc *sc) 1499 { 1500 struct plcom_instance *pi = &sc->sc_pi; 1501 #ifdef DIAGNOSTIC 1502 int reg; 1503 #endif 1504 int timo; 1505 1506 #ifdef DIAGNOSTIC 1507 reg = 0xffff; 1508 #endif 1509 timo = 50000; 1510 /* flush any pending I/O */ 1511 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1512 && --timo) 1513 #ifdef DIAGNOSTIC 1514 reg = 1515 #else 1516 (void) 1517 #endif 1518 PREAD1(pi, PL01XCOM_DR); 1519 #ifdef DIAGNOSTIC 1520 if (!timo) 1521 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1522 reg); 1523 #endif 1524 } 1525 1526 void 1527 plcom_loadchannelregs(struct plcom_softc *sc) 1528 { 1529 struct plcom_instance *pi = &sc->sc_pi; 1530 1531 /* XXXXX necessary? */ 1532 plcom_iflush(sc); 1533 1534 switch (pi->pi_type) { 1535 case PLCOM_TYPE_PL010: 1536 PWRITE1(pi, PL010COM_CR, 0); 1537 if (sc->sc_frequency != 0) { 1538 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1539 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1540 } 1541 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1542 1543 /* XXX device_unit() abuse */ 1544 if (sc->sc_set_mcr) 1545 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1546 device_unit(sc->sc_dev), 1547 sc->sc_mcr_active = sc->sc_mcr); 1548 1549 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1550 break; 1551 1552 case PLCOM_TYPE_PL011: 1553 PWRITE4(pi, PL011COM_CR, 0); 1554 if (sc->sc_frequency != 0) { 1555 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1556 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1557 } 1558 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1559 sc->sc_mcr_active = sc->sc_mcr; 1560 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1561 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1562 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1563 break; 1564 } 1565 } 1566 1567 int 1568 plcomhwiflow(struct tty *tp, int block) 1569 { 1570 struct plcom_softc *sc = 1571 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1572 1573 if (PLCOM_ISALIVE(sc) == 0) 1574 return 0; 1575 1576 if (sc->sc_mcr_rts == 0) 1577 return 0; 1578 1579 mutex_spin_enter(&sc->sc_lock); 1580 1581 if (block) { 1582 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1583 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1584 plcom_hwiflow(sc); 1585 } 1586 } else { 1587 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1588 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1589 plcom_schedrx(sc); 1590 } 1591 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1592 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1593 plcom_hwiflow(sc); 1594 } 1595 } 1596 1597 mutex_spin_exit(&sc->sc_lock); 1598 return 1; 1599 } 1600 1601 /* 1602 * (un)block input via hw flowcontrol 1603 */ 1604 void 1605 plcom_hwiflow(struct plcom_softc *sc) 1606 { 1607 struct plcom_instance *pi = &sc->sc_pi; 1608 1609 if (sc->sc_mcr_rts == 0) 1610 return; 1611 1612 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1613 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1614 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1615 } else { 1616 SET(sc->sc_mcr, sc->sc_mcr_rts); 1617 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1618 } 1619 switch (pi->pi_type) { 1620 case PLCOM_TYPE_PL010: 1621 if (sc->sc_set_mcr) 1622 /* XXX device_unit() abuse */ 1623 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1624 device_unit(sc->sc_dev), sc->sc_mcr_active); 1625 break; 1626 case PLCOM_TYPE_PL011: 1627 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1628 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1629 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1630 break; 1631 } 1632 } 1633 1634 1635 void 1636 plcomstart(struct tty *tp) 1637 { 1638 struct plcom_softc *sc = 1639 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1640 struct plcom_instance *pi = &sc->sc_pi; 1641 int s; 1642 1643 if (PLCOM_ISALIVE(sc) == 0) 1644 return; 1645 1646 s = spltty(); 1647 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1648 goto out; 1649 if (sc->sc_tx_stopped) 1650 goto out; 1651 1652 if (!ttypull(tp)) 1653 goto out; 1654 1655 /* Grab the first contiguous region of buffer space. */ 1656 { 1657 u_char *tba; 1658 int tbc; 1659 1660 tba = tp->t_outq.c_cf; 1661 tbc = ndqb(&tp->t_outq, 0); 1662 1663 mutex_spin_enter(&sc->sc_lock); 1664 1665 sc->sc_tba = tba; 1666 sc->sc_tbc = tbc; 1667 } 1668 1669 SET(tp->t_state, TS_BUSY); 1670 sc->sc_tx_busy = 1; 1671 1672 /* Enable transmit completion interrupts if necessary. */ 1673 switch (pi->pi_type) { 1674 case PLCOM_TYPE_PL010: 1675 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1676 SET(sc->sc_cr, PL010_CR_TIE); 1677 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1678 } 1679 break; 1680 case PLCOM_TYPE_PL011: 1681 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1682 SET(sc->sc_imsc, PL011_INT_TX); 1683 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1684 } 1685 break; 1686 } 1687 1688 /* Output the first chunk of the contiguous buffer. */ 1689 { 1690 int n; 1691 1692 n = sc->sc_tbc; 1693 if (n > sc->sc_fifolen) 1694 n = sc->sc_fifolen; 1695 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1696 sc->sc_tbc -= n; 1697 sc->sc_tba += n; 1698 } 1699 mutex_spin_exit(&sc->sc_lock); 1700 out: 1701 splx(s); 1702 return; 1703 } 1704 1705 /* 1706 * Stop output on a line. 1707 */ 1708 void 1709 plcomstop(struct tty *tp, int flag) 1710 { 1711 struct plcom_softc *sc = 1712 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1713 1714 mutex_spin_enter(&sc->sc_lock); 1715 if (ISSET(tp->t_state, TS_BUSY)) { 1716 /* Stop transmitting at the next chunk. */ 1717 sc->sc_tbc = 0; 1718 sc->sc_heldtbc = 0; 1719 if (!ISSET(tp->t_state, TS_TTSTOP)) 1720 SET(tp->t_state, TS_FLUSH); 1721 } 1722 mutex_spin_exit(&sc->sc_lock); 1723 } 1724 1725 void 1726 plcomdiag(void *arg) 1727 { 1728 struct plcom_softc *sc = arg; 1729 int overflows, floods; 1730 1731 mutex_spin_enter(&sc->sc_lock); 1732 overflows = sc->sc_overflows; 1733 sc->sc_overflows = 0; 1734 floods = sc->sc_floods; 1735 sc->sc_floods = 0; 1736 sc->sc_errors = 0; 1737 mutex_spin_exit(&sc->sc_lock); 1738 1739 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1740 device_xname(sc->sc_dev), 1741 overflows, overflows == 1 ? "" : "s", 1742 floods, floods == 1 ? "" : "s"); 1743 } 1744 1745 integrate void 1746 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1747 { 1748 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1749 struct plcom_instance *pi = &sc->sc_pi; 1750 u_char *get, *end; 1751 u_int cc, scc; 1752 u_char rsr; 1753 int code; 1754 1755 end = sc->sc_ebuf; 1756 get = sc->sc_rbget; 1757 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1758 1759 if (cc == plcom_rbuf_size) { 1760 sc->sc_floods++; 1761 if (sc->sc_errors++ == 0) 1762 callout_reset(&sc->sc_diag_callout, 60 * hz, 1763 plcomdiag, sc); 1764 } 1765 1766 while (cc) { 1767 code = get[0]; 1768 rsr = get[1]; 1769 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1770 if (ISSET(rsr, PL01X_RSR_OE)) { 1771 sc->sc_overflows++; 1772 if (sc->sc_errors++ == 0) 1773 callout_reset(&sc->sc_diag_callout, 1774 60 * hz, plcomdiag, sc); 1775 } 1776 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1777 SET(code, TTY_FE); 1778 if (ISSET(rsr, PL01X_RSR_PE)) 1779 SET(code, TTY_PE); 1780 } 1781 if ((*rint)(code, tp) == -1) { 1782 /* 1783 * The line discipline's buffer is out of space. 1784 */ 1785 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1786 /* 1787 * We're either not using flow control, or the 1788 * line discipline didn't tell us to block for 1789 * some reason. Either way, we have no way to 1790 * know when there's more space available, so 1791 * just drop the rest of the data. 1792 */ 1793 get += cc << 1; 1794 if (get >= end) 1795 get -= plcom_rbuf_size << 1; 1796 cc = 0; 1797 } else { 1798 /* 1799 * Don't schedule any more receive processing 1800 * until the line discipline tells us there's 1801 * space available (through plcomhwiflow()). 1802 * Leave the rest of the data in the input 1803 * buffer. 1804 */ 1805 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1806 } 1807 break; 1808 } 1809 get += 2; 1810 if (get >= end) 1811 get = sc->sc_rbuf; 1812 cc--; 1813 } 1814 1815 if (cc != scc) { 1816 sc->sc_rbget = get; 1817 mutex_spin_enter(&sc->sc_lock); 1818 1819 cc = sc->sc_rbavail += scc - cc; 1820 /* Buffers should be ok again, release possible block. */ 1821 if (cc >= sc->sc_r_lowat) { 1822 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1823 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1824 switch (pi->pi_type) { 1825 case PLCOM_TYPE_PL010: 1826 SET(sc->sc_cr, 1827 PL010_CR_RIE | PL010_CR_RTIE); 1828 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1829 break; 1830 case PLCOM_TYPE_PL011: 1831 SET(sc->sc_imsc, 1832 PL011_INT_RX | PL011_INT_RT); 1833 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1834 break; 1835 } 1836 } 1837 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1838 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1839 plcom_hwiflow(sc); 1840 } 1841 } 1842 mutex_spin_exit(&sc->sc_lock); 1843 } 1844 } 1845 1846 integrate void 1847 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1848 { 1849 1850 CLR(tp->t_state, TS_BUSY); 1851 if (ISSET(tp->t_state, TS_FLUSH)) 1852 CLR(tp->t_state, TS_FLUSH); 1853 else 1854 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1855 (*tp->t_linesw->l_start)(tp); 1856 } 1857 1858 integrate void 1859 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1860 { 1861 u_char msr, delta; 1862 1863 mutex_spin_enter(&sc->sc_lock); 1864 msr = sc->sc_msr; 1865 delta = sc->sc_msr_delta; 1866 sc->sc_msr_delta = 0; 1867 mutex_spin_exit(&sc->sc_lock); 1868 1869 if (ISSET(delta, sc->sc_msr_dcd)) { 1870 /* 1871 * Inform the tty layer that carrier detect changed. 1872 */ 1873 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1874 } 1875 1876 if (ISSET(delta, sc->sc_msr_cts)) { 1877 /* Block or unblock output according to flow control. */ 1878 if (ISSET(msr, sc->sc_msr_cts)) { 1879 sc->sc_tx_stopped = 0; 1880 (*tp->t_linesw->l_start)(tp); 1881 } else { 1882 sc->sc_tx_stopped = 1; 1883 } 1884 } 1885 1886 #ifdef PLCOM_DEBUG 1887 if (plcom_debug) 1888 plcomstatus(sc, "plcom_stsoft"); 1889 #endif 1890 } 1891 1892 void 1893 plcomsoft(void *arg) 1894 { 1895 struct plcom_softc *sc = arg; 1896 struct tty *tp; 1897 1898 if (PLCOM_ISALIVE(sc) == 0) 1899 return; 1900 1901 tp = sc->sc_tty; 1902 1903 if (sc->sc_rx_ready) { 1904 sc->sc_rx_ready = 0; 1905 plcom_rxsoft(sc, tp); 1906 } 1907 1908 if (sc->sc_st_check) { 1909 sc->sc_st_check = 0; 1910 plcom_stsoft(sc, tp); 1911 } 1912 1913 if (sc->sc_tx_done) { 1914 sc->sc_tx_done = 0; 1915 plcom_txsoft(sc, tp); 1916 } 1917 } 1918 1919 bool 1920 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1921 { 1922 bool ret = false; 1923 u_int stat = 0; 1924 1925 switch (pi->pi_type) { 1926 case PLCOM_TYPE_PL010: 1927 stat = PREAD1(pi, PL010COM_IIR); 1928 ret = ISSET(stat, PL010_IIR_IMASK); 1929 break; 1930 case PLCOM_TYPE_PL011: 1931 stat = PREAD4(pi, PL011COM_MIS); 1932 ret = ISSET(stat, PL011_INT_ALLMASK); 1933 break; 1934 } 1935 *istatus = stat; 1936 1937 return ret; 1938 } 1939 1940 int 1941 plcomintr(void *arg) 1942 { 1943 struct plcom_softc *sc = arg; 1944 struct plcom_instance *pi = &sc->sc_pi; 1945 u_char *put, *end; 1946 u_int cc; 1947 u_int istatus = 0; 1948 u_char rsr; 1949 bool intr = false; 1950 1951 PLCOM_BARRIER(pi, BR | BW); 1952 1953 if (PLCOM_ISALIVE(sc) == 0) 1954 return 0; 1955 1956 mutex_spin_enter(&sc->sc_lock); 1957 intr = plcom_intstatus(pi, &istatus); 1958 if (!intr) { 1959 mutex_spin_exit(&sc->sc_lock); 1960 return 0; 1961 } 1962 1963 end = sc->sc_ebuf; 1964 put = sc->sc_rbput; 1965 cc = sc->sc_rbavail; 1966 1967 do { 1968 u_int msr = 0, delta, fr; 1969 bool rxintr = false, txintr = false, msintr; 1970 1971 /* don't need RI here*/ 1972 fr = PREAD1(pi, PL01XCOM_FR); 1973 1974 if (!ISSET(fr, PL01X_FR_RXFE) && 1975 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1976 while (cc > 0) { 1977 int cn_trapped = 0; 1978 put[0] = PREAD1(pi, PL01XCOM_DR); 1979 rsr = PREAD1(pi, PL01XCOM_RSR); 1980 /* Clear any error status. */ 1981 if (ISSET(rsr, PL01X_RSR_ERROR)) 1982 PWRITE1(pi, PL01XCOM_ECR, 0); 1983 if (ISSET(rsr, PL01X_RSR_BE)) { 1984 cn_trapped = 0; 1985 cn_check_magic(sc->sc_tty->t_dev, 1986 CNC_BREAK, plcom_cnm_state); 1987 if (cn_trapped) 1988 continue; 1989 #if defined(KGDB) 1990 if (ISSET(sc->sc_hwflags, 1991 PLCOM_HW_KGDB)) { 1992 kgdb_connect(1); 1993 continue; 1994 } 1995 #endif 1996 } 1997 1998 put[1] = rsr; 1999 cn_trapped = 0; 2000 cn_check_magic(sc->sc_tty->t_dev, put[0], 2001 plcom_cnm_state); 2002 if (cn_trapped) { 2003 fr = PREAD1(pi, PL01XCOM_FR); 2004 if (ISSET(fr, PL01X_FR_RXFE)) 2005 break; 2006 2007 continue; 2008 } 2009 put += 2; 2010 if (put >= end) 2011 put = sc->sc_rbuf; 2012 cc--; 2013 2014 /* don't need RI here*/ 2015 fr = PREAD1(pi, PL01XCOM_FR); 2016 if (ISSET(fr, PL01X_FR_RXFE)) 2017 break; 2018 } 2019 2020 /* 2021 * Current string of incoming characters ended because 2022 * no more data was available or we ran out of space. 2023 * Schedule a receive event if any data was received. 2024 * If we're out of space, turn off receive interrupts. 2025 */ 2026 sc->sc_rbput = put; 2027 sc->sc_rbavail = cc; 2028 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2029 sc->sc_rx_ready = 1; 2030 2031 /* 2032 * See if we are in danger of overflowing a buffer. If 2033 * so, use hardware flow control to ease the pressure. 2034 */ 2035 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2036 cc < sc->sc_r_hiwat) { 2037 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2038 plcom_hwiflow(sc); 2039 } 2040 2041 /* 2042 * If we're out of space, disable receive interrupts 2043 * until the queue has drained a bit. 2044 */ 2045 if (!cc) { 2046 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2047 switch (pi->pi_type) { 2048 case PLCOM_TYPE_PL010: 2049 CLR(sc->sc_cr, 2050 PL010_CR_RIE | PL010_CR_RTIE); 2051 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2052 break; 2053 case PLCOM_TYPE_PL011: 2054 CLR(sc->sc_imsc, 2055 PL011_INT_RT | PL011_INT_RX); 2056 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2057 break; 2058 } 2059 } 2060 } else { 2061 switch (pi->pi_type) { 2062 case PLCOM_TYPE_PL010: 2063 rxintr = ISSET(istatus, PL010_IIR_RIS); 2064 if (rxintr) { 2065 PWRITE1(pi, PL010COM_CR, 0); 2066 delay(10); 2067 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2068 continue; 2069 } 2070 break; 2071 case PLCOM_TYPE_PL011: 2072 rxintr = ISSET(istatus, PL011_INT_RX); 2073 if (rxintr) { 2074 PWRITE4(pi, PL011COM_CR, 0); 2075 delay(10); 2076 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2077 continue; 2078 } 2079 break; 2080 } 2081 } 2082 2083 switch (pi->pi_type) { 2084 case PLCOM_TYPE_PL010: 2085 msr = PREAD1(pi, PL01XCOM_FR); 2086 break; 2087 case PLCOM_TYPE_PL011: 2088 msr = PREAD4(pi, PL01XCOM_FR); 2089 break; 2090 } 2091 delta = msr ^ sc->sc_msr; 2092 sc->sc_msr = msr; 2093 2094 /* Clear any pending modem status interrupt. */ 2095 switch (pi->pi_type) { 2096 case PLCOM_TYPE_PL010: 2097 msintr = ISSET(istatus, PL010_IIR_MIS); 2098 if (msintr) { 2099 PWRITE1(pi, PL010COM_ICR, 0); 2100 } 2101 break; 2102 case PLCOM_TYPE_PL011: 2103 msintr = ISSET(istatus, PL011_INT_MSMASK); 2104 if (msintr) { 2105 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2106 } 2107 break; 2108 } 2109 /* 2110 * Pulse-per-second (PSS) signals on edge of DCD? 2111 * Process these even if line discipline is ignoring DCD. 2112 */ 2113 if (delta & sc->sc_ppsmask) { 2114 struct timeval tv; 2115 mutex_spin_enter(&timecounter_lock); 2116 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2117 /* XXX nanotime() */ 2118 microtime(&tv); 2119 TIMEVAL_TO_TIMESPEC(&tv, 2120 &sc->ppsinfo.assert_timestamp); 2121 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2122 timespecadd(&sc->ppsinfo.assert_timestamp, 2123 &sc->ppsparam.assert_offset, 2124 &sc->ppsinfo.assert_timestamp); 2125 } 2126 2127 #ifdef PPS_SYNC 2128 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2129 hardpps(&tv, tv.tv_usec); 2130 #endif 2131 sc->ppsinfo.assert_sequence++; 2132 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2133 2134 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2135 /* XXX nanotime() */ 2136 microtime(&tv); 2137 TIMEVAL_TO_TIMESPEC(&tv, 2138 &sc->ppsinfo.clear_timestamp); 2139 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2140 timespecadd(&sc->ppsinfo.clear_timestamp, 2141 &sc->ppsparam.clear_offset, 2142 &sc->ppsinfo.clear_timestamp); 2143 } 2144 2145 #ifdef PPS_SYNC 2146 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2147 hardpps(&tv, tv.tv_usec); 2148 #endif 2149 sc->ppsinfo.clear_sequence++; 2150 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2151 } 2152 mutex_spin_exit(&timecounter_lock); 2153 } 2154 2155 /* 2156 * Process normal status changes 2157 */ 2158 if (ISSET(delta, sc->sc_msr_mask)) { 2159 SET(sc->sc_msr_delta, delta); 2160 2161 /* 2162 * Stop output immediately if we lose the output 2163 * flow control signal or carrier detect. 2164 */ 2165 if (ISSET(~msr, sc->sc_msr_mask)) { 2166 sc->sc_tbc = 0; 2167 sc->sc_heldtbc = 0; 2168 #ifdef PLCOM_DEBUG 2169 if (plcom_debug) 2170 plcomstatus(sc, "plcomintr "); 2171 #endif 2172 } 2173 2174 sc->sc_st_check = 1; 2175 } 2176 2177 /* 2178 * Done handling any receive interrupts. See if data 2179 * can be transmitted as well. Schedule tx done 2180 * event if no data left and tty was marked busy. 2181 */ 2182 2183 switch (pi->pi_type) { 2184 case PLCOM_TYPE_PL010: 2185 txintr = ISSET(istatus, PL010_IIR_TIS); 2186 break; 2187 case PLCOM_TYPE_PL011: 2188 txintr = ISSET(istatus, PL011_INT_TX); 2189 break; 2190 } 2191 if (txintr) { 2192 /* 2193 * If we've delayed a parameter change, do it 2194 * now, and restart * output. 2195 */ 2196 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2197 if (sc->sc_heldchange) { 2198 plcom_loadchannelregs(sc); 2199 sc->sc_heldchange = 0; 2200 sc->sc_tbc = sc->sc_heldtbc; 2201 sc->sc_heldtbc = 0; 2202 } 2203 2204 /* 2205 * Output the next chunk of the contiguous 2206 * buffer, if any. 2207 */ 2208 if (sc->sc_tbc > 0) { 2209 int n; 2210 2211 n = sc->sc_tbc; 2212 if (n > sc->sc_fifolen) 2213 n = sc->sc_fifolen; 2214 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2215 sc->sc_tbc -= n; 2216 sc->sc_tba += n; 2217 } else { 2218 /* 2219 * Disable transmit completion 2220 * interrupts if necessary. 2221 */ 2222 switch (pi->pi_type) { 2223 case PLCOM_TYPE_PL010: 2224 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2225 CLR(sc->sc_cr, PL010_CR_TIE); 2226 PWRITE1(pi, PL010COM_CR, 2227 sc->sc_cr); 2228 } 2229 break; 2230 case PLCOM_TYPE_PL011: 2231 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2232 CLR(sc->sc_imsc, PL011_INT_TX); 2233 PWRITE4(pi, PL011COM_IMSC, 2234 sc->sc_imsc); 2235 } 2236 break; 2237 } 2238 if (sc->sc_tx_busy) { 2239 sc->sc_tx_busy = 0; 2240 sc->sc_tx_done = 1; 2241 } 2242 } 2243 } 2244 2245 } while (plcom_intstatus(pi, &istatus)); 2246 2247 mutex_spin_exit(&sc->sc_lock); 2248 2249 /* Wake up the poller. */ 2250 softint_schedule(sc->sc_si); 2251 2252 #ifdef RND_COM 2253 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2254 #endif 2255 2256 PLCOM_BARRIER(pi, BR | BW); 2257 2258 return 1; 2259 } 2260 2261 /* 2262 * The following functions are polled getc and putc routines, shared 2263 * by the console and kgdb glue. 2264 * 2265 * The read-ahead code is so that you can detect pending in-band 2266 * cn_magic in polled mode while doing output rather than having to 2267 * wait until the kernel decides it needs input. 2268 */ 2269 2270 #define MAX_READAHEAD 20 2271 static int plcom_readahead[MAX_READAHEAD]; 2272 static int plcom_readaheadcount = 0; 2273 2274 int 2275 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2276 { 2277 int s = splserial(); 2278 u_char c; 2279 2280 /* got a character from reading things earlier */ 2281 if (plcom_readaheadcount > 0) { 2282 int i; 2283 2284 c = plcom_readahead[0]; 2285 for (i = 1; i < plcom_readaheadcount; i++) { 2286 plcom_readahead[i-1] = plcom_readahead[i]; 2287 } 2288 plcom_readaheadcount--; 2289 splx(s); 2290 return c; 2291 } 2292 2293 if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2294 splx(s); 2295 return -1; 2296 } 2297 2298 c = PREAD1(pi, PL01XCOM_DR); 2299 { 2300 int cn_trapped __unused = 0; 2301 #ifdef DDB 2302 extern int db_active; 2303 if (!db_active) 2304 #endif 2305 cn_check_magic(dev, c, plcom_cnm_state); 2306 } 2307 splx(s); 2308 return c; 2309 } 2310 2311 void 2312 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2313 { 2314 int s = splserial(); 2315 int timo; 2316 2317 int cin, stat; 2318 if (plcom_readaheadcount < MAX_READAHEAD 2319 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2320 int cn_trapped __unused = 0; 2321 cin = PREAD1(pi, PL01XCOM_DR); 2322 cn_check_magic(dev, cin, plcom_cnm_state); 2323 plcom_readahead[plcom_readaheadcount++] = cin; 2324 } 2325 2326 /* wait for any pending transmission to finish */ 2327 timo = 150000; 2328 while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo) 2329 continue; 2330 2331 PWRITE1(pi, PL01XCOM_DR, c); 2332 PLCOM_BARRIER(pi, BR | BW); 2333 2334 /* wait for this transmission to complete */ 2335 timo = 1500000; 2336 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2337 continue; 2338 2339 splx(s); 2340 } 2341 2342 /* 2343 * Initialize UART for use as console or KGDB line. 2344 */ 2345 int 2346 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2347 { 2348 u_char lcr; 2349 2350 switch (pi->pi_type) { 2351 case PLCOM_TYPE_PL010: 2352 if (pi->pi_size == 0) 2353 pi->pi_size = PL010COM_UART_SIZE; 2354 break; 2355 case PLCOM_TYPE_PL011: 2356 if (pi->pi_size == 0) 2357 pi->pi_size = PL011COM_UART_SIZE; 2358 break; 2359 default: 2360 panic("Unknown plcom type"); 2361 } 2362 2363 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2364 &pi->pi_ioh)) 2365 return ENOMEM; /* ??? */ 2366 2367 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2368 switch (pi->pi_type) { 2369 case PLCOM_TYPE_PL010: 2370 PWRITE1(pi, PL010COM_CR, 0); 2371 2372 if (rate && frequency) { 2373 rate = pl010comspeed(rate, frequency); 2374 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2375 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2376 } 2377 PWRITE1(pi, PL010COM_LCR, lcr); 2378 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2379 break; 2380 case PLCOM_TYPE_PL011: 2381 PWRITE4(pi, PL011COM_CR, 0); 2382 2383 if (rate && frequency) { 2384 rate = pl011comspeed(rate, frequency); 2385 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2386 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2387 } 2388 PWRITE1(pi, PL011COM_LCRH, lcr); 2389 PWRITE4(pi, PL011COM_CR, 2390 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2391 break; 2392 } 2393 2394 #if 0 2395 /* Ought to do something like this, but we have no sc to 2396 dereference. */ 2397 /* XXX device_unit() abuse */ 2398 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2399 PL01X_MCR_DTR | PL01X_MCR_RTS); 2400 #endif 2401 2402 return 0; 2403 } 2404 2405 /* 2406 * Following are all routines needed for PLCOM to act as console 2407 */ 2408 struct consdev plcomcons = { 2409 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2410 NULL, NULL, NODEV, CN_NORMAL 2411 }; 2412 2413 int 2414 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2415 tcflag_t cflag, int unit) 2416 { 2417 int res; 2418 2419 plcomcons_info = *pi; 2420 2421 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2422 if (res) 2423 return res; 2424 2425 cn_tab = &plcomcons; 2426 cn_init_magic(&plcom_cnm_state); 2427 cn_set_magic("\047\001"); /* default magic is BREAK */ 2428 2429 plcomconsunit = unit; 2430 plcomconsrate = rate; 2431 plcomconscflag = cflag; 2432 2433 return 0; 2434 } 2435 2436 void 2437 plcomcndetach(void) 2438 { 2439 2440 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2441 plcomcons_info.pi_size); 2442 plcomcons_info.pi_iot = NULL; 2443 2444 cn_tab = NULL; 2445 } 2446 2447 int 2448 plcomcngetc(dev_t dev) 2449 { 2450 return plcom_common_getc(dev, &plcomcons_info); 2451 } 2452 2453 /* 2454 * Console kernel output character routine. 2455 */ 2456 void 2457 plcomcnputc(dev_t dev, int c) 2458 { 2459 plcom_common_putc(dev, &plcomcons_info, c); 2460 } 2461 2462 void 2463 plcomcnpollc(dev_t dev, int on) 2464 { 2465 2466 plcom_readaheadcount = 0; 2467 } 2468 2469 #ifdef KGDB 2470 int 2471 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2472 tcflag_t cflag, int unit) 2473 { 2474 int res; 2475 2476 if (pi->pi_iot == plcomcons_info.pi_iot && 2477 pi->pi_iobase == plcomcons_info.pi_iobase) 2478 return EBUSY; /* cannot share with console */ 2479 2480 res = plcominit(pi, rate, frequency, cflag); 2481 if (res) 2482 return res; 2483 2484 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2485 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2486 2487 plcomkgdb_info.pi_iot = pi->pi_iot; 2488 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2489 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2490 2491 return 0; 2492 } 2493 2494 /* ARGSUSED */ 2495 int 2496 plcom_kgdb_getc(void *arg) 2497 { 2498 return plcom_common_getc(NODEV, &plcomkgdb_info); 2499 } 2500 2501 /* ARGSUSED */ 2502 void 2503 plcom_kgdb_putc(void *arg, int c) 2504 { 2505 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2506 } 2507 #endif /* KGDB */ 2508 2509 /* helper function to identify the plcom ports used by 2510 console or KGDB (and not yet autoconf attached) */ 2511 int 2512 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2513 bus_space_handle_t *ioh) 2514 { 2515 bus_space_handle_t help; 2516 2517 if (!plcomconsattached && 2518 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2519 iobase == plcomcons_info.pi_iobase) 2520 help = plcomcons_info.pi_ioh; 2521 #ifdef KGDB 2522 else if (!plcom_kgdb_attached && 2523 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2524 iobase == plcomkgdb_info.pi_iobase) 2525 help = plcomkgdb_info.pi_ioh; 2526 #endif 2527 else 2528 return 0; 2529 2530 if (ioh) 2531 *ioh = help; 2532 return 1; 2533 } 2534
Indexes created Fri Sep 26 20:09:58 GMT 2025