plcom.c revision 1.59
1 /* $NetBSD: plcom.c,v 1.59 2019/07/23 15:56:14 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.59 2019/07/23 15:56:14 jmcneill Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 /* 106 * Override cnmagic(9) macro before including <sys/systm.h>. 107 * We need to know if cn_check_magic triggered debugger, so set a flag. 108 * Callers of cn_check_magic must declare int cn_trapped = 0; 109 * XXX: this is *ugly*! 110 */ 111 #define cn_trap() \ 112 do { \ 113 console_debugger(); \ 114 cn_trapped = 1; \ 115 } while (/* CONSTCOND */ 0) 116 117 #include <sys/param.h> 118 #include <sys/systm.h> 119 #include <sys/ioctl.h> 120 #include <sys/select.h> 121 #include <sys/tty.h> 122 #include <sys/proc.h> 123 #include <sys/conf.h> 124 #include <sys/file.h> 125 #include <sys/uio.h> 126 #include <sys/kernel.h> 127 #include <sys/syslog.h> 128 #include <sys/types.h> 129 #include <sys/device.h> 130 #include <sys/malloc.h> 131 #include <sys/timepps.h> 132 #include <sys/vnode.h> 133 #include <sys/kauth.h> 134 #include <sys/intr.h> 135 #include <sys/bus.h> 136 #ifdef RND_COM 137 #include <sys/rndsource.h> 138 #endif 139 140 #include <evbarm/dev/plcomreg.h> 141 #include <evbarm/dev/plcomvar.h> 142 143 #include <dev/cons.h> 144 145 static void plcom_enable_debugport (struct plcom_softc *); 146 147 void plcom_config (struct plcom_softc *); 148 void plcom_shutdown (struct plcom_softc *); 149 int pl010comspeed (long, long); 150 int pl011comspeed (long, long); 151 static u_char cflag2lcr (tcflag_t); 152 int plcomparam (struct tty *, struct termios *); 153 void plcomstart (struct tty *); 154 int plcomhwiflow (struct tty *, int); 155 156 void plcom_loadchannelregs (struct plcom_softc *); 157 void plcom_hwiflow (struct plcom_softc *); 158 void plcom_break (struct plcom_softc *, int); 159 void plcom_modem (struct plcom_softc *, int); 160 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 161 int plcom_to_tiocm (struct plcom_softc *); 162 void plcom_iflush (struct plcom_softc *); 163 164 int plcom_common_getc (dev_t, struct plcom_instance *); 165 void plcom_common_putc (dev_t, struct plcom_instance *, int); 166 167 int plcominit (struct plcom_instance *, int, int, tcflag_t); 168 169 dev_type_open(plcomopen); 170 dev_type_close(plcomclose); 171 dev_type_read(plcomread); 172 dev_type_write(plcomwrite); 173 dev_type_ioctl(plcomioctl); 174 dev_type_stop(plcomstop); 175 dev_type_tty(plcomtty); 176 dev_type_poll(plcompoll); 177 178 int plcomcngetc (dev_t); 179 void plcomcnputc (dev_t, int); 180 void plcomcnpollc (dev_t, int); 181 void plcomcnhalt (dev_t); 182 183 #define integrate static inline 184 void plcomsoft (void *); 185 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 186 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 188 integrate void plcom_schedrx (struct plcom_softc *); 189 void plcomdiag (void *); 190 191 bool plcom_intstatus(struct plcom_instance *, u_int *); 192 193 extern struct cfdriver plcom_cd; 194 195 const struct cdevsw plcom_cdevsw = { 196 .d_open = plcomopen, 197 .d_close = plcomclose, 198 .d_read = plcomread, 199 .d_write = plcomwrite, 200 .d_ioctl = plcomioctl, 201 .d_stop = plcomstop, 202 .d_tty = plcomtty, 203 .d_poll = plcompoll, 204 .d_mmap = nommap, 205 .d_kqfilter = ttykqfilter, 206 .d_discard = nodiscard, 207 .d_flag = D_TTY 208 }; 209 210 /* 211 * Make this an option variable one can patch. 212 * But be warned: this must be a power of 2! 213 */ 214 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 215 216 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 217 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 218 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 219 220 static int plcomconsunit = -1; 221 static struct plcom_instance plcomcons_info; 222 223 static int plcomconsattached; 224 static int plcomconsrate; 225 static tcflag_t plcomconscflag; 226 static struct cnm_state plcom_cnm_state; 227 228 static int ppscap = 229 PPS_TSFMT_TSPEC | 230 PPS_CAPTUREASSERT | 231 PPS_CAPTURECLEAR | 232 #ifdef PPS_SYNC 233 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 234 #endif /* PPS_SYNC */ 235 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 236 237 #ifdef KGDB 238 #include <sys/kgdb.h> 239 240 static struct plcom_instance plcomkgdb_info; 241 static int plcom_kgdb_attached; 242 243 int plcom_kgdb_getc (void *); 244 void plcom_kgdb_putc (void *, int); 245 #endif /* KGDB */ 246 247 #define PLCOMDIALOUT_MASK TTDIALOUT_MASK 248 249 #define PLCOMUNIT(x) TTUNIT(x) 250 #define PLCOMDIALOUT(x) TTDIALOUT(x) 251 252 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 253 device_is_active((sc)->sc_dev)) 254 255 #define BR BUS_SPACE_BARRIER_READ 256 #define BW BUS_SPACE_BARRIER_WRITE 257 #define PLCOM_BARRIER(pi, f) \ 258 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 259 260 static uint8_t 261 pread1(struct plcom_instance *pi, bus_size_t reg) 262 { 263 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 264 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 265 266 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 267 (8 * (reg & 3)); 268 } 269 int nhcr; 270 static void 271 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 272 { 273 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 274 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 275 } else { 276 const size_t shift = 8 * (o & 3); 277 o &= -4; 278 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 279 tmp = (val << shift) | (tmp & ~(0xff << shift)); 280 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 281 } 282 } 283 284 static void 285 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 286 bus_size_t count) 287 { 288 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 289 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 290 } else { 291 KASSERT((o & 3) == 0); 292 while (count--) { 293 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 294 }; 295 } 296 } 297 298 #define PREAD1(pi, reg) pread1(pi, reg) 299 #define PREAD4(pi, reg) \ 300 (bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg))) 301 302 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 303 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 304 #define PWRITE4(pi, reg, val) \ 305 (bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val))) 306 307 int 308 pl010comspeed(long speed, long frequency) 309 { 310 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 311 312 int x, err; 313 314 #if 0 315 if (speed == 0) 316 return 0; 317 #endif 318 if (speed <= 0) 319 return -1; 320 x = divrnd(frequency / 16, speed); 321 if (x <= 0) 322 return -1; 323 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 324 if (err < 0) 325 err = -err; 326 if (err > PLCOM_TOLERANCE) 327 return -1; 328 return x; 329 330 #undef divrnd 331 } 332 333 int 334 pl011comspeed(long speed, long frequency) 335 { 336 int denom = 16 * speed; 337 int div = frequency / denom; 338 int rem = frequency % denom; 339 340 int ibrd = div << 6; 341 int fbrd = (((8 * rem) / speed) + 1) / 2; 342 343 /* Tolerance? */ 344 return ibrd | fbrd; 345 } 346 347 #ifdef PLCOM_DEBUG 348 int plcom_debug = 0; 349 350 void plcomstatus (struct plcom_softc *, const char *); 351 void 352 plcomstatus(struct plcom_softc *sc, const char *str) 353 { 354 struct tty *tp = sc->sc_tty; 355 356 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 357 device_xname(sc->sc_dev), str, 358 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 359 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 360 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 361 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 362 sc->sc_tx_stopped ? "+" : "-"); 363 364 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 365 device_xname(sc->sc_dev), str, 366 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 367 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 368 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 369 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 370 sc->sc_rx_flags); 371 } 372 #endif 373 374 #if 0 375 int 376 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 377 { 378 int data; 379 380 /* Disable the UART. */ 381 bus_space_write_1(iot, ioh, plcom_cr, 0); 382 /* Make sure the FIFO is off. */ 383 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 384 /* Disable interrupts. */ 385 bus_space_write_1(iot, ioh, plcom_iir, 0); 386 387 /* Make sure we swallow anything in the receiving register. */ 388 data = bus_space_read_1(iot, ioh, plcom_dr); 389 390 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 391 return 0; 392 393 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 394 395 if (data != PL01X_FR_RXFE) 396 return 0; 397 398 return 1; 399 } 400 #endif 401 402 /* 403 * No locking in this routine; it is only called during attach, 404 * or with the port already locked. 405 */ 406 static void 407 plcom_enable_debugport(struct plcom_softc *sc) 408 { 409 struct plcom_instance *pi = &sc->sc_pi; 410 411 sc->sc_cr = PL01X_CR_UARTEN; 412 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 413 414 /* Turn on line break interrupt, set carrier. */ 415 switch (pi->pi_type) { 416 case PLCOM_TYPE_PL010: 417 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 418 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 419 if (sc->sc_set_mcr) { 420 /* XXX device_unit() abuse */ 421 sc->sc_set_mcr(sc->sc_set_mcr_arg, 422 device_unit(sc->sc_dev), sc->sc_mcr); 423 } 424 break; 425 case PLCOM_TYPE_PL011: 426 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 427 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 428 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 429 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 430 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 431 break; 432 } 433 434 } 435 436 void 437 plcom_attach_subr(struct plcom_softc *sc) 438 { 439 struct plcom_instance *pi = &sc->sc_pi; 440 struct tty *tp; 441 442 callout_init(&sc->sc_diag_callout, 0); 443 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 444 445 switch (pi->pi_type) { 446 case PLCOM_TYPE_PL010: 447 case PLCOM_TYPE_PL011: 448 break; 449 default: 450 aprint_error_dev(sc->sc_dev, 451 "Unknown plcom type: %d\n", pi->pi_type); 452 return; 453 } 454 455 /* Disable interrupts before configuring the device. */ 456 sc->sc_cr = 0; 457 sc->sc_imsc = 0; 458 459 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 460 pi->pi_iobase == plcomcons_info.pi_iobase) { 461 plcomconsattached = 1; 462 463 /* Make sure the console is always "hardwired". */ 464 delay(1000); /* wait for output to finish */ 465 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 466 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 467 /* 468 * Must re-enable the console immediately, or we will 469 * hang when trying to print. 470 */ 471 sc->sc_cr = PL01X_CR_UARTEN; 472 if (pi->pi_type == PLCOM_TYPE_PL011) 473 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 474 } 475 476 switch (pi->pi_type) { 477 case PLCOM_TYPE_PL010: 478 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 479 break; 480 481 case PLCOM_TYPE_PL011: 482 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 483 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 484 break; 485 } 486 487 if (sc->sc_fifolen == 0) { 488 switch (pi->pi_type) { 489 case PLCOM_TYPE_PL010: 490 /* 491 * The PL010 has a 16-byte fifo, but the tx interrupt 492 * triggers when there is space for 8 more bytes. 493 */ 494 sc->sc_fifolen = 8; 495 break; 496 case PLCOM_TYPE_PL011: 497 /* Some revisions have a 32 byte TX FIFO */ 498 sc->sc_fifolen = 16; 499 break; 500 } 501 } 502 503 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 504 sc->sc_fifolen = 1; 505 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 506 } 507 508 if (sc->sc_fifolen > 1) 509 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 510 511 tp = tty_alloc(); 512 tp->t_oproc = plcomstart; 513 tp->t_param = plcomparam; 514 tp->t_hwiflow = plcomhwiflow; 515 516 sc->sc_tty = tp; 517 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 518 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 519 sc->sc_rbavail = plcom_rbuf_size; 520 if (sc->sc_rbuf == NULL) { 521 aprint_error_dev(sc->sc_dev, 522 "unable to allocate ring buffer\n"); 523 return; 524 } 525 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 526 527 tty_attach(tp); 528 529 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 530 int maj; 531 532 /* locate the major number */ 533 maj = cdevsw_lookup_major(&plcom_cdevsw); 534 535 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 536 537 aprint_normal_dev(sc->sc_dev, "console\n"); 538 } 539 540 #ifdef KGDB 541 /* 542 * Allow kgdb to "take over" this port. If this is 543 * the kgdb device, it has exclusive use. 544 */ 545 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 546 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 547 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 548 plcom_kgdb_attached = 1; 549 550 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 551 } 552 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 553 } 554 #endif 555 556 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 557 558 #ifdef RND_COM 559 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 560 RND_TYPE_TTY, RND_FLAG_DEFAULT); 561 #endif 562 563 /* 564 * if there are no enable/disable functions, assume the device 565 * is always enabled 566 */ 567 if (!sc->enable) 568 sc->enabled = 1; 569 570 plcom_config(sc); 571 572 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 573 } 574 575 void 576 plcom_config(struct plcom_softc *sc) 577 { 578 struct plcom_instance *pi = &sc->sc_pi; 579 580 /* Disable interrupts before configuring the device. */ 581 sc->sc_cr = 0; 582 sc->sc_imsc = 0; 583 switch (pi->pi_type) { 584 case PLCOM_TYPE_PL010: 585 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 586 break; 587 588 case PLCOM_TYPE_PL011: 589 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 590 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 591 break; 592 } 593 594 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 595 plcom_enable_debugport(sc); 596 } 597 598 int 599 plcom_detach(device_t self, int flags) 600 { 601 struct plcom_softc *sc = device_private(self); 602 int maj, mn; 603 604 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 605 return EBUSY; 606 607 if (sc->disable != NULL && sc->enabled != 0) { 608 (*sc->disable)(sc); 609 sc->enabled = 0; 610 } 611 612 /* locate the major number */ 613 maj = cdevsw_lookup_major(&plcom_cdevsw); 614 615 /* Nuke the vnodes for any open instances. */ 616 mn = device_unit(self); 617 vdevgone(maj, mn, mn, VCHR); 618 619 mn |= PLCOMDIALOUT_MASK; 620 vdevgone(maj, mn, mn, VCHR); 621 622 if (sc->sc_rbuf == NULL) { 623 /* 624 * Ring buffer allocation failed in the plcom_attach_subr, 625 * only the tty is allocated, and nothing else. 626 */ 627 tty_free(sc->sc_tty); 628 return 0; 629 } 630 631 /* Free the receive buffer. */ 632 free(sc->sc_rbuf, M_DEVBUF); 633 634 /* Detach and free the tty. */ 635 tty_detach(sc->sc_tty); 636 tty_free(sc->sc_tty); 637 638 /* Unhook the soft interrupt handler. */ 639 softint_disestablish(sc->sc_si); 640 641 #ifdef RND_COM 642 /* Unhook the entropy source. */ 643 rnd_detach_source(&sc->rnd_source); 644 #endif 645 callout_destroy(&sc->sc_diag_callout); 646 647 /* Destroy the lock. */ 648 mutex_destroy(&sc->sc_lock); 649 650 return 0; 651 } 652 653 int 654 plcom_activate(device_t self, enum devact act) 655 { 656 struct plcom_softc *sc = device_private(self); 657 658 switch (act) { 659 case DVACT_DEACTIVATE: 660 sc->enabled = 0; 661 return 0; 662 default: 663 return EOPNOTSUPP; 664 } 665 } 666 667 void 668 plcom_shutdown(struct plcom_softc *sc) 669 { 670 struct plcom_instance *pi = &sc->sc_pi; 671 struct tty *tp = sc->sc_tty; 672 mutex_spin_enter(&sc->sc_lock); 673 674 /* If we were asserting flow control, then deassert it. */ 675 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 676 plcom_hwiflow(sc); 677 678 /* Clear any break condition set with TIOCSBRK. */ 679 plcom_break(sc, 0); 680 681 /* Turn off PPS capture on last close. */ 682 mutex_spin_enter(&timecounter_lock); 683 sc->sc_ppsmask = 0; 684 sc->ppsparam.mode = 0; 685 mutex_spin_exit(&timecounter_lock); 686 687 /* 688 * Hang up if necessary. Wait a bit, so the other side has time to 689 * notice even if we immediately open the port again. 690 * Avoid tsleeping above splhigh(). 691 */ 692 if (ISSET(tp->t_cflag, HUPCL)) { 693 plcom_modem(sc, 0); 694 mutex_spin_exit(&sc->sc_lock); 695 /* XXX will only timeout */ 696 (void) kpause(ttclos, false, hz, NULL); 697 mutex_spin_enter(&sc->sc_lock); 698 } 699 700 sc->sc_cr = 0; 701 sc->sc_imsc = 0; 702 /* Turn off interrupts. */ 703 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 704 /* interrupt on break */ 705 706 sc->sc_cr = PL01X_CR_UARTEN; 707 sc->sc_imsc = 0; 708 switch (pi->pi_type) { 709 case PLCOM_TYPE_PL010: 710 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 711 break; 712 case PLCOM_TYPE_PL011: 713 SET(sc->sc_cr, PL011_CR_RXE); 714 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 715 break; 716 } 717 } 718 switch (pi->pi_type) { 719 case PLCOM_TYPE_PL010: 720 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 721 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 722 break; 723 case PLCOM_TYPE_PL011: 724 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 725 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 726 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 727 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 728 break; 729 } 730 731 mutex_spin_exit(&sc->sc_lock); 732 if (sc->disable) { 733 #ifdef DIAGNOSTIC 734 if (!sc->enabled) 735 panic("plcom_shutdown: not enabled?"); 736 #endif 737 (*sc->disable)(sc); 738 sc->enabled = 0; 739 } 740 } 741 742 int 743 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 744 { 745 struct plcom_softc *sc; 746 struct plcom_instance *pi; 747 struct tty *tp; 748 int s; 749 int error; 750 751 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 752 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 753 sc->sc_rbuf == NULL) 754 return ENXIO; 755 756 if (!device_is_active(sc->sc_dev)) 757 return ENXIO; 758 759 pi = &sc->sc_pi; 760 761 #ifdef KGDB 762 /* 763 * If this is the kgdb port, no other use is permitted. 764 */ 765 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 766 return EBUSY; 767 #endif 768 769 tp = sc->sc_tty; 770 771 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 772 return (EBUSY); 773 774 s = spltty(); 775 776 /* 777 * Do the following iff this is a first open. 778 */ 779 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 780 struct termios t; 781 782 tp->t_dev = dev; 783 784 if (sc->enable) { 785 if ((*sc->enable)(sc)) { 786 splx(s); 787 aprint_error_dev(sc->sc_dev, 788 "device enable failed\n"); 789 return EIO; 790 } 791 mutex_spin_enter(&sc->sc_lock); 792 sc->enabled = 1; 793 plcom_config(sc); 794 } else { 795 mutex_spin_enter(&sc->sc_lock); 796 } 797 798 /* Turn on interrupts. */ 799 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 800 /* Fetch the current modem control status, needed later. */ 801 sc->sc_cr = PL01X_CR_UARTEN; 802 switch (pi->pi_type) { 803 case PLCOM_TYPE_PL010: 804 SET(sc->sc_cr, 805 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 806 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 807 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 808 break; 809 case PLCOM_TYPE_PL011: 810 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 811 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 812 PL011_INT_MSMASK); 813 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 814 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 815 break; 816 } 817 818 /* Clear PPS capture state on first open. */ 819 820 mutex_spin_enter(&timecounter_lock); 821 sc->sc_ppsmask = 0; 822 sc->ppsparam.mode = 0; 823 mutex_spin_exit(&timecounter_lock); 824 825 mutex_spin_exit(&sc->sc_lock); 826 827 /* 828 * Initialize the termios status to the defaults. Add in the 829 * sticky bits from TIOCSFLAGS. 830 */ 831 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 832 t.c_ospeed = plcomconsrate; 833 t.c_cflag = plcomconscflag; 834 } else { 835 t.c_ospeed = TTYDEF_SPEED; 836 t.c_cflag = TTYDEF_CFLAG; 837 } 838 t.c_ispeed = t.c_ospeed; 839 840 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 841 SET(t.c_cflag, CLOCAL); 842 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 843 SET(t.c_cflag, CRTSCTS); 844 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 845 SET(t.c_cflag, MDMBUF); 846 /* Make sure plcomparam() will do something. */ 847 tp->t_ospeed = 0; 848 (void) plcomparam(tp, &t); 849 tp->t_iflag = TTYDEF_IFLAG; 850 tp->t_oflag = TTYDEF_OFLAG; 851 tp->t_lflag = TTYDEF_LFLAG; 852 ttychars(tp); 853 ttsetwater(tp); 854 855 mutex_spin_enter(&sc->sc_lock); 856 857 /* 858 * Turn on DTR. We must always do this, even if carrier is not 859 * present, because otherwise we'd have to use TIOCSDTR 860 * immediately after setting CLOCAL, which applications do not 861 * expect. We always assert DTR while the device is open 862 * unless explicitly requested to deassert it. 863 */ 864 plcom_modem(sc, 1); 865 866 /* Clear the input ring, and unblock. */ 867 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 868 sc->sc_rbavail = plcom_rbuf_size; 869 plcom_iflush(sc); 870 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 871 plcom_hwiflow(sc); 872 873 #ifdef PLCOM_DEBUG 874 if (plcom_debug) 875 plcomstatus(sc, "plcomopen "); 876 #endif 877 878 mutex_spin_exit(&sc->sc_lock); 879 } 880 881 splx(s); 882 883 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 884 if (error) 885 goto bad; 886 887 error = (*tp->t_linesw->l_open)(dev, tp); 888 if (error) 889 goto bad; 890 891 return 0; 892 893 bad: 894 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 895 /* 896 * We failed to open the device, and nobody else had it opened. 897 * Clean up the state as appropriate. 898 */ 899 plcom_shutdown(sc); 900 } 901 902 return error; 903 } 904 905 int 906 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 907 { 908 struct plcom_softc *sc = 909 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 910 struct tty *tp = sc->sc_tty; 911 912 /* XXX This is for cons.c. */ 913 if (!ISSET(tp->t_state, TS_ISOPEN)) 914 return 0; 915 916 (*tp->t_linesw->l_close)(tp, flag); 917 ttyclose(tp); 918 919 if (PLCOM_ISALIVE(sc) == 0) 920 return 0; 921 922 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 923 /* 924 * Although we got a last close, the device may still be in 925 * use; e.g. if this was the dialout node, and there are still 926 * processes waiting for carrier on the non-dialout node. 927 */ 928 plcom_shutdown(sc); 929 } 930 931 return 0; 932 } 933 934 int 935 plcomread(dev_t dev, struct uio *uio, int flag) 936 { 937 struct plcom_softc *sc = 938 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 939 struct tty *tp = sc->sc_tty; 940 941 if (PLCOM_ISALIVE(sc) == 0) 942 return EIO; 943 944 return (*tp->t_linesw->l_read)(tp, uio, flag); 945 } 946 947 int 948 plcomwrite(dev_t dev, struct uio *uio, int flag) 949 { 950 struct plcom_softc *sc = 951 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 952 struct tty *tp = sc->sc_tty; 953 954 if (PLCOM_ISALIVE(sc) == 0) 955 return EIO; 956 957 return (*tp->t_linesw->l_write)(tp, uio, flag); 958 } 959 960 int 961 plcompoll(dev_t dev, int events, struct lwp *l) 962 { 963 struct plcom_softc *sc = 964 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 965 struct tty *tp = sc->sc_tty; 966 967 if (PLCOM_ISALIVE(sc) == 0) 968 return EIO; 969 970 return (*tp->t_linesw->l_poll)(tp, events, l); 971 } 972 973 struct tty * 974 plcomtty(dev_t dev) 975 { 976 struct plcom_softc *sc = 977 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 978 struct tty *tp = sc->sc_tty; 979 980 return tp; 981 } 982 983 int 984 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 985 { 986 struct plcom_softc *sc = 987 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 988 struct tty *tp; 989 int error; 990 991 if (sc == NULL) 992 return ENXIO; 993 if (PLCOM_ISALIVE(sc) == 0) 994 return EIO; 995 996 tp = sc->sc_tty; 997 998 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 999 if (error != EPASSTHROUGH) 1000 return error; 1001 1002 error = ttioctl(tp, cmd, data, flag, l); 1003 if (error != EPASSTHROUGH) 1004 return error; 1005 1006 error = 0; 1007 switch (cmd) { 1008 case TIOCSFLAGS: 1009 error = kauth_authorize_device_tty(l->l_cred, 1010 KAUTH_DEVICE_TTY_PRIVSET, tp); 1011 break; 1012 default: 1013 /* nothing */ 1014 break; 1015 } 1016 if (error) { 1017 return error; 1018 } 1019 1020 mutex_spin_enter(&sc->sc_lock); 1021 switch (cmd) { 1022 case TIOCSBRK: 1023 plcom_break(sc, 1); 1024 break; 1025 1026 case TIOCCBRK: 1027 plcom_break(sc, 0); 1028 break; 1029 1030 case TIOCSDTR: 1031 plcom_modem(sc, 1); 1032 break; 1033 1034 case TIOCCDTR: 1035 plcom_modem(sc, 0); 1036 break; 1037 1038 case TIOCGFLAGS: 1039 *(int *)data = sc->sc_swflags; 1040 break; 1041 1042 case TIOCSFLAGS: 1043 sc->sc_swflags = *(int *)data; 1044 break; 1045 1046 case TIOCMSET: 1047 case TIOCMBIS: 1048 case TIOCMBIC: 1049 tiocm_to_plcom(sc, cmd, *(int *)data); 1050 break; 1051 1052 case TIOCMGET: 1053 *(int *)data = plcom_to_tiocm(sc); 1054 break; 1055 1056 case PPS_IOC_CREATE: 1057 break; 1058 1059 case PPS_IOC_DESTROY: 1060 break; 1061 1062 case PPS_IOC_GETPARAMS: { 1063 pps_params_t *pp; 1064 pp = (pps_params_t *)data; 1065 mutex_spin_enter(&timecounter_lock); 1066 *pp = sc->ppsparam; 1067 mutex_spin_exit(&timecounter_lock); 1068 break; 1069 } 1070 1071 case PPS_IOC_SETPARAMS: { 1072 pps_params_t *pp; 1073 int mode; 1074 pp = (pps_params_t *)data; 1075 mutex_spin_enter(&timecounter_lock); 1076 if (pp->mode & ~ppscap) { 1077 error = EINVAL; 1078 mutex_spin_exit(&timecounter_lock); 1079 break; 1080 } 1081 sc->ppsparam = *pp; 1082 /* 1083 * Compute msr masks from user-specified timestamp state. 1084 */ 1085 mode = sc->ppsparam.mode; 1086 #ifdef PPS_SYNC 1087 if (mode & PPS_HARDPPSONASSERT) { 1088 mode |= PPS_CAPTUREASSERT; 1089 /* XXX revoke any previous HARDPPS source */ 1090 } 1091 if (mode & PPS_HARDPPSONCLEAR) { 1092 mode |= PPS_CAPTURECLEAR; 1093 /* XXX revoke any previous HARDPPS source */ 1094 } 1095 #endif /* PPS_SYNC */ 1096 switch (mode & PPS_CAPTUREBOTH) { 1097 case 0: 1098 sc->sc_ppsmask = 0; 1099 break; 1100 1101 case PPS_CAPTUREASSERT: 1102 sc->sc_ppsmask = PL01X_MSR_DCD; 1103 sc->sc_ppsassert = PL01X_MSR_DCD; 1104 sc->sc_ppsclear = -1; 1105 break; 1106 1107 case PPS_CAPTURECLEAR: 1108 sc->sc_ppsmask = PL01X_MSR_DCD; 1109 sc->sc_ppsassert = -1; 1110 sc->sc_ppsclear = 0; 1111 break; 1112 1113 case PPS_CAPTUREBOTH: 1114 sc->sc_ppsmask = PL01X_MSR_DCD; 1115 sc->sc_ppsassert = PL01X_MSR_DCD; 1116 sc->sc_ppsclear = 0; 1117 break; 1118 1119 default: 1120 error = EINVAL; 1121 break; 1122 } 1123 mutex_spin_exit(&timecounter_lock); 1124 break; 1125 } 1126 1127 case PPS_IOC_GETCAP: 1128 *(int*)data = ppscap; 1129 break; 1130 1131 case PPS_IOC_FETCH: { 1132 pps_info_t *pi; 1133 pi = (pps_info_t *)data; 1134 mutex_spin_enter(&timecounter_lock); 1135 *pi = sc->ppsinfo; 1136 mutex_spin_exit(&timecounter_lock); 1137 break; 1138 } 1139 1140 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1141 /* 1142 * Some GPS clocks models use the falling rather than 1143 * rising edge as the on-the-second signal. 1144 * The old API has no way to specify PPS polarity. 1145 */ 1146 mutex_spin_enter(&timecounter_lock); 1147 sc->sc_ppsmask = PL01X_MSR_DCD; 1148 #ifndef PPS_TRAILING_EDGE 1149 sc->sc_ppsassert = PL01X_MSR_DCD; 1150 sc->sc_ppsclear = -1; 1151 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1152 &sc->ppsinfo.assert_timestamp); 1153 #else 1154 sc->sc_ppsassert = -1 1155 sc->sc_ppsclear = 0; 1156 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1157 &sc->ppsinfo.clear_timestamp); 1158 #endif 1159 mutex_spin_exit(&timecounter_lock); 1160 break; 1161 1162 default: 1163 error = EPASSTHROUGH; 1164 break; 1165 } 1166 1167 mutex_spin_exit(&sc->sc_lock); 1168 1169 #ifdef PLCOM_DEBUG 1170 if (plcom_debug) 1171 plcomstatus(sc, "plcomioctl "); 1172 #endif 1173 1174 return error; 1175 } 1176 1177 integrate void 1178 plcom_schedrx(struct plcom_softc *sc) 1179 { 1180 1181 sc->sc_rx_ready = 1; 1182 1183 /* Wake up the poller. */ 1184 softint_schedule(sc->sc_si); 1185 } 1186 1187 void 1188 plcom_break(struct plcom_softc *sc, int onoff) 1189 { 1190 1191 if (onoff) 1192 SET(sc->sc_lcr, PL01X_LCR_BRK); 1193 else 1194 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1195 1196 if (!sc->sc_heldchange) { 1197 if (sc->sc_tx_busy) { 1198 sc->sc_heldtbc = sc->sc_tbc; 1199 sc->sc_tbc = 0; 1200 sc->sc_heldchange = 1; 1201 } else 1202 plcom_loadchannelregs(sc); 1203 } 1204 } 1205 1206 void 1207 plcom_modem(struct plcom_softc *sc, int onoff) 1208 { 1209 1210 if (sc->sc_mcr_dtr == 0) 1211 return; 1212 1213 if (onoff) 1214 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1215 else 1216 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1217 1218 if (!sc->sc_heldchange) { 1219 if (sc->sc_tx_busy) { 1220 sc->sc_heldtbc = sc->sc_tbc; 1221 sc->sc_tbc = 0; 1222 sc->sc_heldchange = 1; 1223 } else 1224 plcom_loadchannelregs(sc); 1225 } 1226 } 1227 1228 void 1229 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1230 { 1231 u_char plcombits; 1232 1233 plcombits = 0; 1234 if (ISSET(ttybits, TIOCM_DTR)) 1235 SET(plcombits, PL01X_MCR_DTR); 1236 if (ISSET(ttybits, TIOCM_RTS)) 1237 SET(plcombits, PL01X_MCR_RTS); 1238 1239 switch (how) { 1240 case TIOCMBIC: 1241 CLR(sc->sc_mcr, plcombits); 1242 break; 1243 1244 case TIOCMBIS: 1245 SET(sc->sc_mcr, plcombits); 1246 break; 1247 1248 case TIOCMSET: 1249 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1250 SET(sc->sc_mcr, plcombits); 1251 break; 1252 } 1253 1254 if (!sc->sc_heldchange) { 1255 if (sc->sc_tx_busy) { 1256 sc->sc_heldtbc = sc->sc_tbc; 1257 sc->sc_tbc = 0; 1258 sc->sc_heldchange = 1; 1259 } else 1260 plcom_loadchannelregs(sc); 1261 } 1262 } 1263 1264 int 1265 plcom_to_tiocm(struct plcom_softc *sc) 1266 { 1267 u_char plcombits; 1268 int ttybits = 0; 1269 1270 plcombits = sc->sc_mcr; 1271 if (ISSET(plcombits, PL01X_MCR_DTR)) 1272 SET(ttybits, TIOCM_DTR); 1273 if (ISSET(plcombits, PL01X_MCR_RTS)) 1274 SET(ttybits, TIOCM_RTS); 1275 1276 plcombits = sc->sc_msr; 1277 if (ISSET(plcombits, PL01X_MSR_DCD)) 1278 SET(ttybits, TIOCM_CD); 1279 if (ISSET(plcombits, PL01X_MSR_CTS)) 1280 SET(ttybits, TIOCM_CTS); 1281 if (ISSET(plcombits, PL01X_MSR_DSR)) 1282 SET(ttybits, TIOCM_DSR); 1283 if (ISSET(plcombits, PL011_MSR_RI)) 1284 SET(ttybits, TIOCM_RI); 1285 1286 if (sc->sc_cr != 0) 1287 SET(ttybits, TIOCM_LE); 1288 1289 return ttybits; 1290 } 1291 1292 static u_char 1293 cflag2lcr(tcflag_t cflag) 1294 { 1295 u_char lcr = 0; 1296 1297 switch (ISSET(cflag, CSIZE)) { 1298 case CS5: 1299 SET(lcr, PL01X_LCR_5BITS); 1300 break; 1301 case CS6: 1302 SET(lcr, PL01X_LCR_6BITS); 1303 break; 1304 case CS7: 1305 SET(lcr, PL01X_LCR_7BITS); 1306 break; 1307 case CS8: 1308 SET(lcr, PL01X_LCR_8BITS); 1309 break; 1310 } 1311 if (ISSET(cflag, PARENB)) { 1312 SET(lcr, PL01X_LCR_PEN); 1313 if (!ISSET(cflag, PARODD)) 1314 SET(lcr, PL01X_LCR_EPS); 1315 } 1316 if (ISSET(cflag, CSTOPB)) 1317 SET(lcr, PL01X_LCR_STP2); 1318 1319 return lcr; 1320 } 1321 1322 int 1323 plcomparam(struct tty *tp, struct termios *t) 1324 { 1325 struct plcom_softc *sc = 1326 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1327 struct plcom_instance *pi = &sc->sc_pi; 1328 int ospeed = -1; 1329 u_char lcr; 1330 1331 if (PLCOM_ISALIVE(sc) == 0) 1332 return EIO; 1333 1334 switch (pi->pi_type) { 1335 case PLCOM_TYPE_PL010: 1336 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1337 break; 1338 case PLCOM_TYPE_PL011: 1339 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1340 break; 1341 } 1342 1343 /* Check requested parameters. */ 1344 if (ospeed < 0) 1345 return EINVAL; 1346 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1347 return EINVAL; 1348 1349 /* 1350 * For the console, always force CLOCAL and !HUPCL, so that the port 1351 * is always active. 1352 */ 1353 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1354 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1355 SET(t->c_cflag, CLOCAL); 1356 CLR(t->c_cflag, HUPCL); 1357 } 1358 1359 /* 1360 * If there were no changes, don't do anything. This avoids dropping 1361 * input and improves performance when all we did was frob things like 1362 * VMIN and VTIME. 1363 */ 1364 if (tp->t_ospeed == t->c_ospeed && 1365 tp->t_cflag == t->c_cflag) 1366 return 0; 1367 1368 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1369 1370 mutex_spin_enter(&sc->sc_lock); 1371 1372 sc->sc_lcr = lcr; 1373 1374 /* 1375 * PL010 has a fixed-length FIFO trigger point. 1376 */ 1377 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1378 sc->sc_fifo = 1; 1379 else 1380 sc->sc_fifo = 0; 1381 1382 if (sc->sc_fifo) 1383 SET(sc->sc_lcr, PL01X_LCR_FEN); 1384 1385 /* 1386 * If we're not in a mode that assumes a connection is present, then 1387 * ignore carrier changes. 1388 */ 1389 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1390 sc->sc_msr_dcd = 0; 1391 else 1392 sc->sc_msr_dcd = PL01X_MSR_DCD; 1393 /* 1394 * Set the flow control pins depending on the current flow control 1395 * mode. 1396 */ 1397 if (ISSET(t->c_cflag, CRTSCTS)) { 1398 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1399 sc->sc_mcr_rts = PL01X_MCR_RTS; 1400 sc->sc_msr_cts = PL01X_MSR_CTS; 1401 } else if (ISSET(t->c_cflag, MDMBUF)) { 1402 /* 1403 * For DTR/DCD flow control, make sure we don't toggle DTR for 1404 * carrier detection. 1405 */ 1406 sc->sc_mcr_dtr = 0; 1407 sc->sc_mcr_rts = PL01X_MCR_DTR; 1408 sc->sc_msr_cts = PL01X_MSR_DCD; 1409 } else { 1410 /* 1411 * If no flow control, then always set RTS. This will make 1412 * the other side happy if it mistakenly thinks we're doing 1413 * RTS/CTS flow control. 1414 */ 1415 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1416 sc->sc_mcr_rts = 0; 1417 sc->sc_msr_cts = 0; 1418 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1419 SET(sc->sc_mcr, PL01X_MCR_RTS); 1420 else 1421 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1422 } 1423 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1424 1425 #if 0 1426 if (ospeed == 0) 1427 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1428 else 1429 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1430 #endif 1431 1432 switch (pi->pi_type) { 1433 case PLCOM_TYPE_PL010: 1434 sc->sc_ratel = ospeed & 0xff; 1435 sc->sc_rateh = (ospeed >> 8) & 0xff; 1436 break; 1437 case PLCOM_TYPE_PL011: 1438 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1439 sc->sc_rateh = ospeed >> 6; 1440 break; 1441 } 1442 1443 /* And copy to tty. */ 1444 tp->t_ispeed = t->c_ospeed; 1445 tp->t_ospeed = t->c_ospeed; 1446 tp->t_cflag = t->c_cflag; 1447 1448 if (!sc->sc_heldchange) { 1449 if (sc->sc_tx_busy) { 1450 sc->sc_heldtbc = sc->sc_tbc; 1451 sc->sc_tbc = 0; 1452 sc->sc_heldchange = 1; 1453 } else 1454 plcom_loadchannelregs(sc); 1455 } 1456 1457 if (!ISSET(t->c_cflag, CHWFLOW)) { 1458 /* Disable the high water mark. */ 1459 sc->sc_r_hiwat = 0; 1460 sc->sc_r_lowat = 0; 1461 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1462 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1463 plcom_schedrx(sc); 1464 } 1465 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1466 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1467 plcom_hwiflow(sc); 1468 } 1469 } else { 1470 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1471 sc->sc_r_lowat = plcom_rbuf_lowat; 1472 } 1473 1474 mutex_spin_exit(&sc->sc_lock); 1475 1476 /* 1477 * Update the tty layer's idea of the carrier bit, in case we changed 1478 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1479 * explicit request. 1480 */ 1481 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1482 1483 #ifdef PLCOM_DEBUG 1484 if (plcom_debug) 1485 plcomstatus(sc, "plcomparam "); 1486 #endif 1487 1488 if (!ISSET(t->c_cflag, CHWFLOW)) { 1489 if (sc->sc_tx_stopped) { 1490 sc->sc_tx_stopped = 0; 1491 plcomstart(tp); 1492 } 1493 } 1494 1495 return 0; 1496 } 1497 1498 void 1499 plcom_iflush(struct plcom_softc *sc) 1500 { 1501 struct plcom_instance *pi = &sc->sc_pi; 1502 #ifdef DIAGNOSTIC 1503 int reg; 1504 #endif 1505 int timo; 1506 1507 #ifdef DIAGNOSTIC 1508 reg = 0xffff; 1509 #endif 1510 timo = 50000; 1511 /* flush any pending I/O */ 1512 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1513 && --timo) 1514 #ifdef DIAGNOSTIC 1515 reg = 1516 #else 1517 (void) 1518 #endif 1519 PREAD1(pi, PL01XCOM_DR); 1520 #ifdef DIAGNOSTIC 1521 if (!timo) 1522 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1523 reg); 1524 #endif 1525 } 1526 1527 void 1528 plcom_loadchannelregs(struct plcom_softc *sc) 1529 { 1530 struct plcom_instance *pi = &sc->sc_pi; 1531 1532 /* XXXXX necessary? */ 1533 plcom_iflush(sc); 1534 1535 switch (pi->pi_type) { 1536 case PLCOM_TYPE_PL010: 1537 PWRITE1(pi, PL010COM_CR, 0); 1538 if (sc->sc_frequency != 0) { 1539 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1540 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1541 } 1542 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1543 1544 /* XXX device_unit() abuse */ 1545 if (sc->sc_set_mcr) 1546 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1547 device_unit(sc->sc_dev), 1548 sc->sc_mcr_active = sc->sc_mcr); 1549 1550 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1551 break; 1552 1553 case PLCOM_TYPE_PL011: 1554 PWRITE4(pi, PL011COM_CR, 0); 1555 if (sc->sc_frequency != 0) { 1556 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1557 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1558 } 1559 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1560 sc->sc_mcr_active = sc->sc_mcr; 1561 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1562 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1563 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1564 break; 1565 } 1566 } 1567 1568 int 1569 plcomhwiflow(struct tty *tp, int block) 1570 { 1571 struct plcom_softc *sc = 1572 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1573 1574 if (PLCOM_ISALIVE(sc) == 0) 1575 return 0; 1576 1577 if (sc->sc_mcr_rts == 0) 1578 return 0; 1579 1580 mutex_spin_enter(&sc->sc_lock); 1581 1582 if (block) { 1583 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1584 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1585 plcom_hwiflow(sc); 1586 } 1587 } else { 1588 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1589 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1590 plcom_schedrx(sc); 1591 } 1592 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1593 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1594 plcom_hwiflow(sc); 1595 } 1596 } 1597 1598 mutex_spin_exit(&sc->sc_lock); 1599 return 1; 1600 } 1601 1602 /* 1603 * (un)block input via hw flowcontrol 1604 */ 1605 void 1606 plcom_hwiflow(struct plcom_softc *sc) 1607 { 1608 struct plcom_instance *pi = &sc->sc_pi; 1609 1610 if (sc->sc_mcr_rts == 0) 1611 return; 1612 1613 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1614 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1615 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1616 } else { 1617 SET(sc->sc_mcr, sc->sc_mcr_rts); 1618 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1619 } 1620 switch (pi->pi_type) { 1621 case PLCOM_TYPE_PL010: 1622 if (sc->sc_set_mcr) 1623 /* XXX device_unit() abuse */ 1624 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1625 device_unit(sc->sc_dev), sc->sc_mcr_active); 1626 break; 1627 case PLCOM_TYPE_PL011: 1628 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1629 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1630 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1631 break; 1632 } 1633 } 1634 1635 1636 void 1637 plcomstart(struct tty *tp) 1638 { 1639 struct plcom_softc *sc = 1640 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1641 struct plcom_instance *pi = &sc->sc_pi; 1642 int s; 1643 1644 if (PLCOM_ISALIVE(sc) == 0) 1645 return; 1646 1647 s = spltty(); 1648 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1649 goto out; 1650 if (sc->sc_tx_stopped) 1651 goto out; 1652 1653 if (!ttypull(tp)) 1654 goto out; 1655 1656 /* Grab the first contiguous region of buffer space. */ 1657 { 1658 u_char *tba; 1659 int tbc; 1660 1661 tba = tp->t_outq.c_cf; 1662 tbc = ndqb(&tp->t_outq, 0); 1663 1664 mutex_spin_enter(&sc->sc_lock); 1665 1666 sc->sc_tba = tba; 1667 sc->sc_tbc = tbc; 1668 } 1669 1670 SET(tp->t_state, TS_BUSY); 1671 sc->sc_tx_busy = 1; 1672 1673 /* Enable transmit completion interrupts if necessary. */ 1674 switch (pi->pi_type) { 1675 case PLCOM_TYPE_PL010: 1676 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1677 SET(sc->sc_cr, PL010_CR_TIE); 1678 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1679 } 1680 break; 1681 case PLCOM_TYPE_PL011: 1682 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1683 SET(sc->sc_imsc, PL011_INT_TX); 1684 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1685 } 1686 break; 1687 } 1688 1689 /* Output the first chunk of the contiguous buffer. */ 1690 { 1691 int n; 1692 1693 n = sc->sc_tbc; 1694 if (n > sc->sc_fifolen) 1695 n = sc->sc_fifolen; 1696 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1697 sc->sc_tbc -= n; 1698 sc->sc_tba += n; 1699 } 1700 mutex_spin_exit(&sc->sc_lock); 1701 out: 1702 splx(s); 1703 return; 1704 } 1705 1706 /* 1707 * Stop output on a line. 1708 */ 1709 void 1710 plcomstop(struct tty *tp, int flag) 1711 { 1712 struct plcom_softc *sc = 1713 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1714 1715 mutex_spin_enter(&sc->sc_lock); 1716 if (ISSET(tp->t_state, TS_BUSY)) { 1717 /* Stop transmitting at the next chunk. */ 1718 sc->sc_tbc = 0; 1719 sc->sc_heldtbc = 0; 1720 if (!ISSET(tp->t_state, TS_TTSTOP)) 1721 SET(tp->t_state, TS_FLUSH); 1722 } 1723 mutex_spin_exit(&sc->sc_lock); 1724 } 1725 1726 void 1727 plcomdiag(void *arg) 1728 { 1729 struct plcom_softc *sc = arg; 1730 int overflows, floods; 1731 1732 mutex_spin_enter(&sc->sc_lock); 1733 overflows = sc->sc_overflows; 1734 sc->sc_overflows = 0; 1735 floods = sc->sc_floods; 1736 sc->sc_floods = 0; 1737 sc->sc_errors = 0; 1738 mutex_spin_exit(&sc->sc_lock); 1739 1740 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1741 device_xname(sc->sc_dev), 1742 overflows, overflows == 1 ? "" : "s", 1743 floods, floods == 1 ? "" : "s"); 1744 } 1745 1746 integrate void 1747 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1748 { 1749 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1750 struct plcom_instance *pi = &sc->sc_pi; 1751 u_char *get, *end; 1752 u_int cc, scc; 1753 u_char rsr; 1754 int code; 1755 1756 end = sc->sc_ebuf; 1757 get = sc->sc_rbget; 1758 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1759 1760 if (cc == plcom_rbuf_size) { 1761 sc->sc_floods++; 1762 if (sc->sc_errors++ == 0) 1763 callout_reset(&sc->sc_diag_callout, 60 * hz, 1764 plcomdiag, sc); 1765 } 1766 1767 while (cc) { 1768 code = get[0]; 1769 rsr = get[1]; 1770 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1771 if (ISSET(rsr, PL01X_RSR_OE)) { 1772 sc->sc_overflows++; 1773 if (sc->sc_errors++ == 0) 1774 callout_reset(&sc->sc_diag_callout, 1775 60 * hz, plcomdiag, sc); 1776 } 1777 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1778 SET(code, TTY_FE); 1779 if (ISSET(rsr, PL01X_RSR_PE)) 1780 SET(code, TTY_PE); 1781 } 1782 if ((*rint)(code, tp) == -1) { 1783 /* 1784 * The line discipline's buffer is out of space. 1785 */ 1786 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1787 /* 1788 * We're either not using flow control, or the 1789 * line discipline didn't tell us to block for 1790 * some reason. Either way, we have no way to 1791 * know when there's more space available, so 1792 * just drop the rest of the data. 1793 */ 1794 get += cc << 1; 1795 if (get >= end) 1796 get -= plcom_rbuf_size << 1; 1797 cc = 0; 1798 } else { 1799 /* 1800 * Don't schedule any more receive processing 1801 * until the line discipline tells us there's 1802 * space available (through plcomhwiflow()). 1803 * Leave the rest of the data in the input 1804 * buffer. 1805 */ 1806 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1807 } 1808 break; 1809 } 1810 get += 2; 1811 if (get >= end) 1812 get = sc->sc_rbuf; 1813 cc--; 1814 } 1815 1816 if (cc != scc) { 1817 sc->sc_rbget = get; 1818 mutex_spin_enter(&sc->sc_lock); 1819 1820 cc = sc->sc_rbavail += scc - cc; 1821 /* Buffers should be ok again, release possible block. */ 1822 if (cc >= sc->sc_r_lowat) { 1823 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1824 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1825 switch (pi->pi_type) { 1826 case PLCOM_TYPE_PL010: 1827 SET(sc->sc_cr, 1828 PL010_CR_RIE | PL010_CR_RTIE); 1829 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1830 break; 1831 case PLCOM_TYPE_PL011: 1832 SET(sc->sc_imsc, 1833 PL011_INT_RX | PL011_INT_RT); 1834 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1835 break; 1836 } 1837 } 1838 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1839 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1840 plcom_hwiflow(sc); 1841 } 1842 } 1843 mutex_spin_exit(&sc->sc_lock); 1844 } 1845 } 1846 1847 integrate void 1848 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1849 { 1850 1851 CLR(tp->t_state, TS_BUSY); 1852 if (ISSET(tp->t_state, TS_FLUSH)) 1853 CLR(tp->t_state, TS_FLUSH); 1854 else 1855 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1856 (*tp->t_linesw->l_start)(tp); 1857 } 1858 1859 integrate void 1860 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1861 { 1862 u_char msr, delta; 1863 1864 mutex_spin_enter(&sc->sc_lock); 1865 msr = sc->sc_msr; 1866 delta = sc->sc_msr_delta; 1867 sc->sc_msr_delta = 0; 1868 mutex_spin_exit(&sc->sc_lock); 1869 1870 if (ISSET(delta, sc->sc_msr_dcd)) { 1871 /* 1872 * Inform the tty layer that carrier detect changed. 1873 */ 1874 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1875 } 1876 1877 if (ISSET(delta, sc->sc_msr_cts)) { 1878 /* Block or unblock output according to flow control. */ 1879 if (ISSET(msr, sc->sc_msr_cts)) { 1880 sc->sc_tx_stopped = 0; 1881 (*tp->t_linesw->l_start)(tp); 1882 } else { 1883 sc->sc_tx_stopped = 1; 1884 } 1885 } 1886 1887 #ifdef PLCOM_DEBUG 1888 if (plcom_debug) 1889 plcomstatus(sc, "plcom_stsoft"); 1890 #endif 1891 } 1892 1893 void 1894 plcomsoft(void *arg) 1895 { 1896 struct plcom_softc *sc = arg; 1897 struct tty *tp; 1898 1899 if (PLCOM_ISALIVE(sc) == 0) 1900 return; 1901 1902 tp = sc->sc_tty; 1903 1904 if (sc->sc_rx_ready) { 1905 sc->sc_rx_ready = 0; 1906 plcom_rxsoft(sc, tp); 1907 } 1908 1909 if (sc->sc_st_check) { 1910 sc->sc_st_check = 0; 1911 plcom_stsoft(sc, tp); 1912 } 1913 1914 if (sc->sc_tx_done) { 1915 sc->sc_tx_done = 0; 1916 plcom_txsoft(sc, tp); 1917 } 1918 } 1919 1920 bool 1921 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1922 { 1923 bool ret = false; 1924 u_int stat = 0; 1925 1926 switch (pi->pi_type) { 1927 case PLCOM_TYPE_PL010: 1928 stat = PREAD1(pi, PL010COM_IIR); 1929 ret = ISSET(stat, PL010_IIR_IMASK); 1930 break; 1931 case PLCOM_TYPE_PL011: 1932 stat = PREAD4(pi, PL011COM_MIS); 1933 ret = ISSET(stat, PL011_INT_ALLMASK); 1934 break; 1935 } 1936 *istatus = stat; 1937 1938 return ret; 1939 } 1940 1941 int 1942 plcomintr(void *arg) 1943 { 1944 struct plcom_softc *sc = arg; 1945 struct plcom_instance *pi = &sc->sc_pi; 1946 u_char *put, *end; 1947 u_int cc; 1948 u_int istatus = 0; 1949 u_char rsr; 1950 bool intr = false; 1951 1952 PLCOM_BARRIER(pi, BR | BW); 1953 1954 if (PLCOM_ISALIVE(sc) == 0) 1955 return 0; 1956 1957 mutex_spin_enter(&sc->sc_lock); 1958 intr = plcom_intstatus(pi, &istatus); 1959 if (!intr) { 1960 mutex_spin_exit(&sc->sc_lock); 1961 return 0; 1962 } 1963 1964 end = sc->sc_ebuf; 1965 put = sc->sc_rbput; 1966 cc = sc->sc_rbavail; 1967 1968 do { 1969 u_int msr = 0, delta, fr; 1970 bool rxintr = false, txintr = false, msintr; 1971 1972 /* don't need RI here*/ 1973 fr = PREAD1(pi, PL01XCOM_FR); 1974 1975 if (!ISSET(fr, PL01X_FR_RXFE) && 1976 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1977 while (cc > 0) { 1978 int cn_trapped = 0; 1979 put[0] = PREAD1(pi, PL01XCOM_DR); 1980 rsr = PREAD1(pi, PL01XCOM_RSR); 1981 /* Clear any error status. */ 1982 if (ISSET(rsr, PL01X_RSR_ERROR)) 1983 PWRITE1(pi, PL01XCOM_ECR, 0); 1984 if (ISSET(rsr, PL01X_RSR_BE)) { 1985 cn_trapped = 0; 1986 cn_check_magic(sc->sc_tty->t_dev, 1987 CNC_BREAK, plcom_cnm_state); 1988 if (cn_trapped) 1989 continue; 1990 #if defined(KGDB) 1991 if (ISSET(sc->sc_hwflags, 1992 PLCOM_HW_KGDB)) { 1993 kgdb_connect(1); 1994 continue; 1995 } 1996 #endif 1997 } 1998 1999 put[1] = rsr; 2000 cn_trapped = 0; 2001 cn_check_magic(sc->sc_tty->t_dev, put[0], 2002 plcom_cnm_state); 2003 if (cn_trapped) { 2004 fr = PREAD1(pi, PL01XCOM_FR); 2005 if (ISSET(fr, PL01X_FR_RXFE)) 2006 break; 2007 2008 continue; 2009 } 2010 put += 2; 2011 if (put >= end) 2012 put = sc->sc_rbuf; 2013 cc--; 2014 2015 /* don't need RI here*/ 2016 fr = PREAD1(pi, PL01XCOM_FR); 2017 if (ISSET(fr, PL01X_FR_RXFE)) 2018 break; 2019 } 2020 2021 /* 2022 * Current string of incoming characters ended because 2023 * no more data was available or we ran out of space. 2024 * Schedule a receive event if any data was received. 2025 * If we're out of space, turn off receive interrupts. 2026 */ 2027 sc->sc_rbput = put; 2028 sc->sc_rbavail = cc; 2029 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2030 sc->sc_rx_ready = 1; 2031 2032 /* 2033 * See if we are in danger of overflowing a buffer. If 2034 * so, use hardware flow control to ease the pressure. 2035 */ 2036 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2037 cc < sc->sc_r_hiwat) { 2038 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2039 plcom_hwiflow(sc); 2040 } 2041 2042 /* 2043 * If we're out of space, disable receive interrupts 2044 * until the queue has drained a bit. 2045 */ 2046 if (!cc) { 2047 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2048 switch (pi->pi_type) { 2049 case PLCOM_TYPE_PL010: 2050 CLR(sc->sc_cr, 2051 PL010_CR_RIE | PL010_CR_RTIE); 2052 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2053 break; 2054 case PLCOM_TYPE_PL011: 2055 CLR(sc->sc_imsc, 2056 PL011_INT_RT | PL011_INT_RX); 2057 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2058 break; 2059 } 2060 } 2061 } else { 2062 switch (pi->pi_type) { 2063 case PLCOM_TYPE_PL010: 2064 rxintr = ISSET(istatus, PL010_IIR_RIS); 2065 if (rxintr) { 2066 PWRITE1(pi, PL010COM_CR, 0); 2067 delay(10); 2068 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2069 continue; 2070 } 2071 break; 2072 case PLCOM_TYPE_PL011: 2073 rxintr = ISSET(istatus, PL011_INT_RX); 2074 if (rxintr) { 2075 PWRITE4(pi, PL011COM_CR, 0); 2076 delay(10); 2077 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2078 continue; 2079 } 2080 break; 2081 } 2082 } 2083 2084 switch (pi->pi_type) { 2085 case PLCOM_TYPE_PL010: 2086 msr = PREAD1(pi, PL01XCOM_FR); 2087 break; 2088 case PLCOM_TYPE_PL011: 2089 msr = PREAD4(pi, PL01XCOM_FR); 2090 break; 2091 } 2092 delta = msr ^ sc->sc_msr; 2093 sc->sc_msr = msr; 2094 2095 /* Clear any pending modem status interrupt. */ 2096 switch (pi->pi_type) { 2097 case PLCOM_TYPE_PL010: 2098 msintr = ISSET(istatus, PL010_IIR_MIS); 2099 if (msintr) { 2100 PWRITE1(pi, PL010COM_ICR, 0); 2101 } 2102 break; 2103 case PLCOM_TYPE_PL011: 2104 msintr = ISSET(istatus, PL011_INT_MSMASK); 2105 if (msintr) { 2106 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2107 } 2108 break; 2109 } 2110 /* 2111 * Pulse-per-second (PSS) signals on edge of DCD? 2112 * Process these even if line discipline is ignoring DCD. 2113 */ 2114 if (delta & sc->sc_ppsmask) { 2115 struct timeval tv; 2116 mutex_spin_enter(&timecounter_lock); 2117 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2118 /* XXX nanotime() */ 2119 microtime(&tv); 2120 TIMEVAL_TO_TIMESPEC(&tv, 2121 &sc->ppsinfo.assert_timestamp); 2122 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2123 timespecadd(&sc->ppsinfo.assert_timestamp, 2124 &sc->ppsparam.assert_offset, 2125 &sc->ppsinfo.assert_timestamp); 2126 } 2127 2128 #ifdef PPS_SYNC 2129 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2130 hardpps(&tv, tv.tv_usec); 2131 #endif 2132 sc->ppsinfo.assert_sequence++; 2133 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2134 2135 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2136 /* XXX nanotime() */ 2137 microtime(&tv); 2138 TIMEVAL_TO_TIMESPEC(&tv, 2139 &sc->ppsinfo.clear_timestamp); 2140 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2141 timespecadd(&sc->ppsinfo.clear_timestamp, 2142 &sc->ppsparam.clear_offset, 2143 &sc->ppsinfo.clear_timestamp); 2144 } 2145 2146 #ifdef PPS_SYNC 2147 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2148 hardpps(&tv, tv.tv_usec); 2149 #endif 2150 sc->ppsinfo.clear_sequence++; 2151 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2152 } 2153 mutex_spin_exit(&timecounter_lock); 2154 } 2155 2156 /* 2157 * Process normal status changes 2158 */ 2159 if (ISSET(delta, sc->sc_msr_mask)) { 2160 SET(sc->sc_msr_delta, delta); 2161 2162 /* 2163 * Stop output immediately if we lose the output 2164 * flow control signal or carrier detect. 2165 */ 2166 if (ISSET(~msr, sc->sc_msr_mask)) { 2167 sc->sc_tbc = 0; 2168 sc->sc_heldtbc = 0; 2169 #ifdef PLCOM_DEBUG 2170 if (plcom_debug) 2171 plcomstatus(sc, "plcomintr "); 2172 #endif 2173 } 2174 2175 sc->sc_st_check = 1; 2176 } 2177 2178 /* 2179 * Done handling any receive interrupts. See if data 2180 * can be transmitted as well. Schedule tx done 2181 * event if no data left and tty was marked busy. 2182 */ 2183 2184 switch (pi->pi_type) { 2185 case PLCOM_TYPE_PL010: 2186 txintr = ISSET(istatus, PL010_IIR_TIS); 2187 break; 2188 case PLCOM_TYPE_PL011: 2189 txintr = ISSET(istatus, PL011_INT_TX); 2190 break; 2191 } 2192 if (txintr) { 2193 /* 2194 * If we've delayed a parameter change, do it 2195 * now, and restart * output. 2196 */ 2197 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2198 if (sc->sc_heldchange) { 2199 plcom_loadchannelregs(sc); 2200 sc->sc_heldchange = 0; 2201 sc->sc_tbc = sc->sc_heldtbc; 2202 sc->sc_heldtbc = 0; 2203 } 2204 2205 /* 2206 * Output the next chunk of the contiguous 2207 * buffer, if any. 2208 */ 2209 if (sc->sc_tbc > 0) { 2210 int n; 2211 2212 n = sc->sc_tbc; 2213 if (n > sc->sc_fifolen) 2214 n = sc->sc_fifolen; 2215 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2216 sc->sc_tbc -= n; 2217 sc->sc_tba += n; 2218 } else { 2219 /* 2220 * Disable transmit completion 2221 * interrupts if necessary. 2222 */ 2223 switch (pi->pi_type) { 2224 case PLCOM_TYPE_PL010: 2225 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2226 CLR(sc->sc_cr, PL010_CR_TIE); 2227 PWRITE1(pi, PL010COM_CR, 2228 sc->sc_cr); 2229 } 2230 break; 2231 case PLCOM_TYPE_PL011: 2232 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2233 CLR(sc->sc_imsc, PL011_INT_TX); 2234 PWRITE4(pi, PL011COM_IMSC, 2235 sc->sc_imsc); 2236 } 2237 break; 2238 } 2239 if (sc->sc_tx_busy) { 2240 sc->sc_tx_busy = 0; 2241 sc->sc_tx_done = 1; 2242 } 2243 } 2244 } 2245 2246 } while (plcom_intstatus(pi, &istatus)); 2247 2248 mutex_spin_exit(&sc->sc_lock); 2249 2250 /* Wake up the poller. */ 2251 softint_schedule(sc->sc_si); 2252 2253 #ifdef RND_COM 2254 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2255 #endif 2256 2257 PLCOM_BARRIER(pi, BR | BW); 2258 2259 return 1; 2260 } 2261 2262 /* 2263 * The following functions are polled getc and putc routines, shared 2264 * by the console and kgdb glue. 2265 * 2266 * The read-ahead code is so that you can detect pending in-band 2267 * cn_magic in polled mode while doing output rather than having to 2268 * wait until the kernel decides it needs input. 2269 */ 2270 2271 #define MAX_READAHEAD 20 2272 static int plcom_readahead[MAX_READAHEAD]; 2273 static int plcom_readaheadcount = 0; 2274 2275 int 2276 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2277 { 2278 int s = splserial(); 2279 u_char c; 2280 2281 /* got a character from reading things earlier */ 2282 if (plcom_readaheadcount > 0) { 2283 int i; 2284 2285 c = plcom_readahead[0]; 2286 for (i = 1; i < plcom_readaheadcount; i++) { 2287 plcom_readahead[i-1] = plcom_readahead[i]; 2288 } 2289 plcom_readaheadcount--; 2290 splx(s); 2291 return c; 2292 } 2293 2294 if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2295 splx(s); 2296 return -1; 2297 } 2298 2299 c = PREAD1(pi, PL01XCOM_DR); 2300 { 2301 int cn_trapped __unused = 0; 2302 #ifdef DDB 2303 extern int db_active; 2304 if (!db_active) 2305 #endif 2306 cn_check_magic(dev, c, plcom_cnm_state); 2307 } 2308 splx(s); 2309 return c; 2310 } 2311 2312 void 2313 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2314 { 2315 int s = splserial(); 2316 int timo; 2317 2318 int cin, stat; 2319 if (plcom_readaheadcount < MAX_READAHEAD 2320 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2321 int cn_trapped __unused = 0; 2322 cin = PREAD1(pi, PL01XCOM_DR); 2323 cn_check_magic(dev, cin, plcom_cnm_state); 2324 plcom_readahead[plcom_readaheadcount++] = cin; 2325 } 2326 2327 /* wait for any pending transmission to finish */ 2328 timo = 150000; 2329 while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo) 2330 continue; 2331 2332 PWRITE1(pi, PL01XCOM_DR, c); 2333 PLCOM_BARRIER(pi, BR | BW); 2334 2335 /* wait for this transmission to complete */ 2336 timo = 1500000; 2337 while (!ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFE) && --timo) 2338 continue; 2339 2340 splx(s); 2341 } 2342 2343 /* 2344 * Initialize UART for use as console or KGDB line. 2345 */ 2346 int 2347 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2348 { 2349 u_char lcr; 2350 2351 switch (pi->pi_type) { 2352 case PLCOM_TYPE_PL010: 2353 if (pi->pi_size == 0) 2354 pi->pi_size = PL010COM_UART_SIZE; 2355 break; 2356 case PLCOM_TYPE_PL011: 2357 if (pi->pi_size == 0) 2358 pi->pi_size = PL011COM_UART_SIZE; 2359 break; 2360 default: 2361 panic("Unknown plcom type"); 2362 } 2363 2364 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2365 &pi->pi_ioh)) 2366 return ENOMEM; /* ??? */ 2367 2368 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2369 switch (pi->pi_type) { 2370 case PLCOM_TYPE_PL010: 2371 PWRITE1(pi, PL010COM_CR, 0); 2372 2373 if (rate && frequency) { 2374 rate = pl010comspeed(rate, frequency); 2375 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2376 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2377 } 2378 PWRITE1(pi, PL010COM_LCR, lcr); 2379 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2380 break; 2381 case PLCOM_TYPE_PL011: 2382 PWRITE4(pi, PL011COM_CR, 0); 2383 2384 if (rate && frequency) { 2385 rate = pl011comspeed(rate, frequency); 2386 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2387 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2388 } 2389 PWRITE1(pi, PL011COM_LCRH, lcr); 2390 PWRITE4(pi, PL011COM_CR, 2391 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2392 break; 2393 } 2394 2395 #if 0 2396 /* Ought to do something like this, but we have no sc to 2397 dereference. */ 2398 /* XXX device_unit() abuse */ 2399 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2400 PL01X_MCR_DTR | PL01X_MCR_RTS); 2401 #endif 2402 2403 return 0; 2404 } 2405 2406 /* 2407 * Following are all routines needed for PLCOM to act as console 2408 */ 2409 struct consdev plcomcons = { 2410 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2411 plcomcnhalt, NULL, NODEV, CN_NORMAL 2412 }; 2413 2414 int 2415 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2416 tcflag_t cflag, int unit) 2417 { 2418 int res; 2419 2420 plcomcons_info = *pi; 2421 2422 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2423 if (res) 2424 return res; 2425 2426 cn_tab = &plcomcons; 2427 cn_init_magic(&plcom_cnm_state); 2428 cn_set_magic("\047\001"); /* default magic is BREAK */ 2429 2430 plcomconsunit = unit; 2431 plcomconsrate = rate; 2432 plcomconscflag = cflag; 2433 2434 return 0; 2435 } 2436 2437 void 2438 plcomcndetach(void) 2439 { 2440 2441 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2442 plcomcons_info.pi_size); 2443 plcomcons_info.pi_iot = NULL; 2444 2445 cn_tab = NULL; 2446 } 2447 2448 int 2449 plcomcngetc(dev_t dev) 2450 { 2451 return plcom_common_getc(dev, &plcomcons_info); 2452 } 2453 2454 /* 2455 * Console kernel output character routine. 2456 */ 2457 void 2458 plcomcnputc(dev_t dev, int c) 2459 { 2460 plcom_common_putc(dev, &plcomcons_info, c); 2461 } 2462 2463 void 2464 plcomcnpollc(dev_t dev, int on) 2465 { 2466 2467 plcom_readaheadcount = 0; 2468 } 2469 2470 void 2471 plcomcnhalt(dev_t dev) 2472 { 2473 struct plcom_instance *pi = &plcomcons_info; 2474 2475 switch (pi->pi_type) { 2476 case PLCOM_TYPE_PL010: 2477 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2478 break; 2479 case PLCOM_TYPE_PL011: 2480 PWRITE4(pi, PL011COM_CR, 2481 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2482 PWRITE4(pi, PL011COM_IMSC, 0); 2483 break; 2484 } 2485 } 2486 2487 #ifdef KGDB 2488 int 2489 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2490 tcflag_t cflag, int unit) 2491 { 2492 int res; 2493 2494 if (pi->pi_iot == plcomcons_info.pi_iot && 2495 pi->pi_iobase == plcomcons_info.pi_iobase) 2496 return EBUSY; /* cannot share with console */ 2497 2498 res = plcominit(pi, rate, frequency, cflag); 2499 if (res) 2500 return res; 2501 2502 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2503 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2504 2505 plcomkgdb_info.pi_iot = pi->pi_iot; 2506 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2507 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2508 2509 return 0; 2510 } 2511 2512 /* ARGSUSED */ 2513 int 2514 plcom_kgdb_getc(void *arg) 2515 { 2516 return plcom_common_getc(NODEV, &plcomkgdb_info); 2517 } 2518 2519 /* ARGSUSED */ 2520 void 2521 plcom_kgdb_putc(void *arg, int c) 2522 { 2523 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2524 } 2525 #endif /* KGDB */ 2526 2527 /* helper function to identify the plcom ports used by 2528 console or KGDB (and not yet autoconf attached) */ 2529 int 2530 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2531 bus_space_handle_t *ioh) 2532 { 2533 bus_space_handle_t help; 2534 2535 if (!plcomconsattached && 2536 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2537 iobase == plcomcons_info.pi_iobase) 2538 help = plcomcons_info.pi_ioh; 2539 #ifdef KGDB 2540 else if (!plcom_kgdb_attached && 2541 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2542 iobase == plcomkgdb_info.pi_iobase) 2543 help = plcomkgdb_info.pi_ioh; 2544 #endif 2545 else 2546 return 0; 2547 2548 if (ioh) 2549 *ioh = help; 2550 return 1; 2551 } 2552
Indexes created Sun Sep 28 16:09:52 GMT 2025