plcom.c revision 1.63
1 /* $NetBSD: plcom.c,v 1.63 2021/10/17 22:34:17 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.63 2021/10/17 22:34:17 jmcneill Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 /* 106 * Override cnmagic(9) macro before including <sys/systm.h>. 107 * We need to know if cn_check_magic triggered debugger, so set a flag. 108 * Callers of cn_check_magic must declare int cn_trapped = 0; 109 * XXX: this is *ugly*! 110 */ 111 #define cn_trap() \ 112 do { \ 113 console_debugger(); \ 114 cn_trapped = 1; \ 115 } while (/* CONSTCOND */ 0) 116 117 #include <sys/param.h> 118 #include <sys/systm.h> 119 #include <sys/ioctl.h> 120 #include <sys/select.h> 121 #include <sys/tty.h> 122 #include <sys/proc.h> 123 #include <sys/conf.h> 124 #include <sys/file.h> 125 #include <sys/uio.h> 126 #include <sys/kernel.h> 127 #include <sys/syslog.h> 128 #include <sys/types.h> 129 #include <sys/device.h> 130 #include <sys/malloc.h> 131 #include <sys/timepps.h> 132 #include <sys/vnode.h> 133 #include <sys/kauth.h> 134 #include <sys/intr.h> 135 #include <sys/bus.h> 136 #ifdef RND_COM 137 #include <sys/rndsource.h> 138 #endif 139 140 #include <evbarm/dev/plcomreg.h> 141 #include <evbarm/dev/plcomvar.h> 142 143 #include <dev/cons.h> 144 145 static void plcom_enable_debugport (struct plcom_softc *); 146 147 void plcom_config (struct plcom_softc *); 148 void plcom_shutdown (struct plcom_softc *); 149 int pl010comspeed (long, long); 150 int pl011comspeed (long, long); 151 static u_char cflag2lcr (tcflag_t); 152 int plcomparam (struct tty *, struct termios *); 153 void plcomstart (struct tty *); 154 int plcomhwiflow (struct tty *, int); 155 156 void plcom_loadchannelregs (struct plcom_softc *); 157 void plcom_hwiflow (struct plcom_softc *); 158 void plcom_break (struct plcom_softc *, int); 159 void plcom_modem (struct plcom_softc *, int); 160 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 161 int plcom_to_tiocm (struct plcom_softc *); 162 void plcom_iflush (struct plcom_softc *); 163 164 int plcom_common_getc (dev_t, struct plcom_instance *); 165 void plcom_common_putc (dev_t, struct plcom_instance *, int); 166 167 int plcominit (struct plcom_instance *, int, int, tcflag_t); 168 169 dev_type_open(plcomopen); 170 dev_type_close(plcomclose); 171 dev_type_read(plcomread); 172 dev_type_write(plcomwrite); 173 dev_type_ioctl(plcomioctl); 174 dev_type_stop(plcomstop); 175 dev_type_tty(plcomtty); 176 dev_type_poll(plcompoll); 177 178 int plcomcngetc (dev_t); 179 void plcomcnputc (dev_t, int); 180 void plcomcnpollc (dev_t, int); 181 void plcomcnhalt (dev_t); 182 183 #define integrate static inline 184 void plcomsoft (void *); 185 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 186 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 188 integrate void plcom_schedrx (struct plcom_softc *); 189 void plcomdiag (void *); 190 191 bool plcom_intstatus(struct plcom_instance *, u_int *); 192 193 extern struct cfdriver plcom_cd; 194 195 const struct cdevsw plcom_cdevsw = { 196 .d_open = plcomopen, 197 .d_close = plcomclose, 198 .d_read = plcomread, 199 .d_write = plcomwrite, 200 .d_ioctl = plcomioctl, 201 .d_stop = plcomstop, 202 .d_tty = plcomtty, 203 .d_poll = plcompoll, 204 .d_mmap = nommap, 205 .d_kqfilter = ttykqfilter, 206 .d_discard = nodiscard, 207 .d_flag = D_TTY 208 }; 209 210 /* 211 * Make this an option variable one can patch. 212 * But be warned: this must be a power of 2! 213 */ 214 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 215 216 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 217 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 218 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 219 220 static int plcomconsunit = -1; 221 static struct plcom_instance plcomcons_info; 222 223 static int plcomconsattached; 224 static int plcomconsrate; 225 static tcflag_t plcomconscflag; 226 static struct cnm_state plcom_cnm_state; 227 228 static int ppscap = 229 PPS_TSFMT_TSPEC | 230 PPS_CAPTUREASSERT | 231 PPS_CAPTURECLEAR | 232 #ifdef PPS_SYNC 233 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 234 #endif /* PPS_SYNC */ 235 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 236 237 #ifdef KGDB 238 #include <sys/kgdb.h> 239 240 static struct plcom_instance plcomkgdb_info; 241 static int plcom_kgdb_attached; 242 243 int plcom_kgdb_getc (void *); 244 void plcom_kgdb_putc (void *, int); 245 #endif /* KGDB */ 246 247 #define PLCOMDIALOUT_MASK TTDIALOUT_MASK 248 249 #define PLCOMUNIT(x) TTUNIT(x) 250 #define PLCOMDIALOUT(x) TTDIALOUT(x) 251 252 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 253 device_is_active((sc)->sc_dev)) 254 255 #define BR BUS_SPACE_BARRIER_READ 256 #define BW BUS_SPACE_BARRIER_WRITE 257 #define PLCOM_BARRIER(pi, f) \ 258 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 259 260 static uint8_t 261 pread1(struct plcom_instance *pi, bus_size_t reg) 262 { 263 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 264 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 265 266 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 267 (8 * (reg & 3)); 268 } 269 int nhcr; 270 static void 271 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 272 { 273 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 274 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 275 } else { 276 const size_t shift = 8 * (o & 3); 277 o &= -4; 278 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 279 tmp = (val << shift) | (tmp & ~(0xff << shift)); 280 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 281 } 282 } 283 284 static void 285 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 286 bus_size_t count) 287 { 288 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 289 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 290 } else { 291 KASSERT((o & 3) == 0); 292 while (count--) { 293 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 294 }; 295 } 296 } 297 298 #define PREAD1(pi, reg) pread1(pi, reg) 299 #define PREAD4(pi, reg) \ 300 bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg)) 301 302 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 303 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 304 #define PWRITE4(pi, reg, val) \ 305 bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val)) 306 307 int 308 pl010comspeed(long speed, long frequency) 309 { 310 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 311 312 int x, err; 313 314 #if 0 315 if (speed == 0) 316 return 0; 317 #endif 318 if (speed <= 0) 319 return -1; 320 x = divrnd(frequency / 16, speed); 321 if (x <= 0) 322 return -1; 323 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 324 if (err < 0) 325 err = -err; 326 if (err > PLCOM_TOLERANCE) 327 return -1; 328 return x; 329 330 #undef divrnd 331 } 332 333 int 334 pl011comspeed(long speed, long frequency) 335 { 336 int denom = 16 * speed; 337 int div = frequency / denom; 338 int rem = frequency % denom; 339 340 int ibrd = div << 6; 341 int fbrd = (((8 * rem) / speed) + 1) / 2; 342 343 /* Tolerance? */ 344 return ibrd | fbrd; 345 } 346 347 #ifdef PLCOM_DEBUG 348 int plcom_debug = 0; 349 350 void plcomstatus (struct plcom_softc *, const char *); 351 void 352 plcomstatus(struct plcom_softc *sc, const char *str) 353 { 354 struct tty *tp = sc->sc_tty; 355 356 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 357 device_xname(sc->sc_dev), str, 358 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 359 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 360 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 361 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 362 sc->sc_tx_stopped ? "+" : "-"); 363 364 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 365 device_xname(sc->sc_dev), str, 366 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 367 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 368 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 369 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 370 sc->sc_rx_flags); 371 } 372 #endif 373 374 #if 0 375 int 376 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 377 { 378 int data; 379 380 /* Disable the UART. */ 381 bus_space_write_1(iot, ioh, plcom_cr, 0); 382 /* Make sure the FIFO is off. */ 383 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 384 /* Disable interrupts. */ 385 bus_space_write_1(iot, ioh, plcom_iir, 0); 386 387 /* Make sure we swallow anything in the receiving register. */ 388 data = bus_space_read_1(iot, ioh, plcom_dr); 389 390 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 391 return 0; 392 393 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 394 395 if (data != PL01X_FR_RXFE) 396 return 0; 397 398 return 1; 399 } 400 #endif 401 402 /* 403 * No locking in this routine; it is only called during attach, 404 * or with the port already locked. 405 */ 406 static void 407 plcom_enable_debugport(struct plcom_softc *sc) 408 { 409 struct plcom_instance *pi = &sc->sc_pi; 410 411 sc->sc_cr = PL01X_CR_UARTEN; 412 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 413 414 /* Turn on line break interrupt, set carrier. */ 415 switch (pi->pi_type) { 416 case PLCOM_TYPE_PL010: 417 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 418 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 419 if (sc->sc_set_mcr) { 420 /* XXX device_unit() abuse */ 421 sc->sc_set_mcr(sc->sc_set_mcr_arg, 422 device_unit(sc->sc_dev), sc->sc_mcr); 423 } 424 break; 425 case PLCOM_TYPE_PL011: 426 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 427 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 428 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 429 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 430 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 431 break; 432 } 433 434 } 435 436 void 437 plcom_attach_subr(struct plcom_softc *sc) 438 { 439 struct plcom_instance *pi = &sc->sc_pi; 440 struct tty *tp; 441 442 callout_init(&sc->sc_diag_callout, 0); 443 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 444 445 switch (pi->pi_type) { 446 case PLCOM_TYPE_PL010: 447 case PLCOM_TYPE_PL011: 448 break; 449 default: 450 aprint_error_dev(sc->sc_dev, 451 "Unknown plcom type: %d\n", pi->pi_type); 452 return; 453 } 454 455 /* Disable interrupts before configuring the device. */ 456 sc->sc_cr = 0; 457 sc->sc_imsc = 0; 458 459 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 460 pi->pi_iobase == plcomcons_info.pi_iobase) { 461 plcomconsattached = 1; 462 463 /* Make sure the console is always "hardwired". */ 464 delay(1000); /* wait for output to finish */ 465 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 466 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 467 /* 468 * Must re-enable the console immediately, or we will 469 * hang when trying to print. 470 */ 471 sc->sc_cr = PL01X_CR_UARTEN; 472 if (pi->pi_type == PLCOM_TYPE_PL011) 473 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 474 } 475 476 switch (pi->pi_type) { 477 case PLCOM_TYPE_PL010: 478 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 479 break; 480 481 case PLCOM_TYPE_PL011: 482 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 483 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 484 break; 485 } 486 487 if (sc->sc_fifolen == 0) { 488 switch (pi->pi_type) { 489 case PLCOM_TYPE_PL010: 490 /* 491 * The PL010 has a 16-byte fifo, but the tx interrupt 492 * triggers when there is space for 8 more bytes. 493 */ 494 sc->sc_fifolen = 8; 495 break; 496 case PLCOM_TYPE_PL011: 497 /* Some revisions have a 32 byte TX FIFO */ 498 sc->sc_fifolen = 16; 499 break; 500 } 501 } 502 503 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 504 sc->sc_fifolen = 1; 505 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 506 } 507 508 if (sc->sc_fifolen > 1) 509 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 510 511 tp = tty_alloc(); 512 tp->t_oproc = plcomstart; 513 tp->t_param = plcomparam; 514 tp->t_hwiflow = plcomhwiflow; 515 516 sc->sc_tty = tp; 517 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_WAITOK); 518 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 519 sc->sc_rbavail = plcom_rbuf_size; 520 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 521 522 tty_attach(tp); 523 524 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 525 int maj; 526 527 /* locate the major number */ 528 maj = cdevsw_lookup_major(&plcom_cdevsw); 529 530 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 531 532 aprint_normal_dev(sc->sc_dev, "console\n"); 533 } 534 535 #ifdef KGDB 536 /* 537 * Allow kgdb to "take over" this port. If this is 538 * the kgdb device, it has exclusive use. 539 */ 540 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 541 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 542 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 543 plcom_kgdb_attached = 1; 544 545 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 546 } 547 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 548 } 549 #endif 550 551 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 552 553 #ifdef RND_COM 554 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 555 RND_TYPE_TTY, RND_FLAG_DEFAULT); 556 #endif 557 558 /* 559 * if there are no enable/disable functions, assume the device 560 * is always enabled 561 */ 562 if (!sc->enable) 563 sc->enabled = 1; 564 565 plcom_config(sc); 566 567 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 568 } 569 570 void 571 plcom_config(struct plcom_softc *sc) 572 { 573 struct plcom_instance *pi = &sc->sc_pi; 574 575 /* Disable interrupts before configuring the device. */ 576 sc->sc_cr = 0; 577 sc->sc_imsc = 0; 578 switch (pi->pi_type) { 579 case PLCOM_TYPE_PL010: 580 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 581 break; 582 583 case PLCOM_TYPE_PL011: 584 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 585 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 586 break; 587 } 588 589 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 590 plcom_enable_debugport(sc); 591 } 592 593 int 594 plcom_detach(device_t self, int flags) 595 { 596 struct plcom_softc *sc = device_private(self); 597 int maj, mn; 598 599 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 600 return EBUSY; 601 602 if (sc->disable != NULL && sc->enabled != 0) { 603 (*sc->disable)(sc); 604 sc->enabled = 0; 605 } 606 607 /* locate the major number */ 608 maj = cdevsw_lookup_major(&plcom_cdevsw); 609 610 /* Nuke the vnodes for any open instances. */ 611 mn = device_unit(self); 612 vdevgone(maj, mn, mn, VCHR); 613 614 mn |= PLCOMDIALOUT_MASK; 615 vdevgone(maj, mn, mn, VCHR); 616 617 if (sc->sc_rbuf == NULL) { 618 /* 619 * Ring buffer allocation failed in the plcom_attach_subr, 620 * only the tty is allocated, and nothing else. 621 */ 622 tty_free(sc->sc_tty); 623 return 0; 624 } 625 626 /* Free the receive buffer. */ 627 free(sc->sc_rbuf, M_DEVBUF); 628 629 /* Detach and free the tty. */ 630 tty_detach(sc->sc_tty); 631 tty_free(sc->sc_tty); 632 633 /* Unhook the soft interrupt handler. */ 634 softint_disestablish(sc->sc_si); 635 636 #ifdef RND_COM 637 /* Unhook the entropy source. */ 638 rnd_detach_source(&sc->rnd_source); 639 #endif 640 callout_destroy(&sc->sc_diag_callout); 641 642 /* Destroy the lock. */ 643 mutex_destroy(&sc->sc_lock); 644 645 return 0; 646 } 647 648 int 649 plcom_activate(device_t self, enum devact act) 650 { 651 struct plcom_softc *sc = device_private(self); 652 653 switch (act) { 654 case DVACT_DEACTIVATE: 655 sc->enabled = 0; 656 return 0; 657 default: 658 return EOPNOTSUPP; 659 } 660 } 661 662 void 663 plcom_shutdown(struct plcom_softc *sc) 664 { 665 struct plcom_instance *pi = &sc->sc_pi; 666 struct tty *tp = sc->sc_tty; 667 mutex_spin_enter(&sc->sc_lock); 668 669 /* If we were asserting flow control, then deassert it. */ 670 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 671 plcom_hwiflow(sc); 672 673 /* Clear any break condition set with TIOCSBRK. */ 674 plcom_break(sc, 0); 675 676 /* Turn off PPS capture on last close. */ 677 mutex_spin_enter(&timecounter_lock); 678 sc->sc_ppsmask = 0; 679 sc->ppsparam.mode = 0; 680 mutex_spin_exit(&timecounter_lock); 681 682 /* 683 * Hang up if necessary. Wait a bit, so the other side has time to 684 * notice even if we immediately open the port again. 685 * Avoid tsleeping above splhigh(). 686 */ 687 if (ISSET(tp->t_cflag, HUPCL)) { 688 plcom_modem(sc, 0); 689 microtime(&sc->sc_hup_pending); 690 sc->sc_hup_pending.tv_sec++; 691 } 692 693 sc->sc_cr = 0; 694 sc->sc_imsc = 0; 695 /* Turn off interrupts. */ 696 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 697 /* interrupt on break */ 698 699 sc->sc_cr = PL01X_CR_UARTEN; 700 sc->sc_imsc = 0; 701 switch (pi->pi_type) { 702 case PLCOM_TYPE_PL010: 703 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 704 break; 705 case PLCOM_TYPE_PL011: 706 SET(sc->sc_cr, PL011_CR_RXE); 707 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 708 break; 709 } 710 } 711 switch (pi->pi_type) { 712 case PLCOM_TYPE_PL010: 713 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 714 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 715 break; 716 case PLCOM_TYPE_PL011: 717 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 718 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 719 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 720 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 721 break; 722 } 723 724 mutex_spin_exit(&sc->sc_lock); 725 if (sc->disable) { 726 #ifdef DIAGNOSTIC 727 if (!sc->enabled) 728 panic("plcom_shutdown: not enabled?"); 729 #endif 730 (*sc->disable)(sc); 731 sc->enabled = 0; 732 } 733 } 734 735 int 736 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 737 { 738 struct plcom_softc *sc; 739 struct plcom_instance *pi; 740 struct tty *tp; 741 int s; 742 int error; 743 744 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 745 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 746 sc->sc_rbuf == NULL) 747 return ENXIO; 748 749 if (!device_is_active(sc->sc_dev)) 750 return ENXIO; 751 752 pi = &sc->sc_pi; 753 754 #ifdef KGDB 755 /* 756 * If this is the kgdb port, no other use is permitted. 757 */ 758 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 759 return EBUSY; 760 #endif 761 762 tp = sc->sc_tty; 763 764 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 765 return (EBUSY); 766 767 s = spltty(); 768 769 /* 770 * Do the following iff this is a first open. 771 */ 772 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 773 struct termios t; 774 struct timeval now, diff; 775 776 tp->t_dev = dev; 777 778 if (sc->enable) { 779 if ((*sc->enable)(sc)) { 780 splx(s); 781 aprint_error_dev(sc->sc_dev, 782 "device enable failed\n"); 783 return EIO; 784 } 785 mutex_spin_enter(&sc->sc_lock); 786 sc->enabled = 1; 787 plcom_config(sc); 788 } else { 789 mutex_spin_enter(&sc->sc_lock); 790 } 791 792 if (timerisset(&sc->sc_hup_pending)) { 793 microtime(&now); 794 while (timercmp(&now, &sc->sc_hup_pending, <)) { 795 timersub(&sc->sc_hup_pending, &now, &diff); 796 const int ms = diff.tv_sec * 100 + 797 uimax(diff.tv_usec / 1000, 1); 798 kpause(ttclos, false, mstohz(ms), &sc->sc_lock); 799 microtime(&now); 800 } 801 timerclear(&sc->sc_hup_pending); 802 } 803 804 /* Turn on interrupts. */ 805 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 806 /* Fetch the current modem control status, needed later. */ 807 sc->sc_cr = PL01X_CR_UARTEN; 808 switch (pi->pi_type) { 809 case PLCOM_TYPE_PL010: 810 SET(sc->sc_cr, 811 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 812 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 813 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 814 break; 815 case PLCOM_TYPE_PL011: 816 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 817 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 818 PL011_INT_MSMASK); 819 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 820 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 821 break; 822 } 823 824 /* Clear PPS capture state on first open. */ 825 826 mutex_spin_enter(&timecounter_lock); 827 sc->sc_ppsmask = 0; 828 sc->ppsparam.mode = 0; 829 mutex_spin_exit(&timecounter_lock); 830 831 mutex_spin_exit(&sc->sc_lock); 832 833 /* 834 * Initialize the termios status to the defaults. Add in the 835 * sticky bits from TIOCSFLAGS. 836 */ 837 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 838 t.c_ospeed = plcomconsrate; 839 t.c_cflag = plcomconscflag; 840 } else { 841 t.c_ospeed = TTYDEF_SPEED; 842 t.c_cflag = TTYDEF_CFLAG; 843 } 844 t.c_ispeed = t.c_ospeed; 845 846 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 847 SET(t.c_cflag, CLOCAL); 848 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 849 SET(t.c_cflag, CRTSCTS); 850 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 851 SET(t.c_cflag, MDMBUF); 852 /* Make sure plcomparam() will do something. */ 853 tp->t_ospeed = 0; 854 (void) plcomparam(tp, &t); 855 tp->t_iflag = TTYDEF_IFLAG; 856 tp->t_oflag = TTYDEF_OFLAG; 857 tp->t_lflag = TTYDEF_LFLAG; 858 ttychars(tp); 859 ttsetwater(tp); 860 861 mutex_spin_enter(&sc->sc_lock); 862 863 /* 864 * Turn on DTR. We must always do this, even if carrier is not 865 * present, because otherwise we'd have to use TIOCSDTR 866 * immediately after setting CLOCAL, which applications do not 867 * expect. We always assert DTR while the device is open 868 * unless explicitly requested to deassert it. 869 */ 870 plcom_modem(sc, 1); 871 872 /* Clear the input ring, and unblock. */ 873 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 874 sc->sc_rbavail = plcom_rbuf_size; 875 plcom_iflush(sc); 876 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 877 plcom_hwiflow(sc); 878 879 #ifdef PLCOM_DEBUG 880 if (plcom_debug) 881 plcomstatus(sc, "plcomopen "); 882 #endif 883 884 mutex_spin_exit(&sc->sc_lock); 885 } 886 887 splx(s); 888 889 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 890 if (error) 891 goto bad; 892 893 error = (*tp->t_linesw->l_open)(dev, tp); 894 if (error) 895 goto bad; 896 897 return 0; 898 899 bad: 900 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 901 /* 902 * We failed to open the device, and nobody else had it opened. 903 * Clean up the state as appropriate. 904 */ 905 plcom_shutdown(sc); 906 } 907 908 return error; 909 } 910 911 int 912 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 913 { 914 struct plcom_softc *sc = 915 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 916 struct tty *tp = sc->sc_tty; 917 918 /* XXX This is for cons.c. */ 919 if (!ISSET(tp->t_state, TS_ISOPEN)) 920 return 0; 921 922 (*tp->t_linesw->l_close)(tp, flag); 923 ttyclose(tp); 924 925 if (PLCOM_ISALIVE(sc) == 0) 926 return 0; 927 928 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 929 /* 930 * Although we got a last close, the device may still be in 931 * use; e.g. if this was the dialout node, and there are still 932 * processes waiting for carrier on the non-dialout node. 933 */ 934 plcom_shutdown(sc); 935 } 936 937 return 0; 938 } 939 940 int 941 plcomread(dev_t dev, struct uio *uio, int flag) 942 { 943 struct plcom_softc *sc = 944 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 945 struct tty *tp = sc->sc_tty; 946 947 if (PLCOM_ISALIVE(sc) == 0) 948 return EIO; 949 950 return (*tp->t_linesw->l_read)(tp, uio, flag); 951 } 952 953 int 954 plcomwrite(dev_t dev, struct uio *uio, int flag) 955 { 956 struct plcom_softc *sc = 957 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 958 struct tty *tp = sc->sc_tty; 959 960 if (PLCOM_ISALIVE(sc) == 0) 961 return EIO; 962 963 return (*tp->t_linesw->l_write)(tp, uio, flag); 964 } 965 966 int 967 plcompoll(dev_t dev, int events, struct lwp *l) 968 { 969 struct plcom_softc *sc = 970 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 971 struct tty *tp = sc->sc_tty; 972 973 if (PLCOM_ISALIVE(sc) == 0) 974 return EIO; 975 976 return (*tp->t_linesw->l_poll)(tp, events, l); 977 } 978 979 struct tty * 980 plcomtty(dev_t dev) 981 { 982 struct plcom_softc *sc = 983 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 984 struct tty *tp = sc->sc_tty; 985 986 return tp; 987 } 988 989 int 990 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 991 { 992 struct plcom_softc *sc = 993 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 994 struct tty *tp; 995 int error; 996 997 if (sc == NULL) 998 return ENXIO; 999 if (PLCOM_ISALIVE(sc) == 0) 1000 return EIO; 1001 1002 tp = sc->sc_tty; 1003 1004 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1005 if (error != EPASSTHROUGH) 1006 return error; 1007 1008 error = ttioctl(tp, cmd, data, flag, l); 1009 if (error != EPASSTHROUGH) 1010 return error; 1011 1012 error = 0; 1013 switch (cmd) { 1014 case TIOCSFLAGS: 1015 error = kauth_authorize_device_tty(l->l_cred, 1016 KAUTH_DEVICE_TTY_PRIVSET, tp); 1017 break; 1018 default: 1019 /* nothing */ 1020 break; 1021 } 1022 if (error) { 1023 return error; 1024 } 1025 1026 mutex_spin_enter(&sc->sc_lock); 1027 switch (cmd) { 1028 case TIOCSBRK: 1029 plcom_break(sc, 1); 1030 break; 1031 1032 case TIOCCBRK: 1033 plcom_break(sc, 0); 1034 break; 1035 1036 case TIOCSDTR: 1037 plcom_modem(sc, 1); 1038 break; 1039 1040 case TIOCCDTR: 1041 plcom_modem(sc, 0); 1042 break; 1043 1044 case TIOCGFLAGS: 1045 *(int *)data = sc->sc_swflags; 1046 break; 1047 1048 case TIOCSFLAGS: 1049 sc->sc_swflags = *(int *)data; 1050 break; 1051 1052 case TIOCMSET: 1053 case TIOCMBIS: 1054 case TIOCMBIC: 1055 tiocm_to_plcom(sc, cmd, *(int *)data); 1056 break; 1057 1058 case TIOCMGET: 1059 *(int *)data = plcom_to_tiocm(sc); 1060 break; 1061 1062 case PPS_IOC_CREATE: 1063 break; 1064 1065 case PPS_IOC_DESTROY: 1066 break; 1067 1068 case PPS_IOC_GETPARAMS: { 1069 pps_params_t *pp; 1070 pp = (pps_params_t *)data; 1071 mutex_spin_enter(&timecounter_lock); 1072 *pp = sc->ppsparam; 1073 mutex_spin_exit(&timecounter_lock); 1074 break; 1075 } 1076 1077 case PPS_IOC_SETPARAMS: { 1078 pps_params_t *pp; 1079 int mode; 1080 pp = (pps_params_t *)data; 1081 mutex_spin_enter(&timecounter_lock); 1082 if (pp->mode & ~ppscap) { 1083 error = EINVAL; 1084 mutex_spin_exit(&timecounter_lock); 1085 break; 1086 } 1087 sc->ppsparam = *pp; 1088 /* 1089 * Compute msr masks from user-specified timestamp state. 1090 */ 1091 mode = sc->ppsparam.mode; 1092 #ifdef PPS_SYNC 1093 if (mode & PPS_HARDPPSONASSERT) { 1094 mode |= PPS_CAPTUREASSERT; 1095 /* XXX revoke any previous HARDPPS source */ 1096 } 1097 if (mode & PPS_HARDPPSONCLEAR) { 1098 mode |= PPS_CAPTURECLEAR; 1099 /* XXX revoke any previous HARDPPS source */ 1100 } 1101 #endif /* PPS_SYNC */ 1102 switch (mode & PPS_CAPTUREBOTH) { 1103 case 0: 1104 sc->sc_ppsmask = 0; 1105 break; 1106 1107 case PPS_CAPTUREASSERT: 1108 sc->sc_ppsmask = PL01X_MSR_DCD; 1109 sc->sc_ppsassert = PL01X_MSR_DCD; 1110 sc->sc_ppsclear = -1; 1111 break; 1112 1113 case PPS_CAPTURECLEAR: 1114 sc->sc_ppsmask = PL01X_MSR_DCD; 1115 sc->sc_ppsassert = -1; 1116 sc->sc_ppsclear = 0; 1117 break; 1118 1119 case PPS_CAPTUREBOTH: 1120 sc->sc_ppsmask = PL01X_MSR_DCD; 1121 sc->sc_ppsassert = PL01X_MSR_DCD; 1122 sc->sc_ppsclear = 0; 1123 break; 1124 1125 default: 1126 error = EINVAL; 1127 break; 1128 } 1129 mutex_spin_exit(&timecounter_lock); 1130 break; 1131 } 1132 1133 case PPS_IOC_GETCAP: 1134 *(int*)data = ppscap; 1135 break; 1136 1137 case PPS_IOC_FETCH: { 1138 pps_info_t *pi; 1139 pi = (pps_info_t *)data; 1140 mutex_spin_enter(&timecounter_lock); 1141 *pi = sc->ppsinfo; 1142 mutex_spin_exit(&timecounter_lock); 1143 break; 1144 } 1145 1146 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1147 /* 1148 * Some GPS clocks models use the falling rather than 1149 * rising edge as the on-the-second signal. 1150 * The old API has no way to specify PPS polarity. 1151 */ 1152 mutex_spin_enter(&timecounter_lock); 1153 sc->sc_ppsmask = PL01X_MSR_DCD; 1154 #ifndef PPS_TRAILING_EDGE 1155 sc->sc_ppsassert = PL01X_MSR_DCD; 1156 sc->sc_ppsclear = -1; 1157 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1158 &sc->ppsinfo.assert_timestamp); 1159 #else 1160 sc->sc_ppsassert = -1 1161 sc->sc_ppsclear = 0; 1162 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1163 &sc->ppsinfo.clear_timestamp); 1164 #endif 1165 mutex_spin_exit(&timecounter_lock); 1166 break; 1167 1168 default: 1169 error = EPASSTHROUGH; 1170 break; 1171 } 1172 1173 mutex_spin_exit(&sc->sc_lock); 1174 1175 #ifdef PLCOM_DEBUG 1176 if (plcom_debug) 1177 plcomstatus(sc, "plcomioctl "); 1178 #endif 1179 1180 return error; 1181 } 1182 1183 integrate void 1184 plcom_schedrx(struct plcom_softc *sc) 1185 { 1186 1187 sc->sc_rx_ready = 1; 1188 1189 /* Wake up the poller. */ 1190 softint_schedule(sc->sc_si); 1191 } 1192 1193 void 1194 plcom_break(struct plcom_softc *sc, int onoff) 1195 { 1196 1197 if (onoff) 1198 SET(sc->sc_lcr, PL01X_LCR_BRK); 1199 else 1200 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1201 1202 if (!sc->sc_heldchange) { 1203 if (sc->sc_tx_busy) { 1204 sc->sc_heldtbc = sc->sc_tbc; 1205 sc->sc_tbc = 0; 1206 sc->sc_heldchange = 1; 1207 } else 1208 plcom_loadchannelregs(sc); 1209 } 1210 } 1211 1212 void 1213 plcom_modem(struct plcom_softc *sc, int onoff) 1214 { 1215 1216 if (sc->sc_mcr_dtr == 0) 1217 return; 1218 1219 if (onoff) 1220 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1221 else 1222 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1223 1224 if (!sc->sc_heldchange) { 1225 if (sc->sc_tx_busy) { 1226 sc->sc_heldtbc = sc->sc_tbc; 1227 sc->sc_tbc = 0; 1228 sc->sc_heldchange = 1; 1229 } else 1230 plcom_loadchannelregs(sc); 1231 } 1232 } 1233 1234 void 1235 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1236 { 1237 u_char plcombits; 1238 1239 plcombits = 0; 1240 if (ISSET(ttybits, TIOCM_DTR)) 1241 SET(plcombits, PL01X_MCR_DTR); 1242 if (ISSET(ttybits, TIOCM_RTS)) 1243 SET(plcombits, PL01X_MCR_RTS); 1244 1245 switch (how) { 1246 case TIOCMBIC: 1247 CLR(sc->sc_mcr, plcombits); 1248 break; 1249 1250 case TIOCMBIS: 1251 SET(sc->sc_mcr, plcombits); 1252 break; 1253 1254 case TIOCMSET: 1255 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1256 SET(sc->sc_mcr, plcombits); 1257 break; 1258 } 1259 1260 if (!sc->sc_heldchange) { 1261 if (sc->sc_tx_busy) { 1262 sc->sc_heldtbc = sc->sc_tbc; 1263 sc->sc_tbc = 0; 1264 sc->sc_heldchange = 1; 1265 } else 1266 plcom_loadchannelregs(sc); 1267 } 1268 } 1269 1270 int 1271 plcom_to_tiocm(struct plcom_softc *sc) 1272 { 1273 u_char plcombits; 1274 int ttybits = 0; 1275 1276 plcombits = sc->sc_mcr; 1277 if (ISSET(plcombits, PL01X_MCR_DTR)) 1278 SET(ttybits, TIOCM_DTR); 1279 if (ISSET(plcombits, PL01X_MCR_RTS)) 1280 SET(ttybits, TIOCM_RTS); 1281 1282 plcombits = sc->sc_msr; 1283 if (ISSET(plcombits, PL01X_MSR_DCD)) 1284 SET(ttybits, TIOCM_CD); 1285 if (ISSET(plcombits, PL01X_MSR_CTS)) 1286 SET(ttybits, TIOCM_CTS); 1287 if (ISSET(plcombits, PL01X_MSR_DSR)) 1288 SET(ttybits, TIOCM_DSR); 1289 if (ISSET(plcombits, PL011_MSR_RI)) 1290 SET(ttybits, TIOCM_RI); 1291 1292 if (sc->sc_cr != 0) 1293 SET(ttybits, TIOCM_LE); 1294 1295 return ttybits; 1296 } 1297 1298 static u_char 1299 cflag2lcr(tcflag_t cflag) 1300 { 1301 u_char lcr = 0; 1302 1303 switch (ISSET(cflag, CSIZE)) { 1304 case CS5: 1305 SET(lcr, PL01X_LCR_5BITS); 1306 break; 1307 case CS6: 1308 SET(lcr, PL01X_LCR_6BITS); 1309 break; 1310 case CS7: 1311 SET(lcr, PL01X_LCR_7BITS); 1312 break; 1313 case CS8: 1314 SET(lcr, PL01X_LCR_8BITS); 1315 break; 1316 } 1317 if (ISSET(cflag, PARENB)) { 1318 SET(lcr, PL01X_LCR_PEN); 1319 if (!ISSET(cflag, PARODD)) 1320 SET(lcr, PL01X_LCR_EPS); 1321 } 1322 if (ISSET(cflag, CSTOPB)) 1323 SET(lcr, PL01X_LCR_STP2); 1324 1325 return lcr; 1326 } 1327 1328 int 1329 plcomparam(struct tty *tp, struct termios *t) 1330 { 1331 struct plcom_softc *sc = 1332 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1333 struct plcom_instance *pi = &sc->sc_pi; 1334 int ospeed = -1; 1335 u_char lcr; 1336 1337 if (PLCOM_ISALIVE(sc) == 0) 1338 return EIO; 1339 1340 switch (pi->pi_type) { 1341 case PLCOM_TYPE_PL010: 1342 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1343 break; 1344 case PLCOM_TYPE_PL011: 1345 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1346 break; 1347 } 1348 1349 /* Check requested parameters. */ 1350 if (ospeed < 0) 1351 return EINVAL; 1352 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1353 return EINVAL; 1354 1355 /* 1356 * For the console, always force CLOCAL and !HUPCL, so that the port 1357 * is always active. 1358 */ 1359 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1360 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1361 SET(t->c_cflag, CLOCAL); 1362 CLR(t->c_cflag, HUPCL); 1363 } 1364 1365 /* 1366 * If there were no changes, don't do anything. This avoids dropping 1367 * input and improves performance when all we did was frob things like 1368 * VMIN and VTIME. 1369 */ 1370 if (tp->t_ospeed == t->c_ospeed && 1371 tp->t_cflag == t->c_cflag) 1372 return 0; 1373 1374 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1375 1376 mutex_spin_enter(&sc->sc_lock); 1377 1378 sc->sc_lcr = lcr; 1379 1380 /* 1381 * PL010 has a fixed-length FIFO trigger point. 1382 */ 1383 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1384 sc->sc_fifo = 1; 1385 else 1386 sc->sc_fifo = 0; 1387 1388 if (sc->sc_fifo) 1389 SET(sc->sc_lcr, PL01X_LCR_FEN); 1390 1391 /* 1392 * If we're not in a mode that assumes a connection is present, then 1393 * ignore carrier changes. 1394 */ 1395 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1396 sc->sc_msr_dcd = 0; 1397 else 1398 sc->sc_msr_dcd = PL01X_MSR_DCD; 1399 /* 1400 * Set the flow control pins depending on the current flow control 1401 * mode. 1402 */ 1403 if (ISSET(t->c_cflag, CRTSCTS)) { 1404 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1405 sc->sc_mcr_rts = PL01X_MCR_RTS; 1406 sc->sc_msr_cts = PL01X_MSR_CTS; 1407 } else if (ISSET(t->c_cflag, MDMBUF)) { 1408 /* 1409 * For DTR/DCD flow control, make sure we don't toggle DTR for 1410 * carrier detection. 1411 */ 1412 sc->sc_mcr_dtr = 0; 1413 sc->sc_mcr_rts = PL01X_MCR_DTR; 1414 sc->sc_msr_cts = PL01X_MSR_DCD; 1415 } else { 1416 /* 1417 * If no flow control, then always set RTS. This will make 1418 * the other side happy if it mistakenly thinks we're doing 1419 * RTS/CTS flow control. 1420 */ 1421 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1422 sc->sc_mcr_rts = 0; 1423 sc->sc_msr_cts = 0; 1424 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1425 SET(sc->sc_mcr, PL01X_MCR_RTS); 1426 else 1427 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1428 } 1429 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1430 1431 #if 0 1432 if (ospeed == 0) 1433 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1434 else 1435 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1436 #endif 1437 1438 switch (pi->pi_type) { 1439 case PLCOM_TYPE_PL010: 1440 sc->sc_ratel = ospeed & 0xff; 1441 sc->sc_rateh = (ospeed >> 8) & 0xff; 1442 break; 1443 case PLCOM_TYPE_PL011: 1444 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1445 sc->sc_rateh = ospeed >> 6; 1446 break; 1447 } 1448 1449 /* And copy to tty. */ 1450 tp->t_ispeed = t->c_ospeed; 1451 tp->t_ospeed = t->c_ospeed; 1452 tp->t_cflag = t->c_cflag; 1453 1454 if (!sc->sc_heldchange) { 1455 if (sc->sc_tx_busy) { 1456 sc->sc_heldtbc = sc->sc_tbc; 1457 sc->sc_tbc = 0; 1458 sc->sc_heldchange = 1; 1459 } else 1460 plcom_loadchannelregs(sc); 1461 } 1462 1463 if (!ISSET(t->c_cflag, CHWFLOW)) { 1464 /* Disable the high water mark. */ 1465 sc->sc_r_hiwat = 0; 1466 sc->sc_r_lowat = 0; 1467 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1468 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1469 plcom_schedrx(sc); 1470 } 1471 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1472 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1473 plcom_hwiflow(sc); 1474 } 1475 } else { 1476 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1477 sc->sc_r_lowat = plcom_rbuf_lowat; 1478 } 1479 1480 mutex_spin_exit(&sc->sc_lock); 1481 1482 /* 1483 * Update the tty layer's idea of the carrier bit, in case we changed 1484 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1485 * explicit request. 1486 */ 1487 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1488 1489 #ifdef PLCOM_DEBUG 1490 if (plcom_debug) 1491 plcomstatus(sc, "plcomparam "); 1492 #endif 1493 1494 if (!ISSET(t->c_cflag, CHWFLOW)) { 1495 if (sc->sc_tx_stopped) { 1496 sc->sc_tx_stopped = 0; 1497 plcomstart(tp); 1498 } 1499 } 1500 1501 return 0; 1502 } 1503 1504 void 1505 plcom_iflush(struct plcom_softc *sc) 1506 { 1507 struct plcom_instance *pi = &sc->sc_pi; 1508 #ifdef DIAGNOSTIC 1509 int reg; 1510 #endif 1511 int timo; 1512 1513 #ifdef DIAGNOSTIC 1514 reg = 0xffff; 1515 #endif 1516 timo = 50000; 1517 /* flush any pending I/O */ 1518 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1519 && --timo) 1520 #ifdef DIAGNOSTIC 1521 reg = 1522 #else 1523 (void) 1524 #endif 1525 PREAD1(pi, PL01XCOM_DR); 1526 #ifdef DIAGNOSTIC 1527 if (!timo) 1528 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1529 reg); 1530 #endif 1531 } 1532 1533 void 1534 plcom_loadchannelregs(struct plcom_softc *sc) 1535 { 1536 struct plcom_instance *pi = &sc->sc_pi; 1537 1538 /* XXXXX necessary? */ 1539 plcom_iflush(sc); 1540 1541 switch (pi->pi_type) { 1542 case PLCOM_TYPE_PL010: 1543 PWRITE1(pi, PL010COM_CR, 0); 1544 if (sc->sc_frequency != 0) { 1545 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1546 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1547 } 1548 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1549 1550 /* XXX device_unit() abuse */ 1551 if (sc->sc_set_mcr) 1552 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1553 device_unit(sc->sc_dev), 1554 sc->sc_mcr_active = sc->sc_mcr); 1555 1556 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1557 break; 1558 1559 case PLCOM_TYPE_PL011: 1560 PWRITE4(pi, PL011COM_CR, 0); 1561 if (sc->sc_frequency != 0) { 1562 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1563 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1564 } 1565 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1566 sc->sc_mcr_active = sc->sc_mcr; 1567 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1568 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1569 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1570 break; 1571 } 1572 } 1573 1574 int 1575 plcomhwiflow(struct tty *tp, int block) 1576 { 1577 struct plcom_softc *sc = 1578 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1579 1580 if (PLCOM_ISALIVE(sc) == 0) 1581 return 0; 1582 1583 if (sc->sc_mcr_rts == 0) 1584 return 0; 1585 1586 mutex_spin_enter(&sc->sc_lock); 1587 1588 if (block) { 1589 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1590 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1591 plcom_hwiflow(sc); 1592 } 1593 } else { 1594 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1595 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1596 plcom_schedrx(sc); 1597 } 1598 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1599 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1600 plcom_hwiflow(sc); 1601 } 1602 } 1603 1604 mutex_spin_exit(&sc->sc_lock); 1605 return 1; 1606 } 1607 1608 /* 1609 * (un)block input via hw flowcontrol 1610 */ 1611 void 1612 plcom_hwiflow(struct plcom_softc *sc) 1613 { 1614 struct plcom_instance *pi = &sc->sc_pi; 1615 1616 if (sc->sc_mcr_rts == 0) 1617 return; 1618 1619 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1620 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1621 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1622 } else { 1623 SET(sc->sc_mcr, sc->sc_mcr_rts); 1624 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1625 } 1626 switch (pi->pi_type) { 1627 case PLCOM_TYPE_PL010: 1628 if (sc->sc_set_mcr) 1629 /* XXX device_unit() abuse */ 1630 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1631 device_unit(sc->sc_dev), sc->sc_mcr_active); 1632 break; 1633 case PLCOM_TYPE_PL011: 1634 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1635 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1636 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1637 break; 1638 } 1639 } 1640 1641 1642 void 1643 plcomstart(struct tty *tp) 1644 { 1645 struct plcom_softc *sc = 1646 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1647 struct plcom_instance *pi = &sc->sc_pi; 1648 int s; 1649 1650 if (PLCOM_ISALIVE(sc) == 0) 1651 return; 1652 1653 s = spltty(); 1654 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1655 goto out; 1656 if (sc->sc_tx_stopped) 1657 goto out; 1658 1659 if (!ttypull(tp)) 1660 goto out; 1661 1662 /* Grab the first contiguous region of buffer space. */ 1663 { 1664 u_char *tba; 1665 int tbc; 1666 1667 tba = tp->t_outq.c_cf; 1668 tbc = ndqb(&tp->t_outq, 0); 1669 1670 mutex_spin_enter(&sc->sc_lock); 1671 1672 sc->sc_tba = tba; 1673 sc->sc_tbc = tbc; 1674 } 1675 1676 SET(tp->t_state, TS_BUSY); 1677 sc->sc_tx_busy = 1; 1678 1679 /* Enable transmit completion interrupts if necessary. */ 1680 switch (pi->pi_type) { 1681 case PLCOM_TYPE_PL010: 1682 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1683 SET(sc->sc_cr, PL010_CR_TIE); 1684 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1685 } 1686 break; 1687 case PLCOM_TYPE_PL011: 1688 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1689 SET(sc->sc_imsc, PL011_INT_TX); 1690 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1691 } 1692 break; 1693 } 1694 1695 /* Output the first chunk of the contiguous buffer. */ 1696 { 1697 int n; 1698 1699 n = sc->sc_tbc; 1700 if (n > sc->sc_fifolen) 1701 n = sc->sc_fifolen; 1702 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1703 sc->sc_tbc -= n; 1704 sc->sc_tba += n; 1705 } 1706 mutex_spin_exit(&sc->sc_lock); 1707 out: 1708 splx(s); 1709 return; 1710 } 1711 1712 /* 1713 * Stop output on a line. 1714 */ 1715 void 1716 plcomstop(struct tty *tp, int flag) 1717 { 1718 struct plcom_softc *sc = 1719 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1720 1721 mutex_spin_enter(&sc->sc_lock); 1722 if (ISSET(tp->t_state, TS_BUSY)) { 1723 /* Stop transmitting at the next chunk. */ 1724 sc->sc_tbc = 0; 1725 sc->sc_heldtbc = 0; 1726 if (!ISSET(tp->t_state, TS_TTSTOP)) 1727 SET(tp->t_state, TS_FLUSH); 1728 } 1729 mutex_spin_exit(&sc->sc_lock); 1730 } 1731 1732 void 1733 plcomdiag(void *arg) 1734 { 1735 struct plcom_softc *sc = arg; 1736 int overflows, floods; 1737 1738 mutex_spin_enter(&sc->sc_lock); 1739 overflows = sc->sc_overflows; 1740 sc->sc_overflows = 0; 1741 floods = sc->sc_floods; 1742 sc->sc_floods = 0; 1743 sc->sc_errors = 0; 1744 mutex_spin_exit(&sc->sc_lock); 1745 1746 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1747 device_xname(sc->sc_dev), 1748 overflows, overflows == 1 ? "" : "s", 1749 floods, floods == 1 ? "" : "s"); 1750 } 1751 1752 integrate void 1753 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1754 { 1755 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1756 struct plcom_instance *pi = &sc->sc_pi; 1757 u_char *get, *end; 1758 u_int cc, scc; 1759 u_char rsr; 1760 int code; 1761 1762 end = sc->sc_ebuf; 1763 get = sc->sc_rbget; 1764 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1765 1766 if (cc == plcom_rbuf_size) { 1767 sc->sc_floods++; 1768 if (sc->sc_errors++ == 0) 1769 callout_reset(&sc->sc_diag_callout, 60 * hz, 1770 plcomdiag, sc); 1771 } 1772 1773 while (cc) { 1774 code = get[0]; 1775 rsr = get[1]; 1776 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1777 if (ISSET(rsr, PL01X_RSR_OE)) { 1778 sc->sc_overflows++; 1779 if (sc->sc_errors++ == 0) 1780 callout_reset(&sc->sc_diag_callout, 1781 60 * hz, plcomdiag, sc); 1782 } 1783 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1784 SET(code, TTY_FE); 1785 if (ISSET(rsr, PL01X_RSR_PE)) 1786 SET(code, TTY_PE); 1787 } 1788 if ((*rint)(code, tp) == -1) { 1789 /* 1790 * The line discipline's buffer is out of space. 1791 */ 1792 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1793 /* 1794 * We're either not using flow control, or the 1795 * line discipline didn't tell us to block for 1796 * some reason. Either way, we have no way to 1797 * know when there's more space available, so 1798 * just drop the rest of the data. 1799 */ 1800 get += cc << 1; 1801 if (get >= end) 1802 get -= plcom_rbuf_size << 1; 1803 cc = 0; 1804 } else { 1805 /* 1806 * Don't schedule any more receive processing 1807 * until the line discipline tells us there's 1808 * space available (through plcomhwiflow()). 1809 * Leave the rest of the data in the input 1810 * buffer. 1811 */ 1812 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1813 } 1814 break; 1815 } 1816 get += 2; 1817 if (get >= end) 1818 get = sc->sc_rbuf; 1819 cc--; 1820 } 1821 1822 if (cc != scc) { 1823 sc->sc_rbget = get; 1824 mutex_spin_enter(&sc->sc_lock); 1825 1826 cc = sc->sc_rbavail += scc - cc; 1827 /* Buffers should be ok again, release possible block. */ 1828 if (cc >= sc->sc_r_lowat) { 1829 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1830 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1831 switch (pi->pi_type) { 1832 case PLCOM_TYPE_PL010: 1833 SET(sc->sc_cr, 1834 PL010_CR_RIE | PL010_CR_RTIE); 1835 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1836 break; 1837 case PLCOM_TYPE_PL011: 1838 SET(sc->sc_imsc, 1839 PL011_INT_RX | PL011_INT_RT); 1840 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1841 break; 1842 } 1843 } 1844 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1845 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1846 plcom_hwiflow(sc); 1847 } 1848 } 1849 mutex_spin_exit(&sc->sc_lock); 1850 } 1851 } 1852 1853 integrate void 1854 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1855 { 1856 1857 CLR(tp->t_state, TS_BUSY); 1858 if (ISSET(tp->t_state, TS_FLUSH)) 1859 CLR(tp->t_state, TS_FLUSH); 1860 else 1861 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1862 (*tp->t_linesw->l_start)(tp); 1863 } 1864 1865 integrate void 1866 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1867 { 1868 u_char msr, delta; 1869 1870 mutex_spin_enter(&sc->sc_lock); 1871 msr = sc->sc_msr; 1872 delta = sc->sc_msr_delta; 1873 sc->sc_msr_delta = 0; 1874 mutex_spin_exit(&sc->sc_lock); 1875 1876 if (ISSET(delta, sc->sc_msr_dcd)) { 1877 /* 1878 * Inform the tty layer that carrier detect changed. 1879 */ 1880 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1881 } 1882 1883 if (ISSET(delta, sc->sc_msr_cts)) { 1884 /* Block or unblock output according to flow control. */ 1885 if (ISSET(msr, sc->sc_msr_cts)) { 1886 sc->sc_tx_stopped = 0; 1887 (*tp->t_linesw->l_start)(tp); 1888 } else { 1889 sc->sc_tx_stopped = 1; 1890 } 1891 } 1892 1893 #ifdef PLCOM_DEBUG 1894 if (plcom_debug) 1895 plcomstatus(sc, "plcom_stsoft"); 1896 #endif 1897 } 1898 1899 void 1900 plcomsoft(void *arg) 1901 { 1902 struct plcom_softc *sc = arg; 1903 struct tty *tp; 1904 1905 if (PLCOM_ISALIVE(sc) == 0) 1906 return; 1907 1908 tp = sc->sc_tty; 1909 1910 if (sc->sc_rx_ready) { 1911 sc->sc_rx_ready = 0; 1912 plcom_rxsoft(sc, tp); 1913 } 1914 1915 if (sc->sc_st_check) { 1916 sc->sc_st_check = 0; 1917 plcom_stsoft(sc, tp); 1918 } 1919 1920 if (sc->sc_tx_done) { 1921 sc->sc_tx_done = 0; 1922 plcom_txsoft(sc, tp); 1923 } 1924 } 1925 1926 bool 1927 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1928 { 1929 bool ret = false; 1930 u_int stat = 0; 1931 1932 switch (pi->pi_type) { 1933 case PLCOM_TYPE_PL010: 1934 stat = PREAD1(pi, PL010COM_IIR); 1935 ret = ISSET(stat, PL010_IIR_IMASK); 1936 break; 1937 case PLCOM_TYPE_PL011: 1938 stat = PREAD4(pi, PL011COM_MIS); 1939 ret = ISSET(stat, PL011_INT_ALLMASK); 1940 break; 1941 } 1942 *istatus = stat; 1943 1944 return ret; 1945 } 1946 1947 int 1948 plcomintr(void *arg) 1949 { 1950 struct plcom_softc *sc = arg; 1951 struct plcom_instance *pi = &sc->sc_pi; 1952 u_char *put, *end; 1953 u_int cc; 1954 u_int istatus = 0; 1955 u_char rsr; 1956 bool intr = false; 1957 1958 PLCOM_BARRIER(pi, BR | BW); 1959 1960 if (PLCOM_ISALIVE(sc) == 0) 1961 return 0; 1962 1963 mutex_spin_enter(&sc->sc_lock); 1964 intr = plcom_intstatus(pi, &istatus); 1965 if (!intr) { 1966 mutex_spin_exit(&sc->sc_lock); 1967 return 0; 1968 } 1969 1970 end = sc->sc_ebuf; 1971 put = sc->sc_rbput; 1972 cc = sc->sc_rbavail; 1973 1974 do { 1975 u_int msr = 0, delta, fr; 1976 bool rxintr = false, txintr = false, msintr; 1977 1978 /* don't need RI here*/ 1979 fr = PREAD1(pi, PL01XCOM_FR); 1980 1981 if (!ISSET(fr, PL01X_FR_RXFE) && 1982 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1983 while (cc > 0) { 1984 int cn_trapped = 0; 1985 put[0] = PREAD1(pi, PL01XCOM_DR); 1986 rsr = PREAD1(pi, PL01XCOM_RSR); 1987 /* Clear any error status. */ 1988 if (ISSET(rsr, PL01X_RSR_ERROR)) 1989 PWRITE1(pi, PL01XCOM_ECR, 0); 1990 if (ISSET(rsr, PL01X_RSR_BE)) { 1991 cn_trapped = 0; 1992 cn_check_magic(sc->sc_tty->t_dev, 1993 CNC_BREAK, plcom_cnm_state); 1994 if (cn_trapped) 1995 continue; 1996 #if defined(KGDB) 1997 if (ISSET(sc->sc_hwflags, 1998 PLCOM_HW_KGDB)) { 1999 kgdb_connect(1); 2000 continue; 2001 } 2002 #endif 2003 } 2004 2005 put[1] = rsr; 2006 cn_trapped = 0; 2007 cn_check_magic(sc->sc_tty->t_dev, put[0], 2008 plcom_cnm_state); 2009 if (cn_trapped) { 2010 fr = PREAD1(pi, PL01XCOM_FR); 2011 if (ISSET(fr, PL01X_FR_RXFE)) 2012 break; 2013 2014 continue; 2015 } 2016 put += 2; 2017 if (put >= end) 2018 put = sc->sc_rbuf; 2019 cc--; 2020 2021 /* don't need RI here*/ 2022 fr = PREAD1(pi, PL01XCOM_FR); 2023 if (ISSET(fr, PL01X_FR_RXFE)) 2024 break; 2025 } 2026 2027 /* 2028 * Current string of incoming characters ended because 2029 * no more data was available or we ran out of space. 2030 * Schedule a receive event if any data was received. 2031 * If we're out of space, turn off receive interrupts. 2032 */ 2033 sc->sc_rbput = put; 2034 sc->sc_rbavail = cc; 2035 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2036 sc->sc_rx_ready = 1; 2037 2038 /* 2039 * See if we are in danger of overflowing a buffer. If 2040 * so, use hardware flow control to ease the pressure. 2041 */ 2042 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2043 cc < sc->sc_r_hiwat) { 2044 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2045 plcom_hwiflow(sc); 2046 } 2047 2048 /* 2049 * If we're out of space, disable receive interrupts 2050 * until the queue has drained a bit. 2051 */ 2052 if (!cc) { 2053 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2054 switch (pi->pi_type) { 2055 case PLCOM_TYPE_PL010: 2056 CLR(sc->sc_cr, 2057 PL010_CR_RIE | PL010_CR_RTIE); 2058 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2059 break; 2060 case PLCOM_TYPE_PL011: 2061 CLR(sc->sc_imsc, 2062 PL011_INT_RT | PL011_INT_RX); 2063 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2064 break; 2065 } 2066 } 2067 } else { 2068 switch (pi->pi_type) { 2069 case PLCOM_TYPE_PL010: 2070 rxintr = ISSET(istatus, PL010_IIR_RIS); 2071 if (rxintr) { 2072 PWRITE1(pi, PL010COM_CR, 0); 2073 delay(10); 2074 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2075 continue; 2076 } 2077 break; 2078 case PLCOM_TYPE_PL011: 2079 rxintr = ISSET(istatus, PL011_INT_RX); 2080 if (rxintr) { 2081 PWRITE4(pi, PL011COM_CR, 0); 2082 delay(10); 2083 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2084 continue; 2085 } 2086 break; 2087 } 2088 } 2089 2090 switch (pi->pi_type) { 2091 case PLCOM_TYPE_PL010: 2092 msr = PREAD1(pi, PL01XCOM_FR); 2093 break; 2094 case PLCOM_TYPE_PL011: 2095 msr = PREAD4(pi, PL01XCOM_FR); 2096 break; 2097 } 2098 delta = msr ^ sc->sc_msr; 2099 sc->sc_msr = msr; 2100 2101 /* Clear any pending modem status interrupt. */ 2102 switch (pi->pi_type) { 2103 case PLCOM_TYPE_PL010: 2104 msintr = ISSET(istatus, PL010_IIR_MIS); 2105 if (msintr) { 2106 PWRITE1(pi, PL010COM_ICR, 0); 2107 } 2108 break; 2109 case PLCOM_TYPE_PL011: 2110 msintr = ISSET(istatus, PL011_INT_MSMASK); 2111 if (msintr) { 2112 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2113 } 2114 break; 2115 } 2116 /* 2117 * Pulse-per-second (PSS) signals on edge of DCD? 2118 * Process these even if line discipline is ignoring DCD. 2119 */ 2120 if (delta & sc->sc_ppsmask) { 2121 struct timeval tv; 2122 mutex_spin_enter(&timecounter_lock); 2123 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2124 /* XXX nanotime() */ 2125 microtime(&tv); 2126 TIMEVAL_TO_TIMESPEC(&tv, 2127 &sc->ppsinfo.assert_timestamp); 2128 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2129 timespecadd(&sc->ppsinfo.assert_timestamp, 2130 &sc->ppsparam.assert_offset, 2131 &sc->ppsinfo.assert_timestamp); 2132 } 2133 2134 #ifdef PPS_SYNC 2135 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2136 hardpps(&tv, tv.tv_usec); 2137 #endif 2138 sc->ppsinfo.assert_sequence++; 2139 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2140 2141 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2142 /* XXX nanotime() */ 2143 microtime(&tv); 2144 TIMEVAL_TO_TIMESPEC(&tv, 2145 &sc->ppsinfo.clear_timestamp); 2146 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2147 timespecadd(&sc->ppsinfo.clear_timestamp, 2148 &sc->ppsparam.clear_offset, 2149 &sc->ppsinfo.clear_timestamp); 2150 } 2151 2152 #ifdef PPS_SYNC 2153 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2154 hardpps(&tv, tv.tv_usec); 2155 #endif 2156 sc->ppsinfo.clear_sequence++; 2157 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2158 } 2159 mutex_spin_exit(&timecounter_lock); 2160 } 2161 2162 /* 2163 * Process normal status changes 2164 */ 2165 if (ISSET(delta, sc->sc_msr_mask)) { 2166 SET(sc->sc_msr_delta, delta); 2167 2168 /* 2169 * Stop output immediately if we lose the output 2170 * flow control signal or carrier detect. 2171 */ 2172 if (ISSET(~msr, sc->sc_msr_mask)) { 2173 sc->sc_tbc = 0; 2174 sc->sc_heldtbc = 0; 2175 #ifdef PLCOM_DEBUG 2176 if (plcom_debug) 2177 plcomstatus(sc, "plcomintr "); 2178 #endif 2179 } 2180 2181 sc->sc_st_check = 1; 2182 } 2183 2184 /* 2185 * Done handling any receive interrupts. See if data 2186 * can be transmitted as well. Schedule tx done 2187 * event if no data left and tty was marked busy. 2188 */ 2189 2190 switch (pi->pi_type) { 2191 case PLCOM_TYPE_PL010: 2192 txintr = ISSET(istatus, PL010_IIR_TIS); 2193 break; 2194 case PLCOM_TYPE_PL011: 2195 txintr = ISSET(istatus, PL011_INT_TX); 2196 break; 2197 } 2198 if (txintr) { 2199 /* 2200 * If we've delayed a parameter change, do it 2201 * now, and restart * output. 2202 */ 2203 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2204 if (sc->sc_heldchange) { 2205 plcom_loadchannelregs(sc); 2206 sc->sc_heldchange = 0; 2207 sc->sc_tbc = sc->sc_heldtbc; 2208 sc->sc_heldtbc = 0; 2209 } 2210 2211 /* 2212 * Output the next chunk of the contiguous 2213 * buffer, if any. 2214 */ 2215 if (sc->sc_tbc > 0) { 2216 int n; 2217 2218 n = sc->sc_tbc; 2219 if (n > sc->sc_fifolen) 2220 n = sc->sc_fifolen; 2221 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2222 sc->sc_tbc -= n; 2223 sc->sc_tba += n; 2224 } else { 2225 /* 2226 * Disable transmit completion 2227 * interrupts if necessary. 2228 */ 2229 switch (pi->pi_type) { 2230 case PLCOM_TYPE_PL010: 2231 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2232 CLR(sc->sc_cr, PL010_CR_TIE); 2233 PWRITE1(pi, PL010COM_CR, 2234 sc->sc_cr); 2235 } 2236 break; 2237 case PLCOM_TYPE_PL011: 2238 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2239 CLR(sc->sc_imsc, PL011_INT_TX); 2240 PWRITE4(pi, PL011COM_IMSC, 2241 sc->sc_imsc); 2242 } 2243 break; 2244 } 2245 if (sc->sc_tx_busy) { 2246 sc->sc_tx_busy = 0; 2247 sc->sc_tx_done = 1; 2248 } 2249 } 2250 } 2251 2252 } while (plcom_intstatus(pi, &istatus)); 2253 2254 mutex_spin_exit(&sc->sc_lock); 2255 2256 /* Wake up the poller. */ 2257 softint_schedule(sc->sc_si); 2258 2259 #ifdef RND_COM 2260 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2261 #endif 2262 2263 PLCOM_BARRIER(pi, BR | BW); 2264 2265 return 1; 2266 } 2267 2268 /* 2269 * The following functions are polled getc and putc routines, shared 2270 * by the console and kgdb glue. 2271 * 2272 * The read-ahead code is so that you can detect pending in-band 2273 * cn_magic in polled mode while doing output rather than having to 2274 * wait until the kernel decides it needs input. 2275 */ 2276 2277 #define MAX_READAHEAD 20 2278 static int plcom_readahead[MAX_READAHEAD]; 2279 static int plcom_readaheadcount = 0; 2280 2281 int 2282 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2283 { 2284 int s = splserial(); 2285 u_char c; 2286 2287 /* got a character from reading things earlier */ 2288 if (plcom_readaheadcount > 0) { 2289 int i; 2290 2291 c = plcom_readahead[0]; 2292 for (i = 1; i < plcom_readaheadcount; i++) { 2293 plcom_readahead[i-1] = plcom_readahead[i]; 2294 } 2295 plcom_readaheadcount--; 2296 splx(s); 2297 return c; 2298 } 2299 2300 if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2301 splx(s); 2302 return -1; 2303 } 2304 2305 c = PREAD1(pi, PL01XCOM_DR); 2306 { 2307 int cn_trapped __unused = 0; 2308 #ifdef DDB 2309 extern int db_active; 2310 if (!db_active) 2311 #endif 2312 cn_check_magic(dev, c, plcom_cnm_state); 2313 } 2314 splx(s); 2315 return c; 2316 } 2317 2318 void 2319 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2320 { 2321 int s = splserial(); 2322 int timo; 2323 2324 int cin, stat; 2325 if (plcom_readaheadcount < MAX_READAHEAD 2326 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2327 int cn_trapped __unused = 0; 2328 cin = PREAD1(pi, PL01XCOM_DR); 2329 cn_check_magic(dev, cin, plcom_cnm_state); 2330 plcom_readahead[plcom_readaheadcount++] = cin; 2331 } 2332 2333 /* wait for any pending transmission to finish */ 2334 timo = 150000; 2335 while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo) 2336 continue; 2337 2338 PWRITE1(pi, PL01XCOM_DR, c); 2339 PLCOM_BARRIER(pi, BR | BW); 2340 2341 splx(s); 2342 } 2343 2344 /* 2345 * Initialize UART for use as console or KGDB line. 2346 */ 2347 int 2348 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2349 { 2350 u_char lcr; 2351 2352 switch (pi->pi_type) { 2353 case PLCOM_TYPE_PL010: 2354 if (pi->pi_size == 0) 2355 pi->pi_size = PL010COM_UART_SIZE; 2356 break; 2357 case PLCOM_TYPE_PL011: 2358 if (pi->pi_size == 0) 2359 pi->pi_size = PL011COM_UART_SIZE; 2360 break; 2361 default: 2362 panic("Unknown plcom type"); 2363 } 2364 2365 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2366 &pi->pi_ioh)) 2367 return ENOMEM; /* ??? */ 2368 2369 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2370 switch (pi->pi_type) { 2371 case PLCOM_TYPE_PL010: 2372 PWRITE1(pi, PL010COM_CR, 0); 2373 2374 if (rate && frequency) { 2375 rate = pl010comspeed(rate, frequency); 2376 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2377 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2378 } 2379 PWRITE1(pi, PL010COM_LCR, lcr); 2380 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2381 break; 2382 case PLCOM_TYPE_PL011: 2383 PWRITE4(pi, PL011COM_CR, 0); 2384 2385 if (rate && frequency) { 2386 rate = pl011comspeed(rate, frequency); 2387 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2388 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2389 } 2390 PWRITE1(pi, PL011COM_LCRH, lcr); 2391 PWRITE4(pi, PL011COM_CR, 2392 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2393 break; 2394 } 2395 2396 #if 0 2397 /* Ought to do something like this, but we have no sc to 2398 dereference. */ 2399 /* XXX device_unit() abuse */ 2400 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2401 PL01X_MCR_DTR | PL01X_MCR_RTS); 2402 #endif 2403 2404 return 0; 2405 } 2406 2407 /* 2408 * Following are all routines needed for PLCOM to act as console 2409 */ 2410 struct consdev plcomcons = { 2411 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2412 plcomcnhalt, NULL, NODEV, CN_NORMAL 2413 }; 2414 2415 int 2416 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2417 tcflag_t cflag, int unit) 2418 { 2419 int res; 2420 2421 plcomcons_info = *pi; 2422 2423 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2424 if (res) 2425 return res; 2426 2427 cn_tab = &plcomcons; 2428 cn_init_magic(&plcom_cnm_state); 2429 cn_set_magic("\047\001"); /* default magic is BREAK */ 2430 2431 plcomconsunit = unit; 2432 plcomconsrate = rate; 2433 plcomconscflag = cflag; 2434 2435 return 0; 2436 } 2437 2438 void 2439 plcomcndetach(void) 2440 { 2441 2442 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2443 plcomcons_info.pi_size); 2444 plcomcons_info.pi_iot = NULL; 2445 2446 cn_tab = NULL; 2447 } 2448 2449 int 2450 plcomcngetc(dev_t dev) 2451 { 2452 return plcom_common_getc(dev, &plcomcons_info); 2453 } 2454 2455 /* 2456 * Console kernel output character routine. 2457 */ 2458 void 2459 plcomcnputc(dev_t dev, int c) 2460 { 2461 plcom_common_putc(dev, &plcomcons_info, c); 2462 } 2463 2464 void 2465 plcomcnpollc(dev_t dev, int on) 2466 { 2467 2468 plcom_readaheadcount = 0; 2469 } 2470 2471 void 2472 plcomcnhalt(dev_t dev) 2473 { 2474 struct plcom_instance *pi = &plcomcons_info; 2475 2476 switch (pi->pi_type) { 2477 case PLCOM_TYPE_PL010: 2478 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2479 break; 2480 case PLCOM_TYPE_PL011: 2481 PWRITE4(pi, PL011COM_CR, 2482 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2483 PWRITE4(pi, PL011COM_IMSC, 0); 2484 break; 2485 } 2486 } 2487 2488 #ifdef KGDB 2489 int 2490 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2491 tcflag_t cflag, int unit) 2492 { 2493 int res; 2494 2495 if (pi->pi_iot == plcomcons_info.pi_iot && 2496 pi->pi_iobase == plcomcons_info.pi_iobase) 2497 return EBUSY; /* cannot share with console */ 2498 2499 res = plcominit(pi, rate, frequency, cflag); 2500 if (res) 2501 return res; 2502 2503 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2504 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2505 2506 plcomkgdb_info.pi_iot = pi->pi_iot; 2507 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2508 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2509 2510 return 0; 2511 } 2512 2513 /* ARGSUSED */ 2514 int 2515 plcom_kgdb_getc(void *arg) 2516 { 2517 return plcom_common_getc(NODEV, &plcomkgdb_info); 2518 } 2519 2520 /* ARGSUSED */ 2521 void 2522 plcom_kgdb_putc(void *arg, int c) 2523 { 2524 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2525 } 2526 #endif /* KGDB */ 2527 2528 /* helper function to identify the plcom ports used by 2529 console or KGDB (and not yet autoconf attached) */ 2530 int 2531 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2532 bus_space_handle_t *ioh) 2533 { 2534 bus_space_handle_t help; 2535 2536 if (!plcomconsattached && 2537 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2538 iobase == plcomcons_info.pi_iobase) 2539 help = plcomcons_info.pi_ioh; 2540 #ifdef KGDB 2541 else if (!plcom_kgdb_attached && 2542 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2543 iobase == plcomkgdb_info.pi_iobase) 2544 help = plcomkgdb_info.pi_ioh; 2545 #endif 2546 else 2547 return 0; 2548 2549 if (ioh) 2550 *ioh = help; 2551 return 1; 2552 } 2553
Indexes created Sat Sep 27 14:09:57 GMT 2025