plcom.c revision 1.66
1 /* $NetBSD: plcom.c,v 1.66 2022/10/26 23:38:07 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.66 2022/10/26 23:38:07 riastradh Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_kgdb.h" 101 #include "opt_lockdebug.h" 102 #include "opt_multiprocessor.h" 103 104 /* 105 * Override cnmagic(9) macro before including <sys/systm.h>. 106 * We need to know if cn_check_magic triggered debugger, so set a flag. 107 * Callers of cn_check_magic must declare int cn_trapped = 0; 108 * XXX: this is *ugly*! 109 */ 110 #define cn_trap() \ 111 do { \ 112 console_debugger(); \ 113 cn_trapped = 1; \ 114 } while (/* CONSTCOND */ 0) 115 116 #include <sys/param.h> 117 #include <sys/systm.h> 118 #include <sys/ioctl.h> 119 #include <sys/select.h> 120 #include <sys/tty.h> 121 #include <sys/proc.h> 122 #include <sys/conf.h> 123 #include <sys/file.h> 124 #include <sys/uio.h> 125 #include <sys/kernel.h> 126 #include <sys/syslog.h> 127 #include <sys/types.h> 128 #include <sys/device.h> 129 #include <sys/kmem.h> 130 #include <sys/timepps.h> 131 #include <sys/vnode.h> 132 #include <sys/kauth.h> 133 #include <sys/intr.h> 134 #include <sys/bus.h> 135 #ifdef RND_COM 136 #include <sys/rndsource.h> 137 #endif 138 139 #include <ddb/db_active.h> 140 141 #include <evbarm/dev/plcomreg.h> 142 #include <evbarm/dev/plcomvar.h> 143 144 #include <dev/cons.h> 145 146 static void plcom_enable_debugport (struct plcom_softc *); 147 148 void plcom_config (struct plcom_softc *); 149 void plcom_shutdown (struct plcom_softc *); 150 int pl010comspeed (long, long); 151 int pl011comspeed (long, long); 152 static u_char cflag2lcr (tcflag_t); 153 int plcomparam (struct tty *, struct termios *); 154 void plcomstart (struct tty *); 155 int plcomhwiflow (struct tty *, int); 156 157 void plcom_loadchannelregs (struct plcom_softc *); 158 void plcom_hwiflow (struct plcom_softc *); 159 void plcom_break (struct plcom_softc *, int); 160 void plcom_modem (struct plcom_softc *, int); 161 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 162 int plcom_to_tiocm (struct plcom_softc *); 163 void plcom_iflush (struct plcom_softc *); 164 165 int plcom_common_getc (dev_t, struct plcom_instance *); 166 void plcom_common_putc (dev_t, struct plcom_instance *, int); 167 168 int plcominit (struct plcom_instance *, int, int, tcflag_t); 169 170 dev_type_open(plcomopen); 171 dev_type_close(plcomclose); 172 dev_type_read(plcomread); 173 dev_type_write(plcomwrite); 174 dev_type_ioctl(plcomioctl); 175 dev_type_stop(plcomstop); 176 dev_type_tty(plcomtty); 177 dev_type_poll(plcompoll); 178 179 int plcomcngetc (dev_t); 180 void plcomcnputc (dev_t, int); 181 void plcomcnpollc (dev_t, int); 182 void plcomcnhalt (dev_t); 183 184 #define integrate static inline 185 void plcomsoft (void *); 186 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 188 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 189 integrate void plcom_schedrx (struct plcom_softc *); 190 void plcomdiag (void *); 191 192 bool plcom_intstatus(struct plcom_instance *, u_int *); 193 194 extern struct cfdriver plcom_cd; 195 196 const struct cdevsw plcom_cdevsw = { 197 .d_open = plcomopen, 198 .d_close = plcomclose, 199 .d_read = plcomread, 200 .d_write = plcomwrite, 201 .d_ioctl = plcomioctl, 202 .d_stop = plcomstop, 203 .d_tty = plcomtty, 204 .d_poll = plcompoll, 205 .d_mmap = nommap, 206 .d_kqfilter = ttykqfilter, 207 .d_discard = nodiscard, 208 .d_flag = D_TTY 209 }; 210 211 /* 212 * Make this an option variable one can patch. 213 * But be warned: this must be a power of 2! 214 */ 215 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 216 217 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 218 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 219 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 220 221 static int plcomconsunit = -1; 222 static struct plcom_instance plcomcons_info; 223 224 static int plcomconsattached; 225 static int plcomconsrate; 226 static tcflag_t plcomconscflag; 227 static struct cnm_state plcom_cnm_state; 228 229 static int ppscap = 230 PPS_TSFMT_TSPEC | 231 PPS_CAPTUREASSERT | 232 PPS_CAPTURECLEAR | 233 #ifdef PPS_SYNC 234 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 235 #endif /* PPS_SYNC */ 236 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 237 238 #ifdef KGDB 239 #include <sys/kgdb.h> 240 241 static struct plcom_instance plcomkgdb_info; 242 static int plcom_kgdb_attached; 243 244 int plcom_kgdb_getc (void *); 245 void plcom_kgdb_putc (void *, int); 246 #endif /* KGDB */ 247 248 #define PLCOMDIALOUT_MASK TTDIALOUT_MASK 249 250 #define PLCOMUNIT(x) TTUNIT(x) 251 #define PLCOMDIALOUT(x) TTDIALOUT(x) 252 253 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 254 device_is_active((sc)->sc_dev)) 255 256 #define BR BUS_SPACE_BARRIER_READ 257 #define BW BUS_SPACE_BARRIER_WRITE 258 #define PLCOM_BARRIER(pi, f) \ 259 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 260 261 static uint8_t 262 pread1(struct plcom_instance *pi, bus_size_t reg) 263 { 264 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 265 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 266 267 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 268 (8 * (reg & 3)); 269 } 270 int nhcr; 271 static void 272 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 273 { 274 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 275 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 276 } else { 277 const size_t shift = 8 * (o & 3); 278 o &= -4; 279 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 280 tmp = (val << shift) | (tmp & ~(0xff << shift)); 281 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 282 } 283 } 284 285 static void 286 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 287 bus_size_t count) 288 { 289 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 290 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 291 } else { 292 KASSERT((o & 3) == 0); 293 while (count--) { 294 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 295 }; 296 } 297 } 298 299 #define PREAD1(pi, reg) pread1(pi, reg) 300 #define PREAD4(pi, reg) \ 301 bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg)) 302 303 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 304 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 305 #define PWRITE4(pi, reg, val) \ 306 bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val)) 307 308 int 309 pl010comspeed(long speed, long frequency) 310 { 311 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 312 313 int x, err; 314 315 #if 0 316 if (speed == 0) 317 return 0; 318 #endif 319 if (speed <= 0) 320 return -1; 321 x = divrnd(frequency / 16, speed); 322 if (x <= 0) 323 return -1; 324 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 325 if (err < 0) 326 err = -err; 327 if (err > PLCOM_TOLERANCE) 328 return -1; 329 return x; 330 331 #undef divrnd 332 } 333 334 int 335 pl011comspeed(long speed, long frequency) 336 { 337 int denom = 16 * speed; 338 int div = frequency / denom; 339 int rem = frequency % denom; 340 341 int ibrd = div << 6; 342 int fbrd = (((8 * rem) / speed) + 1) / 2; 343 344 /* Tolerance? */ 345 return ibrd | fbrd; 346 } 347 348 #ifdef PLCOM_DEBUG 349 int plcom_debug = 0; 350 351 void plcomstatus (struct plcom_softc *, const char *); 352 void 353 plcomstatus(struct plcom_softc *sc, const char *str) 354 { 355 struct tty *tp = sc->sc_tty; 356 357 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 358 device_xname(sc->sc_dev), str, 359 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 360 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 361 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 362 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 363 sc->sc_tx_stopped ? "+" : "-"); 364 365 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 366 device_xname(sc->sc_dev), str, 367 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 368 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 369 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 370 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 371 sc->sc_rx_flags); 372 } 373 #endif 374 375 #if 0 376 int 377 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 378 { 379 int data; 380 381 /* Disable the UART. */ 382 bus_space_write_1(iot, ioh, plcom_cr, 0); 383 /* Make sure the FIFO is off. */ 384 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 385 /* Disable interrupts. */ 386 bus_space_write_1(iot, ioh, plcom_iir, 0); 387 388 /* Make sure we swallow anything in the receiving register. */ 389 data = bus_space_read_1(iot, ioh, plcom_dr); 390 391 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 392 return 0; 393 394 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 395 396 if (data != PL01X_FR_RXFE) 397 return 0; 398 399 return 1; 400 } 401 #endif 402 403 /* 404 * No locking in this routine; it is only called during attach, 405 * or with the port already locked. 406 */ 407 static void 408 plcom_enable_debugport(struct plcom_softc *sc) 409 { 410 struct plcom_instance *pi = &sc->sc_pi; 411 412 sc->sc_cr = PL01X_CR_UARTEN; 413 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 414 415 /* Turn on line break interrupt, set carrier. */ 416 switch (pi->pi_type) { 417 case PLCOM_TYPE_PL010: 418 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 419 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 420 if (sc->sc_set_mcr) { 421 /* XXX device_unit() abuse */ 422 sc->sc_set_mcr(sc->sc_set_mcr_arg, 423 device_unit(sc->sc_dev), sc->sc_mcr); 424 } 425 break; 426 case PLCOM_TYPE_PL011: 427 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 428 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 429 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 430 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 431 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 432 break; 433 } 434 435 } 436 437 void 438 plcom_attach_subr(struct plcom_softc *sc) 439 { 440 struct plcom_instance *pi = &sc->sc_pi; 441 struct tty *tp; 442 443 callout_init(&sc->sc_diag_callout, 0); 444 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 445 446 switch (pi->pi_type) { 447 case PLCOM_TYPE_PL010: 448 case PLCOM_TYPE_PL011: 449 break; 450 default: 451 aprint_error_dev(sc->sc_dev, 452 "Unknown plcom type: %d\n", pi->pi_type); 453 return; 454 } 455 456 /* Disable interrupts before configuring the device. */ 457 sc->sc_cr = 0; 458 sc->sc_imsc = 0; 459 460 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 461 pi->pi_iobase == plcomcons_info.pi_iobase) { 462 plcomconsattached = 1; 463 464 /* Make sure the console is always "hardwired". */ 465 delay(1000); /* wait for output to finish */ 466 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 467 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 468 /* 469 * Must re-enable the console immediately, or we will 470 * hang when trying to print. 471 */ 472 sc->sc_cr = PL01X_CR_UARTEN; 473 if (pi->pi_type == PLCOM_TYPE_PL011) 474 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 475 } 476 477 switch (pi->pi_type) { 478 case PLCOM_TYPE_PL010: 479 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 480 break; 481 482 case PLCOM_TYPE_PL011: 483 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 484 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 485 break; 486 } 487 488 if (sc->sc_fifolen == 0) { 489 switch (pi->pi_type) { 490 case PLCOM_TYPE_PL010: 491 /* 492 * The PL010 has a 16-byte fifo, but the tx interrupt 493 * triggers when there is space for 8 more bytes. 494 */ 495 sc->sc_fifolen = 8; 496 break; 497 case PLCOM_TYPE_PL011: 498 /* Some revisions have a 32 byte TX FIFO */ 499 sc->sc_fifolen = 16; 500 break; 501 } 502 } 503 504 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 505 sc->sc_fifolen = 1; 506 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 507 } 508 509 if (sc->sc_fifolen > 1) 510 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 511 512 tp = tty_alloc(); 513 tp->t_oproc = plcomstart; 514 tp->t_param = plcomparam; 515 tp->t_hwiflow = plcomhwiflow; 516 517 sc->sc_tty = tp; 518 sc->sc_rbuf = kmem_alloc(plcom_rbuf_size << 1, KM_SLEEP); 519 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 520 sc->sc_rbavail = plcom_rbuf_size; 521 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 522 523 tty_attach(tp); 524 525 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 526 int maj; 527 528 /* locate the major number */ 529 maj = cdevsw_lookup_major(&plcom_cdevsw); 530 531 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 532 533 aprint_normal_dev(sc->sc_dev, "console\n"); 534 } 535 536 #ifdef KGDB 537 /* 538 * Allow kgdb to "take over" this port. If this is 539 * the kgdb device, it has exclusive use. 540 */ 541 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 542 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 543 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 544 plcom_kgdb_attached = 1; 545 546 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 547 } 548 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 549 } 550 #endif 551 552 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 553 554 #ifdef RND_COM 555 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 556 RND_TYPE_TTY, RND_FLAG_DEFAULT); 557 #endif 558 559 /* 560 * if there are no enable/disable functions, assume the device 561 * is always enabled 562 */ 563 if (!sc->enable) 564 sc->enabled = 1; 565 566 plcom_config(sc); 567 568 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 569 } 570 571 void 572 plcom_config(struct plcom_softc *sc) 573 { 574 struct plcom_instance *pi = &sc->sc_pi; 575 576 /* Disable interrupts before configuring the device. */ 577 sc->sc_cr = 0; 578 sc->sc_imsc = 0; 579 switch (pi->pi_type) { 580 case PLCOM_TYPE_PL010: 581 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 582 break; 583 584 case PLCOM_TYPE_PL011: 585 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 586 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 587 break; 588 } 589 590 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 591 plcom_enable_debugport(sc); 592 } 593 594 int 595 plcom_detach(device_t self, int flags) 596 { 597 struct plcom_softc *sc = device_private(self); 598 int maj, mn; 599 600 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 601 return EBUSY; 602 603 if (sc->disable != NULL && sc->enabled != 0) { 604 (*sc->disable)(sc); 605 sc->enabled = 0; 606 } 607 608 /* locate the major number */ 609 maj = cdevsw_lookup_major(&plcom_cdevsw); 610 611 /* Nuke the vnodes for any open instances. */ 612 mn = device_unit(self); 613 vdevgone(maj, mn, mn, VCHR); 614 615 mn |= PLCOMDIALOUT_MASK; 616 vdevgone(maj, mn, mn, VCHR); 617 618 if (sc->sc_rbuf == NULL) { 619 /* 620 * Ring buffer allocation failed in the plcom_attach_subr, 621 * only the tty is allocated, and nothing else. 622 */ 623 tty_free(sc->sc_tty); 624 return 0; 625 } 626 627 /* Free the receive buffer. */ 628 kmem_free(sc->sc_rbuf, sc->sc_ebuf - sc->sc_rbuf); 629 630 /* Detach and free the tty. */ 631 tty_detach(sc->sc_tty); 632 tty_free(sc->sc_tty); 633 634 /* Unhook the soft interrupt handler. */ 635 softint_disestablish(sc->sc_si); 636 637 #ifdef RND_COM 638 /* Unhook the entropy source. */ 639 rnd_detach_source(&sc->rnd_source); 640 #endif 641 callout_destroy(&sc->sc_diag_callout); 642 643 /* Destroy the lock. */ 644 mutex_destroy(&sc->sc_lock); 645 646 return 0; 647 } 648 649 int 650 plcom_activate(device_t self, enum devact act) 651 { 652 struct plcom_softc *sc = device_private(self); 653 654 switch (act) { 655 case DVACT_DEACTIVATE: 656 sc->enabled = 0; 657 return 0; 658 default: 659 return EOPNOTSUPP; 660 } 661 } 662 663 void 664 plcom_shutdown(struct plcom_softc *sc) 665 { 666 struct plcom_instance *pi = &sc->sc_pi; 667 struct tty *tp = sc->sc_tty; 668 mutex_spin_enter(&sc->sc_lock); 669 670 /* If we were asserting flow control, then deassert it. */ 671 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 672 plcom_hwiflow(sc); 673 674 /* Clear any break condition set with TIOCSBRK. */ 675 plcom_break(sc, 0); 676 677 /* Turn off PPS capture on last close. */ 678 mutex_spin_enter(&timecounter_lock); 679 sc->sc_ppsmask = 0; 680 sc->ppsparam.mode = 0; 681 mutex_spin_exit(&timecounter_lock); 682 683 /* 684 * Hang up if necessary. Wait a bit, so the other side has time to 685 * notice even if we immediately open the port again. 686 * Avoid tsleeping above splhigh(). 687 */ 688 if (ISSET(tp->t_cflag, HUPCL)) { 689 plcom_modem(sc, 0); 690 microuptime(&sc->sc_hup_pending); 691 sc->sc_hup_pending.tv_sec++; 692 } 693 694 sc->sc_cr = 0; 695 sc->sc_imsc = 0; 696 /* Turn off interrupts. */ 697 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 698 /* interrupt on break */ 699 700 sc->sc_cr = PL01X_CR_UARTEN; 701 sc->sc_imsc = 0; 702 switch (pi->pi_type) { 703 case PLCOM_TYPE_PL010: 704 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 705 break; 706 case PLCOM_TYPE_PL011: 707 SET(sc->sc_cr, PL011_CR_RXE); 708 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 709 break; 710 } 711 } 712 switch (pi->pi_type) { 713 case PLCOM_TYPE_PL010: 714 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 715 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 716 break; 717 case PLCOM_TYPE_PL011: 718 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 719 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 720 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 721 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 722 break; 723 } 724 725 mutex_spin_exit(&sc->sc_lock); 726 if (sc->disable) { 727 #ifdef DIAGNOSTIC 728 if (!sc->enabled) 729 panic("plcom_shutdown: not enabled?"); 730 #endif 731 (*sc->disable)(sc); 732 sc->enabled = 0; 733 } 734 } 735 736 int 737 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 738 { 739 struct plcom_softc *sc; 740 struct plcom_instance *pi; 741 struct tty *tp; 742 int s; 743 int error; 744 745 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 746 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 747 sc->sc_rbuf == NULL) 748 return ENXIO; 749 750 if (!device_is_active(sc->sc_dev)) 751 return ENXIO; 752 753 pi = &sc->sc_pi; 754 755 #ifdef KGDB 756 /* 757 * If this is the kgdb port, no other use is permitted. 758 */ 759 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 760 return EBUSY; 761 #endif 762 763 tp = sc->sc_tty; 764 765 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 766 return (EBUSY); 767 768 s = spltty(); 769 770 /* 771 * Do the following iff this is a first open. 772 */ 773 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 774 struct termios t; 775 struct timeval now, diff; 776 777 tp->t_dev = dev; 778 779 if (sc->enable) { 780 if ((*sc->enable)(sc)) { 781 splx(s); 782 aprint_error_dev(sc->sc_dev, 783 "device enable failed\n"); 784 return EIO; 785 } 786 mutex_spin_enter(&sc->sc_lock); 787 sc->enabled = 1; 788 plcom_config(sc); 789 } else { 790 mutex_spin_enter(&sc->sc_lock); 791 } 792 793 if (timerisset(&sc->sc_hup_pending)) { 794 microuptime(&now); 795 while (timercmp(&now, &sc->sc_hup_pending, <)) { 796 timersub(&sc->sc_hup_pending, &now, &diff); 797 const int ms = diff.tv_sec * 100 + 798 diff.tv_usec / 1000; 799 kpause(ttclos, false, uimax(mstohz(ms), 1), 800 &sc->sc_lock); 801 microuptime(&now); 802 } 803 timerclear(&sc->sc_hup_pending); 804 } 805 806 /* Turn on interrupts. */ 807 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 808 /* Fetch the current modem control status, needed later. */ 809 sc->sc_cr = PL01X_CR_UARTEN; 810 switch (pi->pi_type) { 811 case PLCOM_TYPE_PL010: 812 SET(sc->sc_cr, 813 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 814 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 815 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 816 break; 817 case PLCOM_TYPE_PL011: 818 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 819 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 820 PL011_INT_MSMASK); 821 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 822 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 823 break; 824 } 825 826 /* Clear PPS capture state on first open. */ 827 828 mutex_spin_enter(&timecounter_lock); 829 sc->sc_ppsmask = 0; 830 sc->ppsparam.mode = 0; 831 mutex_spin_exit(&timecounter_lock); 832 833 mutex_spin_exit(&sc->sc_lock); 834 835 /* 836 * Initialize the termios status to the defaults. Add in the 837 * sticky bits from TIOCSFLAGS. 838 */ 839 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 840 t.c_ospeed = plcomconsrate; 841 t.c_cflag = plcomconscflag; 842 } else { 843 t.c_ospeed = TTYDEF_SPEED; 844 t.c_cflag = TTYDEF_CFLAG; 845 } 846 t.c_ispeed = t.c_ospeed; 847 848 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 849 SET(t.c_cflag, CLOCAL); 850 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 851 SET(t.c_cflag, CRTSCTS); 852 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 853 SET(t.c_cflag, MDMBUF); 854 /* Make sure plcomparam() will do something. */ 855 tp->t_ospeed = 0; 856 (void) plcomparam(tp, &t); 857 tp->t_iflag = TTYDEF_IFLAG; 858 tp->t_oflag = TTYDEF_OFLAG; 859 tp->t_lflag = TTYDEF_LFLAG; 860 ttychars(tp); 861 ttsetwater(tp); 862 863 mutex_spin_enter(&sc->sc_lock); 864 865 /* 866 * Turn on DTR. We must always do this, even if carrier is not 867 * present, because otherwise we'd have to use TIOCSDTR 868 * immediately after setting CLOCAL, which applications do not 869 * expect. We always assert DTR while the device is open 870 * unless explicitly requested to deassert it. 871 */ 872 plcom_modem(sc, 1); 873 874 /* Clear the input ring, and unblock. */ 875 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 876 sc->sc_rbavail = plcom_rbuf_size; 877 plcom_iflush(sc); 878 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 879 plcom_hwiflow(sc); 880 881 #ifdef PLCOM_DEBUG 882 if (plcom_debug) 883 plcomstatus(sc, "plcomopen "); 884 #endif 885 886 mutex_spin_exit(&sc->sc_lock); 887 } 888 889 splx(s); 890 891 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 892 if (error) 893 goto bad; 894 895 error = (*tp->t_linesw->l_open)(dev, tp); 896 if (error) 897 goto bad; 898 899 return 0; 900 901 bad: 902 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 903 /* 904 * We failed to open the device, and nobody else had it opened. 905 * Clean up the state as appropriate. 906 */ 907 plcom_shutdown(sc); 908 } 909 910 return error; 911 } 912 913 int 914 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 915 { 916 struct plcom_softc *sc = 917 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 918 struct tty *tp = sc->sc_tty; 919 920 /* XXX This is for cons.c. */ 921 if (!ISSET(tp->t_state, TS_ISOPEN)) 922 return 0; 923 924 (*tp->t_linesw->l_close)(tp, flag); 925 ttyclose(tp); 926 927 if (PLCOM_ISALIVE(sc) == 0) 928 return 0; 929 930 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 931 /* 932 * Although we got a last close, the device may still be in 933 * use; e.g. if this was the dialout node, and there are still 934 * processes waiting for carrier on the non-dialout node. 935 */ 936 plcom_shutdown(sc); 937 } 938 939 return 0; 940 } 941 942 int 943 plcomread(dev_t dev, struct uio *uio, int flag) 944 { 945 struct plcom_softc *sc = 946 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 if (PLCOM_ISALIVE(sc) == 0) 950 return EIO; 951 952 return (*tp->t_linesw->l_read)(tp, uio, flag); 953 } 954 955 int 956 plcomwrite(dev_t dev, struct uio *uio, int flag) 957 { 958 struct plcom_softc *sc = 959 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 if (PLCOM_ISALIVE(sc) == 0) 963 return EIO; 964 965 return (*tp->t_linesw->l_write)(tp, uio, flag); 966 } 967 968 int 969 plcompoll(dev_t dev, int events, struct lwp *l) 970 { 971 struct plcom_softc *sc = 972 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 973 struct tty *tp = sc->sc_tty; 974 975 if (PLCOM_ISALIVE(sc) == 0) 976 return EIO; 977 978 return (*tp->t_linesw->l_poll)(tp, events, l); 979 } 980 981 struct tty * 982 plcomtty(dev_t dev) 983 { 984 struct plcom_softc *sc = 985 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 986 struct tty *tp = sc->sc_tty; 987 988 return tp; 989 } 990 991 int 992 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 993 { 994 struct plcom_softc *sc = 995 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 996 struct tty *tp; 997 int error; 998 999 if (sc == NULL) 1000 return ENXIO; 1001 if (PLCOM_ISALIVE(sc) == 0) 1002 return EIO; 1003 1004 tp = sc->sc_tty; 1005 1006 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1007 if (error != EPASSTHROUGH) 1008 return error; 1009 1010 error = ttioctl(tp, cmd, data, flag, l); 1011 if (error != EPASSTHROUGH) 1012 return error; 1013 1014 error = 0; 1015 switch (cmd) { 1016 case TIOCSFLAGS: 1017 error = kauth_authorize_device_tty(l->l_cred, 1018 KAUTH_DEVICE_TTY_PRIVSET, tp); 1019 break; 1020 default: 1021 /* nothing */ 1022 break; 1023 } 1024 if (error) { 1025 return error; 1026 } 1027 1028 mutex_spin_enter(&sc->sc_lock); 1029 switch (cmd) { 1030 case TIOCSBRK: 1031 plcom_break(sc, 1); 1032 break; 1033 1034 case TIOCCBRK: 1035 plcom_break(sc, 0); 1036 break; 1037 1038 case TIOCSDTR: 1039 plcom_modem(sc, 1); 1040 break; 1041 1042 case TIOCCDTR: 1043 plcom_modem(sc, 0); 1044 break; 1045 1046 case TIOCGFLAGS: 1047 *(int *)data = sc->sc_swflags; 1048 break; 1049 1050 case TIOCSFLAGS: 1051 sc->sc_swflags = *(int *)data; 1052 break; 1053 1054 case TIOCMSET: 1055 case TIOCMBIS: 1056 case TIOCMBIC: 1057 tiocm_to_plcom(sc, cmd, *(int *)data); 1058 break; 1059 1060 case TIOCMGET: 1061 *(int *)data = plcom_to_tiocm(sc); 1062 break; 1063 1064 case PPS_IOC_CREATE: 1065 break; 1066 1067 case PPS_IOC_DESTROY: 1068 break; 1069 1070 case PPS_IOC_GETPARAMS: { 1071 pps_params_t *pp; 1072 pp = (pps_params_t *)data; 1073 mutex_spin_enter(&timecounter_lock); 1074 *pp = sc->ppsparam; 1075 mutex_spin_exit(&timecounter_lock); 1076 break; 1077 } 1078 1079 case PPS_IOC_SETPARAMS: { 1080 pps_params_t *pp; 1081 int mode; 1082 pp = (pps_params_t *)data; 1083 mutex_spin_enter(&timecounter_lock); 1084 if (pp->mode & ~ppscap) { 1085 error = EINVAL; 1086 mutex_spin_exit(&timecounter_lock); 1087 break; 1088 } 1089 sc->ppsparam = *pp; 1090 /* 1091 * Compute msr masks from user-specified timestamp state. 1092 */ 1093 mode = sc->ppsparam.mode; 1094 #ifdef PPS_SYNC 1095 if (mode & PPS_HARDPPSONASSERT) { 1096 mode |= PPS_CAPTUREASSERT; 1097 /* XXX revoke any previous HARDPPS source */ 1098 } 1099 if (mode & PPS_HARDPPSONCLEAR) { 1100 mode |= PPS_CAPTURECLEAR; 1101 /* XXX revoke any previous HARDPPS source */ 1102 } 1103 #endif /* PPS_SYNC */ 1104 switch (mode & PPS_CAPTUREBOTH) { 1105 case 0: 1106 sc->sc_ppsmask = 0; 1107 break; 1108 1109 case PPS_CAPTUREASSERT: 1110 sc->sc_ppsmask = PL01X_MSR_DCD; 1111 sc->sc_ppsassert = PL01X_MSR_DCD; 1112 sc->sc_ppsclear = -1; 1113 break; 1114 1115 case PPS_CAPTURECLEAR: 1116 sc->sc_ppsmask = PL01X_MSR_DCD; 1117 sc->sc_ppsassert = -1; 1118 sc->sc_ppsclear = 0; 1119 break; 1120 1121 case PPS_CAPTUREBOTH: 1122 sc->sc_ppsmask = PL01X_MSR_DCD; 1123 sc->sc_ppsassert = PL01X_MSR_DCD; 1124 sc->sc_ppsclear = 0; 1125 break; 1126 1127 default: 1128 error = EINVAL; 1129 break; 1130 } 1131 mutex_spin_exit(&timecounter_lock); 1132 break; 1133 } 1134 1135 case PPS_IOC_GETCAP: 1136 *(int*)data = ppscap; 1137 break; 1138 1139 case PPS_IOC_FETCH: { 1140 pps_info_t *pi; 1141 pi = (pps_info_t *)data; 1142 mutex_spin_enter(&timecounter_lock); 1143 *pi = sc->ppsinfo; 1144 mutex_spin_exit(&timecounter_lock); 1145 break; 1146 } 1147 1148 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1149 /* 1150 * Some GPS clocks models use the falling rather than 1151 * rising edge as the on-the-second signal. 1152 * The old API has no way to specify PPS polarity. 1153 */ 1154 mutex_spin_enter(&timecounter_lock); 1155 sc->sc_ppsmask = PL01X_MSR_DCD; 1156 #ifndef PPS_TRAILING_EDGE 1157 sc->sc_ppsassert = PL01X_MSR_DCD; 1158 sc->sc_ppsclear = -1; 1159 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1160 &sc->ppsinfo.assert_timestamp); 1161 #else 1162 sc->sc_ppsassert = -1 1163 sc->sc_ppsclear = 0; 1164 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1165 &sc->ppsinfo.clear_timestamp); 1166 #endif 1167 mutex_spin_exit(&timecounter_lock); 1168 break; 1169 1170 default: 1171 error = EPASSTHROUGH; 1172 break; 1173 } 1174 1175 mutex_spin_exit(&sc->sc_lock); 1176 1177 #ifdef PLCOM_DEBUG 1178 if (plcom_debug) 1179 plcomstatus(sc, "plcomioctl "); 1180 #endif 1181 1182 return error; 1183 } 1184 1185 integrate void 1186 plcom_schedrx(struct plcom_softc *sc) 1187 { 1188 1189 sc->sc_rx_ready = 1; 1190 1191 /* Wake up the poller. */ 1192 softint_schedule(sc->sc_si); 1193 } 1194 1195 void 1196 plcom_break(struct plcom_softc *sc, int onoff) 1197 { 1198 1199 if (onoff) 1200 SET(sc->sc_lcr, PL01X_LCR_BRK); 1201 else 1202 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1203 1204 if (!sc->sc_heldchange) { 1205 if (sc->sc_tx_busy) { 1206 sc->sc_heldtbc = sc->sc_tbc; 1207 sc->sc_tbc = 0; 1208 sc->sc_heldchange = 1; 1209 } else 1210 plcom_loadchannelregs(sc); 1211 } 1212 } 1213 1214 void 1215 plcom_modem(struct plcom_softc *sc, int onoff) 1216 { 1217 1218 if (sc->sc_mcr_dtr == 0) 1219 return; 1220 1221 if (onoff) 1222 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1223 else 1224 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1225 1226 if (!sc->sc_heldchange) { 1227 if (sc->sc_tx_busy) { 1228 sc->sc_heldtbc = sc->sc_tbc; 1229 sc->sc_tbc = 0; 1230 sc->sc_heldchange = 1; 1231 } else 1232 plcom_loadchannelregs(sc); 1233 } 1234 } 1235 1236 void 1237 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1238 { 1239 u_char plcombits; 1240 1241 plcombits = 0; 1242 if (ISSET(ttybits, TIOCM_DTR)) 1243 SET(plcombits, PL01X_MCR_DTR); 1244 if (ISSET(ttybits, TIOCM_RTS)) 1245 SET(plcombits, PL01X_MCR_RTS); 1246 1247 switch (how) { 1248 case TIOCMBIC: 1249 CLR(sc->sc_mcr, plcombits); 1250 break; 1251 1252 case TIOCMBIS: 1253 SET(sc->sc_mcr, plcombits); 1254 break; 1255 1256 case TIOCMSET: 1257 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1258 SET(sc->sc_mcr, plcombits); 1259 break; 1260 } 1261 1262 if (!sc->sc_heldchange) { 1263 if (sc->sc_tx_busy) { 1264 sc->sc_heldtbc = sc->sc_tbc; 1265 sc->sc_tbc = 0; 1266 sc->sc_heldchange = 1; 1267 } else 1268 plcom_loadchannelregs(sc); 1269 } 1270 } 1271 1272 int 1273 plcom_to_tiocm(struct plcom_softc *sc) 1274 { 1275 u_char plcombits; 1276 int ttybits = 0; 1277 1278 plcombits = sc->sc_mcr; 1279 if (ISSET(plcombits, PL01X_MCR_DTR)) 1280 SET(ttybits, TIOCM_DTR); 1281 if (ISSET(plcombits, PL01X_MCR_RTS)) 1282 SET(ttybits, TIOCM_RTS); 1283 1284 plcombits = sc->sc_msr; 1285 if (ISSET(plcombits, PL01X_MSR_DCD)) 1286 SET(ttybits, TIOCM_CD); 1287 if (ISSET(plcombits, PL01X_MSR_CTS)) 1288 SET(ttybits, TIOCM_CTS); 1289 if (ISSET(plcombits, PL01X_MSR_DSR)) 1290 SET(ttybits, TIOCM_DSR); 1291 if (ISSET(plcombits, PL011_MSR_RI)) 1292 SET(ttybits, TIOCM_RI); 1293 1294 if (sc->sc_cr != 0) 1295 SET(ttybits, TIOCM_LE); 1296 1297 return ttybits; 1298 } 1299 1300 static u_char 1301 cflag2lcr(tcflag_t cflag) 1302 { 1303 u_char lcr = 0; 1304 1305 switch (ISSET(cflag, CSIZE)) { 1306 case CS5: 1307 SET(lcr, PL01X_LCR_5BITS); 1308 break; 1309 case CS6: 1310 SET(lcr, PL01X_LCR_6BITS); 1311 break; 1312 case CS7: 1313 SET(lcr, PL01X_LCR_7BITS); 1314 break; 1315 case CS8: 1316 SET(lcr, PL01X_LCR_8BITS); 1317 break; 1318 } 1319 if (ISSET(cflag, PARENB)) { 1320 SET(lcr, PL01X_LCR_PEN); 1321 if (!ISSET(cflag, PARODD)) 1322 SET(lcr, PL01X_LCR_EPS); 1323 } 1324 if (ISSET(cflag, CSTOPB)) 1325 SET(lcr, PL01X_LCR_STP2); 1326 1327 return lcr; 1328 } 1329 1330 int 1331 plcomparam(struct tty *tp, struct termios *t) 1332 { 1333 struct plcom_softc *sc = 1334 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1335 struct plcom_instance *pi = &sc->sc_pi; 1336 int ospeed = -1; 1337 u_char lcr; 1338 1339 if (PLCOM_ISALIVE(sc) == 0) 1340 return EIO; 1341 1342 switch (pi->pi_type) { 1343 case PLCOM_TYPE_PL010: 1344 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1345 break; 1346 case PLCOM_TYPE_PL011: 1347 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1348 break; 1349 } 1350 1351 /* Check requested parameters. */ 1352 if (ospeed < 0) 1353 return EINVAL; 1354 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1355 return EINVAL; 1356 1357 /* 1358 * For the console, always force CLOCAL and !HUPCL, so that the port 1359 * is always active. 1360 */ 1361 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1362 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1363 SET(t->c_cflag, CLOCAL); 1364 CLR(t->c_cflag, HUPCL); 1365 } 1366 1367 /* 1368 * If there were no changes, don't do anything. This avoids dropping 1369 * input and improves performance when all we did was frob things like 1370 * VMIN and VTIME. 1371 */ 1372 if (tp->t_ospeed == t->c_ospeed && 1373 tp->t_cflag == t->c_cflag) 1374 return 0; 1375 1376 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1377 1378 mutex_spin_enter(&sc->sc_lock); 1379 1380 sc->sc_lcr = lcr; 1381 1382 /* 1383 * PL010 has a fixed-length FIFO trigger point. 1384 */ 1385 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1386 sc->sc_fifo = 1; 1387 else 1388 sc->sc_fifo = 0; 1389 1390 if (sc->sc_fifo) 1391 SET(sc->sc_lcr, PL01X_LCR_FEN); 1392 1393 /* 1394 * If we're not in a mode that assumes a connection is present, then 1395 * ignore carrier changes. 1396 */ 1397 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1398 sc->sc_msr_dcd = 0; 1399 else 1400 sc->sc_msr_dcd = PL01X_MSR_DCD; 1401 /* 1402 * Set the flow control pins depending on the current flow control 1403 * mode. 1404 */ 1405 if (ISSET(t->c_cflag, CRTSCTS)) { 1406 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1407 sc->sc_mcr_rts = PL01X_MCR_RTS; 1408 sc->sc_msr_cts = PL01X_MSR_CTS; 1409 } else if (ISSET(t->c_cflag, MDMBUF)) { 1410 /* 1411 * For DTR/DCD flow control, make sure we don't toggle DTR for 1412 * carrier detection. 1413 */ 1414 sc->sc_mcr_dtr = 0; 1415 sc->sc_mcr_rts = PL01X_MCR_DTR; 1416 sc->sc_msr_cts = PL01X_MSR_DCD; 1417 } else { 1418 /* 1419 * If no flow control, then always set RTS. This will make 1420 * the other side happy if it mistakenly thinks we're doing 1421 * RTS/CTS flow control. 1422 */ 1423 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1424 sc->sc_mcr_rts = 0; 1425 sc->sc_msr_cts = 0; 1426 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1427 SET(sc->sc_mcr, PL01X_MCR_RTS); 1428 else 1429 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1430 } 1431 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1432 1433 #if 0 1434 if (ospeed == 0) 1435 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1436 else 1437 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1438 #endif 1439 1440 switch (pi->pi_type) { 1441 case PLCOM_TYPE_PL010: 1442 sc->sc_ratel = ospeed & 0xff; 1443 sc->sc_rateh = (ospeed >> 8) & 0xff; 1444 break; 1445 case PLCOM_TYPE_PL011: 1446 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1447 sc->sc_rateh = ospeed >> 6; 1448 break; 1449 } 1450 1451 /* And copy to tty. */ 1452 tp->t_ispeed = t->c_ospeed; 1453 tp->t_ospeed = t->c_ospeed; 1454 tp->t_cflag = t->c_cflag; 1455 1456 if (!sc->sc_heldchange) { 1457 if (sc->sc_tx_busy) { 1458 sc->sc_heldtbc = sc->sc_tbc; 1459 sc->sc_tbc = 0; 1460 sc->sc_heldchange = 1; 1461 } else 1462 plcom_loadchannelregs(sc); 1463 } 1464 1465 if (!ISSET(t->c_cflag, CHWFLOW)) { 1466 /* Disable the high water mark. */ 1467 sc->sc_r_hiwat = 0; 1468 sc->sc_r_lowat = 0; 1469 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1470 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1471 plcom_schedrx(sc); 1472 } 1473 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1474 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1475 plcom_hwiflow(sc); 1476 } 1477 } else { 1478 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1479 sc->sc_r_lowat = plcom_rbuf_lowat; 1480 } 1481 1482 mutex_spin_exit(&sc->sc_lock); 1483 1484 /* 1485 * Update the tty layer's idea of the carrier bit, in case we changed 1486 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1487 * explicit request. 1488 */ 1489 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1490 1491 #ifdef PLCOM_DEBUG 1492 if (plcom_debug) 1493 plcomstatus(sc, "plcomparam "); 1494 #endif 1495 1496 if (!ISSET(t->c_cflag, CHWFLOW)) { 1497 if (sc->sc_tx_stopped) { 1498 sc->sc_tx_stopped = 0; 1499 plcomstart(tp); 1500 } 1501 } 1502 1503 return 0; 1504 } 1505 1506 void 1507 plcom_iflush(struct plcom_softc *sc) 1508 { 1509 struct plcom_instance *pi = &sc->sc_pi; 1510 #ifdef DIAGNOSTIC 1511 int reg; 1512 #endif 1513 int timo; 1514 1515 #ifdef DIAGNOSTIC 1516 reg = 0xffff; 1517 #endif 1518 timo = 50000; 1519 /* flush any pending I/O */ 1520 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1521 && --timo) 1522 #ifdef DIAGNOSTIC 1523 reg = 1524 #else 1525 (void) 1526 #endif 1527 PREAD1(pi, PL01XCOM_DR); 1528 #ifdef DIAGNOSTIC 1529 if (!timo) 1530 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1531 reg); 1532 #endif 1533 } 1534 1535 void 1536 plcom_loadchannelregs(struct plcom_softc *sc) 1537 { 1538 struct plcom_instance *pi = &sc->sc_pi; 1539 1540 /* XXXXX necessary? */ 1541 plcom_iflush(sc); 1542 1543 switch (pi->pi_type) { 1544 case PLCOM_TYPE_PL010: 1545 PWRITE1(pi, PL010COM_CR, 0); 1546 if (sc->sc_frequency != 0) { 1547 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1548 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1549 } 1550 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1551 1552 /* XXX device_unit() abuse */ 1553 if (sc->sc_set_mcr) 1554 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1555 device_unit(sc->sc_dev), 1556 sc->sc_mcr_active = sc->sc_mcr); 1557 1558 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1559 break; 1560 1561 case PLCOM_TYPE_PL011: 1562 PWRITE4(pi, PL011COM_CR, 0); 1563 if (sc->sc_frequency != 0) { 1564 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1565 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1566 } 1567 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1568 sc->sc_mcr_active = sc->sc_mcr; 1569 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1570 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1571 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1572 break; 1573 } 1574 } 1575 1576 int 1577 plcomhwiflow(struct tty *tp, int block) 1578 { 1579 struct plcom_softc *sc = 1580 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1581 1582 if (PLCOM_ISALIVE(sc) == 0) 1583 return 0; 1584 1585 if (sc->sc_mcr_rts == 0) 1586 return 0; 1587 1588 mutex_spin_enter(&sc->sc_lock); 1589 1590 if (block) { 1591 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1592 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1593 plcom_hwiflow(sc); 1594 } 1595 } else { 1596 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1597 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1598 plcom_schedrx(sc); 1599 } 1600 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1601 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1602 plcom_hwiflow(sc); 1603 } 1604 } 1605 1606 mutex_spin_exit(&sc->sc_lock); 1607 return 1; 1608 } 1609 1610 /* 1611 * (un)block input via hw flowcontrol 1612 */ 1613 void 1614 plcom_hwiflow(struct plcom_softc *sc) 1615 { 1616 struct plcom_instance *pi = &sc->sc_pi; 1617 1618 if (sc->sc_mcr_rts == 0) 1619 return; 1620 1621 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1622 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1623 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1624 } else { 1625 SET(sc->sc_mcr, sc->sc_mcr_rts); 1626 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1627 } 1628 switch (pi->pi_type) { 1629 case PLCOM_TYPE_PL010: 1630 if (sc->sc_set_mcr) 1631 /* XXX device_unit() abuse */ 1632 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1633 device_unit(sc->sc_dev), sc->sc_mcr_active); 1634 break; 1635 case PLCOM_TYPE_PL011: 1636 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1637 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1638 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1639 break; 1640 } 1641 } 1642 1643 1644 void 1645 plcomstart(struct tty *tp) 1646 { 1647 struct plcom_softc *sc = 1648 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1649 struct plcom_instance *pi = &sc->sc_pi; 1650 int s; 1651 1652 if (PLCOM_ISALIVE(sc) == 0) 1653 return; 1654 1655 s = spltty(); 1656 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1657 goto out; 1658 if (sc->sc_tx_stopped) 1659 goto out; 1660 1661 if (!ttypull(tp)) 1662 goto out; 1663 1664 /* Grab the first contiguous region of buffer space. */ 1665 { 1666 u_char *tba; 1667 int tbc; 1668 1669 tba = tp->t_outq.c_cf; 1670 tbc = ndqb(&tp->t_outq, 0); 1671 1672 mutex_spin_enter(&sc->sc_lock); 1673 1674 sc->sc_tba = tba; 1675 sc->sc_tbc = tbc; 1676 } 1677 1678 SET(tp->t_state, TS_BUSY); 1679 sc->sc_tx_busy = 1; 1680 1681 /* Enable transmit completion interrupts if necessary. */ 1682 switch (pi->pi_type) { 1683 case PLCOM_TYPE_PL010: 1684 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1685 SET(sc->sc_cr, PL010_CR_TIE); 1686 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1687 } 1688 break; 1689 case PLCOM_TYPE_PL011: 1690 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1691 SET(sc->sc_imsc, PL011_INT_TX); 1692 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1693 } 1694 break; 1695 } 1696 1697 /* Output the first chunk of the contiguous buffer. */ 1698 { 1699 int n; 1700 1701 n = sc->sc_tbc; 1702 if (n > sc->sc_fifolen) 1703 n = sc->sc_fifolen; 1704 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1705 sc->sc_tbc -= n; 1706 sc->sc_tba += n; 1707 } 1708 mutex_spin_exit(&sc->sc_lock); 1709 out: 1710 splx(s); 1711 return; 1712 } 1713 1714 /* 1715 * Stop output on a line. 1716 */ 1717 void 1718 plcomstop(struct tty *tp, int flag) 1719 { 1720 struct plcom_softc *sc = 1721 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1722 1723 mutex_spin_enter(&sc->sc_lock); 1724 if (ISSET(tp->t_state, TS_BUSY)) { 1725 /* Stop transmitting at the next chunk. */ 1726 sc->sc_tbc = 0; 1727 sc->sc_heldtbc = 0; 1728 if (!ISSET(tp->t_state, TS_TTSTOP)) 1729 SET(tp->t_state, TS_FLUSH); 1730 } 1731 mutex_spin_exit(&sc->sc_lock); 1732 } 1733 1734 void 1735 plcomdiag(void *arg) 1736 { 1737 struct plcom_softc *sc = arg; 1738 int overflows, floods; 1739 1740 mutex_spin_enter(&sc->sc_lock); 1741 overflows = sc->sc_overflows; 1742 sc->sc_overflows = 0; 1743 floods = sc->sc_floods; 1744 sc->sc_floods = 0; 1745 sc->sc_errors = 0; 1746 mutex_spin_exit(&sc->sc_lock); 1747 1748 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1749 device_xname(sc->sc_dev), 1750 overflows, overflows == 1 ? "" : "s", 1751 floods, floods == 1 ? "" : "s"); 1752 } 1753 1754 integrate void 1755 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1756 { 1757 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1758 struct plcom_instance *pi = &sc->sc_pi; 1759 u_char *get, *end; 1760 u_int cc, scc; 1761 u_char rsr; 1762 int code; 1763 1764 end = sc->sc_ebuf; 1765 get = sc->sc_rbget; 1766 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1767 1768 if (cc == plcom_rbuf_size) { 1769 sc->sc_floods++; 1770 if (sc->sc_errors++ == 0) 1771 callout_reset(&sc->sc_diag_callout, 60 * hz, 1772 plcomdiag, sc); 1773 } 1774 1775 while (cc) { 1776 code = get[0]; 1777 rsr = get[1]; 1778 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1779 if (ISSET(rsr, PL01X_RSR_OE)) { 1780 sc->sc_overflows++; 1781 if (sc->sc_errors++ == 0) 1782 callout_reset(&sc->sc_diag_callout, 1783 60 * hz, plcomdiag, sc); 1784 } 1785 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1786 SET(code, TTY_FE); 1787 if (ISSET(rsr, PL01X_RSR_PE)) 1788 SET(code, TTY_PE); 1789 } 1790 if ((*rint)(code, tp) == -1) { 1791 /* 1792 * The line discipline's buffer is out of space. 1793 */ 1794 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1795 /* 1796 * We're either not using flow control, or the 1797 * line discipline didn't tell us to block for 1798 * some reason. Either way, we have no way to 1799 * know when there's more space available, so 1800 * just drop the rest of the data. 1801 */ 1802 get += cc << 1; 1803 if (get >= end) 1804 get -= plcom_rbuf_size << 1; 1805 cc = 0; 1806 } else { 1807 /* 1808 * Don't schedule any more receive processing 1809 * until the line discipline tells us there's 1810 * space available (through plcomhwiflow()). 1811 * Leave the rest of the data in the input 1812 * buffer. 1813 */ 1814 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1815 } 1816 break; 1817 } 1818 get += 2; 1819 if (get >= end) 1820 get = sc->sc_rbuf; 1821 cc--; 1822 } 1823 1824 if (cc != scc) { 1825 sc->sc_rbget = get; 1826 mutex_spin_enter(&sc->sc_lock); 1827 1828 cc = sc->sc_rbavail += scc - cc; 1829 /* Buffers should be ok again, release possible block. */ 1830 if (cc >= sc->sc_r_lowat) { 1831 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1832 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1833 switch (pi->pi_type) { 1834 case PLCOM_TYPE_PL010: 1835 SET(sc->sc_cr, 1836 PL010_CR_RIE | PL010_CR_RTIE); 1837 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1838 break; 1839 case PLCOM_TYPE_PL011: 1840 SET(sc->sc_imsc, 1841 PL011_INT_RX | PL011_INT_RT); 1842 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1843 break; 1844 } 1845 } 1846 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1847 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1848 plcom_hwiflow(sc); 1849 } 1850 } 1851 mutex_spin_exit(&sc->sc_lock); 1852 } 1853 } 1854 1855 integrate void 1856 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1857 { 1858 1859 CLR(tp->t_state, TS_BUSY); 1860 if (ISSET(tp->t_state, TS_FLUSH)) 1861 CLR(tp->t_state, TS_FLUSH); 1862 else 1863 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1864 (*tp->t_linesw->l_start)(tp); 1865 } 1866 1867 integrate void 1868 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1869 { 1870 u_char msr, delta; 1871 1872 mutex_spin_enter(&sc->sc_lock); 1873 msr = sc->sc_msr; 1874 delta = sc->sc_msr_delta; 1875 sc->sc_msr_delta = 0; 1876 mutex_spin_exit(&sc->sc_lock); 1877 1878 if (ISSET(delta, sc->sc_msr_dcd)) { 1879 /* 1880 * Inform the tty layer that carrier detect changed. 1881 */ 1882 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1883 } 1884 1885 if (ISSET(delta, sc->sc_msr_cts)) { 1886 /* Block or unblock output according to flow control. */ 1887 if (ISSET(msr, sc->sc_msr_cts)) { 1888 sc->sc_tx_stopped = 0; 1889 (*tp->t_linesw->l_start)(tp); 1890 } else { 1891 sc->sc_tx_stopped = 1; 1892 } 1893 } 1894 1895 #ifdef PLCOM_DEBUG 1896 if (plcom_debug) 1897 plcomstatus(sc, "plcom_stsoft"); 1898 #endif 1899 } 1900 1901 void 1902 plcomsoft(void *arg) 1903 { 1904 struct plcom_softc *sc = arg; 1905 struct tty *tp; 1906 1907 if (PLCOM_ISALIVE(sc) == 0) 1908 return; 1909 1910 tp = sc->sc_tty; 1911 1912 if (sc->sc_rx_ready) { 1913 sc->sc_rx_ready = 0; 1914 plcom_rxsoft(sc, tp); 1915 } 1916 1917 if (sc->sc_st_check) { 1918 sc->sc_st_check = 0; 1919 plcom_stsoft(sc, tp); 1920 } 1921 1922 if (sc->sc_tx_done) { 1923 sc->sc_tx_done = 0; 1924 plcom_txsoft(sc, tp); 1925 } 1926 } 1927 1928 bool 1929 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1930 { 1931 bool ret = false; 1932 u_int stat = 0; 1933 1934 switch (pi->pi_type) { 1935 case PLCOM_TYPE_PL010: 1936 stat = PREAD1(pi, PL010COM_IIR); 1937 ret = ISSET(stat, PL010_IIR_IMASK); 1938 break; 1939 case PLCOM_TYPE_PL011: 1940 stat = PREAD4(pi, PL011COM_MIS); 1941 ret = ISSET(stat, PL011_INT_ALLMASK); 1942 break; 1943 } 1944 *istatus = stat; 1945 1946 return ret; 1947 } 1948 1949 int 1950 plcomintr(void *arg) 1951 { 1952 struct plcom_softc *sc = arg; 1953 struct plcom_instance *pi = &sc->sc_pi; 1954 u_char *put, *end; 1955 u_int cc; 1956 u_int istatus = 0; 1957 u_char rsr; 1958 bool intr = false; 1959 1960 PLCOM_BARRIER(pi, BR | BW); 1961 1962 if (PLCOM_ISALIVE(sc) == 0) 1963 return 0; 1964 1965 mutex_spin_enter(&sc->sc_lock); 1966 intr = plcom_intstatus(pi, &istatus); 1967 if (!intr) { 1968 mutex_spin_exit(&sc->sc_lock); 1969 return 0; 1970 } 1971 1972 end = sc->sc_ebuf; 1973 put = sc->sc_rbput; 1974 cc = sc->sc_rbavail; 1975 1976 do { 1977 u_int msr = 0, delta, fr; 1978 bool rxintr = false, txintr = false, msintr; 1979 1980 /* don't need RI here*/ 1981 fr = PREAD1(pi, PL01XCOM_FR); 1982 1983 if (!ISSET(fr, PL01X_FR_RXFE) && 1984 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1985 while (cc > 0) { 1986 int cn_trapped = 0; 1987 put[0] = PREAD1(pi, PL01XCOM_DR); 1988 rsr = PREAD1(pi, PL01XCOM_RSR); 1989 /* Clear any error status. */ 1990 if (ISSET(rsr, PL01X_RSR_ERROR)) 1991 PWRITE1(pi, PL01XCOM_ECR, 0); 1992 if (ISSET(rsr, PL01X_RSR_BE)) { 1993 cn_trapped = 0; 1994 cn_check_magic(sc->sc_tty->t_dev, 1995 CNC_BREAK, plcom_cnm_state); 1996 if (cn_trapped) 1997 continue; 1998 #if defined(KGDB) 1999 if (ISSET(sc->sc_hwflags, 2000 PLCOM_HW_KGDB)) { 2001 kgdb_connect(1); 2002 continue; 2003 } 2004 #endif 2005 } 2006 2007 put[1] = rsr; 2008 cn_trapped = 0; 2009 cn_check_magic(sc->sc_tty->t_dev, put[0], 2010 plcom_cnm_state); 2011 if (cn_trapped) { 2012 fr = PREAD1(pi, PL01XCOM_FR); 2013 if (ISSET(fr, PL01X_FR_RXFE)) 2014 break; 2015 2016 continue; 2017 } 2018 put += 2; 2019 if (put >= end) 2020 put = sc->sc_rbuf; 2021 cc--; 2022 2023 /* don't need RI here*/ 2024 fr = PREAD1(pi, PL01XCOM_FR); 2025 if (ISSET(fr, PL01X_FR_RXFE)) 2026 break; 2027 } 2028 2029 /* 2030 * Current string of incoming characters ended because 2031 * no more data was available or we ran out of space. 2032 * Schedule a receive event if any data was received. 2033 * If we're out of space, turn off receive interrupts. 2034 */ 2035 sc->sc_rbput = put; 2036 sc->sc_rbavail = cc; 2037 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2038 sc->sc_rx_ready = 1; 2039 2040 /* 2041 * See if we are in danger of overflowing a buffer. If 2042 * so, use hardware flow control to ease the pressure. 2043 */ 2044 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2045 cc < sc->sc_r_hiwat) { 2046 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2047 plcom_hwiflow(sc); 2048 } 2049 2050 /* 2051 * If we're out of space, disable receive interrupts 2052 * until the queue has drained a bit. 2053 */ 2054 if (!cc) { 2055 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2056 switch (pi->pi_type) { 2057 case PLCOM_TYPE_PL010: 2058 CLR(sc->sc_cr, 2059 PL010_CR_RIE | PL010_CR_RTIE); 2060 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2061 break; 2062 case PLCOM_TYPE_PL011: 2063 CLR(sc->sc_imsc, 2064 PL011_INT_RT | PL011_INT_RX); 2065 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2066 break; 2067 } 2068 } 2069 } else { 2070 switch (pi->pi_type) { 2071 case PLCOM_TYPE_PL010: 2072 rxintr = ISSET(istatus, PL010_IIR_RIS); 2073 if (rxintr) { 2074 PWRITE1(pi, PL010COM_CR, 0); 2075 delay(10); 2076 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2077 continue; 2078 } 2079 break; 2080 case PLCOM_TYPE_PL011: 2081 rxintr = ISSET(istatus, PL011_INT_RX); 2082 if (rxintr) { 2083 PWRITE4(pi, PL011COM_CR, 0); 2084 delay(10); 2085 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2086 continue; 2087 } 2088 break; 2089 } 2090 } 2091 2092 switch (pi->pi_type) { 2093 case PLCOM_TYPE_PL010: 2094 msr = PREAD1(pi, PL01XCOM_FR); 2095 break; 2096 case PLCOM_TYPE_PL011: 2097 msr = PREAD4(pi, PL01XCOM_FR); 2098 break; 2099 } 2100 delta = msr ^ sc->sc_msr; 2101 sc->sc_msr = msr; 2102 2103 /* Clear any pending modem status interrupt. */ 2104 switch (pi->pi_type) { 2105 case PLCOM_TYPE_PL010: 2106 msintr = ISSET(istatus, PL010_IIR_MIS); 2107 if (msintr) { 2108 PWRITE1(pi, PL010COM_ICR, 0); 2109 } 2110 break; 2111 case PLCOM_TYPE_PL011: 2112 msintr = ISSET(istatus, PL011_INT_MSMASK); 2113 if (msintr) { 2114 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2115 } 2116 break; 2117 } 2118 /* 2119 * Pulse-per-second (PSS) signals on edge of DCD? 2120 * Process these even if line discipline is ignoring DCD. 2121 */ 2122 if (delta & sc->sc_ppsmask) { 2123 struct timeval tv; 2124 mutex_spin_enter(&timecounter_lock); 2125 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2126 /* XXX nanotime() */ 2127 microtime(&tv); 2128 TIMEVAL_TO_TIMESPEC(&tv, 2129 &sc->ppsinfo.assert_timestamp); 2130 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2131 timespecadd(&sc->ppsinfo.assert_timestamp, 2132 &sc->ppsparam.assert_offset, 2133 &sc->ppsinfo.assert_timestamp); 2134 } 2135 2136 #ifdef PPS_SYNC 2137 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2138 hardpps(&tv, tv.tv_usec); 2139 #endif 2140 sc->ppsinfo.assert_sequence++; 2141 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2142 2143 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2144 /* XXX nanotime() */ 2145 microtime(&tv); 2146 TIMEVAL_TO_TIMESPEC(&tv, 2147 &sc->ppsinfo.clear_timestamp); 2148 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2149 timespecadd(&sc->ppsinfo.clear_timestamp, 2150 &sc->ppsparam.clear_offset, 2151 &sc->ppsinfo.clear_timestamp); 2152 } 2153 2154 #ifdef PPS_SYNC 2155 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2156 hardpps(&tv, tv.tv_usec); 2157 #endif 2158 sc->ppsinfo.clear_sequence++; 2159 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2160 } 2161 mutex_spin_exit(&timecounter_lock); 2162 } 2163 2164 /* 2165 * Process normal status changes 2166 */ 2167 if (ISSET(delta, sc->sc_msr_mask)) { 2168 SET(sc->sc_msr_delta, delta); 2169 2170 /* 2171 * Stop output immediately if we lose the output 2172 * flow control signal or carrier detect. 2173 */ 2174 if (ISSET(~msr, sc->sc_msr_mask)) { 2175 sc->sc_tbc = 0; 2176 sc->sc_heldtbc = 0; 2177 #ifdef PLCOM_DEBUG 2178 if (plcom_debug) 2179 plcomstatus(sc, "plcomintr "); 2180 #endif 2181 } 2182 2183 sc->sc_st_check = 1; 2184 } 2185 2186 /* 2187 * Done handling any receive interrupts. See if data 2188 * can be transmitted as well. Schedule tx done 2189 * event if no data left and tty was marked busy. 2190 */ 2191 2192 switch (pi->pi_type) { 2193 case PLCOM_TYPE_PL010: 2194 txintr = ISSET(istatus, PL010_IIR_TIS); 2195 break; 2196 case PLCOM_TYPE_PL011: 2197 txintr = ISSET(istatus, PL011_INT_TX); 2198 break; 2199 } 2200 if (txintr) { 2201 /* 2202 * If we've delayed a parameter change, do it 2203 * now, and restart * output. 2204 */ 2205 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2206 if (sc->sc_heldchange) { 2207 plcom_loadchannelregs(sc); 2208 sc->sc_heldchange = 0; 2209 sc->sc_tbc = sc->sc_heldtbc; 2210 sc->sc_heldtbc = 0; 2211 } 2212 2213 /* 2214 * Output the next chunk of the contiguous 2215 * buffer, if any. 2216 */ 2217 if (sc->sc_tbc > 0) { 2218 int n; 2219 2220 n = sc->sc_tbc; 2221 if (n > sc->sc_fifolen) 2222 n = sc->sc_fifolen; 2223 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2224 sc->sc_tbc -= n; 2225 sc->sc_tba += n; 2226 } else { 2227 /* 2228 * Disable transmit completion 2229 * interrupts if necessary. 2230 */ 2231 switch (pi->pi_type) { 2232 case PLCOM_TYPE_PL010: 2233 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2234 CLR(sc->sc_cr, PL010_CR_TIE); 2235 PWRITE1(pi, PL010COM_CR, 2236 sc->sc_cr); 2237 } 2238 break; 2239 case PLCOM_TYPE_PL011: 2240 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2241 CLR(sc->sc_imsc, PL011_INT_TX); 2242 PWRITE4(pi, PL011COM_IMSC, 2243 sc->sc_imsc); 2244 } 2245 break; 2246 } 2247 if (sc->sc_tx_busy) { 2248 sc->sc_tx_busy = 0; 2249 sc->sc_tx_done = 1; 2250 } 2251 } 2252 } 2253 2254 } while (plcom_intstatus(pi, &istatus)); 2255 2256 mutex_spin_exit(&sc->sc_lock); 2257 2258 /* Wake up the poller. */ 2259 softint_schedule(sc->sc_si); 2260 2261 #ifdef RND_COM 2262 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2263 #endif 2264 2265 PLCOM_BARRIER(pi, BR | BW); 2266 2267 return 1; 2268 } 2269 2270 /* 2271 * The following functions are polled getc and putc routines, shared 2272 * by the console and kgdb glue. 2273 * 2274 * The read-ahead code is so that you can detect pending in-band 2275 * cn_magic in polled mode while doing output rather than having to 2276 * wait until the kernel decides it needs input. 2277 */ 2278 2279 #define MAX_READAHEAD 20 2280 static int plcom_readahead[MAX_READAHEAD]; 2281 static int plcom_readaheadcount = 0; 2282 2283 int 2284 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2285 { 2286 int s = splserial(); 2287 u_char c; 2288 2289 /* got a character from reading things earlier */ 2290 if (plcom_readaheadcount > 0) { 2291 int i; 2292 2293 c = plcom_readahead[0]; 2294 for (i = 1; i < plcom_readaheadcount; i++) { 2295 plcom_readahead[i-1] = plcom_readahead[i]; 2296 } 2297 plcom_readaheadcount--; 2298 splx(s); 2299 return c; 2300 } 2301 2302 if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2303 splx(s); 2304 return -1; 2305 } 2306 2307 c = PREAD1(pi, PL01XCOM_DR); 2308 { 2309 int cn_trapped __unused = 0; 2310 2311 if (!db_active) 2312 cn_check_magic(dev, c, plcom_cnm_state); 2313 } 2314 splx(s); 2315 return c; 2316 } 2317 2318 void 2319 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2320 { 2321 int s = splserial(); 2322 int timo; 2323 2324 int cin, stat; 2325 if (plcom_readaheadcount < MAX_READAHEAD 2326 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2327 int cn_trapped __unused = 0; 2328 cin = PREAD1(pi, PL01XCOM_DR); 2329 cn_check_magic(dev, cin, plcom_cnm_state); 2330 plcom_readahead[plcom_readaheadcount++] = cin; 2331 } 2332 2333 /* wait for any pending transmission to finish */ 2334 timo = 150000; 2335 while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo) 2336 continue; 2337 2338 PWRITE1(pi, PL01XCOM_DR, c); 2339 PLCOM_BARRIER(pi, BR | BW); 2340 2341 splx(s); 2342 } 2343 2344 /* 2345 * Initialize UART for use as console or KGDB line. 2346 */ 2347 int 2348 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2349 { 2350 u_char lcr; 2351 2352 switch (pi->pi_type) { 2353 case PLCOM_TYPE_PL010: 2354 if (pi->pi_size == 0) 2355 pi->pi_size = PL010COM_UART_SIZE; 2356 break; 2357 case PLCOM_TYPE_PL011: 2358 if (pi->pi_size == 0) 2359 pi->pi_size = PL011COM_UART_SIZE; 2360 break; 2361 default: 2362 panic("Unknown plcom type"); 2363 } 2364 2365 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2366 &pi->pi_ioh)) 2367 return ENOMEM; /* ??? */ 2368 2369 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2370 switch (pi->pi_type) { 2371 case PLCOM_TYPE_PL010: 2372 PWRITE1(pi, PL010COM_CR, 0); 2373 2374 if (rate && frequency) { 2375 rate = pl010comspeed(rate, frequency); 2376 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2377 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2378 } 2379 PWRITE1(pi, PL010COM_LCR, lcr); 2380 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2381 break; 2382 case PLCOM_TYPE_PL011: 2383 PWRITE4(pi, PL011COM_CR, 0); 2384 2385 if (rate && frequency) { 2386 rate = pl011comspeed(rate, frequency); 2387 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2388 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2389 } 2390 PWRITE1(pi, PL011COM_LCRH, lcr); 2391 PWRITE4(pi, PL011COM_CR, 2392 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2393 break; 2394 } 2395 2396 #if 0 2397 /* Ought to do something like this, but we have no sc to 2398 dereference. */ 2399 /* XXX device_unit() abuse */ 2400 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2401 PL01X_MCR_DTR | PL01X_MCR_RTS); 2402 #endif 2403 2404 return 0; 2405 } 2406 2407 /* 2408 * Following are all routines needed for PLCOM to act as console 2409 */ 2410 struct consdev plcomcons = { 2411 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2412 plcomcnhalt, NULL, NODEV, CN_NORMAL 2413 }; 2414 2415 int 2416 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2417 tcflag_t cflag, int unit) 2418 { 2419 int res; 2420 2421 plcomcons_info = *pi; 2422 2423 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2424 if (res) 2425 return res; 2426 2427 cn_tab = &plcomcons; 2428 cn_init_magic(&plcom_cnm_state); 2429 cn_set_magic("\047\001"); /* default magic is BREAK */ 2430 2431 plcomconsunit = unit; 2432 plcomconsrate = rate; 2433 plcomconscflag = cflag; 2434 2435 return 0; 2436 } 2437 2438 void 2439 plcomcndetach(void) 2440 { 2441 2442 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2443 plcomcons_info.pi_size); 2444 plcomcons_info.pi_iot = NULL; 2445 2446 cn_tab = NULL; 2447 } 2448 2449 int 2450 plcomcngetc(dev_t dev) 2451 { 2452 return plcom_common_getc(dev, &plcomcons_info); 2453 } 2454 2455 /* 2456 * Console kernel output character routine. 2457 */ 2458 void 2459 plcomcnputc(dev_t dev, int c) 2460 { 2461 plcom_common_putc(dev, &plcomcons_info, c); 2462 } 2463 2464 void 2465 plcomcnpollc(dev_t dev, int on) 2466 { 2467 2468 plcom_readaheadcount = 0; 2469 } 2470 2471 void 2472 plcomcnhalt(dev_t dev) 2473 { 2474 struct plcom_instance *pi = &plcomcons_info; 2475 2476 switch (pi->pi_type) { 2477 case PLCOM_TYPE_PL010: 2478 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2479 break; 2480 case PLCOM_TYPE_PL011: 2481 PWRITE4(pi, PL011COM_CR, 2482 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2483 PWRITE4(pi, PL011COM_IMSC, 0); 2484 break; 2485 } 2486 } 2487 2488 #ifdef KGDB 2489 int 2490 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2491 tcflag_t cflag, int unit) 2492 { 2493 int res; 2494 2495 if (pi->pi_iot == plcomcons_info.pi_iot && 2496 pi->pi_iobase == plcomcons_info.pi_iobase) 2497 return EBUSY; /* cannot share with console */ 2498 2499 res = plcominit(pi, rate, frequency, cflag); 2500 if (res) 2501 return res; 2502 2503 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2504 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2505 2506 plcomkgdb_info.pi_iot = pi->pi_iot; 2507 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2508 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2509 2510 return 0; 2511 } 2512 2513 /* ARGSUSED */ 2514 int 2515 plcom_kgdb_getc(void *arg) 2516 { 2517 return plcom_common_getc(NODEV, &plcomkgdb_info); 2518 } 2519 2520 /* ARGSUSED */ 2521 void 2522 plcom_kgdb_putc(void *arg, int c) 2523 { 2524 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2525 } 2526 #endif /* KGDB */ 2527 2528 /* helper function to identify the plcom ports used by 2529 console or KGDB (and not yet autoconf attached) */ 2530 int 2531 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2532 bus_space_handle_t *ioh) 2533 { 2534 bus_space_handle_t help; 2535 2536 if (!plcomconsattached && 2537 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2538 iobase == plcomcons_info.pi_iobase) 2539 help = plcomcons_info.pi_ioh; 2540 #ifdef KGDB 2541 else if (!plcom_kgdb_attached && 2542 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2543 iobase == plcomkgdb_info.pi_iobase) 2544 help = plcomkgdb_info.pi_ioh; 2545 #endif 2546 else 2547 return 0; 2548 2549 if (ioh) 2550 *ioh = help; 2551 return 1; 2552 } 2553
Indexes created Fri Sep 26 20:09:58 GMT 2025