g42xxeb_machdep.c revision 1.18 1 1.18 rmind /* $NetBSD: g42xxeb_machdep.c,v 1.18 2009/11/27 03:23:06 rmind Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.1 bsh * Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation.
5 1.1 bsh * All rights reserved.
6 1.1 bsh *
7 1.1 bsh * Written by Hiroyuki Bessho for Genetec Corporation.
8 1.1 bsh *
9 1.1 bsh * Redistribution and use in source and binary forms, with or without
10 1.1 bsh * modification, are permitted provided that the following conditions
11 1.1 bsh * are met:
12 1.1 bsh * 1. Redistributions of source code must retain the above copyright
13 1.1 bsh * notice, this list of conditions and the following disclaimer.
14 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 bsh * notice, this list of conditions and the following disclaimer in the
16 1.1 bsh * documentation and/or other materials provided with the distribution.
17 1.1 bsh * 3. The name of Genetec Corporation may not be used to endorse or
18 1.1 bsh * promote products derived from this software without specific prior
19 1.1 bsh * written permission.
20 1.1 bsh *
21 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
22 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
25 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
32 1.1 bsh *
33 1.1 bsh * Machine dependant functions for kernel setup for Genetec G4250EBX
34 1.1 bsh * evaluation board.
35 1.1 bsh *
36 1.1 bsh * Based on iq80310_machhdep.c
37 1.1 bsh */
38 1.1 bsh /*
39 1.1 bsh * Copyright (c) 2001 Wasabi Systems, Inc.
40 1.1 bsh * All rights reserved.
41 1.1 bsh *
42 1.1 bsh * Written by Jason R. Thorpe for Wasabi Systems, Inc.
43 1.1 bsh *
44 1.1 bsh * Redistribution and use in source and binary forms, with or without
45 1.1 bsh * modification, are permitted provided that the following conditions
46 1.1 bsh * are met:
47 1.1 bsh * 1. Redistributions of source code must retain the above copyright
48 1.1 bsh * notice, this list of conditions and the following disclaimer.
49 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 bsh * notice, this list of conditions and the following disclaimer in the
51 1.1 bsh * documentation and/or other materials provided with the distribution.
52 1.1 bsh * 3. All advertising materials mentioning features or use of this software
53 1.1 bsh * must display the following acknowledgement:
54 1.1 bsh * This product includes software developed for the NetBSD Project by
55 1.1 bsh * Wasabi Systems, Inc.
56 1.1 bsh * 4. The name of Wasabi Systems, Inc. may not be used to endorse
57 1.1 bsh * or promote products derived from this software without specific prior
58 1.1 bsh * written permission.
59 1.1 bsh *
60 1.1 bsh * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
61 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
62 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
63 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
64 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
65 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
66 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
67 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
68 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
69 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
70 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
71 1.1 bsh */
72 1.1 bsh
73 1.1 bsh /*
74 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe.
75 1.1 bsh * Copyright (c) 1997,1998 Causality Limited.
76 1.1 bsh * All rights reserved.
77 1.1 bsh *
78 1.1 bsh * Redistribution and use in source and binary forms, with or without
79 1.1 bsh * modification, are permitted provided that the following conditions
80 1.1 bsh * are met:
81 1.1 bsh * 1. Redistributions of source code must retain the above copyright
82 1.1 bsh * notice, this list of conditions and the following disclaimer.
83 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
84 1.1 bsh * notice, this list of conditions and the following disclaimer in the
85 1.1 bsh * documentation and/or other materials provided with the distribution.
86 1.1 bsh * 3. All advertising materials mentioning features or use of this software
87 1.1 bsh * must display the following acknowledgement:
88 1.1 bsh * This product includes software developed by Mark Brinicombe
89 1.1 bsh * for the NetBSD Project.
90 1.1 bsh * 4. The name of the company nor the name of the author may be used to
91 1.1 bsh * endorse or promote products derived from this software without specific
92 1.1 bsh * prior written permission.
93 1.1 bsh *
94 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
95 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
96 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
97 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
98 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
99 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
100 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
101 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
102 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
103 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
104 1.1 bsh * SUCH DAMAGE.
105 1.1 bsh *
106 1.1 bsh * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
107 1.1 bsh * boards using RedBoot firmware.
108 1.1 bsh */
109 1.1 bsh
110 1.1 bsh #include "opt_ddb.h"
111 1.1 bsh #include "opt_kgdb.h"
112 1.1 bsh #include "opt_pmap_debug.h"
113 1.1 bsh #include "opt_md.h"
114 1.1 bsh #include "opt_com.h"
115 1.1 bsh #include "md.h"
116 1.1 bsh #include "lcd.h"
117 1.1 bsh
118 1.1 bsh #include <sys/param.h>
119 1.1 bsh #include <sys/device.h>
120 1.1 bsh #include <sys/systm.h>
121 1.1 bsh #include <sys/kernel.h>
122 1.1 bsh #include <sys/exec.h>
123 1.1 bsh #include <sys/proc.h>
124 1.1 bsh #include <sys/msgbuf.h>
125 1.1 bsh #include <sys/reboot.h>
126 1.1 bsh #include <sys/termios.h>
127 1.1 bsh #include <sys/ksyms.h>
128 1.1 bsh
129 1.1 bsh #include <uvm/uvm_extern.h>
130 1.1 bsh
131 1.1 bsh #include <sys/conf.h>
132 1.1 bsh #include <dev/cons.h>
133 1.1 bsh #include <dev/md.h>
134 1.1 bsh
135 1.1 bsh #include <machine/db_machdep.h>
136 1.1 bsh #include <ddb/db_sym.h>
137 1.1 bsh #include <ddb/db_extern.h>
138 1.1 bsh #ifdef KGDB
139 1.1 bsh #include <sys/kgdb.h>
140 1.1 bsh #endif
141 1.1 bsh
142 1.1 bsh #include <machine/bootconfig.h>
143 1.1 bsh #include <machine/bus.h>
144 1.1 bsh #include <machine/cpu.h>
145 1.1 bsh #include <machine/frame.h>
146 1.1 bsh #include <arm/undefined.h>
147 1.1 bsh
148 1.1 bsh #include <arm/arm32/machdep.h>
149 1.1 bsh
150 1.1 bsh #include <arm/xscale/pxa2x0reg.h>
151 1.1 bsh #include <arm/xscale/pxa2x0var.h>
152 1.1 bsh #include <arm/xscale/pxa2x0_gpio.h>
153 1.1 bsh #include <evbarm/g42xxeb/g42xxeb_reg.h>
154 1.1 bsh #include <evbarm/g42xxeb/g42xxeb_var.h>
155 1.1 bsh
156 1.1 bsh /* Kernel text starts 2MB in from the bottom of the kernel address space. */
157 1.1 bsh #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
158 1.1 bsh #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
159 1.1 bsh
160 1.1 bsh /*
161 1.1 bsh * The range 0xc1000000 - 0xccffffff is available for kernel VM space
162 1.1 bsh * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
163 1.1 bsh */
164 1.1 bsh #define KERNEL_VM_SIZE 0x0C000000
165 1.1 bsh
166 1.1 bsh
167 1.1 bsh /*
168 1.1 bsh * Address to call from cpu_reset() to reset the machine.
169 1.1 bsh * This is machine architecture dependant as it varies depending
170 1.1 bsh * on where the ROM appears when you turn the MMU off.
171 1.1 bsh */
172 1.1 bsh
173 1.1 bsh u_int cpu_reset_address = 0;
174 1.1 bsh
175 1.1 bsh /* Define various stack sizes in pages */
176 1.1 bsh #define IRQ_STACK_SIZE 1
177 1.1 bsh #define ABT_STACK_SIZE 1
178 1.1 bsh #define UND_STACK_SIZE 1
179 1.1 bsh
180 1.1 bsh BootConfig bootconfig; /* Boot config storage */
181 1.1 bsh char *boot_args = NULL;
182 1.1 bsh char *boot_file = NULL;
183 1.1 bsh
184 1.1 bsh vm_offset_t physical_start;
185 1.1 bsh vm_offset_t physical_freestart;
186 1.1 bsh vm_offset_t physical_freeend;
187 1.1 bsh vm_offset_t physical_end;
188 1.1 bsh u_int free_pages;
189 1.1 bsh vm_offset_t pagetables_start;
190 1.1 bsh
191 1.1 bsh /*int debug_flags;*/
192 1.1 bsh #ifndef PMAP_STATIC_L1S
193 1.1 bsh int max_processes = 64; /* Default number */
194 1.1 bsh #endif /* !PMAP_STATIC_L1S */
195 1.1 bsh
196 1.1 bsh /* Physical and virtual addresses for some global pages */
197 1.1 bsh pv_addr_t irqstack;
198 1.1 bsh pv_addr_t undstack;
199 1.1 bsh pv_addr_t abtstack;
200 1.1 bsh pv_addr_t kernelstack;
201 1.1 bsh pv_addr_t minidataclean;
202 1.1 bsh
203 1.1 bsh vm_offset_t msgbufphys;
204 1.1 bsh
205 1.1 bsh extern u_int data_abort_handler_address;
206 1.1 bsh extern u_int prefetch_abort_handler_address;
207 1.1 bsh extern u_int undefined_handler_address;
208 1.1 bsh
209 1.1 bsh #ifdef PMAP_DEBUG
210 1.1 bsh extern int pmap_debug_level;
211 1.1 bsh #endif
212 1.1 bsh
213 1.1 bsh #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
214 1.1 bsh #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
215 1.1 bsh #define KERNEL_PT_KERNEL_NUM 4
216 1.1 bsh #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM)
217 1.1 bsh /* Page tables for mapping kernel VM */
218 1.1 bsh #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
219 1.1 bsh #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
220 1.1 bsh
221 1.1 bsh pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
222 1.1 bsh
223 1.1 bsh /* Prototypes */
224 1.1 bsh
225 1.1 bsh #if 0
226 1.1 bsh void process_kernel_args(char *);
227 1.1 bsh #endif
228 1.1 bsh
229 1.1 bsh void consinit(void);
230 1.1 bsh void kgdb_port_init(void);
231 1.1 bsh void change_clock(uint32_t v);
232 1.1 bsh
233 1.1 bsh bs_protos(bs_notimpl);
234 1.1 bsh
235 1.1 bsh #include "com.h"
236 1.1 bsh #if NCOM > 0
237 1.1 bsh #include <dev/ic/comreg.h>
238 1.1 bsh #include <dev/ic/comvar.h>
239 1.1 bsh #endif
240 1.1 bsh
241 1.1 bsh #ifndef CONSPEED
242 1.1 bsh #define CONSPEED B115200 /* What RedBoot uses */
243 1.1 bsh #endif
244 1.1 bsh #ifndef CONMODE
245 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
246 1.1 bsh #endif
247 1.1 bsh
248 1.1 bsh int comcnspeed = CONSPEED;
249 1.1 bsh int comcnmode = CONMODE;
250 1.1 bsh
251 1.11 kiyohara static struct pxa2x0_gpioconf boarddep_gpioconf[] = {
252 1.11 kiyohara { 44, GPIO_ALT_FN_1_IN }, /* BTCST */
253 1.11 kiyohara { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */
254 1.11 kiyohara
255 1.11 kiyohara { -1 }
256 1.11 kiyohara };
257 1.11 kiyohara static struct pxa2x0_gpioconf *g42xxeb_gpioconf[] = {
258 1.11 kiyohara pxa25x_com_btuart_gpioconf,
259 1.11 kiyohara pxa25x_com_ffuart_gpioconf,
260 1.11 kiyohara #if 0
261 1.11 kiyohara pxa25x_com_stuart_gpioconf,
262 1.11 kiyohara pxa25x_pxaacu_gpioconf,
263 1.11 kiyohara #endif
264 1.11 kiyohara boarddep_gpioconf,
265 1.11 kiyohara NULL
266 1.11 kiyohara };
267 1.11 kiyohara
268 1.1 bsh /*
269 1.1 bsh * void cpu_reboot(int howto, char *bootstr)
270 1.1 bsh *
271 1.1 bsh * Reboots the system
272 1.1 bsh *
273 1.1 bsh * Deal with any syncing, unmounting, dumping and shutdown hooks,
274 1.1 bsh * then reset the CPU.
275 1.1 bsh */
276 1.1 bsh void
277 1.1 bsh cpu_reboot(int howto, char *bootstr)
278 1.1 bsh {
279 1.1 bsh #ifdef DIAGNOSTIC
280 1.1 bsh /* info */
281 1.1 bsh printf("boot: howto=%08x curproc=%p\n", howto, curproc);
282 1.1 bsh #endif
283 1.1 bsh
284 1.1 bsh /*
285 1.1 bsh * If we are still cold then hit the air brakes
286 1.1 bsh * and crash to earth fast
287 1.1 bsh */
288 1.1 bsh if (cold) {
289 1.1 bsh doshutdownhooks();
290 1.15 dyoung pmf_system_shutdown(boothowto);
291 1.1 bsh printf("The operating system has halted.\n");
292 1.1 bsh printf("Please press any key to reboot.\n\n");
293 1.1 bsh cngetc();
294 1.1 bsh printf("rebooting...\n");
295 1.1 bsh cpu_reset();
296 1.1 bsh /*NOTREACHED*/
297 1.1 bsh }
298 1.1 bsh
299 1.1 bsh /* Disable console buffering */
300 1.1 bsh /* cnpollc(1);*/
301 1.1 bsh
302 1.1 bsh /*
303 1.1 bsh * If RB_NOSYNC was not specified sync the discs.
304 1.1 bsh * Note: Unless cold is set to 1 here, syslogd will die during the
305 1.1 bsh * unmount. It looks like syslogd is getting woken up only to find
306 1.1 bsh * that it cannot page part of the binary in as the filesystem has
307 1.1 bsh * been unmounted.
308 1.1 bsh */
309 1.1 bsh if (!(howto & RB_NOSYNC))
310 1.1 bsh bootsync();
311 1.1 bsh
312 1.1 bsh /* Say NO to interrupts */
313 1.1 bsh splhigh();
314 1.1 bsh
315 1.1 bsh /* Do a dump if requested. */
316 1.1 bsh if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
317 1.1 bsh dumpsys();
318 1.1 bsh
319 1.1 bsh /* Run any shutdown hooks */
320 1.1 bsh doshutdownhooks();
321 1.1 bsh
322 1.15 dyoung pmf_system_shutdown(boothowto);
323 1.15 dyoung
324 1.1 bsh /* Make sure IRQ's are disabled */
325 1.1 bsh IRQdisable;
326 1.1 bsh
327 1.1 bsh if (howto & RB_HALT) {
328 1.1 bsh printf("The operating system has halted.\n");
329 1.1 bsh printf("Please press any key to reboot.\n\n");
330 1.1 bsh cngetc();
331 1.1 bsh }
332 1.1 bsh
333 1.1 bsh printf("rebooting...\n");
334 1.1 bsh cpu_reset();
335 1.1 bsh /*NOTREACHED*/
336 1.1 bsh }
337 1.1 bsh
338 1.6 perry static inline
339 1.1 bsh pd_entry_t *
340 1.1 bsh read_ttb(void)
341 1.1 bsh {
342 1.1 bsh long ttb;
343 1.1 bsh
344 1.6 perry __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r" (ttb));
345 1.1 bsh
346 1.1 bsh
347 1.1 bsh return (pd_entry_t *)(ttb & ~((1<<14)-1));
348 1.1 bsh }
349 1.1 bsh
350 1.1 bsh /*
351 1.2 bsh * Static device mappings. These peripheral registers are mapped at
352 1.2 bsh * fixed virtual addresses very early in initarm() so that we can use
353 1.2 bsh * them while booting the kernel, and stay at the same address
354 1.2 bsh * throughout whole kernel's life time.
355 1.2 bsh *
356 1.2 bsh * We use this table twice; once with bootstrap page table, and once
357 1.2 bsh * with kernel's page table which we build up in initarm().
358 1.2 bsh *
359 1.2 bsh * Since we map these registers into the bootstrap page table using
360 1.2 bsh * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
361 1.2 bsh * registers segment-aligned and segment-rounded in order to avoid
362 1.2 bsh * using the 2nd page tables.
363 1.1 bsh */
364 1.2 bsh
365 1.2 bsh #define _A(a) ((a) & ~L1_S_OFFSET)
366 1.2 bsh #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
367 1.2 bsh
368 1.2 bsh static const struct pmap_devmap g42xxeb_devmap[] = {
369 1.1 bsh {
370 1.1 bsh G42XXEB_PLDREG_VBASE,
371 1.2 bsh _A(G42XXEB_PLDREG_BASE),
372 1.2 bsh _S(G42XXEB_PLDREG_SIZE),
373 1.2 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
374 1.1 bsh },
375 1.1 bsh {
376 1.1 bsh G42XXEB_GPIO_VBASE,
377 1.2 bsh _A(PXA2X0_GPIO_BASE),
378 1.4 bsh _S(PXA250_GPIO_SIZE),
379 1.2 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
380 1.1 bsh },
381 1.1 bsh {
382 1.1 bsh G42XXEB_CLKMAN_VBASE,
383 1.2 bsh _A(PXA2X0_CLKMAN_BASE),
384 1.2 bsh _S(PXA2X0_CLKMAN_SIZE),
385 1.2 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
386 1.1 bsh },
387 1.1 bsh {
388 1.1 bsh G42XXEB_INTCTL_VBASE,
389 1.2 bsh _A(PXA2X0_INTCTL_BASE),
390 1.2 bsh _S(PXA2X0_INTCTL_SIZE),
391 1.2 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
392 1.2 bsh },
393 1.2 bsh {
394 1.2 bsh G42XXEB_FFUART_VBASE,
395 1.2 bsh _A(PXA2X0_FFUART_BASE),
396 1.2 bsh _S(4 * COM_NPORTS),
397 1.2 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
398 1.2 bsh },
399 1.2 bsh {
400 1.2 bsh G42XXEB_BTUART_VBASE,
401 1.2 bsh _A(PXA2X0_BTUART_BASE),
402 1.2 bsh _S(4 * COM_NPORTS),
403 1.2 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
404 1.1 bsh },
405 1.1 bsh {0, 0, 0, 0,}
406 1.1 bsh };
407 1.1 bsh
408 1.2 bsh #undef _A
409 1.2 bsh #undef _S
410 1.1 bsh
411 1.1 bsh
412 1.1 bsh /*
413 1.1 bsh * u_int initarm(...)
414 1.1 bsh *
415 1.1 bsh * Initial entry point on startup. This gets called before main() is
416 1.1 bsh * entered.
417 1.1 bsh * It should be responsible for setting up everything that must be
418 1.1 bsh * in place when main is called.
419 1.1 bsh * This includes
420 1.1 bsh * Taking a copy of the boot configuration structure.
421 1.1 bsh * Initialising the physical console so characters can be printed.
422 1.1 bsh * Setting up page tables for the kernel
423 1.1 bsh * Relocating the kernel to the bottom of physical memory
424 1.1 bsh */
425 1.1 bsh u_int
426 1.1 bsh initarm(void *arg)
427 1.1 bsh {
428 1.1 bsh extern vaddr_t xscale_cache_clean_addr;
429 1.1 bsh int loop;
430 1.1 bsh int loop1;
431 1.1 bsh u_int l1pagetable;
432 1.1 bsh paddr_t memstart;
433 1.1 bsh psize_t memsize;
434 1.1 bsh int led_data = 1;
435 1.1 bsh #ifdef DIAGNOSTIC
436 1.1 bsh extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
437 1.1 bsh #endif
438 1.1 bsh
439 1.1 bsh #define LEDSTEP_P() ioreg8_write(G42XXEB_PLDREG_BASE+G42XXEB_LED, led_data++)
440 1.1 bsh #define LEDSTEP() pldreg8_write(G42XXEB_LED, led_data++);
441 1.1 bsh
442 1.1 bsh /* use physical address until pagetable is set */
443 1.1 bsh LEDSTEP_P();
444 1.1 bsh
445 1.2 bsh /* map some peripheral registers at static I/O area */
446 1.2 bsh pmap_devmap_bootstrap((vaddr_t)read_ttb(), g42xxeb_devmap);
447 1.2 bsh
448 1.2 bsh LEDSTEP_P();
449 1.2 bsh
450 1.7 lukem /* start 32.768 kHz OSC */
451 1.2 bsh ioreg_write(G42XXEB_CLKMAN_VBASE + 0x08, 2);
452 1.2 bsh /* Get ready for splfoo() */
453 1.2 bsh pxa2x0_intr_bootstrap(G42XXEB_INTCTL_VBASE);
454 1.2 bsh
455 1.2 bsh LEDSTEP();
456 1.1 bsh
457 1.1 bsh /*
458 1.1 bsh * Heads up ... Setup the CPU / MMU / TLB functions
459 1.1 bsh */
460 1.1 bsh if (set_cpufuncs())
461 1.1 bsh panic("cpu not recognized!");
462 1.1 bsh
463 1.2 bsh LEDSTEP();
464 1.1 bsh
465 1.1 bsh /*
466 1.1 bsh * Okay, RedBoot has provided us with the following memory map:
467 1.1 bsh *
468 1.1 bsh * Physical Address Range Description
469 1.1 bsh * ----------------------- ----------------------------------
470 1.1 bsh * 0x00000000 - 0x01ffffff flash Memory (32MB)
471 1.1 bsh * 0x04000000 - 0x05ffffff Application flash Memory (32MB)
472 1.1 bsh * 0x08000000 - 0x080000ff I/O baseboard registers
473 1.1 bsh * 0x0c000000 - 0x0c0fffff Ethernet Controller
474 1.1 bsh * 0x14000000 - 0x17ffffff Expansion Card (64MB)
475 1.1 bsh * 0x40000000 - 0x480fffff Processor Registers
476 1.1 bsh * 0xa0000000 - 0xa3ffffff SDRAM Bank 0 (64MB)
477 1.1 bsh *
478 1.1 bsh *
479 1.1 bsh * Virtual Address Range X C B Description
480 1.1 bsh * ----------------------- - - - ----------------------------------
481 1.1 bsh * 0x00000000 - 0x00003fff N Y Y SDRAM
482 1.1 bsh * 0x00004000 - 0x01ffffff N Y N ROM
483 1.1 bsh * 0x08000000 - 0x080fffff N N N I/O baseboard registers
484 1.1 bsh * 0x0a000000 - 0x0a0fffff N N N SRAM
485 1.1 bsh * 0x40000000 - 0x480fffff N N N Processor Registers
486 1.1 bsh * 0xa0000000 - 0xa000ffff N Y N RedBoot SDRAM
487 1.1 bsh * 0xa0017000 - 0xa3ffffff Y Y Y SDRAM
488 1.1 bsh * 0xc0000000 - 0xcfffffff Y Y Y Cache Flush Region
489 1.1 bsh * (done by this routine)
490 1.1 bsh * 0xfd000000 - 0xfd0000ff N N N I/O baseboard registers
491 1.2 bsh * 0xfd100000 - 0xfd3fffff N N N Processor Registers.
492 1.2 bsh * 0xfd400000 - 0xfd4fffff N N N FF-UART
493 1.2 bsh * 0xfd500000 - 0xfd5fffff N N N BT-UART
494 1.1 bsh *
495 1.3 bsh * RedBoot's first level page table is at 0xa0004000. There
496 1.3 bsh * are also 2 second-level tables at 0xa0008000 and
497 1.3 bsh * 0xa0008400. We will continue to use them until we switch to
498 1.3 bsh * our pagetable by setttb().
499 1.1 bsh */
500 1.1 bsh
501 1.1 bsh cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
502 1.1 bsh
503 1.1 bsh LEDSTEP();
504 1.1 bsh
505 1.1 bsh /* setup GPIO for BTUART, in case bootloader doesn't take care of it */
506 1.1 bsh pxa2x0_gpio_bootstrap(G42XXEB_GPIO_VBASE);
507 1.11 kiyohara pxa2x0_gpio_config(g42xxeb_gpioconf);
508 1.1 bsh
509 1.1 bsh LEDSTEP();
510 1.1 bsh
511 1.1 bsh consinit();
512 1.1 bsh #ifdef KGDB
513 1.1 bsh LEDSTEP();
514 1.1 bsh kgdb_port_init();
515 1.1 bsh #endif
516 1.1 bsh
517 1.1 bsh LEDSTEP();
518 1.1 bsh
519 1.1 bsh /* Talk to the user */
520 1.1 bsh printf("\nNetBSD/evbarm (g42xxeb) booting ...\n");
521 1.1 bsh
522 1.1 bsh #if 0
523 1.1 bsh /*
524 1.1 bsh * Examine the boot args string for options we need to know about
525 1.1 bsh * now.
526 1.1 bsh */
527 1.1 bsh process_kernel_args((char *)nwbootinfo.bt_args);
528 1.1 bsh #endif
529 1.1 bsh
530 1.1 bsh memstart = 0xa0000000;
531 1.1 bsh memsize = 0x04000000; /* 64MB */
532 1.1 bsh
533 1.1 bsh printf("initarm: Configuring system ...\n");
534 1.1 bsh
535 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */
536 1.10 wiz /* XXX must make the memory description h/w independent */
537 1.1 bsh bootconfig.dramblocks = 1;
538 1.1 bsh bootconfig.dram[0].address = memstart;
539 1.1 bsh bootconfig.dram[0].pages = memsize / PAGE_SIZE;
540 1.1 bsh
541 1.1 bsh /*
542 1.1 bsh * Set up the variables that define the availablilty of
543 1.1 bsh * physical memory. For now, we're going to set
544 1.1 bsh * physical_freestart to 0xa0200000 (where the kernel
545 1.1 bsh * was loaded), and allocate the memory we need downwards.
546 1.1 bsh * If we get too close to the L1 table that we set up, we
547 1.1 bsh * will panic. We will update physical_freestart and
548 1.1 bsh * physical_freeend later to reflect what pmap_bootstrap()
549 1.1 bsh * wants to see.
550 1.1 bsh *
551 1.1 bsh * XXX pmap_bootstrap() needs an enema.
552 1.1 bsh */
553 1.1 bsh physical_start = bootconfig.dram[0].address;
554 1.1 bsh physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
555 1.1 bsh
556 1.1 bsh physical_freestart = 0xa0009000UL;
557 1.1 bsh physical_freeend = 0xa0200000UL;
558 1.1 bsh
559 1.1 bsh physmem = (physical_end - physical_start) / PAGE_SIZE;
560 1.1 bsh
561 1.1 bsh #ifdef VERBOSE_INIT_ARM
562 1.1 bsh /* Tell the user about the memory */
563 1.1 bsh printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
564 1.1 bsh physical_start, physical_end - 1);
565 1.1 bsh #endif
566 1.1 bsh
567 1.1 bsh /*
568 1.1 bsh * Okay, the kernel starts 2MB in from the bottom of physical
569 1.1 bsh * memory. We are going to allocate our bootstrap pages downwards
570 1.1 bsh * from there.
571 1.1 bsh *
572 1.1 bsh * We need to allocate some fixed page tables to get the kernel
573 1.1 bsh * going. We allocate one page directory and a number of page
574 1.1 bsh * tables and store the physical addresses in the kernel_pt_table
575 1.1 bsh * array.
576 1.1 bsh *
577 1.1 bsh * The kernel page directory must be on a 16K boundary. The page
578 1.1 bsh * tables must be on 4K bounaries. What we do is allocate the
579 1.1 bsh * page directory on the first 16K boundary that we encounter, and
580 1.1 bsh * the page tables on 4K boundaries otherwise. Since we allocate
581 1.1 bsh * at least 3 L2 page tables, we are guaranteed to encounter at
582 1.1 bsh * least one 16K aligned region.
583 1.1 bsh */
584 1.1 bsh
585 1.1 bsh #ifdef VERBOSE_INIT_ARM
586 1.1 bsh printf("Allocating page tables\n");
587 1.1 bsh #endif
588 1.1 bsh
589 1.1 bsh free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
590 1.1 bsh
591 1.1 bsh #ifdef VERBOSE_INIT_ARM
592 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
593 1.1 bsh physical_freestart, free_pages, free_pages);
594 1.1 bsh #endif
595 1.1 bsh
596 1.1 bsh /* Define a macro to simplify memory allocation */
597 1.1 bsh #define valloc_pages(var, np) \
598 1.1 bsh alloc_pages((var).pv_pa, (np)); \
599 1.1 bsh (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
600 1.1 bsh
601 1.1 bsh #define alloc_pages(var, np) \
602 1.1 bsh physical_freeend -= ((np) * PAGE_SIZE); \
603 1.1 bsh if (physical_freeend < physical_freestart) \
604 1.1 bsh panic("initarm: out of memory"); \
605 1.1 bsh (var) = physical_freeend; \
606 1.1 bsh free_pages -= (np); \
607 1.1 bsh memset((char *)(var), 0, ((np) * PAGE_SIZE));
608 1.1 bsh
609 1.1 bsh loop1 = 0;
610 1.1 bsh for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
611 1.1 bsh /* Are we 16KB aligned for an L1 ? */
612 1.1 bsh if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
613 1.1 bsh && kernel_l1pt.pv_pa == 0) {
614 1.1 bsh valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
615 1.1 bsh } else {
616 1.1 bsh valloc_pages(kernel_pt_table[loop1],
617 1.1 bsh L2_TABLE_SIZE / PAGE_SIZE);
618 1.1 bsh ++loop1;
619 1.1 bsh }
620 1.1 bsh }
621 1.1 bsh
622 1.1 bsh /* This should never be able to happen but better confirm that. */
623 1.1 bsh if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
624 1.1 bsh panic("initarm: Failed to align the kernel page directory");
625 1.1 bsh
626 1.1 bsh LEDSTEP();
627 1.1 bsh
628 1.1 bsh /*
629 1.1 bsh * Allocate a page for the system page mapped to V0x00000000
630 1.1 bsh * This page will just contain the system vectors and can be
631 1.1 bsh * shared by all processes.
632 1.1 bsh */
633 1.1 bsh alloc_pages(systempage.pv_pa, 1);
634 1.1 bsh
635 1.1 bsh /* Allocate stacks for all modes */
636 1.1 bsh valloc_pages(irqstack, IRQ_STACK_SIZE);
637 1.1 bsh valloc_pages(abtstack, ABT_STACK_SIZE);
638 1.1 bsh valloc_pages(undstack, UND_STACK_SIZE);
639 1.1 bsh valloc_pages(kernelstack, UPAGES);
640 1.1 bsh
641 1.1 bsh /* Allocate enough pages for cleaning the Mini-Data cache. */
642 1.1 bsh KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
643 1.1 bsh valloc_pages(minidataclean, 1);
644 1.1 bsh
645 1.1 bsh #ifdef VERBOSE_INIT_ARM
646 1.1 bsh printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
647 1.1 bsh irqstack.pv_va);
648 1.1 bsh printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
649 1.1 bsh abtstack.pv_va);
650 1.1 bsh printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
651 1.1 bsh undstack.pv_va);
652 1.1 bsh printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
653 1.1 bsh kernelstack.pv_va);
654 1.1 bsh #endif
655 1.1 bsh
656 1.1 bsh /*
657 1.1 bsh * XXX Defer this to later so that we can reclaim the memory
658 1.1 bsh * XXX used by the RedBoot page tables.
659 1.1 bsh */
660 1.1 bsh alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
661 1.1 bsh
662 1.1 bsh /*
663 1.1 bsh * Ok we have allocated physical pages for the primary kernel
664 1.1 bsh * page tables
665 1.1 bsh */
666 1.1 bsh
667 1.1 bsh #ifdef VERBOSE_INIT_ARM
668 1.1 bsh printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
669 1.1 bsh #endif
670 1.1 bsh
671 1.1 bsh /*
672 1.1 bsh * Now we start construction of the L1 page table
673 1.1 bsh * We start by mapping the L2 page tables into the L1.
674 1.1 bsh * This means that we can replace L1 mappings later on if necessary
675 1.1 bsh */
676 1.1 bsh l1pagetable = kernel_l1pt.pv_pa;
677 1.1 bsh
678 1.1 bsh /* Map the L2 pages tables in the L1 page table */
679 1.1 bsh pmap_link_l2pt(l1pagetable, 0x00000000,
680 1.1 bsh &kernel_pt_table[KERNEL_PT_SYS]);
681 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
682 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
683 1.1 bsh &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
684 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
685 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
686 1.1 bsh &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
687 1.1 bsh
688 1.1 bsh /* update the top of the kernel VM */
689 1.1 bsh pmap_curmaxkvaddr =
690 1.1 bsh KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
691 1.1 bsh
692 1.1 bsh #ifdef VERBOSE_INIT_ARM
693 1.1 bsh printf("Mapping kernel\n");
694 1.1 bsh #endif
695 1.1 bsh
696 1.1 bsh /* Now we fill in the L2 pagetable for the kernel static code/data */
697 1.1 bsh {
698 1.1 bsh extern char etext[], _end[];
699 1.1 bsh size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
700 1.1 bsh size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
701 1.1 bsh u_int logical;
702 1.1 bsh
703 1.1 bsh textsize = (textsize + PGOFSET) & ~PGOFSET;
704 1.1 bsh totalsize = (totalsize + PGOFSET) & ~PGOFSET;
705 1.1 bsh
706 1.1 bsh logical = 0x00200000; /* offset of kernel in RAM */
707 1.1 bsh
708 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
709 1.1 bsh physical_start + logical, textsize,
710 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
711 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
712 1.1 bsh physical_start + logical, totalsize - textsize,
713 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
714 1.1 bsh }
715 1.1 bsh
716 1.1 bsh #ifdef VERBOSE_INIT_ARM
717 1.1 bsh printf("Constructing L2 page tables\n");
718 1.1 bsh #endif
719 1.1 bsh
720 1.1 bsh /* Map the stack pages */
721 1.1 bsh pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
722 1.1 bsh IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
723 1.1 bsh pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
724 1.1 bsh ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
725 1.1 bsh pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
726 1.1 bsh UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
727 1.1 bsh pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
728 1.1 bsh UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
729 1.1 bsh
730 1.1 bsh pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
731 1.1 bsh L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
732 1.1 bsh
733 1.1 bsh for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
734 1.1 bsh pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
735 1.1 bsh kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
736 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
737 1.1 bsh }
738 1.1 bsh
739 1.1 bsh /* Map the Mini-Data cache clean area. */
740 1.1 bsh xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
741 1.1 bsh minidataclean.pv_pa);
742 1.1 bsh
743 1.1 bsh /* Map the vector page. */
744 1.1 bsh #if 1
745 1.1 bsh /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
746 1.1 bsh * cache-clean code there. */
747 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
748 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
749 1.1 bsh #else
750 1.1 bsh pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
751 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
752 1.1 bsh #endif
753 1.1 bsh
754 1.1 bsh /*
755 1.1 bsh * map integrated peripherals at same address in l1pagetable
756 1.1 bsh * so that we can continue to use console.
757 1.1 bsh */
758 1.2 bsh pmap_devmap_bootstrap(l1pagetable, g42xxeb_devmap);
759 1.1 bsh
760 1.1 bsh /*
761 1.1 bsh * Give the XScale global cache clean code an appropriately
762 1.1 bsh * sized chunk of unmapped VA space starting at 0xff000000
763 1.1 bsh * (our device mappings end before this address).
764 1.1 bsh */
765 1.1 bsh xscale_cache_clean_addr = 0xff000000U;
766 1.1 bsh
767 1.1 bsh /*
768 1.1 bsh * Now we have the real page tables in place so we can switch to them.
769 1.1 bsh * Once this is done we will be running with the REAL kernel page
770 1.1 bsh * tables.
771 1.1 bsh */
772 1.1 bsh
773 1.1 bsh /*
774 1.1 bsh * Update the physical_freestart/physical_freeend/free_pages
775 1.1 bsh * variables.
776 1.1 bsh */
777 1.1 bsh {
778 1.1 bsh extern char _end[];
779 1.1 bsh
780 1.1 bsh physical_freestart = physical_start +
781 1.1 bsh (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
782 1.1 bsh KERNEL_BASE);
783 1.1 bsh physical_freeend = physical_end;
784 1.1 bsh free_pages =
785 1.1 bsh (physical_freeend - physical_freestart) / PAGE_SIZE;
786 1.1 bsh }
787 1.1 bsh
788 1.1 bsh /* Switch tables */
789 1.1 bsh #ifdef VERBOSE_INIT_ARM
790 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
791 1.1 bsh physical_freestart, free_pages, free_pages);
792 1.1 bsh printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
793 1.1 bsh #endif
794 1.1 bsh LEDSTEP();
795 1.1 bsh
796 1.1 bsh setttb(kernel_l1pt.pv_pa);
797 1.1 bsh cpu_tlb_flushID();
798 1.1 bsh cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
799 1.1 bsh LEDSTEP();
800 1.1 bsh
801 1.1 bsh /*
802 1.1 bsh * Moved from cpu_startup() as data_abort_handler() references
803 1.1 bsh * this during uvm init
804 1.1 bsh */
805 1.18 rmind uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
806 1.1 bsh
807 1.1 bsh #ifdef VERBOSE_INIT_ARM
808 1.1 bsh printf("bootstrap done.\n");
809 1.1 bsh #endif
810 1.1 bsh
811 1.1 bsh arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
812 1.1 bsh
813 1.1 bsh /*
814 1.1 bsh * Pages were allocated during the secondary bootstrap for the
815 1.1 bsh * stacks for different CPU modes.
816 1.1 bsh * We must now set the r13 registers in the different CPU modes to
817 1.1 bsh * point to these stacks.
818 1.1 bsh * Since the ARM stacks use STMFD etc. we must set r13 to the top end
819 1.1 bsh * of the stack memory.
820 1.1 bsh */
821 1.2 bsh #ifdef VERBOSE_INIT_ARM
822 1.1 bsh printf("init subsystems: stacks ");
823 1.2 bsh #endif
824 1.1 bsh
825 1.1 bsh set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
826 1.1 bsh set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
827 1.1 bsh set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
828 1.1 bsh
829 1.1 bsh /*
830 1.1 bsh * Well we should set a data abort handler.
831 1.1 bsh * Once things get going this will change as we will need a proper
832 1.1 bsh * handler.
833 1.1 bsh * Until then we will use a handler that just panics but tells us
834 1.1 bsh * why.
835 1.1 bsh * Initialisation of the vectors will just panic on a data abort.
836 1.1 bsh * This just fills in a slighly better one.
837 1.1 bsh */
838 1.2 bsh #ifdef VERBOSE_INIT_ARM
839 1.1 bsh printf("vectors ");
840 1.2 bsh #endif
841 1.1 bsh data_abort_handler_address = (u_int)data_abort_handler;
842 1.1 bsh prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
843 1.1 bsh undefined_handler_address = (u_int)undefinedinstruction_bounce;
844 1.1 bsh
845 1.1 bsh /* Initialise the undefined instruction handlers */
846 1.2 bsh #ifdef VERBOSE_INIT_ARM
847 1.1 bsh printf("undefined ");
848 1.2 bsh #endif
849 1.1 bsh undefined_init();
850 1.1 bsh
851 1.1 bsh /* Load memory into UVM. */
852 1.2 bsh #ifdef VERBOSE_INIT_ARM
853 1.1 bsh printf("page ");
854 1.2 bsh #endif
855 1.1 bsh uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
856 1.1 bsh uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
857 1.1 bsh atop(physical_freestart), atop(physical_freeend),
858 1.1 bsh VM_FREELIST_DEFAULT);
859 1.1 bsh
860 1.1 bsh /* Boot strap pmap telling it where the kernel page table is */
861 1.2 bsh #ifdef VERBOSE_INIT_ARM
862 1.1 bsh printf("pmap ");
863 1.2 bsh #endif
864 1.1 bsh LEDSTEP();
865 1.14 matt pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
866 1.1 bsh LEDSTEP();
867 1.1 bsh
868 1.1 bsh #ifdef __HAVE_MEMORY_DISK__
869 1.1 bsh md_root_setconf(memory_disk, sizeof memory_disk);
870 1.1 bsh #endif
871 1.1 bsh
872 1.1 bsh #ifdef BOOTHOWTO
873 1.1 bsh boothowto |= BOOTHOWTO;
874 1.1 bsh #endif
875 1.1 bsh
876 1.1 bsh {
877 1.1 bsh uint8_t sw = pldreg8_read(G42XXEB_DIPSW);
878 1.1 bsh
879 1.1 bsh if (0 == (sw & (1<<0)))
880 1.1 bsh boothowto ^= RB_KDB;
881 1.1 bsh if (0 == (sw & (1<<1)))
882 1.1 bsh boothowto ^= RB_SINGLE;
883 1.1 bsh }
884 1.1 bsh
885 1.1 bsh LEDSTEP();
886 1.1 bsh
887 1.1 bsh #ifdef KGDB
888 1.1 bsh if (boothowto & RB_KDB) {
889 1.1 bsh kgdb_debug_init = 1;
890 1.1 bsh kgdb_connect(1);
891 1.1 bsh }
892 1.1 bsh #endif
893 1.1 bsh
894 1.1 bsh #ifdef DDB
895 1.1 bsh db_machine_init();
896 1.1 bsh
897 1.1 bsh /* Firmware doesn't load symbols. */
898 1.1 bsh ddb_init(0, NULL, NULL);
899 1.1 bsh
900 1.1 bsh if (boothowto & RB_KDB)
901 1.1 bsh Debugger();
902 1.1 bsh #endif
903 1.1 bsh
904 1.1 bsh pldreg8_write(G42XXEB_LED, 0);
905 1.1 bsh
906 1.1 bsh /* We return the new stack pointer address */
907 1.1 bsh return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
908 1.1 bsh }
909 1.1 bsh
910 1.1 bsh #if 0
911 1.1 bsh void
912 1.1 bsh process_kernel_args(char *args)
913 1.1 bsh {
914 1.1 bsh
915 1.1 bsh boothowto = 0;
916 1.1 bsh
917 1.1 bsh /* Make a local copy of the bootargs */
918 1.1 bsh strncpy(bootargs, args, MAX_BOOT_STRING);
919 1.1 bsh
920 1.1 bsh args = bootargs;
921 1.1 bsh boot_file = bootargs;
922 1.1 bsh
923 1.1 bsh /* Skip the kernel image filename */
924 1.1 bsh while (*args != ' ' && *args != 0)
925 1.1 bsh ++args;
926 1.1 bsh
927 1.1 bsh if (*args != 0)
928 1.1 bsh *args++ = 0;
929 1.1 bsh
930 1.1 bsh while (*args == ' ')
931 1.1 bsh ++args;
932 1.1 bsh
933 1.1 bsh boot_args = args;
934 1.1 bsh
935 1.1 bsh printf("bootfile: %s\n", boot_file);
936 1.1 bsh printf("bootargs: %s\n", boot_args);
937 1.1 bsh
938 1.1 bsh parse_mi_bootargs(boot_args);
939 1.1 bsh }
940 1.1 bsh #endif
941 1.1 bsh
942 1.1 bsh #ifdef KGDB
943 1.1 bsh #ifndef KGDB_DEVNAME
944 1.1 bsh #define KGDB_DEVNAME "ffuart"
945 1.1 bsh #endif
946 1.1 bsh const char kgdb_devname[] = KGDB_DEVNAME;
947 1.1 bsh
948 1.1 bsh #if (NCOM > 0)
949 1.1 bsh #ifndef KGDB_DEVMODE
950 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
951 1.1 bsh #endif
952 1.1 bsh int comkgdbmode = KGDB_DEVMODE;
953 1.1 bsh #endif /* NCOM */
954 1.1 bsh
955 1.1 bsh #endif /* KGDB */
956 1.1 bsh
957 1.1 bsh
958 1.1 bsh void
959 1.1 bsh consinit(void)
960 1.1 bsh {
961 1.1 bsh static int consinit_called = 0;
962 1.1 bsh uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN);
963 1.1 bsh #if 0
964 1.1 bsh char *console = CONSDEVNAME;
965 1.1 bsh #endif
966 1.1 bsh
967 1.1 bsh if (consinit_called != 0)
968 1.1 bsh return;
969 1.1 bsh
970 1.1 bsh consinit_called = 1;
971 1.1 bsh
972 1.1 bsh #if NCOM > 0
973 1.1 bsh
974 1.1 bsh #ifdef FFUARTCONSOLE
975 1.1 bsh #ifdef KGDB
976 1.1 bsh if (0 == strcmp(kgdb_devname, "ffuart")){
977 1.1 bsh /* port is reserved for kgdb */
978 1.1 bsh } else
979 1.1 bsh #endif
980 1.1 bsh if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
981 1.1 bsh comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
982 1.1 bsh #if 0
983 1.1 bsh pxa2x0_clkman_config(CKEN_FFUART, 1);
984 1.1 bsh #else
985 1.1 bsh ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN,
986 1.1 bsh ckenreg|CKEN_FFUART);
987 1.1 bsh #endif
988 1.1 bsh
989 1.1 bsh return;
990 1.1 bsh }
991 1.1 bsh #endif /* FFUARTCONSOLE */
992 1.1 bsh
993 1.1 bsh #ifdef BTUARTCONSOLE
994 1.1 bsh #ifdef KGDB
995 1.1 bsh if (0 == strcmp(kgdb_devname, "btuart")) {
996 1.1 bsh /* port is reserved for kgdb */
997 1.1 bsh } else
998 1.1 bsh #endif
999 1.1 bsh if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
1000 1.1 bsh comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
1001 1.1 bsh ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN,
1002 1.1 bsh ckenreg|CKEN_BTUART);
1003 1.1 bsh return;
1004 1.1 bsh }
1005 1.1 bsh #endif /* BTUARTCONSOLE */
1006 1.1 bsh
1007 1.1 bsh
1008 1.1 bsh #endif /* NCOM */
1009 1.1 bsh
1010 1.1 bsh }
1011 1.1 bsh
1012 1.1 bsh #ifdef KGDB
1013 1.1 bsh void
1014 1.1 bsh kgdb_port_init(void)
1015 1.1 bsh {
1016 1.1 bsh #if (NCOM > 0) && defined(COM_PXA2X0)
1017 1.1 bsh paddr_t paddr = 0;
1018 1.1 bsh uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN);
1019 1.1 bsh
1020 1.1 bsh if (0 == strcmp(kgdb_devname, "ffuart")) {
1021 1.1 bsh paddr = PXA2X0_FFUART_BASE;
1022 1.1 bsh ckenreg |= CKEN_FFUART;
1023 1.1 bsh }
1024 1.1 bsh else if (0 == strcmp(kgdb_devname, "btuart")) {
1025 1.1 bsh paddr = PXA2X0_BTUART_BASE;
1026 1.1 bsh ckenreg |= CKEN_BTUART;
1027 1.1 bsh }
1028 1.1 bsh
1029 1.1 bsh if (paddr &&
1030 1.1 bsh 0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
1031 1.1 bsh kgdb_rate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
1032 1.1 bsh
1033 1.1 bsh ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, ckenreg);
1034 1.1 bsh
1035 1.1 bsh }
1036 1.1 bsh
1037 1.1 bsh #endif
1038 1.1 bsh }
1039 1.1 bsh #endif
1040 1.1 bsh
1041