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g42xxeb_machdep.c revision 1.1
      1 /*	$NetBSD: g42xxeb_machdep.c,v 1.1 2005/02/26 10:49:53 bsh Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2002, 2003, 2004, 2005  Genetec Corporation.
      5  * All rights reserved.
      6  *
      7  * Written by Hiroyuki Bessho for Genetec Corporation.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. The name of Genetec Corporation may not be used to endorse or
     18  *    promote products derived from this software without specific prior
     19  *    written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  *
     33  * Machine dependant functions for kernel setup for Genetec G4250EBX
     34  * evaluation board.
     35  *
     36  * Based on iq80310_machhdep.c
     37  */
     38 /*
     39  * Copyright (c) 2001 Wasabi Systems, Inc.
     40  * All rights reserved.
     41  *
     42  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. Redistributions in binary form must reproduce the above copyright
     50  *    notice, this list of conditions and the following disclaimer in the
     51  *    documentation and/or other materials provided with the distribution.
     52  * 3. All advertising materials mentioning features or use of this software
     53  *    must display the following acknowledgement:
     54  *	This product includes software developed for the NetBSD Project by
     55  *	Wasabi Systems, Inc.
     56  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     57  *    or promote products derived from this software without specific prior
     58  *    written permission.
     59  *
     60  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     62  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     63  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     64  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     65  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     66  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     67  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     68  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     69  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     70  * POSSIBILITY OF SUCH DAMAGE.
     71  */
     72 
     73 /*
     74  * Copyright (c) 1997,1998 Mark Brinicombe.
     75  * Copyright (c) 1997,1998 Causality Limited.
     76  * All rights reserved.
     77  *
     78  * Redistribution and use in source and binary forms, with or without
     79  * modification, are permitted provided that the following conditions
     80  * are met:
     81  * 1. Redistributions of source code must retain the above copyright
     82  *    notice, this list of conditions and the following disclaimer.
     83  * 2. Redistributions in binary form must reproduce the above copyright
     84  *    notice, this list of conditions and the following disclaimer in the
     85  *    documentation and/or other materials provided with the distribution.
     86  * 3. All advertising materials mentioning features or use of this software
     87  *    must display the following acknowledgement:
     88  *	This product includes software developed by Mark Brinicombe
     89  *	for the NetBSD Project.
     90  * 4. The name of the company nor the name of the author may be used to
     91  *    endorse or promote products derived from this software without specific
     92  *    prior written permission.
     93  *
     94  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     95  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     96  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     97  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     98  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     99  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    100  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    101  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    102  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    103  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    104  * SUCH DAMAGE.
    105  *
    106  * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
    107  * boards using RedBoot firmware.
    108  */
    109 
    110 #include "opt_ddb.h"
    111 #include "opt_kgdb.h"
    112 #include "opt_ipkdb.h"
    113 #include "opt_pmap_debug.h"
    114 #include "opt_md.h"
    115 #include "opt_com.h"
    116 #include "md.h"
    117 #include "lcd.h"
    118 
    119 #include <sys/param.h>
    120 #include <sys/device.h>
    121 #include <sys/systm.h>
    122 #include <sys/kernel.h>
    123 #include <sys/exec.h>
    124 #include <sys/proc.h>
    125 #include <sys/msgbuf.h>
    126 #include <sys/reboot.h>
    127 #include <sys/termios.h>
    128 #include <sys/ksyms.h>
    129 
    130 #include <uvm/uvm_extern.h>
    131 
    132 #include <sys/conf.h>
    133 #include <dev/cons.h>
    134 #include <dev/md.h>
    135 
    136 #include <machine/db_machdep.h>
    137 #include <ddb/db_sym.h>
    138 #include <ddb/db_extern.h>
    139 #ifdef KGDB
    140 #include <sys/kgdb.h>
    141 #endif
    142 #ifdef IPKDB
    143 #include <ipkdb/ipkdb.h>		/* for prototypes */
    144 #include <machine/ipkdb.h>
    145 #endif
    146 
    147 #include <machine/bootconfig.h>
    148 #include <machine/bus.h>
    149 #include <machine/cpu.h>
    150 #include <machine/frame.h>
    151 #include <arm/undefined.h>
    152 
    153 #include <arm/arm32/machdep.h>
    154 
    155 #include <arm/xscale/pxa2x0reg.h>
    156 #include <arm/xscale/pxa2x0var.h>
    157 #include <arm/xscale/pxa2x0_gpio.h>
    158 #include <evbarm/g42xxeb/g42xxeb_reg.h>
    159 #include <evbarm/g42xxeb/g42xxeb_var.h>
    160 
    161 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
    162 #define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
    163 #define	KERNEL_VM_BASE		(KERNEL_BASE + 0x01000000)
    164 
    165 /*
    166  * The range 0xc1000000 - 0xccffffff is available for kernel VM space
    167  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    168  */
    169 #define KERNEL_VM_SIZE		0x0C000000
    170 
    171 
    172 /*
    173  * Address to call from cpu_reset() to reset the machine.
    174  * This is machine architecture dependant as it varies depending
    175  * on where the ROM appears when you turn the MMU off.
    176  */
    177 
    178 u_int cpu_reset_address = 0;
    179 
    180 /* Define various stack sizes in pages */
    181 #define IRQ_STACK_SIZE	1
    182 #define ABT_STACK_SIZE	1
    183 #ifdef IPKDB
    184 #define UND_STACK_SIZE	2
    185 #else
    186 #define UND_STACK_SIZE	1
    187 #endif
    188 
    189 BootConfig bootconfig;		/* Boot config storage */
    190 char *boot_args = NULL;
    191 char *boot_file = NULL;
    192 
    193 vm_offset_t physical_start;
    194 vm_offset_t physical_freestart;
    195 vm_offset_t physical_freeend;
    196 vm_offset_t physical_end;
    197 u_int free_pages;
    198 vm_offset_t pagetables_start;
    199 int physmem = 0;
    200 
    201 /*int debug_flags;*/
    202 #ifndef PMAP_STATIC_L1S
    203 int max_processes = 64;			/* Default number */
    204 #endif	/* !PMAP_STATIC_L1S */
    205 
    206 /* Physical and virtual addresses for some global pages */
    207 pv_addr_t systempage;
    208 pv_addr_t irqstack;
    209 pv_addr_t undstack;
    210 pv_addr_t abtstack;
    211 pv_addr_t kernelstack;
    212 pv_addr_t minidataclean;
    213 
    214 vm_offset_t msgbufphys;
    215 
    216 extern u_int data_abort_handler_address;
    217 extern u_int prefetch_abort_handler_address;
    218 extern u_int undefined_handler_address;
    219 
    220 #ifdef PMAP_DEBUG
    221 extern int pmap_debug_level;
    222 #endif
    223 
    224 #define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
    225 #define KERNEL_PT_KERNEL	1	/* Page table for mapping kernel */
    226 #define	KERNEL_PT_KERNEL_NUM	4
    227 #define KERNEL_PT_VMDATA	(KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM)
    228 				        /* Page tables for mapping kernel VM */
    229 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    230 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    231 
    232 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    233 
    234 struct user *proc0paddr;
    235 
    236 /* Prototypes */
    237 
    238 #if 0
    239 void	process_kernel_args(char *);
    240 void	parse_mi_bootargs(char *args);
    241 #endif
    242 
    243 void	consinit(void);
    244 void	kgdb_port_init(void);
    245 void	change_clock(uint32_t v);
    246 
    247 bs_protos(bs_notimpl);
    248 
    249 #include "com.h"
    250 #if NCOM > 0
    251 #include <dev/ic/comreg.h>
    252 #include <dev/ic/comvar.h>
    253 #endif
    254 
    255 #ifndef CONSPEED
    256 #define CONSPEED B115200	/* What RedBoot uses */
    257 #endif
    258 #ifndef CONMODE
    259 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    260 #endif
    261 
    262 int comcnspeed = CONSPEED;
    263 int comcnmode = CONMODE;
    264 
    265 /*
    266  * void cpu_reboot(int howto, char *bootstr)
    267  *
    268  * Reboots the system
    269  *
    270  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    271  * then reset the CPU.
    272  */
    273 void
    274 cpu_reboot(int howto, char *bootstr)
    275 {
    276 #ifdef DIAGNOSTIC
    277 	/* info */
    278 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    279 #endif
    280 
    281 	/*
    282 	 * If we are still cold then hit the air brakes
    283 	 * and crash to earth fast
    284 	 */
    285 	if (cold) {
    286 		doshutdownhooks();
    287 		printf("The operating system has halted.\n");
    288 		printf("Please press any key to reboot.\n\n");
    289 		cngetc();
    290 		printf("rebooting...\n");
    291 		cpu_reset();
    292 		/*NOTREACHED*/
    293 	}
    294 
    295 	/* Disable console buffering */
    296 /*	cnpollc(1);*/
    297 
    298 	/*
    299 	 * If RB_NOSYNC was not specified sync the discs.
    300 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    301 	 * unmount.  It looks like syslogd is getting woken up only to find
    302 	 * that it cannot page part of the binary in as the filesystem has
    303 	 * been unmounted.
    304 	 */
    305 	if (!(howto & RB_NOSYNC))
    306 		bootsync();
    307 
    308 	/* Say NO to interrupts */
    309 	splhigh();
    310 
    311 	/* Do a dump if requested. */
    312 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    313 		dumpsys();
    314 
    315 	/* Run any shutdown hooks */
    316 	doshutdownhooks();
    317 
    318 	/* Make sure IRQ's are disabled */
    319 	IRQdisable;
    320 
    321 	if (howto & RB_HALT) {
    322 		printf("The operating system has halted.\n");
    323 		printf("Please press any key to reboot.\n\n");
    324 		cngetc();
    325 	}
    326 
    327 	printf("rebooting...\n");
    328 	cpu_reset();
    329 	/*NOTREACHED*/
    330 }
    331 
    332 static __inline
    333 pd_entry_t *
    334 read_ttb(void)
    335 {
    336   long ttb;
    337 
    338   __asm __volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
    339 
    340 
    341   return (pd_entry_t *)(ttb & ~((1<<14)-1));
    342 }
    343 
    344 /*
    345  * Mapping table for core kernel memory. These areas are mapped in
    346  * init time at fixed virtual address with section mappings.
    347  */
    348 struct l1_sec_map {
    349 	vaddr_t	va;
    350 	vaddr_t	pa;
    351 	vsize_t	size;
    352 	int flags;
    353 } l1_sec_table[] = {
    354     {
    355 	    G42XXEB_PLDREG_VBASE,
    356 	    G42XXEB_PLDREG_BASE,
    357 	    G42XXEB_PLDREG_SIZE,
    358 	    PTE_NOCACHE,
    359     },
    360     {
    361 	    G42XXEB_GPIO_VBASE,
    362 	    PXA2X0_GPIO_BASE,
    363 	    PXA2X0_GPIO_SIZE,
    364 	    PTE_NOCACHE,
    365     },
    366     {
    367 	    G42XXEB_CLKMAN_VBASE,
    368 	    PXA2X0_CLKMAN_BASE,
    369 	    PXA2X0_CLKMAN_SIZE,
    370 	    PTE_NOCACHE,
    371     },
    372     {
    373 	    G42XXEB_INTCTL_VBASE,
    374 	    PXA2X0_INTCTL_BASE,
    375 	    PXA2X0_INTCTL_SIZE,
    376 	    PTE_NOCACHE,
    377     },
    378     {0, 0, 0, 0,}
    379 };
    380 
    381 static void
    382 map_io_area(paddr_t pagedir)
    383 {
    384 	int loop;
    385 
    386 	/*
    387 	 * Map devices we can map w/ section mappings.
    388 	 */
    389 	loop = 0;
    390 	while (l1_sec_table[loop].size) {
    391 		vm_size_t sz;
    392 
    393 #ifdef VERBOSE_INIT_ARM
    394 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
    395 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
    396 		    l1_sec_table[loop].va);
    397 #endif
    398 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
    399 			pmap_map_section(pagedir, l1_sec_table[loop].va + sz,
    400 			    l1_sec_table[loop].pa + sz,
    401 			    VM_PROT_READ|VM_PROT_WRITE,
    402 			    l1_sec_table[loop].flags);
    403 		++loop;
    404 	}
    405 }
    406 
    407 /*
    408  * simple memory mapping function used in early bootstrap stage
    409  * before pmap is initialized.
    410  * size and cacheability are ignored and map one section with nocache.
    411  */
    412 static vaddr_t section_free = G42XXEB_VBASE_FREE;
    413 
    414 static int
    415 bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
    416     int cacheable, bus_space_handle_t *bshp)
    417 {
    418 	u_long startpa;
    419 	vaddr_t va;
    420 	pd_entry_t *pagedir = read_ttb();
    421 	/* This assumes PA==VA for page directory */
    422 
    423 	va = section_free;
    424 	section_free += L1_S_SIZE;
    425 
    426 	startpa = trunc_page(bpa);
    427 	pmap_map_section((vaddr_t)pagedir, va, startpa,
    428 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    429 	cpu_tlb_flushD();
    430 
    431 	*bshp = (bus_space_handle_t)(va + (bpa - startpa));
    432 
    433 	return(0);
    434 }
    435 
    436 static void
    437 copy_io_area_map(pd_entry_t *new_pd)
    438 {
    439 	pd_entry_t *cur_pd = read_ttb();
    440 	vaddr_t va;
    441 
    442 	for (va = G42XXEB_IO_AREA_VBASE;
    443 	     (cur_pd[va>>L1_S_SHIFT] & L1_TYPE_MASK) == L1_TYPE_S;
    444 	     va += L1_S_SIZE) {
    445 
    446 		new_pd[va>>L1_S_SHIFT] = cur_pd[va>>L1_S_SHIFT];
    447 	}
    448 }
    449 
    450 
    451 
    452 /*
    453  * u_int initarm(...)
    454  *
    455  * Initial entry point on startup. This gets called before main() is
    456  * entered.
    457  * It should be responsible for setting up everything that must be
    458  * in place when main is called.
    459  * This includes
    460  *   Taking a copy of the boot configuration structure.
    461  *   Initialising the physical console so characters can be printed.
    462  *   Setting up page tables for the kernel
    463  *   Relocating the kernel to the bottom of physical memory
    464  */
    465 u_int
    466 initarm(void *arg)
    467 {
    468 	extern vaddr_t xscale_cache_clean_addr;
    469 	int loop;
    470 	int loop1;
    471 	u_int l1pagetable;
    472 	pv_addr_t kernel_l1pt;
    473 	paddr_t memstart;
    474 	psize_t memsize;
    475 	int led_data = 1;
    476 #ifdef DIAGNOSTIC
    477 	extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
    478 #endif
    479 	int	(*map_func_save)(void *, bus_addr_t, bus_size_t, int,
    480 	    bus_space_handle_t *);
    481 
    482 #define LEDSTEP_P() ioreg8_write(G42XXEB_PLDREG_BASE+G42XXEB_LED, led_data++)
    483 #define LEDSTEP() pldreg8_write(G42XXEB_LED, led_data++);
    484 
    485 	/* use physical address until pagetable is set */
    486 	LEDSTEP_P();
    487 
    488 	/* start 32.768KHz OSC */
    489 	ioreg_write(PXA2X0_CLKMAN_BASE + 0x08, 2);
    490 
    491 	/*
    492 	 * Heads up ... Setup the CPU / MMU / TLB functions
    493 	 */
    494 	if (set_cpufuncs())
    495 		panic("cpu not recognized!");
    496 	LEDSTEP_P();
    497 
    498 	/* Get ready for splfoo() */
    499 	pxa2x0_intr_bootstrap(PXA2X0_INTCTL_BASE);
    500 
    501 #if 0
    502 	/* Calibrate the delay loop. */
    503 #endif
    504 
    505 	/*
    506 	 * Okay, RedBoot has provided us with the following memory map:
    507 	 *
    508 	 * Physical Address Range     Description
    509 	 * -----------------------    ----------------------------------
    510 	 * 0x00000000 - 0x01ffffff    flash Memory   (32MB)
    511 	 * 0x04000000 - 0x05ffffff    Application flash Memory  (32MB)
    512 	 * 0x08000000 - 0x080000ff    I/O baseboard registers
    513 	 * 0x0c000000 - 0x0c0fffff    Ethernet Controller
    514 	 * 0x14000000 - 0x17ffffff    Expansion Card (64MB)
    515 	 * 0x40000000 - 0x480fffff    Processor Registers
    516 	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB)
    517 	 *
    518 	 *
    519 	 * Virtual Address Range    X C B  Description
    520 	 * -----------------------  - - -  ----------------------------------
    521 	 * 0x00000000 - 0x00003fff  N Y Y  SDRAM
    522 	 * 0x00004000 - 0x01ffffff  N Y N  ROM
    523 	 * 0x08000000 - 0x080fffff  N N N  I/O baseboard registers
    524 	 * 0x0a000000 - 0x0a0fffff  N N N  SRAM
    525 	 * 0x40000000 - 0x480fffff  N N N  Processor Registers
    526 	 * 0xa0000000 - 0xa000ffff  N Y N  RedBoot SDRAM
    527 	 * 0xa0017000 - 0xa3ffffff  Y Y Y  SDRAM
    528 	 * 0xc0000000 - 0xcfffffff  Y Y Y  Cache Flush Region
    529 	 * (done by this routine)
    530 	 * 0xfd000000 - 0xfd0000ff  N N N  I/O baseboard registers
    531 	 * 0xfd100000 - 0xfd2fffff  N N N  Processor Registers.
    532 	 *
    533 	 * The first level page table is at 0xa0004000.  There are also
    534 	 * 2 second-level tables at 0xa0008000 and 0xa0008400.
    535 	 *
    536 	 */
    537 
    538 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    539 
    540 	/*
    541 	 * map PLD registers to fixed address.
    542 	 */
    543 	{
    544 		/*
    545 		 * Tweak RedBoot's pagetable so that we can access to
    546 		 * some registers at same VA before and after installing
    547 		 * our page table.
    548 		 */
    549 		paddr_t ttb = (paddr_t)read_ttb();
    550 
    551 		map_io_area(ttb);
    552 		cpu_tlb_flushD();
    553 	}
    554 
    555 	/* now we can access LED at new virtual address */
    556 	LEDSTEP();
    557 
    558 	/* setup GPIO for BTUART, in case bootloader doesn't take care of it */
    559 	pxa2x0_gpio_bootstrap(G42XXEB_GPIO_VBASE);
    560 	pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN);
    561 	pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT);
    562 	pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN);
    563 	pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT);
    564 
    565 	LEDSTEP();
    566 
    567 	/* prepare fake bus space tag for consinit() */
    568 	map_func_save = pxa2x0_a4x_bs_tag.bs_map;
    569 	pxa2x0_a4x_bs_tag.bs_map = bootstrap_bs_map;
    570 
    571 	LEDSTEP();
    572 
    573 	consinit();
    574 #ifdef KGDB
    575 	LEDSTEP();
    576 	kgdb_port_init();
    577 #endif
    578 
    579 	LEDSTEP();
    580 
    581 	/* Talk to the user */
    582 	printf("\nNetBSD/evbarm (g42xxeb) booting ...\n");
    583 
    584 #if 0
    585 	/*
    586 	 * Examine the boot args string for options we need to know about
    587 	 * now.
    588 	 */
    589 	process_kernel_args((char *)nwbootinfo.bt_args);
    590 #endif
    591 
    592 	memstart = 0xa0000000;
    593 	memsize = 0x04000000;		/* 64MB */
    594 
    595 	printf("initarm: Configuring system ...\n");
    596 
    597 	/* Fake bootconfig structure for the benefit of pmap.c */
    598 	/* XXX must make the memory description h/w independant */
    599 	bootconfig.dramblocks = 1;
    600 	bootconfig.dram[0].address = memstart;
    601 	bootconfig.dram[0].pages = memsize / PAGE_SIZE;
    602 
    603 	/*
    604 	 * Set up the variables that define the availablilty of
    605 	 * physical memory.  For now, we're going to set
    606 	 * physical_freestart to 0xa0200000 (where the kernel
    607 	 * was loaded), and allocate the memory we need downwards.
    608 	 * If we get too close to the L1 table that we set up, we
    609 	 * will panic.  We will update physical_freestart and
    610 	 * physical_freeend later to reflect what pmap_bootstrap()
    611 	 * wants to see.
    612 	 *
    613 	 * XXX pmap_bootstrap() needs an enema.
    614 	 */
    615 	physical_start = bootconfig.dram[0].address;
    616 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    617 
    618 	physical_freestart = 0xa0009000UL;
    619 	physical_freeend = 0xa0200000UL;
    620 
    621 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    622 
    623 #ifdef VERBOSE_INIT_ARM
    624 	/* Tell the user about the memory */
    625 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    626 	    physical_start, physical_end - 1);
    627 #endif
    628 
    629 	/*
    630 	 * Okay, the kernel starts 2MB in from the bottom of physical
    631 	 * memory.  We are going to allocate our bootstrap pages downwards
    632 	 * from there.
    633 	 *
    634 	 * We need to allocate some fixed page tables to get the kernel
    635 	 * going.  We allocate one page directory and a number of page
    636 	 * tables and store the physical addresses in the kernel_pt_table
    637 	 * array.
    638 	 *
    639 	 * The kernel page directory must be on a 16K boundary.  The page
    640 	 * tables must be on 4K bounaries.  What we do is allocate the
    641 	 * page directory on the first 16K boundary that we encounter, and
    642 	 * the page tables on 4K boundaries otherwise.  Since we allocate
    643 	 * at least 3 L2 page tables, we are guaranteed to encounter at
    644 	 * least one 16K aligned region.
    645 	 */
    646 
    647 #ifdef VERBOSE_INIT_ARM
    648 	printf("Allocating page tables\n");
    649 #endif
    650 
    651 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    652 
    653 #ifdef VERBOSE_INIT_ARM
    654 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
    655 	       physical_freestart, free_pages, free_pages);
    656 #endif
    657 
    658 	/* Define a macro to simplify memory allocation */
    659 #define	valloc_pages(var, np)				\
    660 	alloc_pages((var).pv_pa, (np));			\
    661 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    662 
    663 #define alloc_pages(var, np)				\
    664 	physical_freeend -= ((np) * PAGE_SIZE);		\
    665 	if (physical_freeend < physical_freestart)	\
    666 		panic("initarm: out of memory");	\
    667 	(var) = physical_freeend;			\
    668 	free_pages -= (np);				\
    669 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    670 
    671 	loop1 = 0;
    672 	kernel_l1pt.pv_pa = 0;
    673 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    674 		/* Are we 16KB aligned for an L1 ? */
    675 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    676 		    && kernel_l1pt.pv_pa == 0) {
    677 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    678 		} else {
    679 			valloc_pages(kernel_pt_table[loop1],
    680 			    L2_TABLE_SIZE / PAGE_SIZE);
    681 			++loop1;
    682 		}
    683 	}
    684 
    685 	/* This should never be able to happen but better confirm that. */
    686 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    687 		panic("initarm: Failed to align the kernel page directory");
    688 
    689 	LEDSTEP();
    690 
    691 	/*
    692 	 * Allocate a page for the system page mapped to V0x00000000
    693 	 * This page will just contain the system vectors and can be
    694 	 * shared by all processes.
    695 	 */
    696 	alloc_pages(systempage.pv_pa, 1);
    697 
    698 	/* Allocate stacks for all modes */
    699 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    700 	valloc_pages(abtstack, ABT_STACK_SIZE);
    701 	valloc_pages(undstack, UND_STACK_SIZE);
    702 	valloc_pages(kernelstack, UPAGES);
    703 
    704 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    705 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
    706 	valloc_pages(minidataclean, 1);
    707 
    708 #ifdef VERBOSE_INIT_ARM
    709 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    710 	    irqstack.pv_va);
    711 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    712 	    abtstack.pv_va);
    713 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    714 	    undstack.pv_va);
    715 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    716 	    kernelstack.pv_va);
    717 #endif
    718 
    719 	/*
    720 	 * XXX Defer this to later so that we can reclaim the memory
    721 	 * XXX used by the RedBoot page tables.
    722 	 */
    723 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    724 
    725 	/*
    726 	 * Ok we have allocated physical pages for the primary kernel
    727 	 * page tables
    728 	 */
    729 
    730 #ifdef VERBOSE_INIT_ARM
    731 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    732 #endif
    733 
    734 	/*
    735 	 * Now we start construction of the L1 page table
    736 	 * We start by mapping the L2 page tables into the L1.
    737 	 * This means that we can replace L1 mappings later on if necessary
    738 	 */
    739 	l1pagetable = kernel_l1pt.pv_pa;
    740 
    741 	/* Map the L2 pages tables in the L1 page table */
    742 	pmap_link_l2pt(l1pagetable, 0x00000000,
    743 	    &kernel_pt_table[KERNEL_PT_SYS]);
    744 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    745 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    746 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    747 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    748 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    749 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    750 
    751 	/* update the top of the kernel VM */
    752 	pmap_curmaxkvaddr =
    753 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    754 
    755 #ifdef VERBOSE_INIT_ARM
    756 	printf("Mapping kernel\n");
    757 #endif
    758 
    759 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    760 	{
    761 		extern char etext[], _end[];
    762 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    763 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    764 		u_int logical;
    765 
    766 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    767 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    768 
    769 		logical = 0x00200000;	/* offset of kernel in RAM */
    770 
    771 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    772 		    physical_start + logical, textsize,
    773 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    774 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    775 		    physical_start + logical, totalsize - textsize,
    776 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    777 	}
    778 
    779 #ifdef VERBOSE_INIT_ARM
    780 	printf("Constructing L2 page tables\n");
    781 #endif
    782 
    783 	/* Map the stack pages */
    784 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    785 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    786 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    787 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    788 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    789 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    790 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    791 	    UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
    792 
    793 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    794 	    L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
    795 
    796 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    797 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    798 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    799 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    800 	}
    801 
    802 	/* Map the Mini-Data cache clean area. */
    803 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    804 	    minidataclean.pv_pa);
    805 
    806 	/* Map the vector page. */
    807 #if 1
    808 	/* MULTI-ICE requires that page 0 is NC/NB so that it can download the
    809 	 * cache-clean code there.  */
    810 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
    811 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    812 #else
    813 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
    814 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    815 #endif
    816 
    817 	/*
    818 	 * map integrated peripherals at same address in l1pagetable
    819 	 * so that we can continue to use console.
    820 	 */
    821 	copy_io_area_map((pd_entry_t *)l1pagetable);
    822 
    823 	/*
    824 	 * Give the XScale global cache clean code an appropriately
    825 	 * sized chunk of unmapped VA space starting at 0xff000000
    826 	 * (our device mappings end before this address).
    827 	 */
    828 	xscale_cache_clean_addr = 0xff000000U;
    829 
    830 	/*
    831 	 * Now we have the real page tables in place so we can switch to them.
    832 	 * Once this is done we will be running with the REAL kernel page
    833 	 * tables.
    834 	 */
    835 
    836 	/*
    837 	 * Update the physical_freestart/physical_freeend/free_pages
    838 	 * variables.
    839 	 */
    840 	{
    841 		extern char _end[];
    842 
    843 		physical_freestart = physical_start +
    844 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    845 		     KERNEL_BASE);
    846 		physical_freeend = physical_end;
    847 		free_pages =
    848 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    849 	}
    850 
    851 	/* Switch tables */
    852 #ifdef VERBOSE_INIT_ARM
    853 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    854 	       physical_freestart, free_pages, free_pages);
    855 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    856 #endif
    857 	LEDSTEP();
    858 	/* set new intc register address so that splfoo() doesn't
    859 	   touch illegal address.  */
    860 	pxa2x0_intr_bootstrap(G42XXEB_INTCTL_VBASE);
    861 	LEDSTEP();
    862 
    863 	setttb(kernel_l1pt.pv_pa);
    864 	cpu_tlb_flushID();
    865 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    866 	LEDSTEP();
    867 
    868 	/*
    869 	 * Moved from cpu_startup() as data_abort_handler() references
    870 	 * this during uvm init
    871 	 */
    872 	proc0paddr = (struct user *)kernelstack.pv_va;
    873 	lwp0.l_addr = proc0paddr;
    874 
    875 #ifdef VERBOSE_INIT_ARM
    876 	printf("bootstrap done.\n");
    877 #endif
    878 
    879 	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
    880 
    881 	/*
    882 	 * Pages were allocated during the secondary bootstrap for the
    883 	 * stacks for different CPU modes.
    884 	 * We must now set the r13 registers in the different CPU modes to
    885 	 * point to these stacks.
    886 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    887 	 * of the stack memory.
    888 	 */
    889 	printf("init subsystems: stacks ");
    890 
    891 	set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    892 	set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    893 	set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    894 
    895 	/*
    896 	 * Well we should set a data abort handler.
    897 	 * Once things get going this will change as we will need a proper
    898 	 * handler.
    899 	 * Until then we will use a handler that just panics but tells us
    900 	 * why.
    901 	 * Initialisation of the vectors will just panic on a data abort.
    902 	 * This just fills in a slighly better one.
    903 	 */
    904 	printf("vectors ");
    905 	data_abort_handler_address = (u_int)data_abort_handler;
    906 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    907 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    908 
    909 	/* Initialise the undefined instruction handlers */
    910 	printf("undefined ");
    911 	undefined_init();
    912 
    913 	/* Load memory into UVM. */
    914 	printf("page ");
    915 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    916 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    917 	    atop(physical_freestart), atop(physical_freeend),
    918 	    VM_FREELIST_DEFAULT);
    919 
    920 	/* Boot strap pmap telling it where the kernel page table is */
    921 	printf("pmap ");
    922 	LEDSTEP();
    923 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
    924 	    KERNEL_VM_BASE + KERNEL_VM_SIZE);
    925 	LEDSTEP();
    926 
    927 #ifdef __HAVE_MEMORY_DISK__
    928 	md_root_setconf(memory_disk, sizeof memory_disk);
    929 #endif
    930 
    931 #ifdef BOOTHOWTO
    932 	boothowto |= BOOTHOWTO;
    933 #endif
    934 
    935 	{
    936 		uint8_t sw = pldreg8_read(G42XXEB_DIPSW);
    937 
    938 		if (0 == (sw & (1<<0)))
    939 			boothowto ^= RB_KDB;
    940 		if (0 == (sw & (1<<1)))
    941 			boothowto ^= RB_SINGLE;
    942 	}
    943 
    944 	LEDSTEP();
    945 
    946 #ifdef IPKDB
    947 	/* Initialise ipkdb */
    948 	ipkdb_init();
    949 	if (boothowto & RB_KDB)
    950 		ipkdb_connect(0);
    951 #endif
    952 
    953 #ifdef KGDB
    954 	if (boothowto & RB_KDB) {
    955 		kgdb_debug_init = 1;
    956 		kgdb_connect(1);
    957 	}
    958 #endif
    959 
    960 #ifdef DDB
    961 	db_machine_init();
    962 
    963 	/* Firmware doesn't load symbols. */
    964 	ddb_init(0, NULL, NULL);
    965 
    966 	if (boothowto & RB_KDB)
    967 		Debugger();
    968 #endif
    969 
    970 	pxa2x0_a4x_bs_tag.bs_map = map_func_save ;
    971 
    972 	pldreg8_write(G42XXEB_LED, 0);
    973 
    974 	/* We return the new stack pointer address */
    975 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    976 }
    977 
    978 #if 0
    979 void
    980 process_kernel_args(char *args)
    981 {
    982 
    983 	boothowto = 0;
    984 
    985 	/* Make a local copy of the bootargs */
    986 	strncpy(bootargs, args, MAX_BOOT_STRING);
    987 
    988 	args = bootargs;
    989 	boot_file = bootargs;
    990 
    991 	/* Skip the kernel image filename */
    992 	while (*args != ' ' && *args != 0)
    993 		++args;
    994 
    995 	if (*args != 0)
    996 		*args++ = 0;
    997 
    998 	while (*args == ' ')
    999 		++args;
   1000 
   1001 	boot_args = args;
   1002 
   1003 	printf("bootfile: %s\n", boot_file);
   1004 	printf("bootargs: %s\n", boot_args);
   1005 
   1006 	parse_mi_bootargs(boot_args);
   1007 }
   1008 #endif
   1009 
   1010 #ifdef KGDB
   1011 #ifndef KGDB_DEVNAME
   1012 #define KGDB_DEVNAME "ffuart"
   1013 #endif
   1014 const char kgdb_devname[] = KGDB_DEVNAME;
   1015 
   1016 #if (NCOM > 0)
   1017 #ifndef KGDB_DEVMODE
   1018 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
   1019 #endif
   1020 int comkgdbmode = KGDB_DEVMODE;
   1021 #endif /* NCOM */
   1022 
   1023 #endif /* KGDB */
   1024 
   1025 
   1026 void
   1027 consinit(void)
   1028 {
   1029 	static int consinit_called = 0;
   1030 	uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN);
   1031 #if 0
   1032 	char *console = CONSDEVNAME;
   1033 #endif
   1034 
   1035 	if (consinit_called != 0)
   1036 		return;
   1037 
   1038 	consinit_called = 1;
   1039 
   1040 #if NCOM > 0
   1041 
   1042 #ifdef FFUARTCONSOLE
   1043 #ifdef KGDB
   1044 	if (0 == strcmp(kgdb_devname, "ffuart")){
   1045 		/* port is reserved for kgdb */
   1046 	} else
   1047 #endif
   1048 	if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
   1049 		comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
   1050 #if 0
   1051 		pxa2x0_clkman_config(CKEN_FFUART, 1);
   1052 #else
   1053 		ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN,
   1054 		    ckenreg|CKEN_FFUART);
   1055 #endif
   1056 
   1057 		return;
   1058 	}
   1059 #endif /* FFUARTCONSOLE */
   1060 
   1061 #ifdef BTUARTCONSOLE
   1062 #ifdef KGDB
   1063 	if (0 == strcmp(kgdb_devname, "btuart")) {
   1064 		/* port is reserved for kgdb */
   1065 	} else
   1066 #endif
   1067 	if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
   1068 		comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
   1069 		ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN,
   1070 		    ckenreg|CKEN_BTUART);
   1071 		return;
   1072 	}
   1073 #endif /* BTUARTCONSOLE */
   1074 
   1075 
   1076 #endif /* NCOM */
   1077 
   1078 }
   1079 
   1080 #ifdef KGDB
   1081 void
   1082 kgdb_port_init(void)
   1083 {
   1084 #if (NCOM > 0) && defined(COM_PXA2X0)
   1085 	paddr_t paddr = 0;
   1086 	uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN);
   1087 
   1088 	if (0 == strcmp(kgdb_devname, "ffuart")) {
   1089 		paddr = PXA2X0_FFUART_BASE;
   1090 		ckenreg |= CKEN_FFUART;
   1091 	}
   1092 	else if (0 == strcmp(kgdb_devname, "btuart")) {
   1093 		paddr = PXA2X0_BTUART_BASE;
   1094 		ckenreg |= CKEN_BTUART;
   1095 	}
   1096 
   1097 	if (paddr &&
   1098 	    0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
   1099 		kgdb_rate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
   1100 
   1101 		ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, ckenreg);
   1102 
   1103 	}
   1104 
   1105 #endif
   1106 }
   1107 #endif
   1108 
   1109