g42xxeb_machdep.c revision 1.11 1 /* $NetBSD: g42xxeb_machdep.c,v 1.11 2007/08/21 11:39:11 kiyohara Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation.
5 * All rights reserved.
6 *
7 * Written by Hiroyuki Bessho for Genetec Corporation.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The name of Genetec Corporation may not be used to endorse or
18 * promote products derived from this software without specific prior
19 * written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Machine dependant functions for kernel setup for Genetec G4250EBX
34 * evaluation board.
35 *
36 * Based on iq80310_machhdep.c
37 */
38 /*
39 * Copyright (c) 2001 Wasabi Systems, Inc.
40 * All rights reserved.
41 *
42 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed for the NetBSD Project by
55 * Wasabi Systems, Inc.
56 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
57 * or promote products derived from this software without specific prior
58 * written permission.
59 *
60 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
61 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
70 * POSSIBILITY OF SUCH DAMAGE.
71 */
72
73 /*
74 * Copyright (c) 1997,1998 Mark Brinicombe.
75 * Copyright (c) 1997,1998 Causality Limited.
76 * All rights reserved.
77 *
78 * Redistribution and use in source and binary forms, with or without
79 * modification, are permitted provided that the following conditions
80 * are met:
81 * 1. Redistributions of source code must retain the above copyright
82 * notice, this list of conditions and the following disclaimer.
83 * 2. Redistributions in binary form must reproduce the above copyright
84 * notice, this list of conditions and the following disclaimer in the
85 * documentation and/or other materials provided with the distribution.
86 * 3. All advertising materials mentioning features or use of this software
87 * must display the following acknowledgement:
88 * This product includes software developed by Mark Brinicombe
89 * for the NetBSD Project.
90 * 4. The name of the company nor the name of the author may be used to
91 * endorse or promote products derived from this software without specific
92 * prior written permission.
93 *
94 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
95 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
96 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
97 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
98 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
99 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
100 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
101 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
102 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
103 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
104 * SUCH DAMAGE.
105 *
106 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
107 * boards using RedBoot firmware.
108 */
109
110 #include "opt_ddb.h"
111 #include "opt_kgdb.h"
112 #include "opt_ipkdb.h"
113 #include "opt_pmap_debug.h"
114 #include "opt_md.h"
115 #include "opt_com.h"
116 #include "md.h"
117 #include "lcd.h"
118
119 #include <sys/param.h>
120 #include <sys/device.h>
121 #include <sys/systm.h>
122 #include <sys/kernel.h>
123 #include <sys/exec.h>
124 #include <sys/proc.h>
125 #include <sys/msgbuf.h>
126 #include <sys/reboot.h>
127 #include <sys/termios.h>
128 #include <sys/ksyms.h>
129
130 #include <uvm/uvm_extern.h>
131
132 #include <sys/conf.h>
133 #include <dev/cons.h>
134 #include <dev/md.h>
135
136 #include <machine/db_machdep.h>
137 #include <ddb/db_sym.h>
138 #include <ddb/db_extern.h>
139 #ifdef KGDB
140 #include <sys/kgdb.h>
141 #endif
142 #ifdef IPKDB
143 #include <ipkdb/ipkdb.h> /* for prototypes */
144 #include <machine/ipkdb.h>
145 #endif
146
147 #include <machine/bootconfig.h>
148 #include <machine/bus.h>
149 #include <machine/cpu.h>
150 #include <machine/frame.h>
151 #include <arm/undefined.h>
152
153 #include <arm/arm32/machdep.h>
154
155 #include <arm/xscale/pxa2x0reg.h>
156 #include <arm/xscale/pxa2x0var.h>
157 #include <arm/xscale/pxa2x0_gpio.h>
158 #include <evbarm/g42xxeb/g42xxeb_reg.h>
159 #include <evbarm/g42xxeb/g42xxeb_var.h>
160
161 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
162 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
163 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
164
165 /*
166 * The range 0xc1000000 - 0xccffffff is available for kernel VM space
167 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
168 */
169 #define KERNEL_VM_SIZE 0x0C000000
170
171
172 /*
173 * Address to call from cpu_reset() to reset the machine.
174 * This is machine architecture dependant as it varies depending
175 * on where the ROM appears when you turn the MMU off.
176 */
177
178 u_int cpu_reset_address = 0;
179
180 /* Define various stack sizes in pages */
181 #define IRQ_STACK_SIZE 1
182 #define ABT_STACK_SIZE 1
183 #ifdef IPKDB
184 #define UND_STACK_SIZE 2
185 #else
186 #define UND_STACK_SIZE 1
187 #endif
188
189 BootConfig bootconfig; /* Boot config storage */
190 char *boot_args = NULL;
191 char *boot_file = NULL;
192
193 vm_offset_t physical_start;
194 vm_offset_t physical_freestart;
195 vm_offset_t physical_freeend;
196 vm_offset_t physical_end;
197 u_int free_pages;
198 vm_offset_t pagetables_start;
199 int physmem = 0;
200
201 /*int debug_flags;*/
202 #ifndef PMAP_STATIC_L1S
203 int max_processes = 64; /* Default number */
204 #endif /* !PMAP_STATIC_L1S */
205
206 /* Physical and virtual addresses for some global pages */
207 pv_addr_t systempage;
208 pv_addr_t irqstack;
209 pv_addr_t undstack;
210 pv_addr_t abtstack;
211 pv_addr_t kernelstack;
212 pv_addr_t minidataclean;
213
214 vm_offset_t msgbufphys;
215
216 extern u_int data_abort_handler_address;
217 extern u_int prefetch_abort_handler_address;
218 extern u_int undefined_handler_address;
219
220 #ifdef PMAP_DEBUG
221 extern int pmap_debug_level;
222 #endif
223
224 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
225 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
226 #define KERNEL_PT_KERNEL_NUM 4
227 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM)
228 /* Page tables for mapping kernel VM */
229 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
230 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
231
232 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
233
234 struct user *proc0paddr;
235
236 /* Prototypes */
237
238 #if 0
239 void process_kernel_args(char *);
240 #endif
241
242 void consinit(void);
243 void kgdb_port_init(void);
244 void change_clock(uint32_t v);
245
246 bs_protos(bs_notimpl);
247
248 #include "com.h"
249 #if NCOM > 0
250 #include <dev/ic/comreg.h>
251 #include <dev/ic/comvar.h>
252 #endif
253
254 #ifndef CONSPEED
255 #define CONSPEED B115200 /* What RedBoot uses */
256 #endif
257 #ifndef CONMODE
258 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
259 #endif
260
261 int comcnspeed = CONSPEED;
262 int comcnmode = CONMODE;
263
264 static struct pxa2x0_gpioconf boarddep_gpioconf[] = {
265 { 44, GPIO_ALT_FN_1_IN }, /* BTCST */
266 { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */
267
268 { -1 }
269 };
270 static struct pxa2x0_gpioconf *g42xxeb_gpioconf[] = {
271 pxa25x_com_btuart_gpioconf,
272 pxa25x_com_ffuart_gpioconf,
273 #if 0
274 pxa25x_com_stuart_gpioconf,
275 pxa25x_pxaacu_gpioconf,
276 #endif
277 boarddep_gpioconf,
278 NULL
279 };
280
281 /*
282 * void cpu_reboot(int howto, char *bootstr)
283 *
284 * Reboots the system
285 *
286 * Deal with any syncing, unmounting, dumping and shutdown hooks,
287 * then reset the CPU.
288 */
289 void
290 cpu_reboot(int howto, char *bootstr)
291 {
292 #ifdef DIAGNOSTIC
293 /* info */
294 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
295 #endif
296
297 /*
298 * If we are still cold then hit the air brakes
299 * and crash to earth fast
300 */
301 if (cold) {
302 doshutdownhooks();
303 printf("The operating system has halted.\n");
304 printf("Please press any key to reboot.\n\n");
305 cngetc();
306 printf("rebooting...\n");
307 cpu_reset();
308 /*NOTREACHED*/
309 }
310
311 /* Disable console buffering */
312 /* cnpollc(1);*/
313
314 /*
315 * If RB_NOSYNC was not specified sync the discs.
316 * Note: Unless cold is set to 1 here, syslogd will die during the
317 * unmount. It looks like syslogd is getting woken up only to find
318 * that it cannot page part of the binary in as the filesystem has
319 * been unmounted.
320 */
321 if (!(howto & RB_NOSYNC))
322 bootsync();
323
324 /* Say NO to interrupts */
325 splhigh();
326
327 /* Do a dump if requested. */
328 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
329 dumpsys();
330
331 /* Run any shutdown hooks */
332 doshutdownhooks();
333
334 /* Make sure IRQ's are disabled */
335 IRQdisable;
336
337 if (howto & RB_HALT) {
338 printf("The operating system has halted.\n");
339 printf("Please press any key to reboot.\n\n");
340 cngetc();
341 }
342
343 printf("rebooting...\n");
344 cpu_reset();
345 /*NOTREACHED*/
346 }
347
348 static inline
349 pd_entry_t *
350 read_ttb(void)
351 {
352 long ttb;
353
354 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r" (ttb));
355
356
357 return (pd_entry_t *)(ttb & ~((1<<14)-1));
358 }
359
360 /*
361 * Static device mappings. These peripheral registers are mapped at
362 * fixed virtual addresses very early in initarm() so that we can use
363 * them while booting the kernel, and stay at the same address
364 * throughout whole kernel's life time.
365 *
366 * We use this table twice; once with bootstrap page table, and once
367 * with kernel's page table which we build up in initarm().
368 *
369 * Since we map these registers into the bootstrap page table using
370 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
371 * registers segment-aligned and segment-rounded in order to avoid
372 * using the 2nd page tables.
373 */
374
375 #define _A(a) ((a) & ~L1_S_OFFSET)
376 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
377
378 static const struct pmap_devmap g42xxeb_devmap[] = {
379 {
380 G42XXEB_PLDREG_VBASE,
381 _A(G42XXEB_PLDREG_BASE),
382 _S(G42XXEB_PLDREG_SIZE),
383 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
384 },
385 {
386 G42XXEB_GPIO_VBASE,
387 _A(PXA2X0_GPIO_BASE),
388 _S(PXA250_GPIO_SIZE),
389 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
390 },
391 {
392 G42XXEB_CLKMAN_VBASE,
393 _A(PXA2X0_CLKMAN_BASE),
394 _S(PXA2X0_CLKMAN_SIZE),
395 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
396 },
397 {
398 G42XXEB_INTCTL_VBASE,
399 _A(PXA2X0_INTCTL_BASE),
400 _S(PXA2X0_INTCTL_SIZE),
401 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
402 },
403 {
404 G42XXEB_FFUART_VBASE,
405 _A(PXA2X0_FFUART_BASE),
406 _S(4 * COM_NPORTS),
407 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
408 },
409 {
410 G42XXEB_BTUART_VBASE,
411 _A(PXA2X0_BTUART_BASE),
412 _S(4 * COM_NPORTS),
413 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
414 },
415 {0, 0, 0, 0,}
416 };
417
418 #undef _A
419 #undef _S
420
421
422 /*
423 * u_int initarm(...)
424 *
425 * Initial entry point on startup. This gets called before main() is
426 * entered.
427 * It should be responsible for setting up everything that must be
428 * in place when main is called.
429 * This includes
430 * Taking a copy of the boot configuration structure.
431 * Initialising the physical console so characters can be printed.
432 * Setting up page tables for the kernel
433 * Relocating the kernel to the bottom of physical memory
434 */
435 u_int
436 initarm(void *arg)
437 {
438 extern vaddr_t xscale_cache_clean_addr;
439 int loop;
440 int loop1;
441 u_int l1pagetable;
442 pv_addr_t kernel_l1pt;
443 paddr_t memstart;
444 psize_t memsize;
445 int led_data = 1;
446 #ifdef DIAGNOSTIC
447 extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
448 #endif
449
450 #define LEDSTEP_P() ioreg8_write(G42XXEB_PLDREG_BASE+G42XXEB_LED, led_data++)
451 #define LEDSTEP() pldreg8_write(G42XXEB_LED, led_data++);
452
453 /* use physical address until pagetable is set */
454 LEDSTEP_P();
455
456 /* map some peripheral registers at static I/O area */
457 pmap_devmap_bootstrap((vaddr_t)read_ttb(), g42xxeb_devmap);
458
459 LEDSTEP_P();
460
461 /* start 32.768 kHz OSC */
462 ioreg_write(G42XXEB_CLKMAN_VBASE + 0x08, 2);
463 /* Get ready for splfoo() */
464 pxa2x0_intr_bootstrap(G42XXEB_INTCTL_VBASE);
465
466 LEDSTEP();
467
468 /*
469 * Heads up ... Setup the CPU / MMU / TLB functions
470 */
471 if (set_cpufuncs())
472 panic("cpu not recognized!");
473
474 LEDSTEP();
475
476 /*
477 * Okay, RedBoot has provided us with the following memory map:
478 *
479 * Physical Address Range Description
480 * ----------------------- ----------------------------------
481 * 0x00000000 - 0x01ffffff flash Memory (32MB)
482 * 0x04000000 - 0x05ffffff Application flash Memory (32MB)
483 * 0x08000000 - 0x080000ff I/O baseboard registers
484 * 0x0c000000 - 0x0c0fffff Ethernet Controller
485 * 0x14000000 - 0x17ffffff Expansion Card (64MB)
486 * 0x40000000 - 0x480fffff Processor Registers
487 * 0xa0000000 - 0xa3ffffff SDRAM Bank 0 (64MB)
488 *
489 *
490 * Virtual Address Range X C B Description
491 * ----------------------- - - - ----------------------------------
492 * 0x00000000 - 0x00003fff N Y Y SDRAM
493 * 0x00004000 - 0x01ffffff N Y N ROM
494 * 0x08000000 - 0x080fffff N N N I/O baseboard registers
495 * 0x0a000000 - 0x0a0fffff N N N SRAM
496 * 0x40000000 - 0x480fffff N N N Processor Registers
497 * 0xa0000000 - 0xa000ffff N Y N RedBoot SDRAM
498 * 0xa0017000 - 0xa3ffffff Y Y Y SDRAM
499 * 0xc0000000 - 0xcfffffff Y Y Y Cache Flush Region
500 * (done by this routine)
501 * 0xfd000000 - 0xfd0000ff N N N I/O baseboard registers
502 * 0xfd100000 - 0xfd3fffff N N N Processor Registers.
503 * 0xfd400000 - 0xfd4fffff N N N FF-UART
504 * 0xfd500000 - 0xfd5fffff N N N BT-UART
505 *
506 * RedBoot's first level page table is at 0xa0004000. There
507 * are also 2 second-level tables at 0xa0008000 and
508 * 0xa0008400. We will continue to use them until we switch to
509 * our pagetable by setttb().
510 */
511
512 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
513
514 LEDSTEP();
515
516 /* setup GPIO for BTUART, in case bootloader doesn't take care of it */
517 pxa2x0_gpio_bootstrap(G42XXEB_GPIO_VBASE);
518 pxa2x0_gpio_config(g42xxeb_gpioconf);
519
520 LEDSTEP();
521
522 consinit();
523 #ifdef KGDB
524 LEDSTEP();
525 kgdb_port_init();
526 #endif
527
528 LEDSTEP();
529
530 /* Talk to the user */
531 printf("\nNetBSD/evbarm (g42xxeb) booting ...\n");
532
533 #if 0
534 /*
535 * Examine the boot args string for options we need to know about
536 * now.
537 */
538 process_kernel_args((char *)nwbootinfo.bt_args);
539 #endif
540
541 memstart = 0xa0000000;
542 memsize = 0x04000000; /* 64MB */
543
544 printf("initarm: Configuring system ...\n");
545
546 /* Fake bootconfig structure for the benefit of pmap.c */
547 /* XXX must make the memory description h/w independent */
548 bootconfig.dramblocks = 1;
549 bootconfig.dram[0].address = memstart;
550 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
551
552 /*
553 * Set up the variables that define the availablilty of
554 * physical memory. For now, we're going to set
555 * physical_freestart to 0xa0200000 (where the kernel
556 * was loaded), and allocate the memory we need downwards.
557 * If we get too close to the L1 table that we set up, we
558 * will panic. We will update physical_freestart and
559 * physical_freeend later to reflect what pmap_bootstrap()
560 * wants to see.
561 *
562 * XXX pmap_bootstrap() needs an enema.
563 */
564 physical_start = bootconfig.dram[0].address;
565 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
566
567 physical_freestart = 0xa0009000UL;
568 physical_freeend = 0xa0200000UL;
569
570 physmem = (physical_end - physical_start) / PAGE_SIZE;
571
572 #ifdef VERBOSE_INIT_ARM
573 /* Tell the user about the memory */
574 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
575 physical_start, physical_end - 1);
576 #endif
577
578 /*
579 * Okay, the kernel starts 2MB in from the bottom of physical
580 * memory. We are going to allocate our bootstrap pages downwards
581 * from there.
582 *
583 * We need to allocate some fixed page tables to get the kernel
584 * going. We allocate one page directory and a number of page
585 * tables and store the physical addresses in the kernel_pt_table
586 * array.
587 *
588 * The kernel page directory must be on a 16K boundary. The page
589 * tables must be on 4K bounaries. What we do is allocate the
590 * page directory on the first 16K boundary that we encounter, and
591 * the page tables on 4K boundaries otherwise. Since we allocate
592 * at least 3 L2 page tables, we are guaranteed to encounter at
593 * least one 16K aligned region.
594 */
595
596 #ifdef VERBOSE_INIT_ARM
597 printf("Allocating page tables\n");
598 #endif
599
600 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
601
602 #ifdef VERBOSE_INIT_ARM
603 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
604 physical_freestart, free_pages, free_pages);
605 #endif
606
607 /* Define a macro to simplify memory allocation */
608 #define valloc_pages(var, np) \
609 alloc_pages((var).pv_pa, (np)); \
610 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
611
612 #define alloc_pages(var, np) \
613 physical_freeend -= ((np) * PAGE_SIZE); \
614 if (physical_freeend < physical_freestart) \
615 panic("initarm: out of memory"); \
616 (var) = physical_freeend; \
617 free_pages -= (np); \
618 memset((char *)(var), 0, ((np) * PAGE_SIZE));
619
620 loop1 = 0;
621 kernel_l1pt.pv_pa = 0;
622 kernel_l1pt.pv_va = 0;
623 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
624 /* Are we 16KB aligned for an L1 ? */
625 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
626 && kernel_l1pt.pv_pa == 0) {
627 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
628 } else {
629 valloc_pages(kernel_pt_table[loop1],
630 L2_TABLE_SIZE / PAGE_SIZE);
631 ++loop1;
632 }
633 }
634
635 /* This should never be able to happen but better confirm that. */
636 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
637 panic("initarm: Failed to align the kernel page directory");
638
639 LEDSTEP();
640
641 /*
642 * Allocate a page for the system page mapped to V0x00000000
643 * This page will just contain the system vectors and can be
644 * shared by all processes.
645 */
646 alloc_pages(systempage.pv_pa, 1);
647
648 /* Allocate stacks for all modes */
649 valloc_pages(irqstack, IRQ_STACK_SIZE);
650 valloc_pages(abtstack, ABT_STACK_SIZE);
651 valloc_pages(undstack, UND_STACK_SIZE);
652 valloc_pages(kernelstack, UPAGES);
653
654 /* Allocate enough pages for cleaning the Mini-Data cache. */
655 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
656 valloc_pages(minidataclean, 1);
657
658 #ifdef VERBOSE_INIT_ARM
659 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
660 irqstack.pv_va);
661 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
662 abtstack.pv_va);
663 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
664 undstack.pv_va);
665 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
666 kernelstack.pv_va);
667 #endif
668
669 /*
670 * XXX Defer this to later so that we can reclaim the memory
671 * XXX used by the RedBoot page tables.
672 */
673 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
674
675 /*
676 * Ok we have allocated physical pages for the primary kernel
677 * page tables
678 */
679
680 #ifdef VERBOSE_INIT_ARM
681 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
682 #endif
683
684 /*
685 * Now we start construction of the L1 page table
686 * We start by mapping the L2 page tables into the L1.
687 * This means that we can replace L1 mappings later on if necessary
688 */
689 l1pagetable = kernel_l1pt.pv_pa;
690
691 /* Map the L2 pages tables in the L1 page table */
692 pmap_link_l2pt(l1pagetable, 0x00000000,
693 &kernel_pt_table[KERNEL_PT_SYS]);
694 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
695 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
696 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
697 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
698 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
699 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
700
701 /* update the top of the kernel VM */
702 pmap_curmaxkvaddr =
703 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
704
705 #ifdef VERBOSE_INIT_ARM
706 printf("Mapping kernel\n");
707 #endif
708
709 /* Now we fill in the L2 pagetable for the kernel static code/data */
710 {
711 extern char etext[], _end[];
712 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
713 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
714 u_int logical;
715
716 textsize = (textsize + PGOFSET) & ~PGOFSET;
717 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
718
719 logical = 0x00200000; /* offset of kernel in RAM */
720
721 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
722 physical_start + logical, textsize,
723 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
724 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
725 physical_start + logical, totalsize - textsize,
726 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
727 }
728
729 #ifdef VERBOSE_INIT_ARM
730 printf("Constructing L2 page tables\n");
731 #endif
732
733 /* Map the stack pages */
734 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
735 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
736 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
737 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
738 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
739 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
740 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
741 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
742
743 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
744 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
745
746 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
747 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
748 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
749 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
750 }
751
752 /* Map the Mini-Data cache clean area. */
753 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
754 minidataclean.pv_pa);
755
756 /* Map the vector page. */
757 #if 1
758 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
759 * cache-clean code there. */
760 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
761 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
762 #else
763 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
764 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
765 #endif
766
767 /*
768 * map integrated peripherals at same address in l1pagetable
769 * so that we can continue to use console.
770 */
771 pmap_devmap_bootstrap(l1pagetable, g42xxeb_devmap);
772
773 /*
774 * Give the XScale global cache clean code an appropriately
775 * sized chunk of unmapped VA space starting at 0xff000000
776 * (our device mappings end before this address).
777 */
778 xscale_cache_clean_addr = 0xff000000U;
779
780 /*
781 * Now we have the real page tables in place so we can switch to them.
782 * Once this is done we will be running with the REAL kernel page
783 * tables.
784 */
785
786 /*
787 * Update the physical_freestart/physical_freeend/free_pages
788 * variables.
789 */
790 {
791 extern char _end[];
792
793 physical_freestart = physical_start +
794 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
795 KERNEL_BASE);
796 physical_freeend = physical_end;
797 free_pages =
798 (physical_freeend - physical_freestart) / PAGE_SIZE;
799 }
800
801 /* Switch tables */
802 #ifdef VERBOSE_INIT_ARM
803 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
804 physical_freestart, free_pages, free_pages);
805 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
806 #endif
807 LEDSTEP();
808
809 setttb(kernel_l1pt.pv_pa);
810 cpu_tlb_flushID();
811 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
812 LEDSTEP();
813
814 /*
815 * Moved from cpu_startup() as data_abort_handler() references
816 * this during uvm init
817 */
818 proc0paddr = (struct user *)kernelstack.pv_va;
819 lwp0.l_addr = proc0paddr;
820
821 #ifdef VERBOSE_INIT_ARM
822 printf("bootstrap done.\n");
823 #endif
824
825 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
826
827 /*
828 * Pages were allocated during the secondary bootstrap for the
829 * stacks for different CPU modes.
830 * We must now set the r13 registers in the different CPU modes to
831 * point to these stacks.
832 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
833 * of the stack memory.
834 */
835 #ifdef VERBOSE_INIT_ARM
836 printf("init subsystems: stacks ");
837 #endif
838
839 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
840 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
841 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
842
843 /*
844 * Well we should set a data abort handler.
845 * Once things get going this will change as we will need a proper
846 * handler.
847 * Until then we will use a handler that just panics but tells us
848 * why.
849 * Initialisation of the vectors will just panic on a data abort.
850 * This just fills in a slighly better one.
851 */
852 #ifdef VERBOSE_INIT_ARM
853 printf("vectors ");
854 #endif
855 data_abort_handler_address = (u_int)data_abort_handler;
856 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
857 undefined_handler_address = (u_int)undefinedinstruction_bounce;
858
859 /* Initialise the undefined instruction handlers */
860 #ifdef VERBOSE_INIT_ARM
861 printf("undefined ");
862 #endif
863 undefined_init();
864
865 /* Load memory into UVM. */
866 #ifdef VERBOSE_INIT_ARM
867 printf("page ");
868 #endif
869 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
870 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
871 atop(physical_freestart), atop(physical_freeend),
872 VM_FREELIST_DEFAULT);
873
874 /* Boot strap pmap telling it where the kernel page table is */
875 #ifdef VERBOSE_INIT_ARM
876 printf("pmap ");
877 #endif
878 LEDSTEP();
879 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
880 KERNEL_VM_BASE + KERNEL_VM_SIZE);
881 LEDSTEP();
882
883 #ifdef __HAVE_MEMORY_DISK__
884 md_root_setconf(memory_disk, sizeof memory_disk);
885 #endif
886
887 #ifdef BOOTHOWTO
888 boothowto |= BOOTHOWTO;
889 #endif
890
891 {
892 uint8_t sw = pldreg8_read(G42XXEB_DIPSW);
893
894 if (0 == (sw & (1<<0)))
895 boothowto ^= RB_KDB;
896 if (0 == (sw & (1<<1)))
897 boothowto ^= RB_SINGLE;
898 }
899
900 LEDSTEP();
901
902 #ifdef IPKDB
903 /* Initialise ipkdb */
904 ipkdb_init();
905 if (boothowto & RB_KDB)
906 ipkdb_connect(0);
907 #endif
908
909 #ifdef KGDB
910 if (boothowto & RB_KDB) {
911 kgdb_debug_init = 1;
912 kgdb_connect(1);
913 }
914 #endif
915
916 #ifdef DDB
917 db_machine_init();
918
919 /* Firmware doesn't load symbols. */
920 ddb_init(0, NULL, NULL);
921
922 if (boothowto & RB_KDB)
923 Debugger();
924 #endif
925
926 pldreg8_write(G42XXEB_LED, 0);
927
928 /* We return the new stack pointer address */
929 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
930 }
931
932 #if 0
933 void
934 process_kernel_args(char *args)
935 {
936
937 boothowto = 0;
938
939 /* Make a local copy of the bootargs */
940 strncpy(bootargs, args, MAX_BOOT_STRING);
941
942 args = bootargs;
943 boot_file = bootargs;
944
945 /* Skip the kernel image filename */
946 while (*args != ' ' && *args != 0)
947 ++args;
948
949 if (*args != 0)
950 *args++ = 0;
951
952 while (*args == ' ')
953 ++args;
954
955 boot_args = args;
956
957 printf("bootfile: %s\n", boot_file);
958 printf("bootargs: %s\n", boot_args);
959
960 parse_mi_bootargs(boot_args);
961 }
962 #endif
963
964 #ifdef KGDB
965 #ifndef KGDB_DEVNAME
966 #define KGDB_DEVNAME "ffuart"
967 #endif
968 const char kgdb_devname[] = KGDB_DEVNAME;
969
970 #if (NCOM > 0)
971 #ifndef KGDB_DEVMODE
972 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
973 #endif
974 int comkgdbmode = KGDB_DEVMODE;
975 #endif /* NCOM */
976
977 #endif /* KGDB */
978
979
980 void
981 consinit(void)
982 {
983 static int consinit_called = 0;
984 uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN);
985 #if 0
986 char *console = CONSDEVNAME;
987 #endif
988
989 if (consinit_called != 0)
990 return;
991
992 consinit_called = 1;
993
994 #if NCOM > 0
995
996 #ifdef FFUARTCONSOLE
997 #ifdef KGDB
998 if (0 == strcmp(kgdb_devname, "ffuart")){
999 /* port is reserved for kgdb */
1000 } else
1001 #endif
1002 if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
1003 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
1004 #if 0
1005 pxa2x0_clkman_config(CKEN_FFUART, 1);
1006 #else
1007 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN,
1008 ckenreg|CKEN_FFUART);
1009 #endif
1010
1011 return;
1012 }
1013 #endif /* FFUARTCONSOLE */
1014
1015 #ifdef BTUARTCONSOLE
1016 #ifdef KGDB
1017 if (0 == strcmp(kgdb_devname, "btuart")) {
1018 /* port is reserved for kgdb */
1019 } else
1020 #endif
1021 if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
1022 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) {
1023 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN,
1024 ckenreg|CKEN_BTUART);
1025 return;
1026 }
1027 #endif /* BTUARTCONSOLE */
1028
1029
1030 #endif /* NCOM */
1031
1032 }
1033
1034 #ifdef KGDB
1035 void
1036 kgdb_port_init(void)
1037 {
1038 #if (NCOM > 0) && defined(COM_PXA2X0)
1039 paddr_t paddr = 0;
1040 uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN);
1041
1042 if (0 == strcmp(kgdb_devname, "ffuart")) {
1043 paddr = PXA2X0_FFUART_BASE;
1044 ckenreg |= CKEN_FFUART;
1045 }
1046 else if (0 == strcmp(kgdb_devname, "btuart")) {
1047 paddr = PXA2X0_BTUART_BASE;
1048 ckenreg |= CKEN_BTUART;
1049 }
1050
1051 if (paddr &&
1052 0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
1053 kgdb_rate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
1054
1055 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, ckenreg);
1056
1057 }
1058
1059 #endif
1060 }
1061 #endif
1062
1063