g42xxeb_machdep.c revision 1.11.2.2
1 /* $NetBSD: g42xxeb_machdep.c,v 1.11.2.2 2007/11/09 05:37:55 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation. 5 * All rights reserved. 6 * 7 * Written by Hiroyuki Bessho for Genetec Corporation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of Genetec Corporation may not be used to endorse or 18 * promote products derived from this software without specific prior 19 * written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 * Machine dependant functions for kernel setup for Genetec G4250EBX 34 * evaluation board. 35 * 36 * Based on iq80310_machhdep.c 37 */ 38 /* 39 * Copyright (c) 2001 Wasabi Systems, Inc. 40 * All rights reserved. 41 * 42 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed for the NetBSD Project by 55 * Wasabi Systems, Inc. 56 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 57 * or promote products derived from this software without specific prior 58 * written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 61 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 70 * POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73 /* 74 * Copyright (c) 1997,1998 Mark Brinicombe. 75 * Copyright (c) 1997,1998 Causality Limited. 76 * All rights reserved. 77 * 78 * Redistribution and use in source and binary forms, with or without 79 * modification, are permitted provided that the following conditions 80 * are met: 81 * 1. Redistributions of source code must retain the above copyright 82 * notice, this list of conditions and the following disclaimer. 83 * 2. Redistributions in binary form must reproduce the above copyright 84 * notice, this list of conditions and the following disclaimer in the 85 * documentation and/or other materials provided with the distribution. 86 * 3. All advertising materials mentioning features or use of this software 87 * must display the following acknowledgement: 88 * This product includes software developed by Mark Brinicombe 89 * for the NetBSD Project. 90 * 4. The name of the company nor the name of the author may be used to 91 * endorse or promote products derived from this software without specific 92 * prior written permission. 93 * 94 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 95 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 96 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 97 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 98 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 99 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 100 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 101 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 102 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 103 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 104 * SUCH DAMAGE. 105 * 106 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation 107 * boards using RedBoot firmware. 108 */ 109 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_ipkdb.h" 113 #include "opt_pmap_debug.h" 114 #include "opt_md.h" 115 #include "opt_com.h" 116 #include "md.h" 117 #include "lcd.h" 118 119 #include <sys/param.h> 120 #include <sys/device.h> 121 #include <sys/systm.h> 122 #include <sys/kernel.h> 123 #include <sys/exec.h> 124 #include <sys/proc.h> 125 #include <sys/msgbuf.h> 126 #include <sys/reboot.h> 127 #include <sys/termios.h> 128 #include <sys/ksyms.h> 129 130 #include <uvm/uvm_extern.h> 131 132 #include <sys/conf.h> 133 #include <dev/cons.h> 134 #include <dev/md.h> 135 136 #include <machine/db_machdep.h> 137 #include <ddb/db_sym.h> 138 #include <ddb/db_extern.h> 139 #ifdef KGDB 140 #include <sys/kgdb.h> 141 #endif 142 #ifdef IPKDB 143 #include <ipkdb/ipkdb.h> /* for prototypes */ 144 #include <machine/ipkdb.h> 145 #endif 146 147 #include <machine/bootconfig.h> 148 #include <machine/bus.h> 149 #include <machine/cpu.h> 150 #include <machine/frame.h> 151 #include <arm/undefined.h> 152 153 #include <arm/arm32/machdep.h> 154 155 #include <arm/xscale/pxa2x0reg.h> 156 #include <arm/xscale/pxa2x0var.h> 157 #include <arm/xscale/pxa2x0_gpio.h> 158 #include <evbarm/g42xxeb/g42xxeb_reg.h> 159 #include <evbarm/g42xxeb/g42xxeb_var.h> 160 161 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 162 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 163 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 164 165 /* 166 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 167 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 168 */ 169 #define KERNEL_VM_SIZE 0x0C000000 170 171 172 /* 173 * Address to call from cpu_reset() to reset the machine. 174 * This is machine architecture dependant as it varies depending 175 * on where the ROM appears when you turn the MMU off. 176 */ 177 178 u_int cpu_reset_address = 0; 179 180 /* Define various stack sizes in pages */ 181 #define IRQ_STACK_SIZE 1 182 #define ABT_STACK_SIZE 1 183 #ifdef IPKDB 184 #define UND_STACK_SIZE 2 185 #else 186 #define UND_STACK_SIZE 1 187 #endif 188 189 BootConfig bootconfig; /* Boot config storage */ 190 char *boot_args = NULL; 191 char *boot_file = NULL; 192 193 vm_offset_t physical_start; 194 vm_offset_t physical_freestart; 195 vm_offset_t physical_freeend; 196 vm_offset_t physical_end; 197 u_int free_pages; 198 vm_offset_t pagetables_start; 199 int physmem = 0; 200 201 /*int debug_flags;*/ 202 #ifndef PMAP_STATIC_L1S 203 int max_processes = 64; /* Default number */ 204 #endif /* !PMAP_STATIC_L1S */ 205 206 /* Physical and virtual addresses for some global pages */ 207 pv_addr_t irqstack; 208 pv_addr_t undstack; 209 pv_addr_t abtstack; 210 pv_addr_t kernelstack; 211 pv_addr_t minidataclean; 212 213 vm_offset_t msgbufphys; 214 215 extern u_int data_abort_handler_address; 216 extern u_int prefetch_abort_handler_address; 217 extern u_int undefined_handler_address; 218 219 #ifdef PMAP_DEBUG 220 extern int pmap_debug_level; 221 #endif 222 223 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 224 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 225 #define KERNEL_PT_KERNEL_NUM 4 226 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM) 227 /* Page tables for mapping kernel VM */ 228 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 229 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 230 231 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 232 233 struct user *proc0paddr; 234 235 /* Prototypes */ 236 237 #if 0 238 void process_kernel_args(char *); 239 #endif 240 241 void consinit(void); 242 void kgdb_port_init(void); 243 void change_clock(uint32_t v); 244 245 bs_protos(bs_notimpl); 246 247 #include "com.h" 248 #if NCOM > 0 249 #include <dev/ic/comreg.h> 250 #include <dev/ic/comvar.h> 251 #endif 252 253 #ifndef CONSPEED 254 #define CONSPEED B115200 /* What RedBoot uses */ 255 #endif 256 #ifndef CONMODE 257 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 258 #endif 259 260 int comcnspeed = CONSPEED; 261 int comcnmode = CONMODE; 262 263 static struct pxa2x0_gpioconf boarddep_gpioconf[] = { 264 { 44, GPIO_ALT_FN_1_IN }, /* BTCST */ 265 { 45, GPIO_ALT_FN_2_OUT }, /* BTRST */ 266 267 { -1 } 268 }; 269 static struct pxa2x0_gpioconf *g42xxeb_gpioconf[] = { 270 pxa25x_com_btuart_gpioconf, 271 pxa25x_com_ffuart_gpioconf, 272 #if 0 273 pxa25x_com_stuart_gpioconf, 274 pxa25x_pxaacu_gpioconf, 275 #endif 276 boarddep_gpioconf, 277 NULL 278 }; 279 280 /* 281 * void cpu_reboot(int howto, char *bootstr) 282 * 283 * Reboots the system 284 * 285 * Deal with any syncing, unmounting, dumping and shutdown hooks, 286 * then reset the CPU. 287 */ 288 void 289 cpu_reboot(int howto, char *bootstr) 290 { 291 #ifdef DIAGNOSTIC 292 /* info */ 293 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 294 #endif 295 296 /* 297 * If we are still cold then hit the air brakes 298 * and crash to earth fast 299 */ 300 if (cold) { 301 doshutdownhooks(); 302 printf("The operating system has halted.\n"); 303 printf("Please press any key to reboot.\n\n"); 304 cngetc(); 305 printf("rebooting...\n"); 306 cpu_reset(); 307 /*NOTREACHED*/ 308 } 309 310 /* Disable console buffering */ 311 /* cnpollc(1);*/ 312 313 /* 314 * If RB_NOSYNC was not specified sync the discs. 315 * Note: Unless cold is set to 1 here, syslogd will die during the 316 * unmount. It looks like syslogd is getting woken up only to find 317 * that it cannot page part of the binary in as the filesystem has 318 * been unmounted. 319 */ 320 if (!(howto & RB_NOSYNC)) 321 bootsync(); 322 323 /* Say NO to interrupts */ 324 splhigh(); 325 326 /* Do a dump if requested. */ 327 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 328 dumpsys(); 329 330 /* Run any shutdown hooks */ 331 doshutdownhooks(); 332 333 /* Make sure IRQ's are disabled */ 334 IRQdisable; 335 336 if (howto & RB_HALT) { 337 printf("The operating system has halted.\n"); 338 printf("Please press any key to reboot.\n\n"); 339 cngetc(); 340 } 341 342 printf("rebooting...\n"); 343 cpu_reset(); 344 /*NOTREACHED*/ 345 } 346 347 static inline 348 pd_entry_t * 349 read_ttb(void) 350 { 351 long ttb; 352 353 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r" (ttb)); 354 355 356 return (pd_entry_t *)(ttb & ~((1<<14)-1)); 357 } 358 359 /* 360 * Static device mappings. These peripheral registers are mapped at 361 * fixed virtual addresses very early in initarm() so that we can use 362 * them while booting the kernel, and stay at the same address 363 * throughout whole kernel's life time. 364 * 365 * We use this table twice; once with bootstrap page table, and once 366 * with kernel's page table which we build up in initarm(). 367 * 368 * Since we map these registers into the bootstrap page table using 369 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 370 * registers segment-aligned and segment-rounded in order to avoid 371 * using the 2nd page tables. 372 */ 373 374 #define _A(a) ((a) & ~L1_S_OFFSET) 375 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 376 377 static const struct pmap_devmap g42xxeb_devmap[] = { 378 { 379 G42XXEB_PLDREG_VBASE, 380 _A(G42XXEB_PLDREG_BASE), 381 _S(G42XXEB_PLDREG_SIZE), 382 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 383 }, 384 { 385 G42XXEB_GPIO_VBASE, 386 _A(PXA2X0_GPIO_BASE), 387 _S(PXA250_GPIO_SIZE), 388 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 389 }, 390 { 391 G42XXEB_CLKMAN_VBASE, 392 _A(PXA2X0_CLKMAN_BASE), 393 _S(PXA2X0_CLKMAN_SIZE), 394 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 395 }, 396 { 397 G42XXEB_INTCTL_VBASE, 398 _A(PXA2X0_INTCTL_BASE), 399 _S(PXA2X0_INTCTL_SIZE), 400 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 401 }, 402 { 403 G42XXEB_FFUART_VBASE, 404 _A(PXA2X0_FFUART_BASE), 405 _S(4 * COM_NPORTS), 406 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 407 }, 408 { 409 G42XXEB_BTUART_VBASE, 410 _A(PXA2X0_BTUART_BASE), 411 _S(4 * COM_NPORTS), 412 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 413 }, 414 {0, 0, 0, 0,} 415 }; 416 417 #undef _A 418 #undef _S 419 420 421 /* 422 * u_int initarm(...) 423 * 424 * Initial entry point on startup. This gets called before main() is 425 * entered. 426 * It should be responsible for setting up everything that must be 427 * in place when main is called. 428 * This includes 429 * Taking a copy of the boot configuration structure. 430 * Initialising the physical console so characters can be printed. 431 * Setting up page tables for the kernel 432 * Relocating the kernel to the bottom of physical memory 433 */ 434 u_int 435 initarm(void *arg) 436 { 437 extern vaddr_t xscale_cache_clean_addr; 438 int loop; 439 int loop1; 440 u_int l1pagetable; 441 paddr_t memstart; 442 psize_t memsize; 443 int led_data = 1; 444 #ifdef DIAGNOSTIC 445 extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */ 446 #endif 447 448 #define LEDSTEP_P() ioreg8_write(G42XXEB_PLDREG_BASE+G42XXEB_LED, led_data++) 449 #define LEDSTEP() pldreg8_write(G42XXEB_LED, led_data++); 450 451 /* use physical address until pagetable is set */ 452 LEDSTEP_P(); 453 454 /* map some peripheral registers at static I/O area */ 455 pmap_devmap_bootstrap((vaddr_t)read_ttb(), g42xxeb_devmap); 456 457 LEDSTEP_P(); 458 459 /* start 32.768 kHz OSC */ 460 ioreg_write(G42XXEB_CLKMAN_VBASE + 0x08, 2); 461 /* Get ready for splfoo() */ 462 pxa2x0_intr_bootstrap(G42XXEB_INTCTL_VBASE); 463 464 LEDSTEP(); 465 466 /* 467 * Heads up ... Setup the CPU / MMU / TLB functions 468 */ 469 if (set_cpufuncs()) 470 panic("cpu not recognized!"); 471 472 LEDSTEP(); 473 474 /* 475 * Okay, RedBoot has provided us with the following memory map: 476 * 477 * Physical Address Range Description 478 * ----------------------- ---------------------------------- 479 * 0x00000000 - 0x01ffffff flash Memory (32MB) 480 * 0x04000000 - 0x05ffffff Application flash Memory (32MB) 481 * 0x08000000 - 0x080000ff I/O baseboard registers 482 * 0x0c000000 - 0x0c0fffff Ethernet Controller 483 * 0x14000000 - 0x17ffffff Expansion Card (64MB) 484 * 0x40000000 - 0x480fffff Processor Registers 485 * 0xa0000000 - 0xa3ffffff SDRAM Bank 0 (64MB) 486 * 487 * 488 * Virtual Address Range X C B Description 489 * ----------------------- - - - ---------------------------------- 490 * 0x00000000 - 0x00003fff N Y Y SDRAM 491 * 0x00004000 - 0x01ffffff N Y N ROM 492 * 0x08000000 - 0x080fffff N N N I/O baseboard registers 493 * 0x0a000000 - 0x0a0fffff N N N SRAM 494 * 0x40000000 - 0x480fffff N N N Processor Registers 495 * 0xa0000000 - 0xa000ffff N Y N RedBoot SDRAM 496 * 0xa0017000 - 0xa3ffffff Y Y Y SDRAM 497 * 0xc0000000 - 0xcfffffff Y Y Y Cache Flush Region 498 * (done by this routine) 499 * 0xfd000000 - 0xfd0000ff N N N I/O baseboard registers 500 * 0xfd100000 - 0xfd3fffff N N N Processor Registers. 501 * 0xfd400000 - 0xfd4fffff N N N FF-UART 502 * 0xfd500000 - 0xfd5fffff N N N BT-UART 503 * 504 * RedBoot's first level page table is at 0xa0004000. There 505 * are also 2 second-level tables at 0xa0008000 and 506 * 0xa0008400. We will continue to use them until we switch to 507 * our pagetable by setttb(). 508 */ 509 510 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 511 512 LEDSTEP(); 513 514 /* setup GPIO for BTUART, in case bootloader doesn't take care of it */ 515 pxa2x0_gpio_bootstrap(G42XXEB_GPIO_VBASE); 516 pxa2x0_gpio_config(g42xxeb_gpioconf); 517 518 LEDSTEP(); 519 520 consinit(); 521 #ifdef KGDB 522 LEDSTEP(); 523 kgdb_port_init(); 524 #endif 525 526 LEDSTEP(); 527 528 /* Talk to the user */ 529 printf("\nNetBSD/evbarm (g42xxeb) booting ...\n"); 530 531 #if 0 532 /* 533 * Examine the boot args string for options we need to know about 534 * now. 535 */ 536 process_kernel_args((char *)nwbootinfo.bt_args); 537 #endif 538 539 memstart = 0xa0000000; 540 memsize = 0x04000000; /* 64MB */ 541 542 printf("initarm: Configuring system ...\n"); 543 544 /* Fake bootconfig structure for the benefit of pmap.c */ 545 /* XXX must make the memory description h/w independent */ 546 bootconfig.dramblocks = 1; 547 bootconfig.dram[0].address = memstart; 548 bootconfig.dram[0].pages = memsize / PAGE_SIZE; 549 550 /* 551 * Set up the variables that define the availablilty of 552 * physical memory. For now, we're going to set 553 * physical_freestart to 0xa0200000 (where the kernel 554 * was loaded), and allocate the memory we need downwards. 555 * If we get too close to the L1 table that we set up, we 556 * will panic. We will update physical_freestart and 557 * physical_freeend later to reflect what pmap_bootstrap() 558 * wants to see. 559 * 560 * XXX pmap_bootstrap() needs an enema. 561 */ 562 physical_start = bootconfig.dram[0].address; 563 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 564 565 physical_freestart = 0xa0009000UL; 566 physical_freeend = 0xa0200000UL; 567 568 physmem = (physical_end - physical_start) / PAGE_SIZE; 569 570 #ifdef VERBOSE_INIT_ARM 571 /* Tell the user about the memory */ 572 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 573 physical_start, physical_end - 1); 574 #endif 575 576 /* 577 * Okay, the kernel starts 2MB in from the bottom of physical 578 * memory. We are going to allocate our bootstrap pages downwards 579 * from there. 580 * 581 * We need to allocate some fixed page tables to get the kernel 582 * going. We allocate one page directory and a number of page 583 * tables and store the physical addresses in the kernel_pt_table 584 * array. 585 * 586 * The kernel page directory must be on a 16K boundary. The page 587 * tables must be on 4K bounaries. What we do is allocate the 588 * page directory on the first 16K boundary that we encounter, and 589 * the page tables on 4K boundaries otherwise. Since we allocate 590 * at least 3 L2 page tables, we are guaranteed to encounter at 591 * least one 16K aligned region. 592 */ 593 594 #ifdef VERBOSE_INIT_ARM 595 printf("Allocating page tables\n"); 596 #endif 597 598 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 599 600 #ifdef VERBOSE_INIT_ARM 601 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 602 physical_freestart, free_pages, free_pages); 603 #endif 604 605 /* Define a macro to simplify memory allocation */ 606 #define valloc_pages(var, np) \ 607 alloc_pages((var).pv_pa, (np)); \ 608 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 609 610 #define alloc_pages(var, np) \ 611 physical_freeend -= ((np) * PAGE_SIZE); \ 612 if (physical_freeend < physical_freestart) \ 613 panic("initarm: out of memory"); \ 614 (var) = physical_freeend; \ 615 free_pages -= (np); \ 616 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 617 618 loop1 = 0; 619 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 620 /* Are we 16KB aligned for an L1 ? */ 621 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 622 && kernel_l1pt.pv_pa == 0) { 623 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 624 } else { 625 valloc_pages(kernel_pt_table[loop1], 626 L2_TABLE_SIZE / PAGE_SIZE); 627 ++loop1; 628 } 629 } 630 631 /* This should never be able to happen but better confirm that. */ 632 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 633 panic("initarm: Failed to align the kernel page directory"); 634 635 LEDSTEP(); 636 637 /* 638 * Allocate a page for the system page mapped to V0x00000000 639 * This page will just contain the system vectors and can be 640 * shared by all processes. 641 */ 642 alloc_pages(systempage.pv_pa, 1); 643 644 /* Allocate stacks for all modes */ 645 valloc_pages(irqstack, IRQ_STACK_SIZE); 646 valloc_pages(abtstack, ABT_STACK_SIZE); 647 valloc_pages(undstack, UND_STACK_SIZE); 648 valloc_pages(kernelstack, UPAGES); 649 650 /* Allocate enough pages for cleaning the Mini-Data cache. */ 651 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE); 652 valloc_pages(minidataclean, 1); 653 654 #ifdef VERBOSE_INIT_ARM 655 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 656 irqstack.pv_va); 657 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 658 abtstack.pv_va); 659 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 660 undstack.pv_va); 661 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 662 kernelstack.pv_va); 663 #endif 664 665 /* 666 * XXX Defer this to later so that we can reclaim the memory 667 * XXX used by the RedBoot page tables. 668 */ 669 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 670 671 /* 672 * Ok we have allocated physical pages for the primary kernel 673 * page tables 674 */ 675 676 #ifdef VERBOSE_INIT_ARM 677 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 678 #endif 679 680 /* 681 * Now we start construction of the L1 page table 682 * We start by mapping the L2 page tables into the L1. 683 * This means that we can replace L1 mappings later on if necessary 684 */ 685 l1pagetable = kernel_l1pt.pv_pa; 686 687 /* Map the L2 pages tables in the L1 page table */ 688 pmap_link_l2pt(l1pagetable, 0x00000000, 689 &kernel_pt_table[KERNEL_PT_SYS]); 690 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 691 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 692 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 693 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 694 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 695 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 696 697 /* update the top of the kernel VM */ 698 pmap_curmaxkvaddr = 699 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 700 701 #ifdef VERBOSE_INIT_ARM 702 printf("Mapping kernel\n"); 703 #endif 704 705 /* Now we fill in the L2 pagetable for the kernel static code/data */ 706 { 707 extern char etext[], _end[]; 708 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE; 709 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE; 710 u_int logical; 711 712 textsize = (textsize + PGOFSET) & ~PGOFSET; 713 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 714 715 logical = 0x00200000; /* offset of kernel in RAM */ 716 717 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 718 physical_start + logical, textsize, 719 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 720 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 721 physical_start + logical, totalsize - textsize, 722 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 723 } 724 725 #ifdef VERBOSE_INIT_ARM 726 printf("Constructing L2 page tables\n"); 727 #endif 728 729 /* Map the stack pages */ 730 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 731 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 732 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 733 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 734 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 735 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 736 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 737 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 738 739 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 740 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 741 742 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 743 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 744 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 745 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 746 } 747 748 /* Map the Mini-Data cache clean area. */ 749 xscale_setup_minidata(l1pagetable, minidataclean.pv_va, 750 minidataclean.pv_pa); 751 752 /* Map the vector page. */ 753 #if 1 754 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 755 * cache-clean code there. */ 756 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 757 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 758 #else 759 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 760 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 761 #endif 762 763 /* 764 * map integrated peripherals at same address in l1pagetable 765 * so that we can continue to use console. 766 */ 767 pmap_devmap_bootstrap(l1pagetable, g42xxeb_devmap); 768 769 /* 770 * Give the XScale global cache clean code an appropriately 771 * sized chunk of unmapped VA space starting at 0xff000000 772 * (our device mappings end before this address). 773 */ 774 xscale_cache_clean_addr = 0xff000000U; 775 776 /* 777 * Now we have the real page tables in place so we can switch to them. 778 * Once this is done we will be running with the REAL kernel page 779 * tables. 780 */ 781 782 /* 783 * Update the physical_freestart/physical_freeend/free_pages 784 * variables. 785 */ 786 { 787 extern char _end[]; 788 789 physical_freestart = physical_start + 790 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) - 791 KERNEL_BASE); 792 physical_freeend = physical_end; 793 free_pages = 794 (physical_freeend - physical_freestart) / PAGE_SIZE; 795 } 796 797 /* Switch tables */ 798 #ifdef VERBOSE_INIT_ARM 799 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 800 physical_freestart, free_pages, free_pages); 801 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 802 #endif 803 LEDSTEP(); 804 805 setttb(kernel_l1pt.pv_pa); 806 cpu_tlb_flushID(); 807 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 808 LEDSTEP(); 809 810 /* 811 * Moved from cpu_startup() as data_abort_handler() references 812 * this during uvm init 813 */ 814 proc0paddr = (struct user *)kernelstack.pv_va; 815 lwp0.l_addr = proc0paddr; 816 817 #ifdef VERBOSE_INIT_ARM 818 printf("bootstrap done.\n"); 819 #endif 820 821 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 822 823 /* 824 * Pages were allocated during the secondary bootstrap for the 825 * stacks for different CPU modes. 826 * We must now set the r13 registers in the different CPU modes to 827 * point to these stacks. 828 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 829 * of the stack memory. 830 */ 831 #ifdef VERBOSE_INIT_ARM 832 printf("init subsystems: stacks "); 833 #endif 834 835 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 836 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 837 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 838 839 /* 840 * Well we should set a data abort handler. 841 * Once things get going this will change as we will need a proper 842 * handler. 843 * Until then we will use a handler that just panics but tells us 844 * why. 845 * Initialisation of the vectors will just panic on a data abort. 846 * This just fills in a slighly better one. 847 */ 848 #ifdef VERBOSE_INIT_ARM 849 printf("vectors "); 850 #endif 851 data_abort_handler_address = (u_int)data_abort_handler; 852 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 853 undefined_handler_address = (u_int)undefinedinstruction_bounce; 854 855 /* Initialise the undefined instruction handlers */ 856 #ifdef VERBOSE_INIT_ARM 857 printf("undefined "); 858 #endif 859 undefined_init(); 860 861 /* Load memory into UVM. */ 862 #ifdef VERBOSE_INIT_ARM 863 printf("page "); 864 #endif 865 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 866 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 867 atop(physical_freestart), atop(physical_freeend), 868 VM_FREELIST_DEFAULT); 869 870 /* Boot strap pmap telling it where the kernel page table is */ 871 #ifdef VERBOSE_INIT_ARM 872 printf("pmap "); 873 #endif 874 LEDSTEP(); 875 pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE); 876 LEDSTEP(); 877 878 #ifdef __HAVE_MEMORY_DISK__ 879 md_root_setconf(memory_disk, sizeof memory_disk); 880 #endif 881 882 #ifdef BOOTHOWTO 883 boothowto |= BOOTHOWTO; 884 #endif 885 886 { 887 uint8_t sw = pldreg8_read(G42XXEB_DIPSW); 888 889 if (0 == (sw & (1<<0))) 890 boothowto ^= RB_KDB; 891 if (0 == (sw & (1<<1))) 892 boothowto ^= RB_SINGLE; 893 } 894 895 LEDSTEP(); 896 897 #ifdef IPKDB 898 /* Initialise ipkdb */ 899 ipkdb_init(); 900 if (boothowto & RB_KDB) 901 ipkdb_connect(0); 902 #endif 903 904 #ifdef KGDB 905 if (boothowto & RB_KDB) { 906 kgdb_debug_init = 1; 907 kgdb_connect(1); 908 } 909 #endif 910 911 #ifdef DDB 912 db_machine_init(); 913 914 /* Firmware doesn't load symbols. */ 915 ddb_init(0, NULL, NULL); 916 917 if (boothowto & RB_KDB) 918 Debugger(); 919 #endif 920 921 pldreg8_write(G42XXEB_LED, 0); 922 923 /* We return the new stack pointer address */ 924 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 925 } 926 927 #if 0 928 void 929 process_kernel_args(char *args) 930 { 931 932 boothowto = 0; 933 934 /* Make a local copy of the bootargs */ 935 strncpy(bootargs, args, MAX_BOOT_STRING); 936 937 args = bootargs; 938 boot_file = bootargs; 939 940 /* Skip the kernel image filename */ 941 while (*args != ' ' && *args != 0) 942 ++args; 943 944 if (*args != 0) 945 *args++ = 0; 946 947 while (*args == ' ') 948 ++args; 949 950 boot_args = args; 951 952 printf("bootfile: %s\n", boot_file); 953 printf("bootargs: %s\n", boot_args); 954 955 parse_mi_bootargs(boot_args); 956 } 957 #endif 958 959 #ifdef KGDB 960 #ifndef KGDB_DEVNAME 961 #define KGDB_DEVNAME "ffuart" 962 #endif 963 const char kgdb_devname[] = KGDB_DEVNAME; 964 965 #if (NCOM > 0) 966 #ifndef KGDB_DEVMODE 967 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 968 #endif 969 int comkgdbmode = KGDB_DEVMODE; 970 #endif /* NCOM */ 971 972 #endif /* KGDB */ 973 974 975 void 976 consinit(void) 977 { 978 static int consinit_called = 0; 979 uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN); 980 #if 0 981 char *console = CONSDEVNAME; 982 #endif 983 984 if (consinit_called != 0) 985 return; 986 987 consinit_called = 1; 988 989 #if NCOM > 0 990 991 #ifdef FFUARTCONSOLE 992 #ifdef KGDB 993 if (0 == strcmp(kgdb_devname, "ffuart")){ 994 /* port is reserved for kgdb */ 995 } else 996 #endif 997 if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE, 998 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) { 999 #if 0 1000 pxa2x0_clkman_config(CKEN_FFUART, 1); 1001 #else 1002 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, 1003 ckenreg|CKEN_FFUART); 1004 #endif 1005 1006 return; 1007 } 1008 #endif /* FFUARTCONSOLE */ 1009 1010 #ifdef BTUARTCONSOLE 1011 #ifdef KGDB 1012 if (0 == strcmp(kgdb_devname, "btuart")) { 1013 /* port is reserved for kgdb */ 1014 } else 1015 #endif 1016 if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE, 1017 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) { 1018 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, 1019 ckenreg|CKEN_BTUART); 1020 return; 1021 } 1022 #endif /* BTUARTCONSOLE */ 1023 1024 1025 #endif /* NCOM */ 1026 1027 } 1028 1029 #ifdef KGDB 1030 void 1031 kgdb_port_init(void) 1032 { 1033 #if (NCOM > 0) && defined(COM_PXA2X0) 1034 paddr_t paddr = 0; 1035 uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN); 1036 1037 if (0 == strcmp(kgdb_devname, "ffuart")) { 1038 paddr = PXA2X0_FFUART_BASE; 1039 ckenreg |= CKEN_FFUART; 1040 } 1041 else if (0 == strcmp(kgdb_devname, "btuart")) { 1042 paddr = PXA2X0_BTUART_BASE; 1043 ckenreg |= CKEN_BTUART; 1044 } 1045 1046 if (paddr && 1047 0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr, 1048 kgdb_rate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) { 1049 1050 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, ckenreg); 1051 1052 } 1053 1054 #endif 1055 } 1056 #endif 1057 1058
Indexes created Fri Oct 31 11:10:07 GMT 2025