g42xxeb_machdep.c revision 1.2
1 /* $NetBSD: g42xxeb_machdep.c,v 1.2 2005/03/17 16:22:57 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation. 5 * All rights reserved. 6 * 7 * Written by Hiroyuki Bessho for Genetec Corporation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of Genetec Corporation may not be used to endorse or 18 * promote products derived from this software without specific prior 19 * written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 * Machine dependant functions for kernel setup for Genetec G4250EBX 34 * evaluation board. 35 * 36 * Based on iq80310_machhdep.c 37 */ 38 /* 39 * Copyright (c) 2001 Wasabi Systems, Inc. 40 * All rights reserved. 41 * 42 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed for the NetBSD Project by 55 * Wasabi Systems, Inc. 56 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 57 * or promote products derived from this software without specific prior 58 * written permission. 59 * 60 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 61 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 70 * POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73 /* 74 * Copyright (c) 1997,1998 Mark Brinicombe. 75 * Copyright (c) 1997,1998 Causality Limited. 76 * All rights reserved. 77 * 78 * Redistribution and use in source and binary forms, with or without 79 * modification, are permitted provided that the following conditions 80 * are met: 81 * 1. Redistributions of source code must retain the above copyright 82 * notice, this list of conditions and the following disclaimer. 83 * 2. Redistributions in binary form must reproduce the above copyright 84 * notice, this list of conditions and the following disclaimer in the 85 * documentation and/or other materials provided with the distribution. 86 * 3. All advertising materials mentioning features or use of this software 87 * must display the following acknowledgement: 88 * This product includes software developed by Mark Brinicombe 89 * for the NetBSD Project. 90 * 4. The name of the company nor the name of the author may be used to 91 * endorse or promote products derived from this software without specific 92 * prior written permission. 93 * 94 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 95 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 96 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 97 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 98 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 99 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 100 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 101 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 102 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 103 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 104 * SUCH DAMAGE. 105 * 106 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation 107 * boards using RedBoot firmware. 108 */ 109 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_ipkdb.h" 113 #include "opt_pmap_debug.h" 114 #include "opt_md.h" 115 #include "opt_com.h" 116 #include "md.h" 117 #include "lcd.h" 118 119 #include <sys/param.h> 120 #include <sys/device.h> 121 #include <sys/systm.h> 122 #include <sys/kernel.h> 123 #include <sys/exec.h> 124 #include <sys/proc.h> 125 #include <sys/msgbuf.h> 126 #include <sys/reboot.h> 127 #include <sys/termios.h> 128 #include <sys/ksyms.h> 129 130 #include <uvm/uvm_extern.h> 131 132 #include <sys/conf.h> 133 #include <dev/cons.h> 134 #include <dev/md.h> 135 136 #include <machine/db_machdep.h> 137 #include <ddb/db_sym.h> 138 #include <ddb/db_extern.h> 139 #ifdef KGDB 140 #include <sys/kgdb.h> 141 #endif 142 #ifdef IPKDB 143 #include <ipkdb/ipkdb.h> /* for prototypes */ 144 #include <machine/ipkdb.h> 145 #endif 146 147 #include <machine/bootconfig.h> 148 #include <machine/bus.h> 149 #include <machine/cpu.h> 150 #include <machine/frame.h> 151 #include <arm/undefined.h> 152 153 #include <arm/arm32/machdep.h> 154 155 #include <arm/xscale/pxa2x0reg.h> 156 #include <arm/xscale/pxa2x0var.h> 157 #include <arm/xscale/pxa2x0_gpio.h> 158 #include <evbarm/g42xxeb/g42xxeb_reg.h> 159 #include <evbarm/g42xxeb/g42xxeb_var.h> 160 161 /* Kernel text starts 2MB in from the bottom of the kernel address space. */ 162 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000) 163 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 164 165 /* 166 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 167 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 168 */ 169 #define KERNEL_VM_SIZE 0x0C000000 170 171 172 /* 173 * Address to call from cpu_reset() to reset the machine. 174 * This is machine architecture dependant as it varies depending 175 * on where the ROM appears when you turn the MMU off. 176 */ 177 178 u_int cpu_reset_address = 0; 179 180 /* Define various stack sizes in pages */ 181 #define IRQ_STACK_SIZE 1 182 #define ABT_STACK_SIZE 1 183 #ifdef IPKDB 184 #define UND_STACK_SIZE 2 185 #else 186 #define UND_STACK_SIZE 1 187 #endif 188 189 BootConfig bootconfig; /* Boot config storage */ 190 char *boot_args = NULL; 191 char *boot_file = NULL; 192 193 vm_offset_t physical_start; 194 vm_offset_t physical_freestart; 195 vm_offset_t physical_freeend; 196 vm_offset_t physical_end; 197 u_int free_pages; 198 vm_offset_t pagetables_start; 199 int physmem = 0; 200 201 /*int debug_flags;*/ 202 #ifndef PMAP_STATIC_L1S 203 int max_processes = 64; /* Default number */ 204 #endif /* !PMAP_STATIC_L1S */ 205 206 /* Physical and virtual addresses for some global pages */ 207 pv_addr_t systempage; 208 pv_addr_t irqstack; 209 pv_addr_t undstack; 210 pv_addr_t abtstack; 211 pv_addr_t kernelstack; 212 pv_addr_t minidataclean; 213 214 vm_offset_t msgbufphys; 215 216 extern u_int data_abort_handler_address; 217 extern u_int prefetch_abort_handler_address; 218 extern u_int undefined_handler_address; 219 220 #ifdef PMAP_DEBUG 221 extern int pmap_debug_level; 222 #endif 223 224 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 225 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 226 #define KERNEL_PT_KERNEL_NUM 4 227 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM) 228 /* Page tables for mapping kernel VM */ 229 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 230 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 231 232 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 233 234 struct user *proc0paddr; 235 236 /* Prototypes */ 237 238 #if 0 239 void process_kernel_args(char *); 240 void parse_mi_bootargs(char *args); 241 #endif 242 243 void consinit(void); 244 void kgdb_port_init(void); 245 void change_clock(uint32_t v); 246 247 bs_protos(bs_notimpl); 248 249 #include "com.h" 250 #if NCOM > 0 251 #include <dev/ic/comreg.h> 252 #include <dev/ic/comvar.h> 253 #endif 254 255 #ifndef CONSPEED 256 #define CONSPEED B115200 /* What RedBoot uses */ 257 #endif 258 #ifndef CONMODE 259 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 260 #endif 261 262 int comcnspeed = CONSPEED; 263 int comcnmode = CONMODE; 264 265 /* 266 * void cpu_reboot(int howto, char *bootstr) 267 * 268 * Reboots the system 269 * 270 * Deal with any syncing, unmounting, dumping and shutdown hooks, 271 * then reset the CPU. 272 */ 273 void 274 cpu_reboot(int howto, char *bootstr) 275 { 276 #ifdef DIAGNOSTIC 277 /* info */ 278 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 279 #endif 280 281 /* 282 * If we are still cold then hit the air brakes 283 * and crash to earth fast 284 */ 285 if (cold) { 286 doshutdownhooks(); 287 printf("The operating system has halted.\n"); 288 printf("Please press any key to reboot.\n\n"); 289 cngetc(); 290 printf("rebooting...\n"); 291 cpu_reset(); 292 /*NOTREACHED*/ 293 } 294 295 /* Disable console buffering */ 296 /* cnpollc(1);*/ 297 298 /* 299 * If RB_NOSYNC was not specified sync the discs. 300 * Note: Unless cold is set to 1 here, syslogd will die during the 301 * unmount. It looks like syslogd is getting woken up only to find 302 * that it cannot page part of the binary in as the filesystem has 303 * been unmounted. 304 */ 305 if (!(howto & RB_NOSYNC)) 306 bootsync(); 307 308 /* Say NO to interrupts */ 309 splhigh(); 310 311 /* Do a dump if requested. */ 312 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 313 dumpsys(); 314 315 /* Run any shutdown hooks */ 316 doshutdownhooks(); 317 318 /* Make sure IRQ's are disabled */ 319 IRQdisable; 320 321 if (howto & RB_HALT) { 322 printf("The operating system has halted.\n"); 323 printf("Please press any key to reboot.\n\n"); 324 cngetc(); 325 } 326 327 printf("rebooting...\n"); 328 cpu_reset(); 329 /*NOTREACHED*/ 330 } 331 332 static __inline 333 pd_entry_t * 334 read_ttb(void) 335 { 336 long ttb; 337 338 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r" (ttb)); 339 340 341 return (pd_entry_t *)(ttb & ~((1<<14)-1)); 342 } 343 344 /* 345 * Static device mappings. These peripheral registers are mapped at 346 * fixed virtual addresses very early in initarm() so that we can use 347 * them while booting the kernel, and stay at the same address 348 * throughout whole kernel's life time. 349 * 350 * We use this table twice; once with bootstrap page table, and once 351 * with kernel's page table which we build up in initarm(). 352 * 353 * Since we map these registers into the bootstrap page table using 354 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 355 * registers segment-aligned and segment-rounded in order to avoid 356 * using the 2nd page tables. 357 */ 358 359 #define _A(a) ((a) & ~L1_S_OFFSET) 360 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 361 362 static const struct pmap_devmap g42xxeb_devmap[] = { 363 { 364 G42XXEB_PLDREG_VBASE, 365 _A(G42XXEB_PLDREG_BASE), 366 _S(G42XXEB_PLDREG_SIZE), 367 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 368 }, 369 { 370 G42XXEB_GPIO_VBASE, 371 _A(PXA2X0_GPIO_BASE), 372 _S(PXA2X0_GPIO_SIZE), 373 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 374 }, 375 { 376 G42XXEB_CLKMAN_VBASE, 377 _A(PXA2X0_CLKMAN_BASE), 378 _S(PXA2X0_CLKMAN_SIZE), 379 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 380 }, 381 { 382 G42XXEB_INTCTL_VBASE, 383 _A(PXA2X0_INTCTL_BASE), 384 _S(PXA2X0_INTCTL_SIZE), 385 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 386 }, 387 { 388 G42XXEB_FFUART_VBASE, 389 _A(PXA2X0_FFUART_BASE), 390 _S(4 * COM_NPORTS), 391 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 392 }, 393 { 394 G42XXEB_BTUART_VBASE, 395 _A(PXA2X0_BTUART_BASE), 396 _S(4 * COM_NPORTS), 397 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, 398 }, 399 {0, 0, 0, 0,} 400 }; 401 402 #undef _A 403 #undef _S 404 405 406 /* 407 * u_int initarm(...) 408 * 409 * Initial entry point on startup. This gets called before main() is 410 * entered. 411 * It should be responsible for setting up everything that must be 412 * in place when main is called. 413 * This includes 414 * Taking a copy of the boot configuration structure. 415 * Initialising the physical console so characters can be printed. 416 * Setting up page tables for the kernel 417 * Relocating the kernel to the bottom of physical memory 418 */ 419 u_int 420 initarm(void *arg) 421 { 422 extern vaddr_t xscale_cache_clean_addr; 423 int loop; 424 int loop1; 425 u_int l1pagetable; 426 pv_addr_t kernel_l1pt; 427 paddr_t memstart; 428 psize_t memsize; 429 int led_data = 1; 430 #ifdef DIAGNOSTIC 431 extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */ 432 #endif 433 434 #define LEDSTEP_P() ioreg8_write(G42XXEB_PLDREG_BASE+G42XXEB_LED, led_data++) 435 #define LEDSTEP() pldreg8_write(G42XXEB_LED, led_data++); 436 437 /* use physical address until pagetable is set */ 438 LEDSTEP_P(); 439 440 /* map some peripheral registers at static I/O area */ 441 pmap_devmap_bootstrap((vaddr_t)read_ttb(), g42xxeb_devmap); 442 443 LEDSTEP_P(); 444 445 /* start 32.768KHz OSC */ 446 ioreg_write(G42XXEB_CLKMAN_VBASE + 0x08, 2); 447 /* Get ready for splfoo() */ 448 pxa2x0_intr_bootstrap(G42XXEB_INTCTL_VBASE); 449 450 LEDSTEP(); 451 452 /* 453 * Heads up ... Setup the CPU / MMU / TLB functions 454 */ 455 if (set_cpufuncs()) 456 panic("cpu not recognized!"); 457 458 LEDSTEP(); 459 460 /* 461 * Okay, RedBoot has provided us with the following memory map: 462 * 463 * Physical Address Range Description 464 * ----------------------- ---------------------------------- 465 * 0x00000000 - 0x01ffffff flash Memory (32MB) 466 * 0x04000000 - 0x05ffffff Application flash Memory (32MB) 467 * 0x08000000 - 0x080000ff I/O baseboard registers 468 * 0x0c000000 - 0x0c0fffff Ethernet Controller 469 * 0x14000000 - 0x17ffffff Expansion Card (64MB) 470 * 0x40000000 - 0x480fffff Processor Registers 471 * 0xa0000000 - 0xa3ffffff SDRAM Bank 0 (64MB) 472 * 473 * 474 * Virtual Address Range X C B Description 475 * ----------------------- - - - ---------------------------------- 476 * 0x00000000 - 0x00003fff N Y Y SDRAM 477 * 0x00004000 - 0x01ffffff N Y N ROM 478 * 0x08000000 - 0x080fffff N N N I/O baseboard registers 479 * 0x0a000000 - 0x0a0fffff N N N SRAM 480 * 0x40000000 - 0x480fffff N N N Processor Registers 481 * 0xa0000000 - 0xa000ffff N Y N RedBoot SDRAM 482 * 0xa0017000 - 0xa3ffffff Y Y Y SDRAM 483 * 0xc0000000 - 0xcfffffff Y Y Y Cache Flush Region 484 * (done by this routine) 485 * 0xfd000000 - 0xfd0000ff N N N I/O baseboard registers 486 * 0xfd100000 - 0xfd3fffff N N N Processor Registers. 487 * 0xfd400000 - 0xfd4fffff N N N FF-UART 488 * 0xfd500000 - 0xfd5fffff N N N BT-UART 489 * 490 * The first level page table is at 0xa0004000. There are also 491 * 2 second-level tables at 0xa0008000 and 0xa0008400. 492 * 493 */ 494 495 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 496 497 LEDSTEP(); 498 499 /* setup GPIO for BTUART, in case bootloader doesn't take care of it */ 500 pxa2x0_gpio_bootstrap(G42XXEB_GPIO_VBASE); 501 pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN); 502 pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT); 503 pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN); 504 pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT); 505 506 LEDSTEP(); 507 508 consinit(); 509 #ifdef KGDB 510 LEDSTEP(); 511 kgdb_port_init(); 512 #endif 513 514 LEDSTEP(); 515 516 /* Talk to the user */ 517 printf("\nNetBSD/evbarm (g42xxeb) booting ...\n"); 518 519 #if 0 520 /* 521 * Examine the boot args string for options we need to know about 522 * now. 523 */ 524 process_kernel_args((char *)nwbootinfo.bt_args); 525 #endif 526 527 memstart = 0xa0000000; 528 memsize = 0x04000000; /* 64MB */ 529 530 printf("initarm: Configuring system ...\n"); 531 532 /* Fake bootconfig structure for the benefit of pmap.c */ 533 /* XXX must make the memory description h/w independant */ 534 bootconfig.dramblocks = 1; 535 bootconfig.dram[0].address = memstart; 536 bootconfig.dram[0].pages = memsize / PAGE_SIZE; 537 538 /* 539 * Set up the variables that define the availablilty of 540 * physical memory. For now, we're going to set 541 * physical_freestart to 0xa0200000 (where the kernel 542 * was loaded), and allocate the memory we need downwards. 543 * If we get too close to the L1 table that we set up, we 544 * will panic. We will update physical_freestart and 545 * physical_freeend later to reflect what pmap_bootstrap() 546 * wants to see. 547 * 548 * XXX pmap_bootstrap() needs an enema. 549 */ 550 physical_start = bootconfig.dram[0].address; 551 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 552 553 physical_freestart = 0xa0009000UL; 554 physical_freeend = 0xa0200000UL; 555 556 physmem = (physical_end - physical_start) / PAGE_SIZE; 557 558 #ifdef VERBOSE_INIT_ARM 559 /* Tell the user about the memory */ 560 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 561 physical_start, physical_end - 1); 562 #endif 563 564 /* 565 * Okay, the kernel starts 2MB in from the bottom of physical 566 * memory. We are going to allocate our bootstrap pages downwards 567 * from there. 568 * 569 * We need to allocate some fixed page tables to get the kernel 570 * going. We allocate one page directory and a number of page 571 * tables and store the physical addresses in the kernel_pt_table 572 * array. 573 * 574 * The kernel page directory must be on a 16K boundary. The page 575 * tables must be on 4K bounaries. What we do is allocate the 576 * page directory on the first 16K boundary that we encounter, and 577 * the page tables on 4K boundaries otherwise. Since we allocate 578 * at least 3 L2 page tables, we are guaranteed to encounter at 579 * least one 16K aligned region. 580 */ 581 582 #ifdef VERBOSE_INIT_ARM 583 printf("Allocating page tables\n"); 584 #endif 585 586 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 587 588 #ifdef VERBOSE_INIT_ARM 589 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 590 physical_freestart, free_pages, free_pages); 591 #endif 592 593 /* Define a macro to simplify memory allocation */ 594 #define valloc_pages(var, np) \ 595 alloc_pages((var).pv_pa, (np)); \ 596 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 597 598 #define alloc_pages(var, np) \ 599 physical_freeend -= ((np) * PAGE_SIZE); \ 600 if (physical_freeend < physical_freestart) \ 601 panic("initarm: out of memory"); \ 602 (var) = physical_freeend; \ 603 free_pages -= (np); \ 604 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 605 606 loop1 = 0; 607 kernel_l1pt.pv_pa = 0; 608 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 609 /* Are we 16KB aligned for an L1 ? */ 610 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 611 && kernel_l1pt.pv_pa == 0) { 612 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 613 } else { 614 valloc_pages(kernel_pt_table[loop1], 615 L2_TABLE_SIZE / PAGE_SIZE); 616 ++loop1; 617 } 618 } 619 620 /* This should never be able to happen but better confirm that. */ 621 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 622 panic("initarm: Failed to align the kernel page directory"); 623 624 LEDSTEP(); 625 626 /* 627 * Allocate a page for the system page mapped to V0x00000000 628 * This page will just contain the system vectors and can be 629 * shared by all processes. 630 */ 631 alloc_pages(systempage.pv_pa, 1); 632 633 /* Allocate stacks for all modes */ 634 valloc_pages(irqstack, IRQ_STACK_SIZE); 635 valloc_pages(abtstack, ABT_STACK_SIZE); 636 valloc_pages(undstack, UND_STACK_SIZE); 637 valloc_pages(kernelstack, UPAGES); 638 639 /* Allocate enough pages for cleaning the Mini-Data cache. */ 640 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE); 641 valloc_pages(minidataclean, 1); 642 643 #ifdef VERBOSE_INIT_ARM 644 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 645 irqstack.pv_va); 646 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 647 abtstack.pv_va); 648 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 649 undstack.pv_va); 650 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 651 kernelstack.pv_va); 652 #endif 653 654 /* 655 * XXX Defer this to later so that we can reclaim the memory 656 * XXX used by the RedBoot page tables. 657 */ 658 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 659 660 /* 661 * Ok we have allocated physical pages for the primary kernel 662 * page tables 663 */ 664 665 #ifdef VERBOSE_INIT_ARM 666 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 667 #endif 668 669 /* 670 * Now we start construction of the L1 page table 671 * We start by mapping the L2 page tables into the L1. 672 * This means that we can replace L1 mappings later on if necessary 673 */ 674 l1pagetable = kernel_l1pt.pv_pa; 675 676 /* Map the L2 pages tables in the L1 page table */ 677 pmap_link_l2pt(l1pagetable, 0x00000000, 678 &kernel_pt_table[KERNEL_PT_SYS]); 679 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 680 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 681 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 682 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 683 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 684 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 685 686 /* update the top of the kernel VM */ 687 pmap_curmaxkvaddr = 688 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 689 690 #ifdef VERBOSE_INIT_ARM 691 printf("Mapping kernel\n"); 692 #endif 693 694 /* Now we fill in the L2 pagetable for the kernel static code/data */ 695 { 696 extern char etext[], _end[]; 697 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE; 698 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE; 699 u_int logical; 700 701 textsize = (textsize + PGOFSET) & ~PGOFSET; 702 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 703 704 logical = 0x00200000; /* offset of kernel in RAM */ 705 706 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 707 physical_start + logical, textsize, 708 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 709 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 710 physical_start + logical, totalsize - textsize, 711 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 712 } 713 714 #ifdef VERBOSE_INIT_ARM 715 printf("Constructing L2 page tables\n"); 716 #endif 717 718 /* Map the stack pages */ 719 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 720 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 721 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 722 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 723 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 724 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 725 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 726 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 727 728 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 729 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 730 731 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 732 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 733 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 734 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 735 } 736 737 /* Map the Mini-Data cache clean area. */ 738 xscale_setup_minidata(l1pagetable, minidataclean.pv_va, 739 minidataclean.pv_pa); 740 741 /* Map the vector page. */ 742 #if 1 743 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 744 * cache-clean code there. */ 745 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 746 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 747 #else 748 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 749 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 750 #endif 751 752 /* 753 * map integrated peripherals at same address in l1pagetable 754 * so that we can continue to use console. 755 */ 756 pmap_devmap_bootstrap(l1pagetable, g42xxeb_devmap); 757 758 /* 759 * Give the XScale global cache clean code an appropriately 760 * sized chunk of unmapped VA space starting at 0xff000000 761 * (our device mappings end before this address). 762 */ 763 xscale_cache_clean_addr = 0xff000000U; 764 765 /* 766 * Now we have the real page tables in place so we can switch to them. 767 * Once this is done we will be running with the REAL kernel page 768 * tables. 769 */ 770 771 /* 772 * Update the physical_freestart/physical_freeend/free_pages 773 * variables. 774 */ 775 { 776 extern char _end[]; 777 778 physical_freestart = physical_start + 779 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) - 780 KERNEL_BASE); 781 physical_freeend = physical_end; 782 free_pages = 783 (physical_freeend - physical_freestart) / PAGE_SIZE; 784 } 785 786 /* Switch tables */ 787 #ifdef VERBOSE_INIT_ARM 788 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 789 physical_freestart, free_pages, free_pages); 790 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 791 #endif 792 LEDSTEP(); 793 794 setttb(kernel_l1pt.pv_pa); 795 cpu_tlb_flushID(); 796 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 797 LEDSTEP(); 798 799 /* 800 * Moved from cpu_startup() as data_abort_handler() references 801 * this during uvm init 802 */ 803 proc0paddr = (struct user *)kernelstack.pv_va; 804 lwp0.l_addr = proc0paddr; 805 806 #ifdef VERBOSE_INIT_ARM 807 printf("bootstrap done.\n"); 808 #endif 809 810 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 811 812 /* 813 * Pages were allocated during the secondary bootstrap for the 814 * stacks for different CPU modes. 815 * We must now set the r13 registers in the different CPU modes to 816 * point to these stacks. 817 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 818 * of the stack memory. 819 */ 820 #ifdef VERBOSE_INIT_ARM 821 printf("init subsystems: stacks "); 822 #endif 823 824 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 825 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 826 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 827 828 /* 829 * Well we should set a data abort handler. 830 * Once things get going this will change as we will need a proper 831 * handler. 832 * Until then we will use a handler that just panics but tells us 833 * why. 834 * Initialisation of the vectors will just panic on a data abort. 835 * This just fills in a slighly better one. 836 */ 837 #ifdef VERBOSE_INIT_ARM 838 printf("vectors "); 839 #endif 840 data_abort_handler_address = (u_int)data_abort_handler; 841 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 842 undefined_handler_address = (u_int)undefinedinstruction_bounce; 843 844 /* Initialise the undefined instruction handlers */ 845 #ifdef VERBOSE_INIT_ARM 846 printf("undefined "); 847 #endif 848 undefined_init(); 849 850 /* Load memory into UVM. */ 851 #ifdef VERBOSE_INIT_ARM 852 printf("page "); 853 #endif 854 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 855 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 856 atop(physical_freestart), atop(physical_freeend), 857 VM_FREELIST_DEFAULT); 858 859 /* Boot strap pmap telling it where the kernel page table is */ 860 #ifdef VERBOSE_INIT_ARM 861 printf("pmap "); 862 #endif 863 LEDSTEP(); 864 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE, 865 KERNEL_VM_BASE + KERNEL_VM_SIZE); 866 LEDSTEP(); 867 868 #ifdef __HAVE_MEMORY_DISK__ 869 md_root_setconf(memory_disk, sizeof memory_disk); 870 #endif 871 872 #ifdef BOOTHOWTO 873 boothowto |= BOOTHOWTO; 874 #endif 875 876 { 877 uint8_t sw = pldreg8_read(G42XXEB_DIPSW); 878 879 if (0 == (sw & (1<<0))) 880 boothowto ^= RB_KDB; 881 if (0 == (sw & (1<<1))) 882 boothowto ^= RB_SINGLE; 883 } 884 885 LEDSTEP(); 886 887 #ifdef IPKDB 888 /* Initialise ipkdb */ 889 ipkdb_init(); 890 if (boothowto & RB_KDB) 891 ipkdb_connect(0); 892 #endif 893 894 #ifdef KGDB 895 if (boothowto & RB_KDB) { 896 kgdb_debug_init = 1; 897 kgdb_connect(1); 898 } 899 #endif 900 901 #ifdef DDB 902 db_machine_init(); 903 904 /* Firmware doesn't load symbols. */ 905 ddb_init(0, NULL, NULL); 906 907 if (boothowto & RB_KDB) 908 Debugger(); 909 #endif 910 911 pldreg8_write(G42XXEB_LED, 0); 912 913 /* We return the new stack pointer address */ 914 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 915 } 916 917 #if 0 918 void 919 process_kernel_args(char *args) 920 { 921 922 boothowto = 0; 923 924 /* Make a local copy of the bootargs */ 925 strncpy(bootargs, args, MAX_BOOT_STRING); 926 927 args = bootargs; 928 boot_file = bootargs; 929 930 /* Skip the kernel image filename */ 931 while (*args != ' ' && *args != 0) 932 ++args; 933 934 if (*args != 0) 935 *args++ = 0; 936 937 while (*args == ' ') 938 ++args; 939 940 boot_args = args; 941 942 printf("bootfile: %s\n", boot_file); 943 printf("bootargs: %s\n", boot_args); 944 945 parse_mi_bootargs(boot_args); 946 } 947 #endif 948 949 #ifdef KGDB 950 #ifndef KGDB_DEVNAME 951 #define KGDB_DEVNAME "ffuart" 952 #endif 953 const char kgdb_devname[] = KGDB_DEVNAME; 954 955 #if (NCOM > 0) 956 #ifndef KGDB_DEVMODE 957 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 958 #endif 959 int comkgdbmode = KGDB_DEVMODE; 960 #endif /* NCOM */ 961 962 #endif /* KGDB */ 963 964 965 void 966 consinit(void) 967 { 968 static int consinit_called = 0; 969 uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN); 970 #if 0 971 char *console = CONSDEVNAME; 972 #endif 973 974 if (consinit_called != 0) 975 return; 976 977 consinit_called = 1; 978 979 #if NCOM > 0 980 981 #ifdef FFUARTCONSOLE 982 #ifdef KGDB 983 if (0 == strcmp(kgdb_devname, "ffuart")){ 984 /* port is reserved for kgdb */ 985 } else 986 #endif 987 if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE, 988 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) { 989 #if 0 990 pxa2x0_clkman_config(CKEN_FFUART, 1); 991 #else 992 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, 993 ckenreg|CKEN_FFUART); 994 #endif 995 996 return; 997 } 998 #endif /* FFUARTCONSOLE */ 999 1000 #ifdef BTUARTCONSOLE 1001 #ifdef KGDB 1002 if (0 == strcmp(kgdb_devname, "btuart")) { 1003 /* port is reserved for kgdb */ 1004 } else 1005 #endif 1006 if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE, 1007 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode)) { 1008 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, 1009 ckenreg|CKEN_BTUART); 1010 return; 1011 } 1012 #endif /* BTUARTCONSOLE */ 1013 1014 1015 #endif /* NCOM */ 1016 1017 } 1018 1019 #ifdef KGDB 1020 void 1021 kgdb_port_init(void) 1022 { 1023 #if (NCOM > 0) && defined(COM_PXA2X0) 1024 paddr_t paddr = 0; 1025 uint32_t ckenreg = ioreg_read(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN); 1026 1027 if (0 == strcmp(kgdb_devname, "ffuart")) { 1028 paddr = PXA2X0_FFUART_BASE; 1029 ckenreg |= CKEN_FFUART; 1030 } 1031 else if (0 == strcmp(kgdb_devname, "btuart")) { 1032 paddr = PXA2X0_BTUART_BASE; 1033 ckenreg |= CKEN_BTUART; 1034 } 1035 1036 if (paddr && 1037 0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr, 1038 kgdb_rate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) { 1039 1040 ioreg_write(G42XXEB_CLKMAN_VBASE+CLKMAN_CKEN, ckenreg); 1041 1042 } 1043 1044 #endif 1045 } 1046 #endif 1047 1048
Indexes created Wed Oct 22 13:09:56 GMT 2025