g42xxeb_mci.c revision 1.3 1 1.3 nonaka /* $NetBSD: g42xxeb_mci.c,v 1.3 2012/01/21 19:44:28 nonaka Exp $ */
2 1.1 bsh
3 1.1 bsh /*-
4 1.1 bsh * Copyright (c) 2009 Genetec Corporation. All rights reserved.
5 1.1 bsh * Written by Hiroyuki Bessho for Genetec Corporation.
6 1.1 bsh *
7 1.1 bsh * Redistribution and use in source and binary forms, with or without
8 1.1 bsh * modification, are permitted provided that the following conditions
9 1.1 bsh * are met:
10 1.1 bsh * 1. Redistributions of source code must retain the above copyright
11 1.1 bsh * notice, this list of conditions and the following disclaimer.
12 1.1 bsh * 2. Redistributions in binary form must reproduce the above
13 1.1 bsh * copyright notice, this list of conditions and the following
14 1.1 bsh * disclaimer in the documentation and/or other materials provided
15 1.1 bsh * with the distribution.
16 1.1 bsh *
17 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS''
18 1.1 bsh * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
20 1.1 bsh * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
21 1.1 bsh * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 1.1 bsh * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 1.1 bsh * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 1.1 bsh * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 1.1 bsh * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 bsh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
27 1.1 bsh * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 bsh * SUCH DAMAGE.
29 1.1 bsh */
30 1.1 bsh
31 1.1 bsh /* derived from zaurus/dev/zmci.c */
32 1.1 bsh
33 1.1 bsh /*-
34 1.3 nonaka * Copyright (C) 2006-2008 NONAKA Kimihiro <nonaka (at) netbsd.org>
35 1.1 bsh * All rights reserved.
36 1.1 bsh *
37 1.1 bsh * Redistribution and use in source and binary forms, with or without
38 1.1 bsh * modification, are permitted provided that the following conditions
39 1.1 bsh * are met:
40 1.1 bsh * 1. Redistributions of source code must retain the above copyright
41 1.1 bsh * notice, this list of conditions and the following disclaimer.
42 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 bsh * notice, this list of conditions and the following disclaimer in the
44 1.1 bsh * documentation and/or other materials provided with the distribution.
45 1.1 bsh *
46 1.3 nonaka * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
47 1.3 nonaka * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
48 1.3 nonaka * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
49 1.3 nonaka * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
50 1.3 nonaka * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
51 1.3 nonaka * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
52 1.3 nonaka * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
53 1.3 nonaka * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
54 1.3 nonaka * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
55 1.3 nonaka * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 1.1 bsh */
57 1.1 bsh
58 1.1 bsh #include <sys/cdefs.h>
59 1.3 nonaka __KERNEL_RCSID(0, "$NetBSD: g42xxeb_mci.c,v 1.3 2012/01/21 19:44:28 nonaka Exp $");
60 1.1 bsh
61 1.1 bsh #include <sys/param.h>
62 1.1 bsh #include <sys/device.h>
63 1.1 bsh #include <sys/systm.h>
64 1.1 bsh #include <sys/bus.h>
65 1.1 bsh #include <sys/pmf.h>
66 1.1 bsh
67 1.1 bsh #include <machine/intr.h>
68 1.1 bsh
69 1.1 bsh #include <arm/xscale/pxa2x0cpu.h>
70 1.1 bsh #include <arm/xscale/pxa2x0reg.h>
71 1.1 bsh #include <arm/xscale/pxa2x0var.h>
72 1.1 bsh #include <arm/xscale/pxa2x0_gpio.h>
73 1.1 bsh #include <arm/xscale/pxa2x0_mci.h>
74 1.1 bsh
75 1.1 bsh #include <dev/sdmmc/sdmmcreg.h>
76 1.1 bsh
77 1.1 bsh #include <arm/xscale/pxa2x0var.h>
78 1.1 bsh #include <evbarm/g42xxeb/g42xxeb_var.h>
79 1.1 bsh
80 1.1 bsh struct g42xxeb_mci_softc {
81 1.1 bsh struct pxamci_softc sc_mci;
82 1.1 bsh
83 1.1 bsh bus_space_tag_t sc_obio_iot;
84 1.1 bsh bus_space_handle_t sc_obio_ioh;
85 1.1 bsh
86 1.1 bsh void *sc_detect_ih;
87 1.1 bsh };
88 1.1 bsh
89 1.1 bsh static int pxamci_match(device_t, cfdata_t, void *);
90 1.1 bsh static void pxamci_attach(device_t, device_t, void *);
91 1.1 bsh
92 1.1 bsh CFATTACH_DECL_NEW(pxamci_obio, sizeof(struct g42xxeb_mci_softc),
93 1.1 bsh pxamci_match, pxamci_attach, NULL, NULL);
94 1.1 bsh
95 1.1 bsh static int g42xxeb_mci_intr(void *arg);
96 1.1 bsh
97 1.1 bsh static uint32_t g42xxeb_mci_get_ocr(void *);
98 1.1 bsh static int g42xxeb_mci_set_power(void *, uint32_t);
99 1.1 bsh static int g42xxeb_mci_card_detect(void *);
100 1.1 bsh static int g42xxeb_mci_write_protect(void *);
101 1.1 bsh
102 1.1 bsh static int
103 1.1 bsh pxamci_match(device_t parent, cfdata_t cf, void *aux)
104 1.1 bsh {
105 1.1 bsh
106 1.1 bsh if (strcmp(cf->cf_name, "pxamci") == 0)
107 1.1 bsh return 1;
108 1.1 bsh return 0;
109 1.1 bsh }
110 1.1 bsh
111 1.1 bsh struct pxa2x0_gpioconf g42xxeb_pxamci_gpioconf[] = {
112 1.1 bsh { 6, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCLK */
113 1.1 bsh { 8, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS0 */
114 1.1 bsh { 9, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS1 */
115 1.1 bsh { -1 }
116 1.1 bsh };
117 1.1 bsh
118 1.1 bsh
119 1.1 bsh static void
120 1.1 bsh pxamci_attach(device_t parent, device_t self, void *aux)
121 1.1 bsh {
122 1.1 bsh struct g42xxeb_mci_softc *sc = device_private(self);
123 1.1 bsh struct obio_attach_args *oba = aux;
124 1.1 bsh struct obio_softc *osc = device_private(parent);
125 1.1 bsh struct pxaip_attach_args pxa;
126 1.1 bsh struct pxa2x0_gpioconf *gpioconf[] = {
127 1.1 bsh g42xxeb_pxamci_gpioconf,
128 1.1 bsh NULL
129 1.1 bsh };
130 1.1 bsh
131 1.1 bsh bus_space_tag_t iot = oba->oba_iot;
132 1.1 bsh
133 1.1 bsh sc->sc_mci.sc_dev = self;
134 1.1 bsh
135 1.1 bsh pxa2x0_gpio_config(gpioconf);
136 1.1 bsh
137 1.1 bsh /* Establish card detect interrupt */
138 1.1 bsh sc->sc_detect_ih = obio_intr_establish(osc, G42XXEB_INT_MMCSD,
139 1.1 bsh IPL_BIO, IST_EDGE_BOTH, g42xxeb_mci_intr, sc);
140 1.1 bsh if (sc->sc_detect_ih == NULL) {
141 1.1 bsh aprint_error_dev(self,
142 1.1 bsh "unable to establish SD detect interrupt\n");
143 1.1 bsh return;
144 1.1 bsh }
145 1.1 bsh
146 1.1 bsh sc->sc_mci.sc_tag.cookie = sc;
147 1.1 bsh sc->sc_mci.sc_tag.get_ocr = g42xxeb_mci_get_ocr;
148 1.1 bsh sc->sc_mci.sc_tag.set_power = g42xxeb_mci_set_power;
149 1.1 bsh sc->sc_mci.sc_tag.card_detect = g42xxeb_mci_card_detect;
150 1.1 bsh sc->sc_mci.sc_tag.write_protect = g42xxeb_mci_write_protect;
151 1.1 bsh sc->sc_mci.sc_caps = 0;
152 1.1 bsh
153 1.1 bsh pxa.pxa_iot = iot; /* actually, here we want I/O tag for
154 1.1 bsh pxaip, not for obio. */
155 1.1 bsh
156 1.1 bsh #if 0
157 1.1 bsh /* pxamci_attach_sub() ignores following values and uses
158 1.1 bsh * constants. */
159 1.1 bsh pxa.pxa_addr = PXA2X0_MMC_BASE;
160 1.1 bsh pxa.pxa_size = PXA2X0_MMC_SIZE;
161 1.1 bsh pxa.pxa_intr = PXA2X0_INT_MMC;
162 1.1 bsh #endif
163 1.1 bsh
164 1.2 bsh /* disable DMA for sdmmc for now. */
165 1.2 bsh SET(sc->sc_mci.sc_caps, PMC_CAPS_NO_DMA);
166 1.2 bsh
167 1.1 bsh if (pxamci_attach_sub(self, &pxa)) {
168 1.1 bsh aprint_error_dev(self,
169 1.1 bsh "unable to attach MMC controller\n");
170 1.1 bsh goto free_intr;
171 1.1 bsh }
172 1.1 bsh
173 1.1 bsh if (!pmf_device_register(self, NULL, NULL)) {
174 1.1 bsh aprint_error_dev(self,
175 1.1 bsh "couldn't establish power handler\n");
176 1.1 bsh }
177 1.1 bsh
178 1.1 bsh sc->sc_obio_iot = iot;
179 1.1 bsh sc->sc_obio_ioh = osc->sc_obioreg_ioh;
180 1.1 bsh
181 1.1 bsh return;
182 1.1 bsh
183 1.1 bsh free_intr:
184 1.1 bsh obio_intr_disestablish(osc, G42XXEB_INT_MMCSD, sc->sc_detect_ih);
185 1.1 bsh sc->sc_detect_ih = NULL;
186 1.1 bsh }
187 1.1 bsh
188 1.1 bsh static int
189 1.1 bsh g42xxeb_mci_intr(void *arg)
190 1.1 bsh {
191 1.1 bsh struct g42xxeb_mci_softc *sc = (struct g42xxeb_mci_softc *)arg;
192 1.1 bsh
193 1.1 bsh pxamci_card_detect_event(&sc->sc_mci);
194 1.1 bsh
195 1.1 bsh return 1;
196 1.1 bsh }
197 1.1 bsh
198 1.1 bsh static uint32_t
199 1.1 bsh g42xxeb_mci_get_ocr(void *arg)
200 1.1 bsh {
201 1.1 bsh
202 1.1 bsh return MMC_OCR_3_2V_3_3V;
203 1.1 bsh }
204 1.1 bsh
205 1.1 bsh static int
206 1.1 bsh g42xxeb_mci_set_power(void *arg, uint32_t ocr)
207 1.1 bsh {
208 1.1 bsh /* nothing to do */
209 1.1 bsh return 0;
210 1.1 bsh }
211 1.1 bsh
212 1.1 bsh /*
213 1.1 bsh * Return non-zero if the card is currently inserted.
214 1.1 bsh */
215 1.1 bsh static int
216 1.1 bsh g42xxeb_mci_card_detect(void *arg)
217 1.1 bsh {
218 1.1 bsh struct g42xxeb_mci_softc *sc = (struct g42xxeb_mci_softc *)arg;
219 1.1 bsh uint16_t reg;
220 1.1 bsh
221 1.1 bsh reg = bus_space_read_2(sc->sc_obio_iot, sc->sc_obio_ioh,
222 1.1 bsh G42XXEB_INTSTS2);
223 1.1 bsh
224 1.1 bsh return !(reg & (1<<G42XXEB_INT_MMCSD));
225 1.1 bsh }
226 1.1 bsh
227 1.1 bsh /*
228 1.1 bsh * Return non-zero if the card is currently write-protected.
229 1.1 bsh */
230 1.1 bsh static int
231 1.1 bsh g42xxeb_mci_write_protect(void *arg)
232 1.1 bsh {
233 1.1 bsh struct g42xxeb_mci_softc *sc = (struct g42xxeb_mci_softc *)arg;
234 1.1 bsh uint16_t reg;
235 1.1 bsh
236 1.1 bsh reg = bus_space_read_2(sc->sc_obio_iot, sc->sc_obio_ioh,
237 1.1 bsh G42XXEB_WP);
238 1.1 bsh
239 1.1 bsh return reg & 1;
240 1.1 bsh }
241