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gb225_slhci.c revision 1.3
      1  1.3  thorpej /*	$NetBSD: gb225_slhci.c,v 1.3 2006/02/23 05:37:47 thorpej Exp $ */
      2  1.1      bsh 
      3  1.1      bsh /*
      4  1.1      bsh  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1      bsh  * All rights reserved.
      6  1.1      bsh  *
      7  1.1      bsh  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1      bsh  * by Tetsuya Isaki.
      9  1.1      bsh  *
     10  1.1      bsh  * Redistribution and use in source and binary forms, with or without
     11  1.1      bsh  * modification, are permitted provided that the following conditions
     12  1.1      bsh  * are met:
     13  1.1      bsh  * 1. Redistributions of source code must retain the above copyright
     14  1.1      bsh  *    notice, this list of conditions and the following disclaimer.
     15  1.1      bsh  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1      bsh  *    notice, this list of conditions and the following disclaimer in the
     17  1.1      bsh  *    documentation and/or other materials provided with the distribution.
     18  1.1      bsh  * 3. All advertising materials mentioning features or use of this software
     19  1.1      bsh  *    must display the following acknowledgement:
     20  1.1      bsh  *      This product includes software developed by the NetBSD
     21  1.1      bsh  *      Foundation, Inc. and its contributors.
     22  1.1      bsh  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1      bsh  *    contributors may be used to endorse or promote products derived
     24  1.1      bsh  *    from this software without specific prior written permission.
     25  1.1      bsh  *
     26  1.1      bsh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1      bsh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1      bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1      bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1      bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1      bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1      bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1      bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1      bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1      bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1      bsh  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1      bsh  */
     38  1.1      bsh 
     39  1.1      bsh /*
     40  1.1      bsh  * SL811HS USB host controller for GB-225 Option board of G4250EBX.
     41  1.1      bsh  */
     42  1.1      bsh 
     43  1.1      bsh #include <sys/param.h>
     44  1.1      bsh #include <sys/systm.h>
     45  1.1      bsh #include <sys/device.h>
     46  1.1      bsh 
     47  1.1      bsh #include <machine/bus.h>
     48  1.1      bsh #include <machine/cpu.h>
     49  1.1      bsh 
     50  1.1      bsh #include <dev/usb/usb.h>
     51  1.1      bsh #include <dev/usb/usbdi.h>
     52  1.1      bsh #include <dev/usb/usbdivar.h>
     53  1.1      bsh 
     54  1.1      bsh #include <dev/ic/sl811hsreg.h>
     55  1.1      bsh #include <dev/ic/sl811hsvar.h>
     56  1.1      bsh 
     57  1.1      bsh #include <arch/arm/xscale/pxa2x0reg.h>
     58  1.1      bsh #include <arch/arm/xscale/pxa2x0var.h>
     59  1.1      bsh #include <arch/evbarm/g42xxeb/g42xxeb_reg.h>
     60  1.1      bsh #include <arch/evbarm/g42xxeb/g42xxeb_var.h>
     61  1.1      bsh #include <arch/evbarm/g42xxeb/gb225reg.h>
     62  1.1      bsh #include <arch/evbarm/g42xxeb/gb225var.h>
     63  1.1      bsh 
     64  1.1      bsh struct slhci_opio_softc {
     65  1.1      bsh 	struct slhci_softc sc_sc;
     66  1.1      bsh 
     67  1.1      bsh 	void *sc_ih;
     68  1.1      bsh };
     69  1.1      bsh 
     70  1.1      bsh static int  slhci_opio_match(struct device *, struct cfdata *, void *);
     71  1.1      bsh static void slhci_opio_attach(struct device *, struct device *, void *);
     72  1.1      bsh static void slhci_opio_enable_power(void *, int);
     73  1.1      bsh static void slhci_opio_enable_intr(void *, int);
     74  1.1      bsh static int  slhci_opio_intr(void *);
     75  1.1      bsh 
     76  1.1      bsh CFATTACH_DECL(slhci_opio, sizeof(struct slhci_opio_softc),
     77  1.1      bsh     slhci_opio_match, slhci_opio_attach, NULL, NULL);
     78  1.1      bsh 
     79  1.1      bsh #define PORTSIZE	(SL11_PORTSIZE*4)
     80  1.1      bsh 
     81  1.1      bsh static int
     82  1.1      bsh slhci_opio_match(struct device *parent, struct cfdata *cf, void *aux)
     83  1.1      bsh {
     84  1.1      bsh 	struct obio_attach_args *oba = aux;
     85  1.1      bsh 	bus_space_tag_t iot = &pxa2x0_a4x_bs_tag; /* Use special BS funcs */
     86  1.1      bsh 	bus_space_handle_t ioh;
     87  1.3  thorpej 	struct obio_softc *bsc = (struct obio_softc *)device_parent(parent);
     88  1.1      bsh 	struct pxa2x0_softc *psc;
     89  1.1      bsh 	int type;
     90  1.1      bsh 	uint32_t reg;
     91  1.1      bsh 
     92  1.1      bsh 	struct slhci_softc sc;
     93  1.1      bsh 
     94  1.1      bsh 	obio_peripheral_reset(bsc, 2, 0);
     95  1.3  thorpej 	psc = (struct pxa2x0_softc *)device_parent(&bsc->sc_dev);
     96  1.1      bsh 
     97  1.1      bsh 	reg = bus_space_read_4(psc->saip.sc_iot, psc->sc_memctl_ioh,
     98  1.1      bsh 	    MEMCTL_MSC2);
     99  1.1      bsh #if 0
    100  1.1      bsh 	bus_space_write_4(psc->saip.sc_iot, psc->sc_memctl_ioh, MEMCTL_MSC2,xxx)
    101  1.1      bsh #endif
    102  1.1      bsh 
    103  1.1      bsh 
    104  1.1      bsh 	oba->oba_iot = iot;
    105  1.1      bsh 	if (oba->oba_addr == OBIOCF_ADDR_DEFAULT)
    106  1.1      bsh 		oba->oba_addr = PXA2X0_CS5_START;
    107  1.1      bsh 	if (oba->oba_intr == OBIOCF_INTR_DEFAULT)
    108  1.1      bsh 		oba->oba_intr = G4250EBX_INT_EXT2;
    109  1.1      bsh 
    110  1.1      bsh 	if (bus_space_map(iot, oba->oba_addr, PORTSIZE, 0, &ioh))
    111  1.1      bsh 		return 0;
    112  1.1      bsh 
    113  1.1      bsh 	/* construct fake softc to call sl811hs */
    114  1.1      bsh 	sc.sc_iot = iot;
    115  1.1      bsh 	sc.sc_ioh = ioh;
    116  1.1      bsh 	type = sl811hs_find(&sc);
    117  1.1      bsh 
    118  1.1      bsh 	bus_space_unmap(iot, ioh, PORTSIZE);
    119  1.1      bsh 
    120  1.1      bsh 	return type >= 0;
    121  1.1      bsh }
    122  1.1      bsh 
    123  1.1      bsh static void
    124  1.1      bsh slhci_opio_attach(struct device *parent, struct device *self, void *aux)
    125  1.1      bsh {
    126  1.1      bsh 	struct slhci_opio_softc *sc = (struct slhci_opio_softc *)self;
    127  1.1      bsh 	struct obio_attach_args *oba = aux;
    128  1.3  thorpej 	struct opio_softc *psc =
    129  1.3  thorpej 	    (struct opio_softc *)device_parent(self);
    130  1.3  thorpej 	struct obio_softc *bsc =
    131  1.3  thorpej 	    (struct obio_softc *)device_parent(&psc->sc_dev);
    132  1.1      bsh 	bus_space_tag_t iot = oba->oba_iot;
    133  1.1      bsh 	bus_space_handle_t ioh;
    134  1.1      bsh 
    135  1.1      bsh 	printf("\n");
    136  1.1      bsh 
    137  1.1      bsh 	/* Map I/O space */
    138  1.1      bsh 	if (bus_space_map(iot, oba->oba_addr, PORTSIZE, 0, &ioh)) {
    139  1.1      bsh 		printf("%s: can't map I/O space\n",
    140  1.1      bsh 			sc->sc_sc.sc_bus.bdev.dv_xname);
    141  1.1      bsh 		return;
    142  1.1      bsh 	}
    143  1.1      bsh 
    144  1.1      bsh 	/* Initialize sc */
    145  1.1      bsh 	sc->sc_sc.sc_iot = iot;
    146  1.1      bsh 	sc->sc_sc.sc_ioh = ioh;
    147  1.1      bsh 	sc->sc_sc.sc_dmat = &pxa2x0_bus_dma_tag;	/* XXX */
    148  1.1      bsh 	sc->sc_sc.sc_enable_power = slhci_opio_enable_power;
    149  1.1      bsh 	sc->sc_sc.sc_enable_intr  = slhci_opio_enable_intr;
    150  1.1      bsh 	sc->sc_sc.sc_arg = sc;
    151  1.1      bsh 
    152  1.1      bsh 	/* Establish the interrupt handler */
    153  1.1      bsh 	sc->sc_ih = obio_intr_establish(bsc, oba->oba_intr, IPL_BIO,
    154  1.1      bsh 	    IST_LEVEL_HIGH, slhci_opio_intr, sc);
    155  1.1      bsh 	if( sc->sc_ih == NULL) {
    156  1.1      bsh 		printf("%s: can't establish interrupt\n",
    157  1.1      bsh 			sc->sc_sc.sc_bus.bdev.dv_xname);
    158  1.1      bsh 		return;
    159  1.1      bsh 	}
    160  1.1      bsh 
    161  1.1      bsh #if 0
    162  1.1      bsh 	/* Reset controller */
    163  1.1      bsh 	obio_peripheral_reset(bsc, 2, 1);
    164  1.1      bsh 	delay(100);
    165  1.1      bsh 	obio_peripheral_reset(bsc, 2, 0);
    166  1.1      bsh 	delay(40000);
    167  1.1      bsh #endif
    168  1.1      bsh 
    169  1.1      bsh 	bus_space_write_1(iot, ioh, SL11_IDX_ADDR, SL11_CTRL);
    170  1.1      bsh 	bus_space_write_1(iot, ioh, SL11_IDX_DATA, 0x01);
    171  1.1      bsh 
    172  1.1      bsh 	/* Attach SL811HS/T */
    173  1.1      bsh 	if (slhci_attach(&sc->sc_sc, self))
    174  1.1      bsh 		return;
    175  1.1      bsh }
    176  1.1      bsh 
    177  1.1      bsh static void
    178  1.1      bsh slhci_opio_enable_power(void *arg, int mode)
    179  1.1      bsh {
    180  1.1      bsh #if 0
    181  1.1      bsh 	struct slhci_opio_softc *sc = arg;
    182  1.1      bsh 	bus_space_tag_t iot = sc->sc_sc.sc_iot;
    183  1.1      bsh 	u_int8_t r;
    184  1.1      bsh 
    185  1.1      bsh 	r = bus_space_read_1(iot, sc->sc_nch, NEREID_CTRL);
    186  1.1      bsh 	if (mode == POWER_ON)
    187  1.1      bsh 		bus_space_write_1(iot, sc->sc_nch, NEREID_CTRL,
    188  1.1      bsh 			r |  NEREID_CTRL_POWER);
    189  1.1      bsh 	else
    190  1.1      bsh 		bus_space_write_1(iot, sc->sc_nch, NEREID_CTRL,
    191  1.1      bsh 			r & ~NEREID_CTRL_POWER);
    192  1.1      bsh #endif
    193  1.1      bsh }
    194  1.1      bsh 
    195  1.1      bsh static void
    196  1.1      bsh slhci_opio_enable_intr(void *arg, int mode)
    197  1.1      bsh {
    198  1.1      bsh 	struct slhci_opio_softc *sc = arg;
    199  1.1      bsh 	struct obio_softc *bsc;
    200  1.1      bsh 
    201  1.3  thorpej 	bsc = (struct obio_softc *)device_parent(
    202  1.3  thorpej 	    device_parent(&sc->sc_sc.sc_bus.bdev));
    203  1.1      bsh 
    204  1.1      bsh 	if (mode == INTR_ON)
    205  1.1      bsh 		obio_intr_unmask(bsc, sc->sc_ih);
    206  1.1      bsh 	else
    207  1.1      bsh 		obio_intr_mask(bsc, sc->sc_ih);
    208  1.1      bsh }
    209  1.1      bsh 
    210  1.1      bsh static int
    211  1.1      bsh slhci_opio_intr(void *arg)
    212  1.1      bsh {
    213  1.1      bsh 	struct slhci_opio_softc *sc = arg;
    214  1.1      bsh 
    215  1.1      bsh 	return slhci_intr(&sc->sc_sc);
    216  1.1      bsh }
    217