gumstix_machdep.c revision 1.53
1 /* $NetBSD: gumstix_machdep.c,v 1.53 2016/10/16 13:54:28 kiyohara Exp $ */ 2 /* 3 * Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation. 4 * All rights reserved. 5 * 6 * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM 7 * Corporation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of the project nor the name of SOUM Corporation 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS'' 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /* 34 * Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation. 35 * All rights reserved. 36 * 37 * Written by Hiroyuki Bessho for Genetec Corporation. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of Genetec Corporation may not be used to endorse or 48 * promote products derived from this software without specific prior 49 * written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 53 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 54 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 * 63 * Machine dependent functions for kernel setup for Genetec G4250EBX 64 * evaluation board. 65 * 66 * Based on iq80310_machhdep.c 67 */ 68 /* 69 * Copyright (c) 2001 Wasabi Systems, Inc. 70 * All rights reserved. 71 * 72 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 73 * 74 * Redistribution and use in source and binary forms, with or without 75 * modification, are permitted provided that the following conditions 76 * are met: 77 * 1. Redistributions of source code must retain the above copyright 78 * notice, this list of conditions and the following disclaimer. 79 * 2. Redistributions in binary form must reproduce the above copyright 80 * notice, this list of conditions and the following disclaimer in the 81 * documentation and/or other materials provided with the distribution. 82 * 3. All advertising materials mentioning features or use of this software 83 * must display the following acknowledgement: 84 * This product includes software developed for the NetBSD Project by 85 * Wasabi Systems, Inc. 86 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 87 * or promote products derived from this software without specific prior 88 * written permission. 89 * 90 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 91 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 92 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 93 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 94 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 95 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 96 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 97 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 98 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 99 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 100 * POSSIBILITY OF SUCH DAMAGE. 101 */ 102 103 /* 104 * Copyright (c) 1997,1998 Mark Brinicombe. 105 * Copyright (c) 1997,1998 Causality Limited. 106 * All rights reserved. 107 * 108 * Redistribution and use in source and binary forms, with or without 109 * modification, are permitted provided that the following conditions 110 * are met: 111 * 1. Redistributions of source code must retain the above copyright 112 * notice, this list of conditions and the following disclaimer. 113 * 2. Redistributions in binary form must reproduce the above copyright 114 * notice, this list of conditions and the following disclaimer in the 115 * documentation and/or other materials provided with the distribution. 116 * 3. All advertising materials mentioning features or use of this software 117 * must display the following acknowledgement: 118 * This product includes software developed by Mark Brinicombe 119 * for the NetBSD Project. 120 * 4. The name of the company nor the name of the author may be used to 121 * endorse or promote products derived from this software without specific 122 * prior written permission. 123 * 124 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 125 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 126 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 127 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 128 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 129 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 130 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 131 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 132 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 133 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 134 * SUCH DAMAGE. 135 * 136 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 137 * boards using RedBoot firmware. 138 */ 139 140 #include "opt_com.h" 141 #include "opt_cputypes.h" 142 #include "opt_evbarm_boardtype.h" 143 #include "opt_gumstix.h" 144 #include "opt_kgdb.h" 145 #include "opt_multiprocessor.h" 146 #include "opt_pmap_debug.h" 147 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER) 148 #include "opt_omap.h" 149 150 #if defined(DUOVERO) 151 #include "arml2cc.h" 152 #endif 153 #include "prcm.h" 154 #endif 155 156 #include <sys/param.h> 157 #include <sys/conf.h> 158 #include <sys/device.h> 159 #include <sys/exec.h> 160 #include <sys/kernel.h> 161 #include <sys/proc.h> 162 #include <sys/reboot.h> 163 #include <sys/systm.h> 164 #include <sys/termios.h> 165 #include <sys/bus.h> 166 #include <sys/cpu.h> 167 #include <sys/gpio.h> 168 169 #include <prop/proplib.h> 170 171 #include <uvm/uvm_extern.h> 172 173 #include <arm/mainbus/mainbus.h> /* don't reorder */ 174 175 #include <machine/autoconf.h> /* don't reorder */ 176 #include <machine/bootconfig.h> 177 #include <arm/locore.h> 178 179 #include <arm/arm32/machdep.h> 180 #if NARML2CC > 0 181 #include <arm/cortex/pl310_var.h> 182 #endif 183 #include <arm/cortex/scu_reg.h> 184 #include <arm/omap/omap2_obiovar.h> 185 #include <arm/omap/am335x_prcm.h> 186 #include <arm/omap/omap2_gpio.h> 187 #include <arm/omap/omap2_gpmcreg.h> 188 #include <arm/omap/omap2_prcm.h> 189 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER) 190 #include <arm/omap/omap2_reg.h> /* Must required "opt_omap.h" */ 191 #endif 192 #include <arm/omap/omap3_sdmmcreg.h> 193 #include <arm/omap/omap_var.h> 194 #include <arm/omap/omap_com.h> 195 #include <arm/xscale/pxa2x0reg.h> 196 #include <arm/xscale/pxa2x0var.h> 197 #include <arm/xscale/pxa2x0_gpio.h> 198 #include <evbarm/gumstix/gumstixreg.h> 199 #include <evbarm/gumstix/gumstixvar.h> 200 201 #include <dev/cons.h> 202 203 #ifdef KGDB 204 #include <sys/kgdb.h> 205 #endif 206 207 /* 208 * The range 0xc1000000 - 0xcfffffff is available for kernel VM space 209 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 210 */ 211 #ifndef KERNEL_VM_BASE 212 #define KERNEL_VM_BASE 0xc1000000 213 #endif 214 #define KERNEL_VM_SIZE 0x0f000000 215 216 BootConfig bootconfig; /* Boot config storage */ 217 static char bootargs[MAX_BOOT_STRING]; 218 const size_t bootargs_len = sizeof(bootargs) - 1; /* without nul */ 219 char *boot_args = NULL; 220 221 uint32_t system_serial_high; 222 uint32_t system_serial_low; 223 224 /* Prototypes */ 225 #if defined(GUMSTIX) 226 static void read_system_serial(void); 227 #endif 228 #if defined(OMAP2) 229 static void omap_reset(void); 230 static void find_cpu_clock(void); 231 #endif 232 static void process_kernel_args(int, char *[]); 233 static void process_kernel_args_liner(char *); 234 #ifdef KGDB 235 static void kgdb_port_init(void); 236 #endif 237 static void gumstix_device_register(device_t, void *); 238 239 bs_protos(bs_notimpl); 240 241 #include "com.h" 242 #if NCOM > 0 243 #include <dev/ic/comreg.h> 244 #include <dev/ic/comvar.h> 245 #endif 246 247 #if defined(CPU_XSCALE) 248 #include "lcd.h" 249 #endif 250 251 #ifndef CONSPEED 252 #define CONSPEED B115200 /* It's a setting of the default of u-boot */ 253 #endif 254 #ifndef CONMODE 255 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 256 #endif 257 258 int comcnspeed = CONSPEED; 259 int comcnmode = CONMODE; 260 261 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE 262 static char console[16]; 263 #endif 264 265 /* Use TPS65217 White LED Driver */ 266 bool use_tps65217_wled = false; 267 268 extern void gxio_config(void); 269 extern void gxio_config_expansion(char *); 270 271 272 static inline pd_entry_t * 273 read_ttb(void) 274 { 275 long ttb; 276 277 __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r" (ttb)); 278 279 return (pd_entry_t *)(ttb & ~((1<<14)-1)); 280 } 281 282 /* 283 * Static device mappings. These peripheral registers are mapped at 284 * fixed virtual addresses very early in initarm() so that we can use 285 * them while booting the kernel, and stay at the same address 286 * throughout whole kernel's life time. 287 * 288 * We use this table twice; once with bootstrap page table, and once 289 * with kernel's page table which we build up in initarm(). 290 * 291 * Since we map these registers into the bootstrap page table using 292 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 293 * registers segment-aligned and segment-rounded in order to avoid 294 * using the 2nd page tables. 295 */ 296 297 #define _A(a) ((a) & ~L1_S_OFFSET) 298 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 299 300 static const struct pmap_devmap gumstix_devmap[] = { 301 #if defined(GUMSTIX) 302 { 303 GUMSTIX_GPIO_VBASE, 304 _A(PXA2X0_GPIO_BASE), 305 _S(PXA250_GPIO_SIZE), 306 VM_PROT_READ | VM_PROT_WRITE, 307 PTE_NOCACHE, 308 }, 309 { 310 GUMSTIX_CLKMAN_VBASE, 311 _A(PXA2X0_CLKMAN_BASE), 312 _S(PXA2X0_CLKMAN_SIZE), 313 VM_PROT_READ | VM_PROT_WRITE, 314 PTE_NOCACHE, 315 }, 316 { 317 GUMSTIX_INTCTL_VBASE, 318 _A(PXA2X0_INTCTL_BASE), 319 _S(PXA2X0_INTCTL_SIZE), 320 VM_PROT_READ | VM_PROT_WRITE, 321 PTE_NOCACHE, 322 }, 323 { 324 GUMSTIX_FFUART_VBASE, 325 _A(PXA2X0_FFUART_BASE), 326 _S(4 * COM_NPORTS), 327 VM_PROT_READ | VM_PROT_WRITE, 328 PTE_NOCACHE, 329 }, 330 { 331 GUMSTIX_STUART_VBASE, 332 _A(PXA2X0_STUART_BASE), 333 _S(4 * COM_NPORTS), 334 VM_PROT_READ | VM_PROT_WRITE, 335 PTE_NOCACHE, 336 }, 337 { 338 GUMSTIX_BTUART_VBASE, 339 _A(PXA2X0_BTUART_BASE), 340 _S(4 * COM_NPORTS), 341 VM_PROT_READ | VM_PROT_WRITE, 342 PTE_NOCACHE, 343 }, 344 { 345 GUMSTIX_HWUART_VBASE, 346 _A(PXA2X0_HWUART_BASE), 347 _S(4 * COM_NPORTS), 348 VM_PROT_READ | VM_PROT_WRITE, 349 PTE_NOCACHE, 350 }, 351 { 352 GUMSTIX_LCDC_VBASE, 353 _A(PXA2X0_LCDC_BASE), 354 _S(4 * COM_NPORTS), 355 VM_PROT_READ | VM_PROT_WRITE, 356 PTE_NOCACHE, 357 }, 358 #elif defined(OVERO) 359 { /* SCM, PRCM */ 360 OVERO_L4_CORE_VBASE, 361 _A(OMAP3530_L4_CORE_BASE), 362 _S(L1_S_SIZE), /* No need 16MB. Use only first 1MB */ 363 VM_PROT_READ | VM_PROT_WRITE, 364 PTE_NOCACHE 365 }, 366 { /* Console, GPIO[2-6] */ 367 OVERO_L4_PERIPHERAL_VBASE, 368 _A(OMAP3530_L4_PERIPHERAL_BASE), 369 _S(OMAP3530_L4_PERIPHERAL_SIZE), 370 VM_PROT_READ | VM_PROT_WRITE, 371 PTE_NOCACHE 372 }, 373 { /* GPIO1 */ 374 OVERO_L4_WAKEUP_VBASE, 375 _A(OMAP3530_L4_WAKEUP_BASE), 376 _S(OMAP3530_L4_WAKEUP_SIZE), 377 VM_PROT_READ | VM_PROT_WRITE, 378 PTE_NOCACHE 379 }, 380 { 381 OVERO_GPMC_VBASE, 382 _A(GPMC_BASE), 383 _S(GPMC_SIZE), 384 VM_PROT_READ | VM_PROT_WRITE, 385 PTE_NOCACHE 386 }, 387 #elif defined(DUOVERO) 388 { 389 DUOVERO_L4_CM_VBASE, 390 _A(OMAP4430_L4_CORE_BASE + 0x100000), 391 _S(L1_S_SIZE), 392 VM_PROT_READ | VM_PROT_WRITE, 393 PTE_NOCACHE 394 }, 395 { /* Console, SCU, L2CC, GPIO[2-6] */ 396 DUOVERO_L4_PERIPHERAL_VBASE, 397 _A(OMAP4430_L4_PERIPHERAL_BASE), 398 _S(L1_S_SIZE * 3), 399 VM_PROT_READ | VM_PROT_WRITE, 400 PTE_NOCACHE 401 }, 402 { /* PRCM, GPIO1 */ 403 DUOVERO_L4_WAKEUP_VBASE, 404 _A(OMAP4430_L4_WAKEUP_BASE), 405 _S(OMAP4430_L4_WAKEUP_SIZE), 406 VM_PROT_READ | VM_PROT_WRITE, 407 PTE_NOCACHE 408 }, 409 { 410 DUOVERO_GPMC_VBASE, 411 _A(GPMC_BASE), 412 _S(GPMC_SIZE), 413 VM_PROT_READ | VM_PROT_WRITE, 414 PTE_NOCACHE 415 }, 416 #elif defined(PEPPER) 417 { 418 /* CM, Control Module, GPIO0, Console */ 419 PEPPER_PRCM_VBASE, 420 _A(OMAP2_CM_BASE), 421 _S(L1_S_SIZE), 422 VM_PROT_READ | VM_PROT_WRITE, 423 PTE_NOCACHE 424 }, 425 { 426 /* GPIO[1-3] */ 427 PEPPER_L4_PERIPHERAL_VBASE, 428 _A(TI_AM335X_L4_PERIPHERAL_BASE), 429 _S(L1_S_SIZE), 430 VM_PROT_READ | VM_PROT_WRITE, 431 PTE_NOCACHE 432 }, 433 #endif 434 { 0, 0, 0, 0, 0 } 435 }; 436 437 #undef _A 438 #undef _S 439 440 441 /* 442 * u_int initarm(...) 443 * 444 * Initial entry point on startup. This gets called before main() is 445 * entered. 446 * It should be responsible for setting up everything that must be 447 * in place when main is called. 448 * This includes 449 * Taking a copy of the boot configuration structure. 450 * Initialising the physical console so characters can be printed. 451 * Setting up page tables for the kernel 452 * Relocating the kernel to the bottom of physical memory 453 */ 454 u_int 455 initarm(void *arg) 456 { 457 extern char KERNEL_BASE_phys[]; 458 extern uint32_t *u_boot_args[]; 459 extern uint32_t ram_size; 460 enum { r0 = 0, r1 = 1, r2 = 2, r3 = 3 }; /* args from u-boot */ 461 462 /* 463 * We mapped PA == VA in gumstix_start.S. 464 * Also mapped SDRAM to KERNEL_BASE first 64Mbyte only with cachable. 465 * 466 * Gumstix (basix, connex, verdex, verdex-pro): 467 * Physical Address Range Description 468 * ----------------------- ---------------------------------- 469 * 0x00000000 - 0x00ffffff flash Memory (16MB or 4MB) 470 * 0x40000000 - 0x480fffff Processor Registers 471 * 0xa0000000 - 0xa3ffffff SDRAM Bank 0 (64MB or 128MB) 472 * 0xc0000000 - 0xc3ffffff KERNEL_BASE 473 * 474 * Overo: 475 * Physical Address Range Description 476 * ----------------------- ---------------------------------- 477 * 0x80000000 - 0x9fffffff SDRAM Bank 0 478 * 0x80000000 - 0x83ffffff KERNEL_BASE 479 * 480 * DuoVero, Pepper: 481 * Physical Address Range Description 482 * ----------------------- ---------------------------------- 483 * 0x80000000 - 0xbfffffff SDRAM Bank 0 484 * 0x80000000 - 0x83ffffff KERNEL_BASE 485 */ 486 487 #if defined(CPU_XSCALE) 488 cpu_reset_address = NULL; 489 #elif defined(OMAP2) 490 cpu_reset_address = omap_reset; 491 492 find_cpu_clock(); 493 #endif 494 495 /* 496 * Heads up ... Setup the CPU / MMU / TLB functions 497 */ 498 if (set_cpufuncs()) 499 panic("cpu not recognized!"); 500 501 /* map some peripheral registers at static I/O area */ 502 pmap_devmap_bootstrap((vaddr_t)read_ttb(), gumstix_devmap); 503 504 #if defined(CPU_XSCALE) 505 /* start 32.768kHz OSC */ 506 ioreg_write(GUMSTIX_CLKMAN_VBASE + CLKMAN_OSCC, OSCC_OON); 507 508 /* Get ready for splfoo() */ 509 pxa2x0_intr_bootstrap(GUMSTIX_INTCTL_VBASE); 510 511 /* setup GPIO for {FF,ST,HW}UART. */ 512 pxa2x0_gpio_bootstrap(GUMSTIX_GPIO_VBASE); 513 514 pxa2x0_clkman_bootstrap(GUMSTIX_CLKMAN_VBASE); 515 #endif 516 517 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 518 519 /* configure MUX, GPIO and CLK. */ 520 gxio_config(); 521 522 #ifndef GUMSTIX_NETBSD_ARGS_CONSOLE 523 consinit(); 524 #endif 525 #ifdef KGDB 526 kgdb_port_init(); 527 #endif 528 529 /* 530 * Examine the boot args string for options we need to know about 531 * now. 532 */ 533 #if defined(GUMSTIX) 534 #define SDRAM_START 0xa0000000UL 535 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER) 536 #define SDRAM_START 0x80000000UL 537 #endif 538 if ((uint32_t)u_boot_args[r0] < SDRAM_START || 539 (uint32_t)u_boot_args[r0] >= SDRAM_START + ram_size) 540 /* Maybe r0 is 'argc'. We are booted by command 'go'. */ 541 process_kernel_args((int)u_boot_args[r0], 542 (char **)u_boot_args[r1]); 543 else 544 /* 545 * Maybe r3 is 'boot args string' of 'bootm'. This string is 546 * linely. 547 */ 548 process_kernel_args_liner((char *)u_boot_args[r3]); 549 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE 550 consinit(); 551 #endif 552 553 /* Talk to the user */ 554 #define BDSTR(s) _BDSTR(s) 555 #define _BDSTR(s) #s 556 printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n"); 557 558 /* Read system serial */ 559 #if defined(GUMSTIX) 560 read_system_serial(); 561 #endif 562 563 #ifdef VERBOSE_INIT_ARM 564 printf("initarm: Configuring system ...\n"); 565 #endif 566 567 #if defined(OMAP_4430) 568 const bus_space_tag_t iot = &omap_bs_tag; 569 bus_space_handle_t ioh; 570 571 #if NARML2CC > 0 572 /* 573 * Initialize L2-Cache parameters 574 */ 575 576 if (bus_space_map(iot, OMAP4_L2CC_BASE, OMAP4_L2CC_SIZE, 0, &ioh) != 0) 577 panic("OMAP4_L2CC_BASE map failed\n"); 578 arml2cc_init(iot, ioh, 0); 579 #endif 580 581 #ifdef MULTIPROCESSOR 582 if (bus_space_map(iot, OMAP4_SCU_BASE, SCU_SIZE, 0, &ioh) != 0) 583 panic("OMAP4_SCU_BASE map failed\n"); 584 arm_cpu_max = 585 1 + (bus_space_read_4(iot, ioh, SCU_CFG) & SCU_CFG_CPUMAX); 586 #endif 587 #endif 588 589 /* Fake bootconfig structure for the benefit of pmap.c */ 590 /* XXX must make the memory description h/w independent */ 591 bootconfig.dramblocks = 1; 592 bootconfig.dram[0].address = SDRAM_START; 593 bootconfig.dram[0].pages = ram_size / PAGE_SIZE; 594 595 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 596 597 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 598 (uintptr_t) KERNEL_BASE_phys); 599 arm32_kernel_vm_init(KERNEL_VM_BASE, 600 #if defined(CPU_XSCALE) 601 ARM_VECTORS_LOW, 602 #elif defined(CPU_CORTEX) 603 ARM_VECTORS_HIGH, 604 #endif 605 0, gumstix_devmap, true); 606 607 evbarm_device_register = gumstix_device_register; 608 609 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 610 } 611 612 #if defined(GUMSTIX) 613 static void 614 read_system_serial(void) 615 { 616 #define GUMSTIX_SYSTEM_SERIAL_ADDR 0 617 #define GUMSTIX_SYSTEM_SERIAL_SIZE 8 618 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 619 #define FLASH_OFFSET_USER_PROTECTION 0x85 620 #define FLASH_CMD_READ_ID 0x90 621 #define FLASH_CMD_RESET 0xff 622 int i; 623 char system_serial[GUMSTIX_SYSTEM_SERIAL_SIZE], *src; 624 char x; 625 626 src = (char *)(FLASH_OFFSET_USER_PROTECTION * 2 /*word*/); 627 *(volatile uint16_t *)0 = FLASH_CMD_READ_ID; 628 memcpy(system_serial, 629 src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial)); 630 *(volatile uint16_t *)0 = FLASH_CMD_RESET; 631 632 for (i = 1, x = system_serial[0]; i < sizeof (system_serial); i++) 633 x &= system_serial[i]; 634 if (x == 0xff) { 635 src = (char *)(FLASH_OFFSET_INTEL_PROTECTION * 2 /*word*/); 636 *(volatile uint16_t *)0 = FLASH_CMD_READ_ID; 637 memcpy(system_serial, 638 src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial)); 639 *(volatile uint16_t *)0 = FLASH_CMD_RESET; 640 641 /* 642 * XXXX: Don't need ??? 643 * gumstix_serial_hash(system_serial); 644 */ 645 } 646 system_serial_high = system_serial[0] << 24 | system_serial[1] << 16 | 647 system_serial[2] << 8 | system_serial[3]; 648 system_serial_low = system_serial[4] << 24 | system_serial[5] << 16 | 649 system_serial[6] << 8 | system_serial[7]; 650 651 printf("system serial: 0x"); 652 for (i = 0; i < sizeof (system_serial); i++) 653 printf("%02x", system_serial[i]); 654 printf("\n"); 655 } 656 #endif 657 658 #if defined(OMAP2) 659 static void 660 omap_reset(void) 661 { 662 663 #if defined(TI_AM335X) 664 vaddr_t prm_base = (PEPPER_PRCM_VBASE + AM335X_PRCM_PRM_DEVICE); 665 666 *(volatile uint32_t *)(prm_base + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW; 667 #elif defined(OMAP_4430) 668 *(volatile uint32_t *)(DUOVERO_L4_WAKEUP_VBASE + OMAP4_PRM_RSTCTRL) = 669 OMAP4_PRM_RSTCTRL_WARM; 670 #endif 671 672 #if NPRCM > 0 673 prcm_cold_reset(); 674 #endif 675 } 676 677 static void 678 find_cpu_clock(void) 679 { 680 const vaddr_t prm_base __unused = OMAP2_PRM_BASE; 681 const vaddr_t cm_base = OMAP2_CM_BASE; 682 683 #if defined(OMAP_3530) 684 685 const uint32_t prm_clksel = 686 *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL); 687 static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS; 688 const uint32_t sys_clk = 689 prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)]; 690 const uint32_t dpll1 = 691 *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU); 692 const uint32_t dpll2 = 693 *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU); 694 const uint32_t m = 695 __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT); 696 const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV); 697 const uint32_t m2 = 698 __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV); 699 700 /* 701 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. 702 */ 703 curcpu()->ci_data.cpu_cc_freq = 704 ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT; 705 omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT; 706 707 #elif defined(OMAP_4430) 708 709 const uint32_t prm_clksel = 710 *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL); 711 static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS; 712 const uint32_t sys_clk = 713 cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)]; 714 const uint32_t dpll1 = 715 *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU); 716 const uint32_t dpll2 = 717 *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU); 718 const uint32_t m = 719 __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT); 720 const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV); 721 const uint32_t m2 = 722 __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); 723 724 /* 725 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. 726 */ 727 curcpu()->ci_data.cpu_cc_freq = 728 ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2; 729 omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT; 730 731 #elif defined(TI_AM335X) 732 733 prcm_bootstrap(cm_base); 734 am335x_sys_clk(TI_AM335X_CTLMOD_BASE); 735 am335x_cpu_clk(); 736 737 #endif 738 } 739 #endif 740 741 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER 742 static const char busheader_name[] = "busheader="; 743 #endif 744 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \ 745 defined(GUMSTIX_NETBSD_ARGS_EXPANSION) 746 static const char expansion_name[] = "expansion="; 747 #endif 748 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE 749 static const char console_name[] = "console="; 750 #endif 751 static void 752 process_kernel_args(int argc, char *argv[]) 753 { 754 int gxio_configured = 0, i, j; 755 756 boothowto = 0; 757 758 for (i = 1, j = 0; i < argc; i++) { 759 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER 760 if (!strncmp(argv[i], busheader_name, strlen(busheader_name))) { 761 /* Configure for GPIOs of busheader side */ 762 gxio_config_expansion(argv[i] + strlen(busheader_name)); 763 gxio_configured = 1; 764 continue; 765 } 766 #endif 767 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \ 768 defined(GUMSTIX_NETBSD_ARGS_EXPANSION) 769 if (!strncmp(argv[i], expansion_name, strlen(expansion_name))) { 770 /* Configure expansion */ 771 gxio_config_expansion(argv[i] + strlen(expansion_name)); 772 gxio_configured = 1; 773 continue; 774 } 775 #endif 776 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE 777 if (!strncmp(argv[i], console_name, strlen(console_name))) { 778 strncpy(console, argv[i] + strlen(console_name), 779 sizeof(console)); 780 consinit(); 781 } 782 #endif 783 if (j == bootargs_len) { 784 *(bootargs + j) = '\0'; 785 continue; 786 } 787 if (j != 0) 788 *(bootargs + j++) = ' '; 789 strncpy(bootargs + j, argv[i], bootargs_len - j); 790 bootargs[bootargs_len] = '\0'; 791 j += strlen(argv[i]); 792 } 793 boot_args = bootargs; 794 795 parse_mi_bootargs(boot_args); 796 797 if (!gxio_configured) 798 gxio_config_expansion(NULL); 799 } 800 801 static void 802 process_kernel_args_liner(char *args) 803 { 804 int i = 0; 805 char *p = NULL; 806 807 boothowto = 0; 808 809 strncpy(bootargs, args, sizeof(bootargs)); 810 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \ 811 defined(GUMSTIX_NETBSD_ARGS_EXPANSION) 812 { 813 char *q; 814 815 if ((p = strstr(bootargs, expansion_name))) 816 q = p + strlen(expansion_name); 817 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER 818 else if ((p = strstr(bootargs, busheader_name))) 819 q = p + strlen(busheader_name); 820 #endif 821 if (p) { 822 char expansion[256], c; 823 824 i = 0; 825 do { 826 c = *(q + i); 827 if (c == ' ') 828 c = '\0'; 829 expansion[i++] = c; 830 } while (c != '\0' && i < sizeof(expansion)); 831 gxio_config_expansion(expansion); 832 strcpy(p, q + i); 833 } 834 } 835 #endif 836 if (p == NULL) 837 gxio_config_expansion(NULL); 838 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE 839 p = strstr(bootargs, console_name); 840 if (p != NULL) { 841 char c; 842 843 i = 0; 844 do { 845 c = *(p + strlen(console_name) + i); 846 if (c == ' ') 847 c = '\0'; 848 console[i++] = c; 849 } while (c != '\0' && i < sizeof(console)); 850 consinit(); 851 strcpy(p, p + strlen(console_name) + i); 852 } 853 #endif 854 boot_args = bootargs; 855 856 parse_mi_bootargs(boot_args); 857 } 858 859 #ifdef KGDB 860 #ifndef KGDB_DEVNAME 861 #define KGDB_DEVNAME "ffuart" 862 #endif 863 const char kgdb_devname[] = KGDB_DEVNAME; 864 865 #ifndef KGDB_DEVRATE 866 #define KGDB_DEVRATE CONSPEED 867 #endif 868 int kgdb_devrate = KGDB_DEVRATE; 869 870 #if (NCOM > 0) 871 #ifndef KGDB_DEVMODE 872 #define KGDB_DEVMODE CONMODE 873 #endif 874 int comkgdbmode = KGDB_DEVMODE; 875 #endif /* NCOM */ 876 877 #endif /* KGDB */ 878 879 880 void 881 consinit(void) 882 { 883 static int consinit_called = 0; 884 885 if (consinit_called != 0) 886 return; 887 888 consinit_called = 1; 889 890 #if NCOM > 0 891 892 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE 893 /* Maybe passed Linux's bootargs 'console=ttyS?,<speed>...' */ 894 if (strncmp(console, "ttyS", 4) == 0 && console[5] == ',') { 895 int i; 896 897 comcnspeed = 0; 898 for (i = 6; i < strlen(console) && isdigit(console[i]); i++) 899 comcnspeed = comcnspeed * 10 + (console[i] - '0'); 900 } 901 #endif 902 903 #if defined(GUMSTIX) 904 905 #ifdef FFUARTCONSOLE 906 #ifdef KGDB 907 if (strcmp(kgdb_devname, "ffuart") == 0){ 908 /* port is reserved for kgdb */ 909 } else 910 #endif 911 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE) 912 if (console[0] == '\0' || strcasecmp(console, "ffuart") == 0 || 913 strncmp(console, "ttyS0,", 6) == 0) 914 #endif 915 { 916 int rv; 917 918 rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE, 919 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode); 920 if (rv == 0) { 921 pxa2x0_clkman_config(CKEN_FFUART, 1); 922 return; 923 } 924 } 925 #endif /* FFUARTCONSOLE */ 926 927 #ifdef STUARTCONSOLE 928 #ifdef KGDB 929 if (strcmp(kgdb_devname, "stuart") == 0) { 930 /* port is reserved for kgdb */ 931 } else 932 #endif 933 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE) 934 if (console[0] == '\0' || strcasecmp(console, "stuart") == 0) 935 #endif 936 { 937 int rv; 938 939 rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_STUART_BASE, 940 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode); 941 if (rv == 0) { 942 pxa2x0_clkman_config(CKEN_STUART, 1); 943 return; 944 } 945 } 946 #endif /* STUARTCONSOLE */ 947 948 #ifdef BTUARTCONSOLE 949 #ifdef KGDB 950 if (strcmp(kgdb_devname, "btuart") == 0) { 951 /* port is reserved for kgdb */ 952 } else 953 #endif 954 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE) 955 if (console[0] == '\0' || strcasecmp(console, "btuart") == 0) 956 #endif 957 { 958 int rv; 959 960 rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE, 961 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode); 962 if (rv == 0) { 963 pxa2x0_clkman_config(CKEN_BTUART, 1); 964 return; 965 } 966 } 967 #endif /* BTUARTCONSOLE */ 968 969 #ifdef HWUARTCONSOLE 970 #ifdef KGDB 971 if (strcmp(kgdb_devname, "hwuart") == 0) { 972 /* port is reserved for kgdb */ 973 } else 974 #endif 975 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE) 976 if (console[0] == '\0' || strcasecmp(console, "hwuart") == 0) 977 #endif 978 { 979 rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_HWUART_BASE, 980 comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode); 981 if (rv == 0) { 982 pxa2x0_clkman_config(CKEN_HWUART, 1); 983 return; 984 } 985 } 986 #endif /* HWUARTCONSOLE */ 987 988 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER) 989 990 if (comcnattach(&omap_a4x_bs_tag, CONSADDR, comcnspeed, 991 OMAP_COM_FREQ, COM_TYPE_NORMAL, comcnmode) == 0) 992 return; 993 994 #endif /* GUMSTIX or OVERO */ 995 996 #endif /* NCOM */ 997 998 #if NLCD > 0 999 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE) 1000 if (console[0] == '\0' || strcasecmp(console, "lcd") == 0) 1001 #endif 1002 { 1003 gxlcd_cnattach(); 1004 } 1005 #endif 1006 } 1007 1008 #ifdef KGDB 1009 static void 1010 kgdb_port_init(void) 1011 { 1012 #if (NCOM > 0) && defined(COM_PXA2X0) 1013 paddr_t paddr = 0; 1014 int cken = 0; 1015 1016 if (0 == strcmp(kgdb_devname, "ffuart")) { 1017 paddr = PXA2X0_FFUART_BASE; 1018 cken = CKEN_FFUART; 1019 } else if (0 == strcmp(kgdb_devname, "stuart")) { 1020 paddr = PXA2X0_STUART_BASE; 1021 cken = CKEN_STUART; 1022 } else if (0 == strcmp(kgdb_devname, "btuart")) { 1023 paddr = PXA2X0_BTUART_BASE; 1024 cken = CKEN_BTUART; 1025 } else if (0 == strcmp(kgdb_devname, "hwuart")) { 1026 paddr = PXA2X0_HWUART_BASE; 1027 cken = CKEN_HWUART; 1028 } 1029 1030 if (paddr && 1031 0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr, 1032 kgdb_devrate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) { 1033 1034 pxa2x0_clkman_config(cken, 1); 1035 } 1036 1037 #endif 1038 } 1039 #endif 1040 1041 static void 1042 gumstix_device_register(device_t dev, void *aux) 1043 { 1044 prop_dictionary_t dict = device_properties(dev); 1045 1046 if (device_is_a(dev, "a9tmr") || 1047 device_is_a(dev, "a9wdt")) { 1048 /* 1049 * We need to tell the A9 Global/Watchdog Timer 1050 * what frequency it runs at. 1051 */ 1052 1053 /* 1054 * This clock always runs at (arm_clk div 2) and only goes 1055 * to timers that are part of the A9 MP core subsystem. 1056 */ 1057 prop_dictionary_set_uint32(dict, "frequency", 1058 curcpu()->ci_data.cpu_cc_freq / 2); 1059 } 1060 if (device_is_a(dev, "armperiph")) { 1061 if (device_is_a(device_parent(dev), "mainbus")) { 1062 #if defined(OMAP2) 1063 /* 1064 * XXX KLUDGE ALERT XXX 1065 * The iot mainbus supplies is completely wrong since 1066 * it scales addresses by 2. The simpliest remedy is 1067 * to replace with our bus space used for the armcore 1068 * regisers (which armperiph uses). 1069 */ 1070 struct mainbus_attach_args * const mb = aux; 1071 mb->mb_iot = &omap_bs_tag; 1072 #endif 1073 } 1074 } 1075 if (device_is_a(dev, "ehci")) { 1076 #if defined(OVERO) 1077 prop_dictionary_set_uint16(dict, "nports", 2); 1078 prop_dictionary_set_bool(dict, "phy-reset", true); 1079 prop_dictionary_set_cstring(dict, "port0-mode", "none"); 1080 prop_dictionary_set_int16(dict, "port0-gpio", -1); 1081 prop_dictionary_set_cstring(dict, "port1-mode", "phy"); 1082 prop_dictionary_set_int16(dict, "port1-gpio", 183); 1083 prop_dictionary_set_bool(dict, "port1-gpioval", true); 1084 #elif defined(DUOVERO) 1085 prop_dictionary_set_uint16(dict, "nports", 1); 1086 prop_dictionary_set_bool(dict, "phy-reset", true); 1087 prop_dictionary_set_cstring(dict, "port0-mode", "phy"); 1088 prop_dictionary_set_int16(dict, "port0-gpio", 62); 1089 prop_dictionary_set_bool(dict, "port0-gpioval", false); 1090 prop_dictionary_set_bool(dict, "port0-extclk", true); 1091 #endif 1092 prop_dictionary_set_uint16(dict, "dpll5-m", 443); 1093 prop_dictionary_set_uint16(dict, "dpll5-n", 11); 1094 prop_dictionary_set_uint16(dict, "dpll5-m2", 4); 1095 } 1096 if (device_is_a(dev, "ohci")) { 1097 if (prop_dictionary_set_bool(dict, 1098 "Ganged-power-mask-on-port1", 1) == false) { 1099 printf("WARNING: unable to set power-mask for port1" 1100 " property for %s\n", device_xname(dev)); 1101 } 1102 if (prop_dictionary_set_bool(dict, 1103 "Ganged-power-mask-on-port2", 1) == false) { 1104 printf("WARNING: unable to set power-mask for port2" 1105 " property for %s\n", device_xname(dev)); 1106 } 1107 if (prop_dictionary_set_bool(dict, 1108 "Ganged-power-mask-on-port3", 1) == false) { 1109 printf("WARNING: unable to set power-mask for port3" 1110 " property for %s\n", device_xname(dev)); 1111 } 1112 } 1113 if (device_is_a(dev, "omapmputmr")) { 1114 struct obio_attach_args *obio = aux; 1115 1116 switch (obio->obio_addr) { 1117 case 0x49032000: /* GPTIMER2 */ 1118 case 0x49034000: /* GPTIMER3 */ 1119 case 0x49036000: /* GPTIMER4 */ 1120 case 0x49038000: /* GPTIMER5 */ 1121 case 0x4903a000: /* GPTIMER6 */ 1122 case 0x4903c000: /* GPTIMER7 */ 1123 case 0x4903e000: /* GPTIMER8 */ 1124 case 0x49040000: /* GPTIMER9 */ 1125 #if defined(OVERO) 1126 { 1127 /* Ensure enable PRCM.CM_[FI]CLKEN_PER[3:10]. */ 1128 const int en = 1129 1 << (((obio->obio_addr >> 13) & 0x3f) - 0x16); 1130 1131 ioreg_write(OVERO_L4_CORE_VBASE + 0x5000, 1132 ioreg_read(OVERO_L4_CORE_VBASE + 0x5000) | en); 1133 ioreg_write(OVERO_L4_CORE_VBASE + 0x5010, 1134 ioreg_read(OVERO_L4_CORE_VBASE + 0x5010) | en); 1135 } 1136 #endif 1137 break; 1138 } 1139 } 1140 if (device_is_a(dev, "sdhc")) { 1141 bool dualvolt = false; 1142 1143 #if defined(OVERO) || defined(DUOVERO) 1144 if (device_is_a(device_parent(dev), "obio")) { 1145 struct obio_attach_args *obio = aux; 1146 1147 #if defined(OVERO) 1148 if (obio->obio_addr == SDMMC2_BASE_3530) 1149 dualvolt = true; 1150 #elif defined(DUOVERO) 1151 if (obio->obio_addr == SDMMC5_BASE_4430) 1152 dualvolt = true; 1153 #endif 1154 } 1155 #endif 1156 #if defined(PEPPER) 1157 if (device_is_a(device_parent(dev), "mainbus")) { 1158 struct mainbus_attach_args * const mb = aux; 1159 1160 if (mb->mb_iobase == SDMMC3_BASE_TIAM335X) 1161 dualvolt = true; 1162 } 1163 #endif 1164 prop_dictionary_set_bool(dict, "dual-volt", dualvolt); 1165 } 1166 if (device_is_a(dev, "tifb")) { 1167 /* enable LCD */ 1168 omap2_gpio_ctl(59, GPIO_PIN_OUTPUT); 1169 omap2_gpio_write(59, 0); /* reset */ 1170 delay(100); 1171 omap2_gpio_write(59, 1); 1172 } 1173 if (device_is_a(dev, "tps65217pmic")) { 1174 #if defined(TI_AM335X) 1175 extern const char *mpu_supply; 1176 1177 mpu_supply = "DCDC3"; 1178 #endif 1179 1180 if (use_tps65217_wled) { 1181 prop_dictionary_set_int32(dict, "isel", 1); 1182 prop_dictionary_set_int32(dict, "fdim", 200); 1183 prop_dictionary_set_int32(dict, "brightness", 80); 1184 } 1185 } 1186 } 1187
Indexes created Wed Oct 29 12:09:47 GMT 2025