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gumstix_machdep.c revision 1.55
      1 /*	$NetBSD: gumstix_machdep.c,v 1.55 2016/10/18 14:39:52 kiyohara Exp $ */
      2 /*
      3  * Copyright (C) 2005, 2006, 2007  WIDE Project and SOUM Corporation.
      4  * All rights reserved.
      5  *
      6  * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM
      7  * Corporation.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the project nor the name of SOUM Corporation
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS''
     22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 /*
     34  * Copyright (c) 2002, 2003, 2004, 2005  Genetec Corporation.
     35  * All rights reserved.
     36  *
     37  * Written by Hiroyuki Bessho for Genetec Corporation.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. The name of Genetec Corporation may not be used to endorse or
     48  *    promote products derived from this software without specific prior
     49  *    written permission.
     50  *
     51  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     52  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     53  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     54  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     55  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     56  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     57  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     58  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     59  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     60  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     61  * POSSIBILITY OF SUCH DAMAGE.
     62  *
     63  * Machine dependent functions for kernel setup for Genetec G4250EBX
     64  * evaluation board.
     65  *
     66  * Based on iq80310_machhdep.c
     67  */
     68 /*
     69  * Copyright (c) 2001 Wasabi Systems, Inc.
     70  * All rights reserved.
     71  *
     72  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     73  *
     74  * Redistribution and use in source and binary forms, with or without
     75  * modification, are permitted provided that the following conditions
     76  * are met:
     77  * 1. Redistributions of source code must retain the above copyright
     78  *    notice, this list of conditions and the following disclaimer.
     79  * 2. Redistributions in binary form must reproduce the above copyright
     80  *    notice, this list of conditions and the following disclaimer in the
     81  *    documentation and/or other materials provided with the distribution.
     82  * 3. All advertising materials mentioning features or use of this software
     83  *    must display the following acknowledgement:
     84  *	This product includes software developed for the NetBSD Project by
     85  *	Wasabi Systems, Inc.
     86  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     87  *    or promote products derived from this software without specific prior
     88  *    written permission.
     89  *
     90  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     91  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     92  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     93  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     94  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     95  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     96  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     97  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     98  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     99  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    100  * POSSIBILITY OF SUCH DAMAGE.
    101  */
    102 
    103 /*
    104  * Copyright (c) 1997,1998 Mark Brinicombe.
    105  * Copyright (c) 1997,1998 Causality Limited.
    106  * All rights reserved.
    107  *
    108  * Redistribution and use in source and binary forms, with or without
    109  * modification, are permitted provided that the following conditions
    110  * are met:
    111  * 1. Redistributions of source code must retain the above copyright
    112  *    notice, this list of conditions and the following disclaimer.
    113  * 2. Redistributions in binary form must reproduce the above copyright
    114  *    notice, this list of conditions and the following disclaimer in the
    115  *    documentation and/or other materials provided with the distribution.
    116  * 3. All advertising materials mentioning features or use of this software
    117  *    must display the following acknowledgement:
    118  *	This product includes software developed by Mark Brinicombe
    119  *	for the NetBSD Project.
    120  * 4. The name of the company nor the name of the author may be used to
    121  *    endorse or promote products derived from this software without specific
    122  *    prior written permission.
    123  *
    124  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
    125  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    126  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    127  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
    128  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    129  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    130  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    131  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    132  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    133  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    134  * SUCH DAMAGE.
    135  *
    136  * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
    137  * boards using RedBoot firmware.
    138  */
    139 
    140 #include "opt_com.h"
    141 #include "opt_cputypes.h"
    142 #include "opt_evbarm_boardtype.h"
    143 #include "opt_gumstix.h"
    144 #include "opt_kgdb.h"
    145 #include "opt_multiprocessor.h"
    146 #include "opt_pmap_debug.h"
    147 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    148 #include "opt_omap.h"
    149 
    150 #if defined(DUOVERO)
    151 #include "arml2cc.h"
    152 #endif
    153 #include "prcm.h"
    154 #endif
    155 
    156 #include <sys/param.h>
    157 #include <sys/conf.h>
    158 #include <sys/device.h>
    159 #include <sys/exec.h>
    160 #include <sys/kernel.h>
    161 #include <sys/proc.h>
    162 #include <sys/reboot.h>
    163 #include <sys/systm.h>
    164 #include <sys/termios.h>
    165 #include <sys/bus.h>
    166 #include <sys/cpu.h>
    167 #include <sys/gpio.h>
    168 
    169 #include <prop/proplib.h>
    170 
    171 #include <uvm/uvm_extern.h>
    172 
    173 #include <arm/mainbus/mainbus.h>	/* don't reorder */
    174 
    175 #include <machine/autoconf.h>		/* don't reorder */
    176 #include <machine/bootconfig.h>
    177 #include <arm/locore.h>
    178 
    179 #include <arm/arm32/machdep.h>
    180 #if NARML2CC > 0
    181 #include <arm/cortex/pl310_var.h>
    182 #endif
    183 #include <arm/cortex/scu_reg.h>
    184 #include <arm/omap/omap2_obiovar.h>
    185 #include <arm/omap/am335x_prcm.h>
    186 #include <arm/omap/omap2_gpio.h>
    187 #include <arm/omap/omap2_gpmcreg.h>
    188 #include <arm/omap/omap2_prcm.h>
    189 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    190 #include <arm/omap/omap2_reg.h>		/* Must required "opt_omap.h" */
    191 #endif
    192 #include <arm/omap/omap3_sdmmcreg.h>
    193 #include <arm/omap/omap_var.h>
    194 #include <arm/omap/omap_com.h>
    195 #include <arm/omap/tifbvar.h>
    196 #include <arm/xscale/pxa2x0reg.h>
    197 #include <arm/xscale/pxa2x0var.h>
    198 #include <arm/xscale/pxa2x0_gpio.h>
    199 #include <evbarm/gumstix/gumstixreg.h>
    200 #include <evbarm/gumstix/gumstixvar.h>
    201 
    202 #include <dev/cons.h>
    203 
    204 #ifdef KGDB
    205 #include <sys/kgdb.h>
    206 #endif
    207 
    208 /*
    209  * The range 0xc1000000 - 0xcfffffff is available for kernel VM space
    210  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    211  */
    212 #ifndef KERNEL_VM_BASE
    213 #define	KERNEL_VM_BASE		0xc1000000
    214 #endif
    215 #define KERNEL_VM_SIZE		0x0f000000
    216 
    217 BootConfig bootconfig;		/* Boot config storage */
    218 static char bootargs[MAX_BOOT_STRING];
    219 const size_t bootargs_len = sizeof(bootargs) - 1;	/* without nul */
    220 char *boot_args = NULL;
    221 
    222 uint32_t system_serial_high;
    223 uint32_t system_serial_low;
    224 
    225 /* Prototypes */
    226 #if defined(GUMSTIX)
    227 static void	read_system_serial(void);
    228 #endif
    229 #if defined(OMAP2)
    230 static void	omap_reset(void);
    231 static void	find_cpu_clock(void);
    232 #endif
    233 static void	process_kernel_args(int, char *[]);
    234 static void	process_kernel_args_liner(char *);
    235 #ifdef KGDB
    236 static void	kgdb_port_init(void);
    237 #endif
    238 static void	gumstix_device_register(device_t, void *);
    239 
    240 bs_protos(bs_notimpl);
    241 
    242 #include "com.h"
    243 #if NCOM > 0
    244 #include <dev/ic/comreg.h>
    245 #include <dev/ic/comvar.h>
    246 #endif
    247 
    248 #if defined(CPU_XSCALE)
    249 #include "lcd.h"
    250 #endif
    251 
    252 #ifndef CONSPEED
    253 #define CONSPEED B115200	/* It's a setting of the default of u-boot */
    254 #endif
    255 #ifndef CONMODE
    256 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    257 #endif
    258 
    259 int comcnspeed = CONSPEED;
    260 int comcnmode = CONMODE;
    261 
    262 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    263 static char console[16];
    264 #endif
    265 
    266 const struct tifb_panel_info *tifb_panel_info = NULL;
    267 /* Use TPS65217 White LED Driver */
    268 bool use_tps65217_wled = false;
    269 
    270 extern void gxio_config(void);
    271 extern void gxio_config_expansion(char *);
    272 
    273 
    274 static inline pd_entry_t *
    275 read_ttb(void)
    276 {
    277 	long ttb;
    278 
    279 	__asm volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
    280 
    281 	return (pd_entry_t *)(ttb & ~((1<<14)-1));
    282 }
    283 
    284 /*
    285  * Static device mappings. These peripheral registers are mapped at
    286  * fixed virtual addresses very early in initarm() so that we can use
    287  * them while booting the kernel, and stay at the same address
    288  * throughout whole kernel's life time.
    289  *
    290  * We use this table twice; once with bootstrap page table, and once
    291  * with kernel's page table which we build up in initarm().
    292  *
    293  * Since we map these registers into the bootstrap page table using
    294  * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
    295  * registers segment-aligned and segment-rounded in order to avoid
    296  * using the 2nd page tables.
    297  */
    298 
    299 #define	_A(a)	((a) & ~L1_S_OFFSET)
    300 #define	_S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
    301 
    302 static const struct pmap_devmap gumstix_devmap[] = {
    303 #if defined(GUMSTIX)
    304 	{
    305 		GUMSTIX_GPIO_VBASE,
    306 		_A(PXA2X0_GPIO_BASE),
    307 		_S(PXA250_GPIO_SIZE),
    308 		VM_PROT_READ | VM_PROT_WRITE,
    309 		PTE_NOCACHE,
    310 	},
    311 	{
    312 		GUMSTIX_CLKMAN_VBASE,
    313 		_A(PXA2X0_CLKMAN_BASE),
    314 		_S(PXA2X0_CLKMAN_SIZE),
    315 		VM_PROT_READ | VM_PROT_WRITE,
    316 		PTE_NOCACHE,
    317 	},
    318 	{
    319 		GUMSTIX_INTCTL_VBASE,
    320 		_A(PXA2X0_INTCTL_BASE),
    321 		_S(PXA2X0_INTCTL_SIZE),
    322 		VM_PROT_READ | VM_PROT_WRITE,
    323 		PTE_NOCACHE,
    324 	},
    325 	{
    326 		GUMSTIX_FFUART_VBASE,
    327 		_A(PXA2X0_FFUART_BASE),
    328 		_S(4 * COM_NPORTS),
    329 		VM_PROT_READ | VM_PROT_WRITE,
    330 		PTE_NOCACHE,
    331 	},
    332 	{
    333 		GUMSTIX_STUART_VBASE,
    334 		_A(PXA2X0_STUART_BASE),
    335 		_S(4 * COM_NPORTS),
    336 		VM_PROT_READ | VM_PROT_WRITE,
    337 		PTE_NOCACHE,
    338 	},
    339 	{
    340 		GUMSTIX_BTUART_VBASE,
    341 		_A(PXA2X0_BTUART_BASE),
    342 		_S(4 * COM_NPORTS),
    343 		VM_PROT_READ | VM_PROT_WRITE,
    344 		PTE_NOCACHE,
    345 	},
    346 	{
    347 		GUMSTIX_HWUART_VBASE,
    348 		_A(PXA2X0_HWUART_BASE),
    349 		_S(4 * COM_NPORTS),
    350 		VM_PROT_READ | VM_PROT_WRITE,
    351 		PTE_NOCACHE,
    352 	},
    353 	{
    354 		GUMSTIX_LCDC_VBASE,
    355 		_A(PXA2X0_LCDC_BASE),
    356 		_S(4 * COM_NPORTS),
    357 		VM_PROT_READ | VM_PROT_WRITE,
    358 		PTE_NOCACHE,
    359 	},
    360 #elif defined(OVERO)
    361 	{	/* SCM, PRCM */
    362 		OVERO_L4_CORE_VBASE,
    363 		_A(OMAP3530_L4_CORE_BASE),
    364 		_S(L1_S_SIZE),		/* No need 16MB.  Use only first 1MB */
    365 		VM_PROT_READ | VM_PROT_WRITE,
    366 		PTE_NOCACHE
    367 	},
    368 	{	/* Console, GPIO[2-6] */
    369 		OVERO_L4_PERIPHERAL_VBASE,
    370 		_A(OMAP3530_L4_PERIPHERAL_BASE),
    371 		_S(OMAP3530_L4_PERIPHERAL_SIZE),
    372 		VM_PROT_READ | VM_PROT_WRITE,
    373 		PTE_NOCACHE
    374 	},
    375 	{	/* GPIO1 */
    376 		OVERO_L4_WAKEUP_VBASE,
    377 		_A(OMAP3530_L4_WAKEUP_BASE),
    378 		_S(OMAP3530_L4_WAKEUP_SIZE),
    379 		VM_PROT_READ | VM_PROT_WRITE,
    380 		PTE_NOCACHE
    381 	},
    382 	{
    383 		OVERO_GPMC_VBASE,
    384 		_A(GPMC_BASE),
    385 		_S(GPMC_SIZE),
    386 		VM_PROT_READ | VM_PROT_WRITE,
    387 		PTE_NOCACHE
    388 	},
    389 #elif defined(DUOVERO)
    390 	{
    391 		DUOVERO_L4_CM_VBASE,
    392 		_A(OMAP4430_L4_CORE_BASE + 0x100000),
    393 		_S(L1_S_SIZE),
    394 		VM_PROT_READ | VM_PROT_WRITE,
    395 		PTE_NOCACHE
    396 	},
    397 	{	/* Console, SCU, L2CC, GPIO[2-6] */
    398 		DUOVERO_L4_PERIPHERAL_VBASE,
    399 		_A(OMAP4430_L4_PERIPHERAL_BASE),
    400 		_S(L1_S_SIZE * 3),
    401 		VM_PROT_READ | VM_PROT_WRITE,
    402 		PTE_NOCACHE
    403 	},
    404 	{	/* PRCM, GPIO1 */
    405 		DUOVERO_L4_WAKEUP_VBASE,
    406 		_A(OMAP4430_L4_WAKEUP_BASE),
    407 		_S(OMAP4430_L4_WAKEUP_SIZE),
    408 		VM_PROT_READ | VM_PROT_WRITE,
    409 		PTE_NOCACHE
    410 	},
    411 	{
    412 		DUOVERO_GPMC_VBASE,
    413 		_A(GPMC_BASE),
    414 		_S(GPMC_SIZE),
    415 		VM_PROT_READ | VM_PROT_WRITE,
    416 		PTE_NOCACHE
    417 	},
    418 #elif defined(PEPPER)
    419 	{
    420 		/* CM, Control Module, GPIO0, Console */
    421 		PEPPER_PRCM_VBASE,
    422 		_A(OMAP2_CM_BASE),
    423 		_S(L1_S_SIZE),
    424 		VM_PROT_READ | VM_PROT_WRITE,
    425 		PTE_NOCACHE
    426 	},
    427 	{
    428 		/* GPIO[1-3] */
    429 		PEPPER_L4_PERIPHERAL_VBASE,
    430 		_A(TI_AM335X_L4_PERIPHERAL_BASE),
    431 		_S(L1_S_SIZE),
    432 		VM_PROT_READ | VM_PROT_WRITE,
    433 		PTE_NOCACHE
    434 	},
    435 #endif
    436 	{ 0, 0, 0, 0, 0 }
    437 };
    438 
    439 #undef	_A
    440 #undef	_S
    441 
    442 
    443 /*
    444  * u_int initarm(...)
    445  *
    446  * Initial entry point on startup. This gets called before main() is
    447  * entered.
    448  * It should be responsible for setting up everything that must be
    449  * in place when main is called.
    450  * This includes
    451  *   Taking a copy of the boot configuration structure.
    452  *   Initialising the physical console so characters can be printed.
    453  *   Setting up page tables for the kernel
    454  *   Relocating the kernel to the bottom of physical memory
    455  */
    456 u_int
    457 initarm(void *arg)
    458 {
    459 	extern char KERNEL_BASE_phys[];
    460 	extern uint32_t *u_boot_args[];
    461 	extern uint32_t ram_size;
    462 	enum { r0 = 0, r1 = 1, r2 = 2, r3 = 3 }; /* args from u-boot */
    463 
    464 	/*
    465 	 * We mapped PA == VA in gumstix_start.S.
    466 	 * Also mapped SDRAM to KERNEL_BASE first 64Mbyte only with cachable.
    467 	 *
    468 	 * Gumstix (basix, connex, verdex, verdex-pro):
    469 	 * Physical Address Range     Description
    470 	 * -----------------------    ----------------------------------
    471 	 * 0x00000000 - 0x00ffffff    flash Memory   (16MB or 4MB)
    472 	 * 0x40000000 - 0x480fffff    Processor Registers
    473 	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB or 128MB)
    474 	 * 0xc0000000 - 0xc3ffffff    KERNEL_BASE
    475 	 *
    476 	 * Overo:
    477 	 * Physical Address Range     Description
    478 	 * -----------------------    ----------------------------------
    479 	 * 0x80000000 - 0x9fffffff    SDRAM Bank 0
    480 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    481 	 *
    482 	 * DuoVero, Pepper:
    483 	 * Physical Address Range     Description
    484 	 * -----------------------    ----------------------------------
    485 	 * 0x80000000 - 0xbfffffff    SDRAM Bank 0
    486 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    487 	 */
    488 
    489 #if defined(CPU_XSCALE)
    490 	cpu_reset_address = NULL;
    491 #elif defined(OMAP2)
    492 	cpu_reset_address = omap_reset;
    493 
    494 	find_cpu_clock();
    495 #endif
    496 
    497 	/*
    498 	 * Heads up ... Setup the CPU / MMU / TLB functions
    499 	 */
    500 	if (set_cpufuncs())
    501 		panic("cpu not recognized!");
    502 
    503 	/* map some peripheral registers at static I/O area */
    504 	pmap_devmap_bootstrap((vaddr_t)read_ttb(), gumstix_devmap);
    505 
    506 #if defined(CPU_XSCALE)
    507 	/* start 32.768kHz OSC */
    508 	ioreg_write(GUMSTIX_CLKMAN_VBASE + CLKMAN_OSCC, OSCC_OON);
    509 
    510 	/* Get ready for splfoo() */
    511 	pxa2x0_intr_bootstrap(GUMSTIX_INTCTL_VBASE);
    512 
    513 	/* setup GPIO for {FF,ST,HW}UART. */
    514 	pxa2x0_gpio_bootstrap(GUMSTIX_GPIO_VBASE);
    515 
    516 	pxa2x0_clkman_bootstrap(GUMSTIX_CLKMAN_VBASE);
    517 #endif
    518 
    519 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    520 
    521 	/* configure MUX, GPIO and CLK. */
    522 	gxio_config();
    523 
    524 #ifndef GUMSTIX_NETBSD_ARGS_CONSOLE
    525 	consinit();
    526 #endif
    527 #ifdef KGDB
    528 	kgdb_port_init();
    529 #endif
    530 
    531 	/*
    532 	 * Examine the boot args string for options we need to know about
    533 	 * now.
    534 	 */
    535 #if defined(GUMSTIX)
    536 #define SDRAM_START	0xa0000000UL
    537 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    538 #define SDRAM_START	0x80000000UL
    539 #endif
    540 	if ((uint32_t)u_boot_args[r0] < SDRAM_START ||
    541 	    (uint32_t)u_boot_args[r0] >= SDRAM_START + ram_size)
    542 		/* Maybe r0 is 'argc'.  We are booted by command 'go'. */
    543 		process_kernel_args((int)u_boot_args[r0],
    544 		    (char **)u_boot_args[r1]);
    545 	else
    546 		/*
    547 		 * Maybe r3 is 'boot args string' of 'bootm'.  This string is
    548 		 * linely.
    549 		 */
    550 		process_kernel_args_liner((char *)u_boot_args[r3]);
    551 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    552 	consinit();
    553 #endif
    554 
    555 	/* Talk to the user */
    556 #define BDSTR(s)	_BDSTR(s)
    557 #define _BDSTR(s)	#s
    558 	printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
    559 
    560 	/* Read system serial */
    561 #if defined(GUMSTIX)
    562 	read_system_serial();
    563 #endif
    564 
    565 #ifdef VERBOSE_INIT_ARM
    566 	printf("initarm: Configuring system ...\n");
    567 #endif
    568 
    569 #if defined(OMAP_4430)
    570 	const bus_space_tag_t iot = &omap_bs_tag;
    571 	bus_space_handle_t ioh;
    572 
    573 #if NARML2CC > 0
    574 	/*
    575 	 * Initialize L2-Cache parameters
    576 	 */
    577 
    578 	if (bus_space_map(iot, OMAP4_L2CC_BASE, OMAP4_L2CC_SIZE, 0, &ioh) != 0)
    579 		panic("OMAP4_L2CC_BASE map failed\n");
    580 	arml2cc_init(iot, ioh, 0);
    581 #endif
    582 
    583 #ifdef MULTIPROCESSOR
    584 	if (bus_space_map(iot, OMAP4_SCU_BASE, SCU_SIZE, 0, &ioh) != 0)
    585 		panic("OMAP4_SCU_BASE map failed\n");
    586         arm_cpu_max =
    587 	    1 + (bus_space_read_4(iot, ioh, SCU_CFG) & SCU_CFG_CPUMAX);
    588 #endif
    589 #endif
    590 
    591 	/* Fake bootconfig structure for the benefit of pmap.c */
    592 	/* XXX must make the memory description h/w independent */
    593 	bootconfig.dramblocks = 1;
    594 	bootconfig.dram[0].address = SDRAM_START;
    595 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
    596 
    597 	KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
    598 
    599 	arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
    600 	    (uintptr_t) KERNEL_BASE_phys);
    601 	arm32_kernel_vm_init(KERNEL_VM_BASE,
    602 #if defined(CPU_XSCALE)
    603 	    ARM_VECTORS_LOW,
    604 #elif defined(CPU_CORTEX)
    605 	    ARM_VECTORS_HIGH,
    606 #endif
    607 	    0, gumstix_devmap, true);
    608 
    609 	evbarm_device_register = gumstix_device_register;
    610 
    611 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
    612 }
    613 
    614 #if defined(GUMSTIX)
    615 static void
    616 read_system_serial(void)
    617 {
    618 #define GUMSTIX_SYSTEM_SERIAL_ADDR	0
    619 #define GUMSTIX_SYSTEM_SERIAL_SIZE	8
    620 #define FLASH_OFFSET_INTEL_PROTECTION	0x81
    621 #define FLASH_OFFSET_USER_PROTECTION	0x85
    622 #define FLASH_CMD_READ_ID		0x90
    623 #define FLASH_CMD_RESET			0xff
    624 	int i;
    625 	char system_serial[GUMSTIX_SYSTEM_SERIAL_SIZE], *src;
    626 	char x;
    627 
    628 	src = (char *)(FLASH_OFFSET_USER_PROTECTION * 2 /*word*/);
    629 	*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    630 	memcpy(system_serial,
    631 	    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    632 	*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    633 
    634 	for (i = 1, x = system_serial[0]; i < sizeof (system_serial); i++)
    635 		x &= system_serial[i];
    636 	if (x == 0xff) {
    637 		src = (char *)(FLASH_OFFSET_INTEL_PROTECTION * 2 /*word*/);
    638 		*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    639 		memcpy(system_serial,
    640 		    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    641 		*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    642 
    643 		/*
    644 		 * XXXX: Don't need ???
    645 		 * gumstix_serial_hash(system_serial);
    646 		 */
    647 	}
    648 	system_serial_high = system_serial[0] << 24 | system_serial[1] << 16 |
    649 	    system_serial[2] << 8 | system_serial[3];
    650 	system_serial_low = system_serial[4] << 24 | system_serial[5] << 16 |
    651 	    system_serial[6] << 8 | system_serial[7];
    652 
    653 	printf("system serial: 0x");
    654 	for (i = 0; i < sizeof (system_serial); i++)
    655 		printf("%02x", system_serial[i]);
    656 	printf("\n");
    657 }
    658 #endif
    659 
    660 #if defined(OMAP2)
    661 static void
    662 omap_reset(void)
    663 {
    664 
    665 #if defined(TI_AM335X)
    666 	vaddr_t prm_base = (PEPPER_PRCM_VBASE + AM335X_PRCM_PRM_DEVICE);
    667 
    668 	*(volatile uint32_t *)(prm_base + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW;
    669 #elif defined(OMAP_4430)
    670 	*(volatile uint32_t *)(DUOVERO_L4_WAKEUP_VBASE + OMAP4_PRM_RSTCTRL) =
    671 	    OMAP4_PRM_RSTCTRL_WARM;
    672 #endif
    673 
    674 #if NPRCM > 0
    675 	prcm_cold_reset();
    676 #endif
    677 }
    678 
    679 static void
    680 find_cpu_clock(void)
    681 {
    682 	const vaddr_t prm_base __unused = OMAP2_PRM_BASE;
    683 	const vaddr_t cm_base = OMAP2_CM_BASE;
    684 
    685 #if defined(OMAP_3530)
    686 
    687 	const uint32_t prm_clksel =
    688 	    *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL);
    689 	static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS;
    690 	const uint32_t sys_clk =
    691 	    prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)];
    692 	const uint32_t dpll1 =
    693 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU);
    694 	const uint32_t dpll2 =
    695 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU);
    696 	const uint32_t m =
    697 	    __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT);
    698 	const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV);
    699 	const uint32_t m2 =
    700 	    __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV);
    701 
    702 	/*
    703 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    704 	 */
    705 	curcpu()->ci_data.cpu_cc_freq =
    706 	    ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT;
    707 	omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT;
    708 
    709 #elif defined(OMAP_4430)
    710 
    711 	const uint32_t prm_clksel =
    712 	    *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL);
    713 	static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS;
    714 	const uint32_t sys_clk =
    715 	    cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)];
    716 	const uint32_t dpll1 =
    717 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU);
    718 	const uint32_t dpll2 =
    719 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU);
    720 	const uint32_t m =
    721 	    __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT);
    722 	const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV);
    723 	const uint32_t m2 =
    724 	    __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV);
    725 
    726 	/*
    727 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    728 	 */
    729 	curcpu()->ci_data.cpu_cc_freq =
    730 	    ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2;
    731 	omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT;
    732 
    733 #elif defined(TI_AM335X)
    734 
    735 	prcm_bootstrap(cm_base);
    736 	am335x_sys_clk(TI_AM335X_CTLMOD_BASE);
    737 	am335x_cpu_clk();
    738 
    739 #endif
    740 }
    741 #endif
    742 
    743 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    744 static const char busheader_name[] = "busheader=";
    745 #endif
    746 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    747     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    748 static const char expansion_name[] = "expansion=";
    749 #endif
    750 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    751 static const char console_name[] = "console=";
    752 #endif
    753 static void
    754 process_kernel_args(int argc, char *argv[])
    755 {
    756 	int gxio_configured = 0, i, j;
    757 
    758 	boothowto = 0;
    759 
    760 	for (i = 1, j = 0; i < argc; i++) {
    761 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    762 		if (!strncmp(argv[i], busheader_name, strlen(busheader_name))) {
    763 			/* Configure for GPIOs of busheader side */
    764 			gxio_config_expansion(argv[i] + strlen(busheader_name));
    765 			gxio_configured = 1;
    766 			continue;
    767 		}
    768 #endif
    769 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    770     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    771 		if (!strncmp(argv[i], expansion_name, strlen(expansion_name))) {
    772 			/* Configure expansion */
    773 			gxio_config_expansion(argv[i] + strlen(expansion_name));
    774 			gxio_configured = 1;
    775 			continue;
    776 		}
    777 #endif
    778 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    779 		if (!strncmp(argv[i], console_name, strlen(console_name))) {
    780 			strncpy(console, argv[i] + strlen(console_name),
    781 			    sizeof(console));
    782 			consinit();
    783 		}
    784 #endif
    785 		if (j == bootargs_len) {
    786 			*(bootargs + j) = '\0';
    787 			continue;
    788 		}
    789 		if (j != 0)
    790 			*(bootargs + j++) = ' ';
    791 		strncpy(bootargs + j, argv[i], bootargs_len - j);
    792 		bootargs[bootargs_len] = '\0';
    793 		j += strlen(argv[i]);
    794 	}
    795 	boot_args = bootargs;
    796 
    797 	parse_mi_bootargs(boot_args);
    798 
    799 	if (!gxio_configured)
    800 		gxio_config_expansion(NULL);
    801 }
    802 
    803 static void
    804 process_kernel_args_liner(char *args)
    805 {
    806 	int i = 0;
    807 	char *p = NULL;
    808 
    809 	boothowto = 0;
    810 
    811 	strncpy(bootargs, args, sizeof(bootargs));
    812 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    813     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    814 	{
    815 		char *q;
    816 
    817 		if ((p = strstr(bootargs, expansion_name)))
    818 			q = p + strlen(expansion_name);
    819 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    820 		else if ((p = strstr(bootargs, busheader_name)))
    821 			q = p + strlen(busheader_name);
    822 #endif
    823 		if (p) {
    824 			char expansion[256], c;
    825 
    826 			i = 0;
    827 			do {
    828 				c = *(q + i);
    829 				if (c == ' ')
    830 					c = '\0';
    831 				expansion[i++] = c;
    832 			} while (c != '\0' && i < sizeof(expansion));
    833 			gxio_config_expansion(expansion);
    834 			strcpy(p, q + i);
    835 		}
    836 	}
    837 #endif
    838 	if (p == NULL)
    839 		gxio_config_expansion(NULL);
    840 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    841 	p = strstr(bootargs, console_name);
    842 	if (p != NULL) {
    843 		char c;
    844 
    845 		i = 0;
    846 		do {
    847 			c = *(p + strlen(console_name) + i);
    848 			if (c == ' ')
    849 				c = '\0';
    850 			console[i++] = c;
    851 		} while (c != '\0' && i < sizeof(console));
    852 		consinit();
    853 		strcpy(p, p + strlen(console_name) + i);
    854 	}
    855 #endif
    856 	boot_args = bootargs;
    857 
    858 	parse_mi_bootargs(boot_args);
    859 }
    860 
    861 #ifdef KGDB
    862 #ifndef KGDB_DEVNAME
    863 #define KGDB_DEVNAME	"ffuart"
    864 #endif
    865 const char kgdb_devname[] = KGDB_DEVNAME;
    866 
    867 #ifndef KGDB_DEVRATE
    868 #define KGDB_DEVRATE	CONSPEED
    869 #endif
    870 int kgdb_devrate = KGDB_DEVRATE;
    871 
    872 #if (NCOM > 0)
    873 #ifndef KGDB_DEVMODE
    874 #define KGDB_DEVMODE	CONMODE
    875 #endif
    876 int comkgdbmode = KGDB_DEVMODE;
    877 #endif /* NCOM */
    878 
    879 #endif /* KGDB */
    880 
    881 
    882 void
    883 consinit(void)
    884 {
    885 	static int consinit_called = 0;
    886 
    887 	if (consinit_called != 0)
    888 		return;
    889 
    890 	consinit_called = 1;
    891 
    892 #if NCOM > 0
    893 
    894 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    895 	/* Maybe passed Linux's bootargs 'console=ttyS?,<speed>...' */
    896 	if (strncmp(console, "ttyS", 4) == 0 && console[5] == ',') {
    897 		int i;
    898 
    899 		comcnspeed = 0;
    900 		for (i = 6; i < strlen(console) && isdigit(console[i]); i++)
    901 			comcnspeed = comcnspeed * 10 + (console[i] - '0');
    902 	}
    903 #endif
    904 
    905 #if defined(GUMSTIX)
    906 
    907 #ifdef FFUARTCONSOLE
    908 #ifdef KGDB
    909 	if (strcmp(kgdb_devname, "ffuart") == 0){
    910 		/* port is reserved for kgdb */
    911 	} else
    912 #endif
    913 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    914 	if (console[0] == '\0' || strcasecmp(console, "ffuart") == 0 ||
    915 	    strncmp(console, "ttyS0,", 6) == 0)
    916 #endif
    917 	{
    918 		int rv;
    919 
    920 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
    921 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    922 		if (rv == 0) {
    923 			pxa2x0_clkman_config(CKEN_FFUART, 1);
    924 			return;
    925 		}
    926 	}
    927 #endif /* FFUARTCONSOLE */
    928 
    929 #ifdef STUARTCONSOLE
    930 #ifdef KGDB
    931 	if (strcmp(kgdb_devname, "stuart") == 0) {
    932 		/* port is reserved for kgdb */
    933 	} else
    934 #endif
    935 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    936 	if (console[0] == '\0' || strcasecmp(console, "stuart") == 0)
    937 #endif
    938 	{
    939 		int rv;
    940 
    941 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_STUART_BASE,
    942 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    943 		if (rv == 0) {
    944 			pxa2x0_clkman_config(CKEN_STUART, 1);
    945 			return;
    946 		}
    947 	}
    948 #endif /* STUARTCONSOLE */
    949 
    950 #ifdef BTUARTCONSOLE
    951 #ifdef KGDB
    952 	if (strcmp(kgdb_devname, "btuart") == 0) {
    953 		/* port is reserved for kgdb */
    954 	} else
    955 #endif
    956 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    957 	if (console[0] == '\0' || strcasecmp(console, "btuart") == 0)
    958 #endif
    959 	{
    960 		int rv;
    961 
    962 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
    963 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    964 		if (rv == 0) {
    965 			pxa2x0_clkman_config(CKEN_BTUART, 1);
    966 			return;
    967 		}
    968 	}
    969 #endif /* BTUARTCONSOLE */
    970 
    971 #ifdef HWUARTCONSOLE
    972 #ifdef KGDB
    973 	if (strcmp(kgdb_devname, "hwuart") == 0) {
    974 		/* port is reserved for kgdb */
    975 	} else
    976 #endif
    977 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    978 	if (console[0] == '\0' || strcasecmp(console, "hwuart") == 0)
    979 #endif
    980 	{
    981 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_HWUART_BASE,
    982 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    983 		if (rv == 0) {
    984 			pxa2x0_clkman_config(CKEN_HWUART, 1);
    985 			return;
    986 		}
    987 	}
    988 #endif /* HWUARTCONSOLE */
    989 
    990 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    991 
    992 	if (comcnattach(&omap_a4x_bs_tag, CONSADDR, comcnspeed,
    993 	    OMAP_COM_FREQ, COM_TYPE_NORMAL, comcnmode) == 0)
    994 		return;
    995 
    996 #endif /* GUMSTIX or OVERO */
    997 
    998 #endif /* NCOM */
    999 
   1000 #if NLCD > 0
   1001 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
   1002 	if (console[0] == '\0' || strcasecmp(console, "lcd") == 0)
   1003 #endif
   1004 	{
   1005 		gxlcd_cnattach();
   1006 	}
   1007 #endif
   1008 }
   1009 
   1010 #ifdef KGDB
   1011 static void
   1012 kgdb_port_init(void)
   1013 {
   1014 #if (NCOM > 0) && defined(COM_PXA2X0)
   1015 	paddr_t paddr = 0;
   1016 	int cken = 0;
   1017 
   1018 	if (0 == strcmp(kgdb_devname, "ffuart")) {
   1019 		paddr = PXA2X0_FFUART_BASE;
   1020 		cken = CKEN_FFUART;
   1021 	} else if (0 == strcmp(kgdb_devname, "stuart")) {
   1022 		paddr = PXA2X0_STUART_BASE;
   1023 		cken = CKEN_STUART;
   1024 	} else if (0 == strcmp(kgdb_devname, "btuart")) {
   1025 		paddr = PXA2X0_BTUART_BASE;
   1026 		cken = CKEN_BTUART;
   1027 	} else if (0 == strcmp(kgdb_devname, "hwuart")) {
   1028 		paddr = PXA2X0_HWUART_BASE;
   1029 		cken = CKEN_HWUART;
   1030 	}
   1031 
   1032 	if (paddr &&
   1033 	    0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
   1034 		kgdb_devrate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
   1035 
   1036 		pxa2x0_clkman_config(cken, 1);
   1037 	}
   1038 
   1039 #endif
   1040 }
   1041 #endif
   1042 
   1043 static void
   1044 gumstix_device_register(device_t dev, void *aux)
   1045 {
   1046 	prop_dictionary_t dict = device_properties(dev);
   1047 
   1048 	if (device_is_a(dev, "a9tmr") ||
   1049 	    device_is_a(dev, "a9wdt")) {
   1050 		/*
   1051 		 * We need to tell the A9 Global/Watchdog Timer
   1052 		 * what frequency it runs at.
   1053 		 */
   1054 
   1055 		/*
   1056 		 * This clock always runs at (arm_clk div 2) and only goes
   1057 		 * to timers that are part of the A9 MP core subsystem.
   1058 		 */
   1059 		prop_dictionary_set_uint32(dict, "frequency",
   1060 		    curcpu()->ci_data.cpu_cc_freq / 2);
   1061 	}
   1062 	if (device_is_a(dev, "armperiph")) {
   1063 		if (device_is_a(device_parent(dev), "mainbus")) {
   1064 #if defined(OMAP2)
   1065 			/*
   1066 			 * XXX KLUDGE ALERT XXX
   1067 			 * The iot mainbus supplies is completely wrong since
   1068 			 * it scales addresses by 2.  The simpliest remedy is
   1069 			 * to replace with our bus space used for the armcore
   1070 			 * regisers (which armperiph uses).
   1071 			 */
   1072 			struct mainbus_attach_args * const mb = aux;
   1073 			mb->mb_iot = &omap_bs_tag;
   1074 #endif
   1075 		}
   1076 	}
   1077 	if (device_is_a(dev, "ehci")) {
   1078 #if defined(OVERO)
   1079 		prop_dictionary_set_uint16(dict, "nports", 2);
   1080 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1081 		prop_dictionary_set_cstring(dict, "port0-mode", "none");
   1082 		prop_dictionary_set_int16(dict, "port0-gpio", -1);
   1083 		prop_dictionary_set_cstring(dict, "port1-mode", "phy");
   1084 		prop_dictionary_set_int16(dict, "port1-gpio", 183);
   1085 		prop_dictionary_set_bool(dict, "port1-gpioval", true);
   1086 #elif defined(DUOVERO)
   1087 		prop_dictionary_set_uint16(dict, "nports", 1);
   1088 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1089 		prop_dictionary_set_cstring(dict, "port0-mode", "phy");
   1090 		prop_dictionary_set_int16(dict, "port0-gpio", 62);
   1091 		prop_dictionary_set_bool(dict, "port0-gpioval", false);
   1092 		prop_dictionary_set_bool(dict, "port0-extclk", true);
   1093 #endif
   1094 		prop_dictionary_set_uint16(dict, "dpll5-m", 443);
   1095 		prop_dictionary_set_uint16(dict, "dpll5-n", 11);
   1096 		prop_dictionary_set_uint16(dict, "dpll5-m2", 4);
   1097 	}
   1098 	if (device_is_a(dev, "ohci")) {
   1099 		if (prop_dictionary_set_bool(dict,
   1100 		    "Ganged-power-mask-on-port1", 1) == false) {
   1101 			printf("WARNING: unable to set power-mask for port1"
   1102 			    " property for %s\n", device_xname(dev));
   1103 		}
   1104 		if (prop_dictionary_set_bool(dict,
   1105 		    "Ganged-power-mask-on-port2", 1) == false) {
   1106 			printf("WARNING: unable to set power-mask for port2"
   1107 			    " property for %s\n", device_xname(dev));
   1108 		}
   1109 		if (prop_dictionary_set_bool(dict,
   1110 		    "Ganged-power-mask-on-port3", 1) == false) {
   1111 			printf("WARNING: unable to set power-mask for port3"
   1112 			    " property for %s\n", device_xname(dev));
   1113 		}
   1114 	}
   1115 	if (device_is_a(dev, "omapmputmr")) {
   1116 		struct obio_attach_args *obio = aux;
   1117 
   1118 		switch (obio->obio_addr) {
   1119 		case 0x49032000:	/* GPTIMER2 */
   1120 		case 0x49034000:	/* GPTIMER3 */
   1121 		case 0x49036000:	/* GPTIMER4 */
   1122 		case 0x49038000:	/* GPTIMER5 */
   1123 		case 0x4903a000:	/* GPTIMER6 */
   1124 		case 0x4903c000:	/* GPTIMER7 */
   1125 		case 0x4903e000:	/* GPTIMER8 */
   1126 		case 0x49040000:	/* GPTIMER9 */
   1127 #if defined(OVERO)
   1128 			{
   1129 			/* Ensure enable PRCM.CM_[FI]CLKEN_PER[3:10]. */
   1130 			const int en =
   1131 			    1 << (((obio->obio_addr >> 13) & 0x3f) - 0x16);
   1132 
   1133 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5000,
   1134 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5000) | en);
   1135 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5010,
   1136 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5010) | en);
   1137 			}
   1138 #endif
   1139 			break;
   1140 		}
   1141 	}
   1142 	if (device_is_a(dev, "sdhc")) {
   1143 		bool dualvolt = false;
   1144 
   1145 #if defined(OVERO) || defined(DUOVERO)
   1146 		if (device_is_a(device_parent(dev), "obio")) {
   1147 			struct obio_attach_args *obio = aux;
   1148 
   1149 #if defined(OVERO)
   1150 			if (obio->obio_addr == SDMMC2_BASE_3530)
   1151 				dualvolt = true;
   1152 #elif defined(DUOVERO)
   1153 			if (obio->obio_addr == SDMMC5_BASE_4430)
   1154 				dualvolt = true;
   1155 #endif
   1156 		}
   1157 #endif
   1158 #if defined(PEPPER)
   1159 		if (device_is_a(device_parent(dev), "mainbus")) {
   1160 			struct mainbus_attach_args * const mb = aux;
   1161 
   1162 			if (mb->mb_iobase == SDMMC3_BASE_TIAM335X)
   1163 				dualvolt = true;
   1164 		}
   1165 #endif
   1166 		prop_dictionary_set_bool(dict, "dual-volt", dualvolt);
   1167 	}
   1168 	if (device_is_a(dev, "tifb")) {
   1169 		prop_data_t panel_info;
   1170 
   1171 		panel_info = prop_data_create_data_nocopy(tifb_panel_info,
   1172 		    sizeof(struct tifb_panel_info));
   1173 		KASSERT(panel_info != NULL);
   1174 		prop_dictionary_set(dict, "panel-info", panel_info);
   1175 		prop_object_release(panel_info);
   1176 
   1177 #if defined(OMAP2)
   1178 		/* enable LCD */
   1179 		omap2_gpio_ctl(59, GPIO_PIN_OUTPUT);
   1180 		omap2_gpio_write(59, 0);	/* reset */
   1181 		delay(100);
   1182 		omap2_gpio_write(59, 1);
   1183 #endif
   1184 	}
   1185 	if (device_is_a(dev, "tps65217pmic")) {
   1186 #if defined(TI_AM335X)
   1187 		extern const char *mpu_supply;
   1188 
   1189 		mpu_supply = "DCDC3";
   1190 #endif
   1191 
   1192 		if (use_tps65217_wled) {
   1193 			prop_dictionary_set_int32(dict, "isel", 1);
   1194 			prop_dictionary_set_int32(dict, "fdim", 200);
   1195 			prop_dictionary_set_int32(dict, "brightness", 80);
   1196 		}
   1197 	}
   1198 }
   1199