Home | History | Annotate | Line # | Download | only in gumstix
gumstix_machdep.c revision 1.57.2.1
      1 /*	$NetBSD: gumstix_machdep.c,v 1.57.2.1 2017/04/21 16:53:26 bouyer Exp $ */
      2 /*
      3  * Copyright (C) 2005, 2006, 2007  WIDE Project and SOUM Corporation.
      4  * All rights reserved.
      5  *
      6  * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM
      7  * Corporation.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the project nor the name of SOUM Corporation
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS''
     22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 /*
     34  * Copyright (c) 2002, 2003, 2004, 2005  Genetec Corporation.
     35  * All rights reserved.
     36  *
     37  * Written by Hiroyuki Bessho for Genetec Corporation.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. The name of Genetec Corporation may not be used to endorse or
     48  *    promote products derived from this software without specific prior
     49  *    written permission.
     50  *
     51  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     52  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     53  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     54  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     55  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     56  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     57  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     58  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     59  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     60  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     61  * POSSIBILITY OF SUCH DAMAGE.
     62  *
     63  * Machine dependent functions for kernel setup for Genetec G4250EBX
     64  * evaluation board.
     65  *
     66  * Based on iq80310_machhdep.c
     67  */
     68 /*
     69  * Copyright (c) 2001 Wasabi Systems, Inc.
     70  * All rights reserved.
     71  *
     72  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     73  *
     74  * Redistribution and use in source and binary forms, with or without
     75  * modification, are permitted provided that the following conditions
     76  * are met:
     77  * 1. Redistributions of source code must retain the above copyright
     78  *    notice, this list of conditions and the following disclaimer.
     79  * 2. Redistributions in binary form must reproduce the above copyright
     80  *    notice, this list of conditions and the following disclaimer in the
     81  *    documentation and/or other materials provided with the distribution.
     82  * 3. All advertising materials mentioning features or use of this software
     83  *    must display the following acknowledgement:
     84  *	This product includes software developed for the NetBSD Project by
     85  *	Wasabi Systems, Inc.
     86  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     87  *    or promote products derived from this software without specific prior
     88  *    written permission.
     89  *
     90  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     91  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     92  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     93  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     94  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     95  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     96  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     97  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     98  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     99  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    100  * POSSIBILITY OF SUCH DAMAGE.
    101  */
    102 
    103 /*
    104  * Copyright (c) 1997,1998 Mark Brinicombe.
    105  * Copyright (c) 1997,1998 Causality Limited.
    106  * All rights reserved.
    107  *
    108  * Redistribution and use in source and binary forms, with or without
    109  * modification, are permitted provided that the following conditions
    110  * are met:
    111  * 1. Redistributions of source code must retain the above copyright
    112  *    notice, this list of conditions and the following disclaimer.
    113  * 2. Redistributions in binary form must reproduce the above copyright
    114  *    notice, this list of conditions and the following disclaimer in the
    115  *    documentation and/or other materials provided with the distribution.
    116  * 3. All advertising materials mentioning features or use of this software
    117  *    must display the following acknowledgement:
    118  *	This product includes software developed by Mark Brinicombe
    119  *	for the NetBSD Project.
    120  * 4. The name of the company nor the name of the author may be used to
    121  *    endorse or promote products derived from this software without specific
    122  *    prior written permission.
    123  *
    124  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
    125  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    126  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    127  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
    128  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    129  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    130  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    131  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    132  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    133  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    134  * SUCH DAMAGE.
    135  *
    136  * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
    137  * boards using RedBoot firmware.
    138  */
    139 
    140 #include "opt_com.h"
    141 #include "opt_cputypes.h"
    142 #include "opt_evbarm_boardtype.h"
    143 #include "opt_gumstix.h"
    144 #include "opt_kgdb.h"
    145 #include "opt_multiprocessor.h"
    146 #include "opt_pmap_debug.h"
    147 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    148 #include "opt_omap.h"
    149 
    150 #if defined(DUOVERO)
    151 #include "arml2cc.h"
    152 #endif
    153 #include "prcm.h"
    154 #endif
    155 
    156 #include <sys/param.h>
    157 #include <sys/conf.h>
    158 #include <sys/device.h>
    159 #include <sys/exec.h>
    160 #include <sys/kernel.h>
    161 #include <sys/proc.h>
    162 #include <sys/reboot.h>
    163 #include <sys/systm.h>
    164 #include <sys/termios.h>
    165 #include <sys/bus.h>
    166 #include <sys/cpu.h>
    167 #include <sys/gpio.h>
    168 
    169 #include <prop/proplib.h>
    170 
    171 #include <uvm/uvm_extern.h>
    172 
    173 #include <arm/mainbus/mainbus.h>	/* don't reorder */
    174 
    175 #include <machine/autoconf.h>		/* don't reorder */
    176 #include <machine/bootconfig.h>
    177 #include <arm/locore.h>
    178 
    179 #include <arm/arm32/machdep.h>
    180 #if NARML2CC > 0
    181 #include <arm/cortex/pl310_var.h>
    182 #endif
    183 #include <arm/cortex/scu_reg.h>
    184 #include <arm/omap/omap2_obiovar.h>
    185 #include <arm/omap/am335x_prcm.h>
    186 #include <arm/omap/omap2_gpio.h>
    187 #include <arm/omap/omap2_gpmcreg.h>
    188 #include <arm/omap/omap2_prcm.h>
    189 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    190 #include <arm/omap/omap2_reg.h>		/* Must required "opt_omap.h" */
    191 #endif
    192 #include <arm/omap/omap3_sdmmcreg.h>
    193 #include <arm/omap/omap_var.h>
    194 #include <arm/omap/omap_com.h>
    195 #include <arm/omap/tifbvar.h>
    196 #include <arm/xscale/pxa2x0reg.h>
    197 #include <arm/xscale/pxa2x0var.h>
    198 #include <arm/xscale/pxa2x0_gpio.h>
    199 #include <evbarm/gumstix/gumstixreg.h>
    200 #include <evbarm/gumstix/gumstixvar.h>
    201 
    202 #include <dev/cons.h>
    203 
    204 #ifdef KGDB
    205 #include <sys/kgdb.h>
    206 #endif
    207 
    208 /*
    209  * The range 0xc1000000 - 0xfd000000 is available for kernel VM space
    210  * Core-logic registers and I/O mappings occupy
    211  *
    212  *    0xfd000000 - 0xfd800000	on gumstix
    213  *    0xc0000000 - 0xc0400000	on overo, duovero and pepper
    214  */
    215 #ifndef KERNEL_VM_BASE
    216 #define	KERNEL_VM_BASE		0xc8000000
    217 #endif
    218 #define KERNEL_VM_SIZE		0x35000000
    219 
    220 BootConfig bootconfig;		/* Boot config storage */
    221 static char bootargs[MAX_BOOT_STRING];
    222 const size_t bootargs_len = sizeof(bootargs) - 1;	/* without nul */
    223 char *boot_args = NULL;
    224 
    225 uint32_t system_serial_high;
    226 uint32_t system_serial_low;
    227 
    228 /* Prototypes */
    229 #if defined(GUMSTIX)
    230 static void	read_system_serial(void);
    231 #endif
    232 #if defined(OMAP2)
    233 static void	omap_reset(void);
    234 static void	find_cpu_clock(void);
    235 #endif
    236 static void	process_kernel_args(int, char *[]);
    237 static void	process_kernel_args_liner(char *);
    238 #ifdef KGDB
    239 static void	kgdb_port_init(void);
    240 #endif
    241 static void	gumstix_device_register(device_t, void *);
    242 
    243 bs_protos(bs_notimpl);
    244 
    245 #include "com.h"
    246 #if NCOM > 0
    247 #include <dev/ic/comreg.h>
    248 #include <dev/ic/comvar.h>
    249 #endif
    250 
    251 #if defined(CPU_XSCALE)
    252 #include "lcd.h"
    253 #endif
    254 
    255 #ifndef CONSPEED
    256 #define CONSPEED B115200	/* It's a setting of the default of u-boot */
    257 #endif
    258 #ifndef CONMODE
    259 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    260 #endif
    261 
    262 int comcnspeed = CONSPEED;
    263 int comcnmode = CONMODE;
    264 
    265 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    266 static char console[16];
    267 #endif
    268 
    269 const struct tifb_panel_info *tifb_panel_info = NULL;
    270 /* Use TPS65217 White LED Driver */
    271 bool use_tps65217_wled = false;
    272 
    273 extern void gxio_config(void);
    274 extern void gxio_config_expansion(char *);
    275 
    276 
    277 static inline pd_entry_t *
    278 read_ttb(void)
    279 {
    280 	long ttb;
    281 
    282 	__asm volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
    283 
    284 	return (pd_entry_t *)(ttb & ~((1<<14)-1));
    285 }
    286 
    287 /*
    288  * Static device mappings. These peripheral registers are mapped at
    289  * fixed virtual addresses very early in initarm() so that we can use
    290  * them while booting the kernel, and stay at the same address
    291  * throughout whole kernel's life time.
    292  *
    293  * We use this table twice; once with bootstrap page table, and once
    294  * with kernel's page table which we build up in initarm().
    295  *
    296  * Since we map these registers into the bootstrap page table using
    297  * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
    298  * registers segment-aligned and segment-rounded in order to avoid
    299  * using the 2nd page tables.
    300  */
    301 
    302 #define	_A(a)	((a) & ~L1_S_OFFSET)
    303 #define	_S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
    304 
    305 static const struct pmap_devmap gumstix_devmap[] = {
    306 #if defined(GUMSTIX)
    307 	{
    308 		GUMSTIX_GPIO_VBASE,
    309 		_A(PXA2X0_GPIO_BASE),
    310 		_S(PXA250_GPIO_SIZE),
    311 		VM_PROT_READ | VM_PROT_WRITE,
    312 		PTE_NOCACHE,
    313 	},
    314 	{
    315 		GUMSTIX_CLKMAN_VBASE,
    316 		_A(PXA2X0_CLKMAN_BASE),
    317 		_S(PXA2X0_CLKMAN_SIZE),
    318 		VM_PROT_READ | VM_PROT_WRITE,
    319 		PTE_NOCACHE,
    320 	},
    321 	{
    322 		GUMSTIX_INTCTL_VBASE,
    323 		_A(PXA2X0_INTCTL_BASE),
    324 		_S(PXA2X0_INTCTL_SIZE),
    325 		VM_PROT_READ | VM_PROT_WRITE,
    326 		PTE_NOCACHE,
    327 	},
    328 	{
    329 		GUMSTIX_FFUART_VBASE,
    330 		_A(PXA2X0_FFUART_BASE),
    331 		_S(4 * COM_NPORTS),
    332 		VM_PROT_READ | VM_PROT_WRITE,
    333 		PTE_NOCACHE,
    334 	},
    335 	{
    336 		GUMSTIX_STUART_VBASE,
    337 		_A(PXA2X0_STUART_BASE),
    338 		_S(4 * COM_NPORTS),
    339 		VM_PROT_READ | VM_PROT_WRITE,
    340 		PTE_NOCACHE,
    341 	},
    342 	{
    343 		GUMSTIX_BTUART_VBASE,
    344 		_A(PXA2X0_BTUART_BASE),
    345 		_S(4 * COM_NPORTS),
    346 		VM_PROT_READ | VM_PROT_WRITE,
    347 		PTE_NOCACHE,
    348 	},
    349 	{
    350 		GUMSTIX_HWUART_VBASE,
    351 		_A(PXA2X0_HWUART_BASE),
    352 		_S(4 * COM_NPORTS),
    353 		VM_PROT_READ | VM_PROT_WRITE,
    354 		PTE_NOCACHE,
    355 	},
    356 	{
    357 		GUMSTIX_LCDC_VBASE,
    358 		_A(PXA2X0_LCDC_BASE),
    359 		_S(4 * COM_NPORTS),
    360 		VM_PROT_READ | VM_PROT_WRITE,
    361 		PTE_NOCACHE,
    362 	},
    363 #elif defined(OVERO)
    364 	{	/* SCM, PRCM */
    365 		OVERO_L4_CORE_VBASE,
    366 		_A(OMAP3530_L4_CORE_BASE),
    367 		_S(L1_S_SIZE),		/* No need 16MB.  Use only first 1MB */
    368 		VM_PROT_READ | VM_PROT_WRITE,
    369 		PTE_NOCACHE
    370 	},
    371 	{	/* Console, GPIO[2-6] */
    372 		OVERO_L4_PERIPHERAL_VBASE,
    373 		_A(OMAP3530_L4_PERIPHERAL_BASE),
    374 		_S(OMAP3530_L4_PERIPHERAL_SIZE),
    375 		VM_PROT_READ | VM_PROT_WRITE,
    376 		PTE_NOCACHE
    377 	},
    378 	{	/* GPIO1 */
    379 		OVERO_L4_WAKEUP_VBASE,
    380 		_A(OMAP3530_L4_WAKEUP_BASE),
    381 		_S(OMAP3530_L4_WAKEUP_SIZE),
    382 		VM_PROT_READ | VM_PROT_WRITE,
    383 		PTE_NOCACHE
    384 	},
    385 	{
    386 		OVERO_GPMC_VBASE,
    387 		_A(GPMC_BASE),
    388 		_S(GPMC_SIZE),
    389 		VM_PROT_READ | VM_PROT_WRITE,
    390 		PTE_NOCACHE
    391 	},
    392 #elif defined(DUOVERO)
    393 	{
    394 		DUOVERO_L4_CM_VBASE,
    395 		_A(OMAP4430_L4_CORE_BASE + 0x100000),
    396 		_S(L1_S_SIZE),
    397 		VM_PROT_READ | VM_PROT_WRITE,
    398 		PTE_NOCACHE
    399 	},
    400 	{	/* Console, SCU, L2CC, GPIO[2-6] */
    401 		DUOVERO_L4_PERIPHERAL_VBASE,
    402 		_A(OMAP4430_L4_PERIPHERAL_BASE),
    403 		_S(L1_S_SIZE * 3),
    404 		VM_PROT_READ | VM_PROT_WRITE,
    405 		PTE_NOCACHE
    406 	},
    407 	{	/* PRCM, GPIO1 */
    408 		DUOVERO_L4_WAKEUP_VBASE,
    409 		_A(OMAP4430_L4_WAKEUP_BASE),
    410 		_S(OMAP4430_L4_WAKEUP_SIZE),
    411 		VM_PROT_READ | VM_PROT_WRITE,
    412 		PTE_NOCACHE
    413 	},
    414 	{
    415 		DUOVERO_GPMC_VBASE,
    416 		_A(GPMC_BASE),
    417 		_S(GPMC_SIZE),
    418 		VM_PROT_READ | VM_PROT_WRITE,
    419 		PTE_NOCACHE
    420 	},
    421 #elif defined(PEPPER)
    422 	{
    423 		/* CM, Control Module, GPIO0, Console */
    424 		PEPPER_PRCM_VBASE,
    425 		_A(OMAP2_CM_BASE),
    426 		_S(L1_S_SIZE),
    427 		VM_PROT_READ | VM_PROT_WRITE,
    428 		PTE_NOCACHE
    429 	},
    430 	{
    431 		/* GPIO[1-3] */
    432 		PEPPER_L4_PERIPHERAL_VBASE,
    433 		_A(TI_AM335X_L4_PERIPHERAL_BASE),
    434 		_S(L1_S_SIZE),
    435 		VM_PROT_READ | VM_PROT_WRITE,
    436 		PTE_NOCACHE
    437 	},
    438 #endif
    439 	{ 0, 0, 0, 0, 0 }
    440 };
    441 
    442 #undef	_A
    443 #undef	_S
    444 
    445 
    446 /*
    447  * u_int initarm(...)
    448  *
    449  * Initial entry point on startup. This gets called before main() is
    450  * entered.
    451  * It should be responsible for setting up everything that must be
    452  * in place when main is called.
    453  * This includes
    454  *   Taking a copy of the boot configuration structure.
    455  *   Initialising the physical console so characters can be printed.
    456  *   Setting up page tables for the kernel
    457  *   Relocating the kernel to the bottom of physical memory
    458  */
    459 u_int
    460 initarm(void *arg)
    461 {
    462 	extern char KERNEL_BASE_phys[];
    463 	extern uint32_t *u_boot_args[];
    464 	extern uint32_t ram_size;
    465 	enum { r0 = 0, r1 = 1, r2 = 2, r3 = 3 }; /* args from u-boot */
    466 
    467 	/*
    468 	 * We mapped PA == VA in gumstix_start.S.
    469 	 * Also mapped SDRAM to KERNEL_BASE first 64Mbyte only with cachable.
    470 	 *
    471 	 * Gumstix (basix, connex, verdex, verdex-pro):
    472 	 * Physical Address Range     Description
    473 	 * -----------------------    ----------------------------------
    474 	 * 0x00000000 - 0x00ffffff    flash Memory   (16MB or 4MB)
    475 	 * 0x40000000 - 0x480fffff    Processor Registers
    476 	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB or 128MB)
    477 	 * 0xc0000000 - 0xc3ffffff    KERNEL_BASE
    478 	 *
    479 	 * Overo:
    480 	 * Physical Address Range     Description
    481 	 * -----------------------    ----------------------------------
    482 	 * 0x80000000 - 0x9fffffff    SDRAM Bank 0
    483 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    484 	 *
    485 	 * DuoVero, Pepper:
    486 	 * Physical Address Range     Description
    487 	 * -----------------------    ----------------------------------
    488 	 * 0x80000000 - 0xbfffffff    SDRAM Bank 0
    489 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    490 	 */
    491 
    492 #if defined(CPU_XSCALE)
    493 	extern vaddr_t xscale_cache_clean_addr;
    494 	xscale_cache_clean_addr = 0xff000000U;
    495 
    496 	cpu_reset_address = NULL;
    497 #elif defined(OMAP2)
    498 	cpu_reset_address = omap_reset;
    499 
    500 	find_cpu_clock();
    501 #endif
    502 
    503 	/*
    504 	 * Heads up ... Setup the CPU / MMU / TLB functions
    505 	 */
    506 	if (set_cpufuncs())
    507 		panic("cpu not recognized!");
    508 
    509 	/* map some peripheral registers at static I/O area */
    510 	pmap_devmap_bootstrap((vaddr_t)read_ttb(), gumstix_devmap);
    511 
    512 #if defined(CPU_XSCALE)
    513 	/* start 32.768kHz OSC */
    514 	ioreg_write(GUMSTIX_CLKMAN_VBASE + CLKMAN_OSCC, OSCC_OON);
    515 
    516 	/* Get ready for splfoo() */
    517 	pxa2x0_intr_bootstrap(GUMSTIX_INTCTL_VBASE);
    518 
    519 	/* setup GPIO for {FF,ST,HW}UART. */
    520 	pxa2x0_gpio_bootstrap(GUMSTIX_GPIO_VBASE);
    521 
    522 	pxa2x0_clkman_bootstrap(GUMSTIX_CLKMAN_VBASE);
    523 #endif
    524 
    525 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    526 
    527 	/* configure MUX, GPIO and CLK. */
    528 	gxio_config();
    529 
    530 #ifndef GUMSTIX_NETBSD_ARGS_CONSOLE
    531 	consinit();
    532 #endif
    533 #ifdef KGDB
    534 	kgdb_port_init();
    535 #endif
    536 
    537 	/*
    538 	 * Examine the boot args string for options we need to know about
    539 	 * now.
    540 	 */
    541 #if defined(GUMSTIX)
    542 #define SDRAM_START	0xa0000000UL
    543 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    544 #define SDRAM_START	0x80000000UL
    545 #endif
    546 	if ((uint32_t)u_boot_args[r0] < SDRAM_START ||
    547 	    (uint32_t)u_boot_args[r0] >= SDRAM_START + ram_size)
    548 		/* Maybe r0 is 'argc'.  We are booted by command 'go'. */
    549 		process_kernel_args((int)u_boot_args[r0],
    550 		    (char **)u_boot_args[r1]);
    551 	else
    552 		/*
    553 		 * Maybe r3 is 'boot args string' of 'bootm'.  This string is
    554 		 * linely.
    555 		 */
    556 		process_kernel_args_liner((char *)u_boot_args[r3]);
    557 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    558 	consinit();
    559 #endif
    560 
    561 	/* Talk to the user */
    562 #define BDSTR(s)	_BDSTR(s)
    563 #define _BDSTR(s)	#s
    564 	printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
    565 
    566 	/* Read system serial */
    567 #if defined(GUMSTIX)
    568 	read_system_serial();
    569 #endif
    570 
    571 #ifdef VERBOSE_INIT_ARM
    572 	printf("initarm: Configuring system ...\n");
    573 #endif
    574 
    575 #if defined(OMAP_4430)
    576 	const bus_space_tag_t iot = &omap_bs_tag;
    577 	bus_space_handle_t ioh;
    578 
    579 #if NARML2CC > 0
    580 	/*
    581 	 * Initialize L2-Cache parameters
    582 	 */
    583 
    584 	if (bus_space_map(iot, OMAP4_L2CC_BASE, OMAP4_L2CC_SIZE, 0, &ioh) != 0)
    585 		panic("OMAP4_L2CC_BASE map failed\n");
    586 	arml2cc_init(iot, ioh, 0);
    587 #endif
    588 
    589 #ifdef MULTIPROCESSOR
    590 	if (bus_space_map(iot, OMAP4_SCU_BASE, SCU_SIZE, 0, &ioh) != 0)
    591 		panic("OMAP4_SCU_BASE map failed\n");
    592 	arm_cpu_max =
    593 	    1 + (bus_space_read_4(iot, ioh, SCU_CFG) & SCU_CFG_CPUMAX);
    594 #endif
    595 #endif
    596 
    597 	/* Fake bootconfig structure for the benefit of pmap.c */
    598 	/* XXX must make the memory description h/w independent */
    599 	bootconfig.dramblocks = 1;
    600 	bootconfig.dram[0].address = SDRAM_START;
    601 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
    602 
    603 	KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
    604 
    605 	arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
    606 	    (uintptr_t) KERNEL_BASE_phys);
    607 	arm32_kernel_vm_init(KERNEL_VM_BASE,
    608 #if defined(CPU_XSCALE)
    609 	    ARM_VECTORS_LOW,
    610 #elif defined(CPU_CORTEX)
    611 	    ARM_VECTORS_HIGH,
    612 #endif
    613 	    0, gumstix_devmap, true);
    614 
    615 	evbarm_device_register = gumstix_device_register;
    616 
    617 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
    618 }
    619 
    620 #if defined(GUMSTIX)
    621 static void
    622 read_system_serial(void)
    623 {
    624 #define GUMSTIX_SYSTEM_SERIAL_ADDR	0
    625 #define GUMSTIX_SYSTEM_SERIAL_SIZE	8
    626 #define FLASH_OFFSET_INTEL_PROTECTION	0x81
    627 #define FLASH_OFFSET_USER_PROTECTION	0x85
    628 #define FLASH_CMD_READ_ID		0x90
    629 #define FLASH_CMD_RESET			0xff
    630 	int i;
    631 	char system_serial[GUMSTIX_SYSTEM_SERIAL_SIZE], *src;
    632 	char x;
    633 
    634 	src = (char *)(FLASH_OFFSET_USER_PROTECTION * 2 /*word*/);
    635 	*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    636 	memcpy(system_serial,
    637 	    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    638 	*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    639 
    640 	for (i = 1, x = system_serial[0]; i < sizeof (system_serial); i++)
    641 		x &= system_serial[i];
    642 	if (x == 0xff) {
    643 		src = (char *)(FLASH_OFFSET_INTEL_PROTECTION * 2 /*word*/);
    644 		*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    645 		memcpy(system_serial,
    646 		    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    647 		*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    648 
    649 		/*
    650 		 * XXXX: Don't need ???
    651 		 * gumstix_serial_hash(system_serial);
    652 		 */
    653 	}
    654 	system_serial_high = system_serial[0] << 24 | system_serial[1] << 16 |
    655 	    system_serial[2] << 8 | system_serial[3];
    656 	system_serial_low = system_serial[4] << 24 | system_serial[5] << 16 |
    657 	    system_serial[6] << 8 | system_serial[7];
    658 
    659 	printf("system serial: 0x");
    660 	for (i = 0; i < sizeof (system_serial); i++)
    661 		printf("%02x", system_serial[i]);
    662 	printf("\n");
    663 }
    664 #endif
    665 
    666 #if defined(OMAP2)
    667 static void
    668 omap_reset(void)
    669 {
    670 
    671 #if defined(TI_AM335X)
    672 	vaddr_t prm_base = (PEPPER_PRCM_VBASE + AM335X_PRCM_PRM_DEVICE);
    673 
    674 	*(volatile uint32_t *)(prm_base + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW;
    675 #elif defined(OMAP_4430)
    676 	*(volatile uint32_t *)(DUOVERO_L4_WAKEUP_VBASE + OMAP4_PRM_RSTCTRL) =
    677 	    OMAP4_PRM_RSTCTRL_WARM;
    678 #endif
    679 
    680 #if NPRCM > 0
    681 	prcm_cold_reset();
    682 #endif
    683 }
    684 
    685 static void
    686 find_cpu_clock(void)
    687 {
    688 	const vaddr_t prm_base __unused = OMAP2_PRM_BASE;
    689 	const vaddr_t cm_base = OMAP2_CM_BASE;
    690 
    691 #if defined(OMAP_3530)
    692 
    693 	const uint32_t prm_clksel =
    694 	    *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL);
    695 	static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS;
    696 	const uint32_t sys_clk =
    697 	    prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)];
    698 	const uint32_t dpll1 =
    699 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU);
    700 	const uint32_t dpll2 =
    701 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU);
    702 	const uint32_t m =
    703 	    __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT);
    704 	const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV);
    705 	const uint32_t m2 =
    706 	    __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV);
    707 
    708 	/*
    709 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    710 	 */
    711 	curcpu()->ci_data.cpu_cc_freq =
    712 	    ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT;
    713 	omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT;
    714 
    715 #elif defined(OMAP_4430)
    716 
    717 	const uint32_t prm_clksel =
    718 	    *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL);
    719 	static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS;
    720 	const uint32_t sys_clk =
    721 	    cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)];
    722 	const uint32_t dpll1 =
    723 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU);
    724 	const uint32_t dpll2 =
    725 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU);
    726 	const uint32_t m =
    727 	    __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT);
    728 	const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV);
    729 	const uint32_t m2 =
    730 	    __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV);
    731 
    732 	/*
    733 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    734 	 */
    735 	curcpu()->ci_data.cpu_cc_freq =
    736 	    ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2;
    737 	omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT;
    738 
    739 #elif defined(TI_AM335X)
    740 
    741 	prcm_bootstrap(cm_base);
    742 	am335x_sys_clk(TI_AM335X_CTLMOD_BASE);
    743 	am335x_cpu_clk();
    744 
    745 #endif
    746 }
    747 #endif
    748 
    749 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    750 static const char busheader_name[] = "busheader=";
    751 #endif
    752 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    753     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    754 static const char expansion_name[] = "expansion=";
    755 #endif
    756 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    757 static const char console_name[] = "console=";
    758 #endif
    759 static void
    760 process_kernel_args(int argc, char *argv[])
    761 {
    762 	int gxio_configured = 0, i, j;
    763 
    764 	boothowto = 0;
    765 
    766 	for (i = 1, j = 0; i < argc; i++) {
    767 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    768 		if (!strncmp(argv[i], busheader_name, strlen(busheader_name))) {
    769 			/* Configure for GPIOs of busheader side */
    770 			gxio_config_expansion(argv[i] + strlen(busheader_name));
    771 			gxio_configured = 1;
    772 			continue;
    773 		}
    774 #endif
    775 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    776     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    777 		if (!strncmp(argv[i], expansion_name, strlen(expansion_name))) {
    778 			/* Configure expansion */
    779 			gxio_config_expansion(argv[i] + strlen(expansion_name));
    780 			gxio_configured = 1;
    781 			continue;
    782 		}
    783 #endif
    784 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    785 		if (!strncmp(argv[i], console_name, strlen(console_name))) {
    786 			strncpy(console, argv[i] + strlen(console_name),
    787 			    sizeof(console));
    788 			consinit();
    789 		}
    790 #endif
    791 		if (j == bootargs_len) {
    792 			*(bootargs + j) = '\0';
    793 			continue;
    794 		}
    795 		if (j != 0)
    796 			*(bootargs + j++) = ' ';
    797 		strncpy(bootargs + j, argv[i], bootargs_len - j);
    798 		bootargs[bootargs_len] = '\0';
    799 		j += strlen(argv[i]);
    800 	}
    801 	boot_args = bootargs;
    802 
    803 	parse_mi_bootargs(boot_args);
    804 
    805 	if (!gxio_configured)
    806 		gxio_config_expansion(NULL);
    807 }
    808 
    809 static void
    810 process_kernel_args_liner(char *args)
    811 {
    812 	int i = 0;
    813 	char *p = NULL;
    814 
    815 	boothowto = 0;
    816 
    817 	strncpy(bootargs, args, sizeof(bootargs));
    818 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    819     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    820 	{
    821 		char *q;
    822 
    823 		if ((p = strstr(bootargs, expansion_name)))
    824 			q = p + strlen(expansion_name);
    825 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    826 		else if ((p = strstr(bootargs, busheader_name)))
    827 			q = p + strlen(busheader_name);
    828 #endif
    829 		if (p) {
    830 			char expansion[256], c;
    831 
    832 			i = 0;
    833 			do {
    834 				c = *(q + i);
    835 				if (c == ' ')
    836 					c = '\0';
    837 				expansion[i++] = c;
    838 			} while (c != '\0' && i < sizeof(expansion));
    839 			gxio_config_expansion(expansion);
    840 			strcpy(p, q + i);
    841 		}
    842 	}
    843 #endif
    844 	if (p == NULL)
    845 		gxio_config_expansion(NULL);
    846 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    847 	p = strstr(bootargs, console_name);
    848 	if (p != NULL) {
    849 		char c;
    850 
    851 		i = 0;
    852 		do {
    853 			c = *(p + strlen(console_name) + i);
    854 			if (c == ' ')
    855 				c = '\0';
    856 			console[i++] = c;
    857 		} while (c != '\0' && i < sizeof(console));
    858 		consinit();
    859 		strcpy(p, p + strlen(console_name) + i);
    860 	}
    861 #endif
    862 	boot_args = bootargs;
    863 
    864 	parse_mi_bootargs(boot_args);
    865 }
    866 
    867 #ifdef KGDB
    868 #ifndef KGDB_DEVNAME
    869 #define KGDB_DEVNAME	"ffuart"
    870 #endif
    871 const char kgdb_devname[] = KGDB_DEVNAME;
    872 
    873 #ifndef KGDB_DEVRATE
    874 #define KGDB_DEVRATE	CONSPEED
    875 #endif
    876 int kgdb_devrate = KGDB_DEVRATE;
    877 
    878 #if (NCOM > 0)
    879 #ifndef KGDB_DEVMODE
    880 #define KGDB_DEVMODE	CONMODE
    881 #endif
    882 int comkgdbmode = KGDB_DEVMODE;
    883 #endif /* NCOM */
    884 
    885 #endif /* KGDB */
    886 
    887 
    888 void
    889 consinit(void)
    890 {
    891 	static int consinit_called = 0;
    892 
    893 	if (consinit_called != 0)
    894 		return;
    895 
    896 	consinit_called = 1;
    897 
    898 #if NCOM > 0
    899 
    900 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    901 	/* Maybe passed Linux's bootargs 'console=ttyS?,<speed>...' */
    902 	if (strncmp(console, "ttyS", 4) == 0 && console[5] == ',') {
    903 		int i;
    904 
    905 		comcnspeed = 0;
    906 		for (i = 6; i < strlen(console) && isdigit(console[i]); i++)
    907 			comcnspeed = comcnspeed * 10 + (console[i] - '0');
    908 	}
    909 #endif
    910 
    911 #if defined(GUMSTIX)
    912 
    913 #ifdef FFUARTCONSOLE
    914 #ifdef KGDB
    915 	if (strcmp(kgdb_devname, "ffuart") == 0){
    916 		/* port is reserved for kgdb */
    917 	} else
    918 #endif
    919 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    920 	if (console[0] == '\0' || strcasecmp(console, "ffuart") == 0 ||
    921 	    strncmp(console, "ttyS0,", 6) == 0)
    922 #endif
    923 	{
    924 		int rv;
    925 
    926 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
    927 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    928 		if (rv == 0) {
    929 			pxa2x0_clkman_config(CKEN_FFUART, 1);
    930 			return;
    931 		}
    932 	}
    933 #endif /* FFUARTCONSOLE */
    934 
    935 #ifdef STUARTCONSOLE
    936 #ifdef KGDB
    937 	if (strcmp(kgdb_devname, "stuart") == 0) {
    938 		/* port is reserved for kgdb */
    939 	} else
    940 #endif
    941 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    942 	if (console[0] == '\0' || strcasecmp(console, "stuart") == 0)
    943 #endif
    944 	{
    945 		int rv;
    946 
    947 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_STUART_BASE,
    948 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    949 		if (rv == 0) {
    950 			pxa2x0_clkman_config(CKEN_STUART, 1);
    951 			return;
    952 		}
    953 	}
    954 #endif /* STUARTCONSOLE */
    955 
    956 #ifdef BTUARTCONSOLE
    957 #ifdef KGDB
    958 	if (strcmp(kgdb_devname, "btuart") == 0) {
    959 		/* port is reserved for kgdb */
    960 	} else
    961 #endif
    962 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    963 	if (console[0] == '\0' || strcasecmp(console, "btuart") == 0)
    964 #endif
    965 	{
    966 		int rv;
    967 
    968 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
    969 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    970 		if (rv == 0) {
    971 			pxa2x0_clkman_config(CKEN_BTUART, 1);
    972 			return;
    973 		}
    974 	}
    975 #endif /* BTUARTCONSOLE */
    976 
    977 #ifdef HWUARTCONSOLE
    978 #ifdef KGDB
    979 	if (strcmp(kgdb_devname, "hwuart") == 0) {
    980 		/* port is reserved for kgdb */
    981 	} else
    982 #endif
    983 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    984 	if (console[0] == '\0' || strcasecmp(console, "hwuart") == 0)
    985 #endif
    986 	{
    987 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_HWUART_BASE,
    988 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    989 		if (rv == 0) {
    990 			pxa2x0_clkman_config(CKEN_HWUART, 1);
    991 			return;
    992 		}
    993 	}
    994 #endif /* HWUARTCONSOLE */
    995 
    996 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    997 
    998 	if (comcnattach(&omap_a4x_bs_tag, CONSADDR, comcnspeed,
    999 	    OMAP_COM_FREQ, COM_TYPE_NORMAL, comcnmode) == 0)
   1000 		return;
   1001 
   1002 #endif /* GUMSTIX or OVERO */
   1003 
   1004 #endif /* NCOM */
   1005 
   1006 #if NLCD > 0
   1007 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
   1008 	if (console[0] == '\0' || strcasecmp(console, "lcd") == 0)
   1009 #endif
   1010 	{
   1011 		gxlcd_cnattach();
   1012 	}
   1013 #endif
   1014 }
   1015 
   1016 #ifdef KGDB
   1017 static void
   1018 kgdb_port_init(void)
   1019 {
   1020 #if (NCOM > 0) && defined(COM_PXA2X0)
   1021 	paddr_t paddr = 0;
   1022 	int cken = 0;
   1023 
   1024 	if (0 == strcmp(kgdb_devname, "ffuart")) {
   1025 		paddr = PXA2X0_FFUART_BASE;
   1026 		cken = CKEN_FFUART;
   1027 	} else if (0 == strcmp(kgdb_devname, "stuart")) {
   1028 		paddr = PXA2X0_STUART_BASE;
   1029 		cken = CKEN_STUART;
   1030 	} else if (0 == strcmp(kgdb_devname, "btuart")) {
   1031 		paddr = PXA2X0_BTUART_BASE;
   1032 		cken = CKEN_BTUART;
   1033 	} else if (0 == strcmp(kgdb_devname, "hwuart")) {
   1034 		paddr = PXA2X0_HWUART_BASE;
   1035 		cken = CKEN_HWUART;
   1036 	}
   1037 
   1038 	if (paddr &&
   1039 	    0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
   1040 		kgdb_devrate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
   1041 
   1042 		pxa2x0_clkman_config(cken, 1);
   1043 	}
   1044 
   1045 #endif
   1046 }
   1047 #endif
   1048 
   1049 static void
   1050 gumstix_device_register(device_t dev, void *aux)
   1051 {
   1052 	prop_dictionary_t dict = device_properties(dev);
   1053 
   1054 	if (device_is_a(dev, "a9tmr") ||
   1055 	    device_is_a(dev, "a9wdt")) {
   1056 		/*
   1057 		 * We need to tell the A9 Global/Watchdog Timer
   1058 		 * what frequency it runs at.
   1059 		 */
   1060 
   1061 		/*
   1062 		 * This clock always runs at (arm_clk div 2) and only goes
   1063 		 * to timers that are part of the A9 MP core subsystem.
   1064 		 */
   1065 		prop_dictionary_set_uint32(dict, "frequency",
   1066 		    curcpu()->ci_data.cpu_cc_freq / 2);
   1067 	}
   1068 	if (device_is_a(dev, "armperiph")) {
   1069 		if (device_is_a(device_parent(dev), "mainbus")) {
   1070 #if defined(OMAP2)
   1071 			/*
   1072 			 * XXX KLUDGE ALERT XXX
   1073 			 * The iot mainbus supplies is completely wrong since
   1074 			 * it scales addresses by 2.  The simpliest remedy is
   1075 			 * to replace with our bus space used for the armcore
   1076 			 * registers (which armperiph uses).
   1077 			 */
   1078 			struct mainbus_attach_args * const mb = aux;
   1079 			mb->mb_iot = &omap_bs_tag;
   1080 #endif
   1081 		}
   1082 	}
   1083 	if (device_is_a(dev, "ehci")) {
   1084 #if defined(OVERO)
   1085 		prop_dictionary_set_uint16(dict, "nports", 2);
   1086 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1087 		prop_dictionary_set_cstring(dict, "port0-mode", "none");
   1088 		prop_dictionary_set_int16(dict, "port0-gpio", -1);
   1089 		prop_dictionary_set_cstring(dict, "port1-mode", "phy");
   1090 		prop_dictionary_set_int16(dict, "port1-gpio", 183);
   1091 		prop_dictionary_set_bool(dict, "port1-gpioval", true);
   1092 #elif defined(DUOVERO)
   1093 		prop_dictionary_set_uint16(dict, "nports", 1);
   1094 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1095 		prop_dictionary_set_cstring(dict, "port0-mode", "phy");
   1096 		prop_dictionary_set_int16(dict, "port0-gpio", 62);
   1097 		prop_dictionary_set_bool(dict, "port0-gpioval", false);
   1098 		prop_dictionary_set_bool(dict, "port0-extclk", true);
   1099 #endif
   1100 		prop_dictionary_set_uint16(dict, "dpll5-m", 443);
   1101 		prop_dictionary_set_uint16(dict, "dpll5-n", 11);
   1102 		prop_dictionary_set_uint16(dict, "dpll5-m2", 4);
   1103 	}
   1104 	if (device_is_a(dev, "ohci")) {
   1105 		if (prop_dictionary_set_bool(dict,
   1106 		    "Ganged-power-mask-on-port1", 1) == false) {
   1107 			printf("WARNING: unable to set power-mask for port1"
   1108 			    " property for %s\n", device_xname(dev));
   1109 		}
   1110 		if (prop_dictionary_set_bool(dict,
   1111 		    "Ganged-power-mask-on-port2", 1) == false) {
   1112 			printf("WARNING: unable to set power-mask for port2"
   1113 			    " property for %s\n", device_xname(dev));
   1114 		}
   1115 		if (prop_dictionary_set_bool(dict,
   1116 		    "Ganged-power-mask-on-port3", 1) == false) {
   1117 			printf("WARNING: unable to set power-mask for port3"
   1118 			    " property for %s\n", device_xname(dev));
   1119 		}
   1120 	}
   1121 	if (device_is_a(dev, "omapmputmr")) {
   1122 		struct obio_attach_args *obio = aux;
   1123 
   1124 		switch (obio->obio_addr) {
   1125 		case 0x49032000:	/* GPTIMER2 */
   1126 		case 0x49034000:	/* GPTIMER3 */
   1127 		case 0x49036000:	/* GPTIMER4 */
   1128 		case 0x49038000:	/* GPTIMER5 */
   1129 		case 0x4903a000:	/* GPTIMER6 */
   1130 		case 0x4903c000:	/* GPTIMER7 */
   1131 		case 0x4903e000:	/* GPTIMER8 */
   1132 		case 0x49040000:	/* GPTIMER9 */
   1133 #if defined(OVERO)
   1134 			{
   1135 			/* Ensure enable PRCM.CM_[FI]CLKEN_PER[3:10]. */
   1136 			const int en =
   1137 			    1 << (((obio->obio_addr >> 13) & 0x3f) - 0x16);
   1138 
   1139 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5000,
   1140 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5000) | en);
   1141 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5010,
   1142 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5010) | en);
   1143 			}
   1144 #endif
   1145 			break;
   1146 		}
   1147 	}
   1148 	if (device_is_a(dev, "sdhc")) {
   1149 		bool dualvolt = false;
   1150 
   1151 #if defined(OVERO) || defined(DUOVERO)
   1152 		if (device_is_a(device_parent(dev), "obio")) {
   1153 			struct obio_attach_args *obio = aux;
   1154 
   1155 #if defined(OVERO)
   1156 			if (obio->obio_addr == SDMMC2_BASE_3530)
   1157 				dualvolt = true;
   1158 #elif defined(DUOVERO)
   1159 			if (obio->obio_addr == SDMMC5_BASE_4430)
   1160 				dualvolt = true;
   1161 #endif
   1162 		}
   1163 #endif
   1164 #if defined(PEPPER)
   1165 		if (device_is_a(device_parent(dev), "mainbus")) {
   1166 			struct mainbus_attach_args * const mb = aux;
   1167 
   1168 			if (mb->mb_iobase == SDMMC3_BASE_TIAM335X)
   1169 				dualvolt = true;
   1170 		}
   1171 #endif
   1172 		prop_dictionary_set_bool(dict, "dual-volt", dualvolt);
   1173 	}
   1174 	if (device_is_a(dev, "tifb")) {
   1175 		prop_data_t panel_info;
   1176 
   1177 		panel_info = prop_data_create_data_nocopy(tifb_panel_info,
   1178 		    sizeof(struct tifb_panel_info));
   1179 		KASSERT(panel_info != NULL);
   1180 		prop_dictionary_set(dict, "panel-info", panel_info);
   1181 		prop_object_release(panel_info);
   1182 
   1183 #if defined(OMAP2)
   1184 		/* enable LCD */
   1185 		omap2_gpio_ctl(59, GPIO_PIN_OUTPUT);
   1186 		omap2_gpio_write(59, 0);	/* reset */
   1187 		delay(100);
   1188 		omap2_gpio_write(59, 1);
   1189 #endif
   1190 	}
   1191 	if (device_is_a(dev, "tps65217pmic")) {
   1192 #if defined(TI_AM335X)
   1193 		extern const char *mpu_supply;
   1194 
   1195 		mpu_supply = "DCDC3";
   1196 #endif
   1197 
   1198 		if (use_tps65217_wled) {
   1199 			prop_dictionary_set_int32(dict, "isel", 1);
   1200 			prop_dictionary_set_int32(dict, "fdim", 200);
   1201 			prop_dictionary_set_int32(dict, "brightness", 80);
   1202 		}
   1203 	}
   1204 }
   1205