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gumstix_machdep.c revision 1.58.12.2
      1 /*	$NetBSD: gumstix_machdep.c,v 1.58.12.2 2018/09/06 06:55:30 pgoyette Exp $ */
      2 /*
      3  * Copyright (C) 2005, 2006, 2007  WIDE Project and SOUM Corporation.
      4  * All rights reserved.
      5  *
      6  * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM
      7  * Corporation.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the project nor the name of SOUM Corporation
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS''
     22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 /*
     34  * Copyright (c) 2002, 2003, 2004, 2005  Genetec Corporation.
     35  * All rights reserved.
     36  *
     37  * Written by Hiroyuki Bessho for Genetec Corporation.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. The name of Genetec Corporation may not be used to endorse or
     48  *    promote products derived from this software without specific prior
     49  *    written permission.
     50  *
     51  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     52  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     53  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     54  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     55  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     56  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     57  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     58  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     59  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     60  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     61  * POSSIBILITY OF SUCH DAMAGE.
     62  *
     63  * Machine dependent functions for kernel setup for Genetec G4250EBX
     64  * evaluation board.
     65  *
     66  * Based on iq80310_machhdep.c
     67  */
     68 /*
     69  * Copyright (c) 2001 Wasabi Systems, Inc.
     70  * All rights reserved.
     71  *
     72  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     73  *
     74  * Redistribution and use in source and binary forms, with or without
     75  * modification, are permitted provided that the following conditions
     76  * are met:
     77  * 1. Redistributions of source code must retain the above copyright
     78  *    notice, this list of conditions and the following disclaimer.
     79  * 2. Redistributions in binary form must reproduce the above copyright
     80  *    notice, this list of conditions and the following disclaimer in the
     81  *    documentation and/or other materials provided with the distribution.
     82  * 3. All advertising materials mentioning features or use of this software
     83  *    must display the following acknowledgement:
     84  *	This product includes software developed for the NetBSD Project by
     85  *	Wasabi Systems, Inc.
     86  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     87  *    or promote products derived from this software without specific prior
     88  *    written permission.
     89  *
     90  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     91  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     92  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     93  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     94  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     95  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     96  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     97  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     98  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     99  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    100  * POSSIBILITY OF SUCH DAMAGE.
    101  */
    102 
    103 /*
    104  * Copyright (c) 1997,1998 Mark Brinicombe.
    105  * Copyright (c) 1997,1998 Causality Limited.
    106  * All rights reserved.
    107  *
    108  * Redistribution and use in source and binary forms, with or without
    109  * modification, are permitted provided that the following conditions
    110  * are met:
    111  * 1. Redistributions of source code must retain the above copyright
    112  *    notice, this list of conditions and the following disclaimer.
    113  * 2. Redistributions in binary form must reproduce the above copyright
    114  *    notice, this list of conditions and the following disclaimer in the
    115  *    documentation and/or other materials provided with the distribution.
    116  * 3. All advertising materials mentioning features or use of this software
    117  *    must display the following acknowledgement:
    118  *	This product includes software developed by Mark Brinicombe
    119  *	for the NetBSD Project.
    120  * 4. The name of the company nor the name of the author may be used to
    121  *    endorse or promote products derived from this software without specific
    122  *    prior written permission.
    123  *
    124  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
    125  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    126  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    127  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
    128  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    129  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    130  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    131  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    132  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    133  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    134  * SUCH DAMAGE.
    135  *
    136  * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
    137  * boards using RedBoot firmware.
    138  */
    139 
    140 #include "opt_arm_debug.h"
    141 #include "opt_com.h"
    142 #include "opt_cputypes.h"
    143 #include "opt_evbarm_boardtype.h"
    144 #include "opt_gumstix.h"
    145 #include "opt_kgdb.h"
    146 #include "opt_multiprocessor.h"
    147 #include "opt_pmap_debug.h"
    148 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    149 #include "opt_omap.h"
    150 
    151 #if defined(DUOVERO)
    152 #include "arml2cc.h"
    153 #endif
    154 #include "prcm.h"
    155 #endif
    156 
    157 #include <sys/param.h>
    158 #include <sys/conf.h>
    159 #include <sys/device.h>
    160 #include <sys/exec.h>
    161 #include <sys/kernel.h>
    162 #include <sys/proc.h>
    163 #include <sys/reboot.h>
    164 #include <sys/systm.h>
    165 #include <sys/termios.h>
    166 #include <sys/bus.h>
    167 #include <sys/cpu.h>
    168 #include <sys/gpio.h>
    169 
    170 #include <prop/proplib.h>
    171 
    172 #include <uvm/uvm_extern.h>
    173 
    174 #include <arm/mainbus/mainbus.h>	/* don't reorder */
    175 
    176 #include <machine/autoconf.h>		/* don't reorder */
    177 #include <machine/bootconfig.h>
    178 #include <arm/locore.h>
    179 
    180 #include <arm/arm32/machdep.h>
    181 #if NARML2CC > 0
    182 #include <arm/cortex/pl310_var.h>
    183 #endif
    184 #include <arm/cortex/scu_reg.h>
    185 #include <arm/omap/omap2_obiovar.h>
    186 #include <arm/omap/am335x_prcm.h>
    187 #include <arm/omap/omap2_gpio.h>
    188 #include <arm/omap/omap2_gpmcreg.h>
    189 #include <arm/omap/omap2_prcm.h>
    190 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    191 #include <arm/omap/omap2_reg.h>		/* Must required "opt_omap.h" */
    192 #endif
    193 #include <arm/omap/omap3_sdmmcreg.h>
    194 #include <arm/omap/omap_var.h>
    195 #include <arm/omap/omap_com.h>
    196 #include <arm/omap/tifbvar.h>
    197 #include <arm/xscale/pxa2x0reg.h>
    198 #include <arm/xscale/pxa2x0var.h>
    199 #include <arm/xscale/pxa2x0_gpio.h>
    200 #include <evbarm/gumstix/gumstixreg.h>
    201 #include <evbarm/gumstix/gumstixvar.h>
    202 
    203 #include <dev/cons.h>
    204 
    205 #ifdef KGDB
    206 #include <sys/kgdb.h>
    207 #endif
    208 
    209 /*
    210  * The range 0xc1000000 - 0xfd000000 is available for kernel VM space
    211  * Core-logic registers and I/O mappings occupy
    212  *
    213  *    0xfd000000 - 0xfd800000	on gumstix
    214  *    0xc0000000 - 0xc0400000	on overo, duovero and pepper
    215  */
    216 #ifndef KERNEL_VM_BASE
    217 #define	KERNEL_VM_BASE		0xc8000000
    218 #endif
    219 #define KERNEL_VM_SIZE		0x35000000
    220 
    221 BootConfig bootconfig;		/* Boot config storage */
    222 static char bootargs[MAX_BOOT_STRING];
    223 const size_t bootargs_len = sizeof(bootargs) - 1;	/* without nul */
    224 char *boot_args = NULL;
    225 
    226 uint32_t system_serial_high;
    227 uint32_t system_serial_low;
    228 
    229 /* Prototypes */
    230 #if defined(GUMSTIX)
    231 static void	read_system_serial(void);
    232 #endif
    233 #if defined(OMAP2)
    234 static void	omap_reset(void);
    235 static void	find_cpu_clock(void);
    236 #endif
    237 static void	process_kernel_args(int, char *[]);
    238 static void	process_kernel_args_liner(char *);
    239 #ifdef KGDB
    240 static void	kgdb_port_init(void);
    241 #endif
    242 static void	gumstix_device_register(device_t, void *);
    243 
    244 bs_protos(bs_notimpl);
    245 
    246 #include "com.h"
    247 #if NCOM > 0
    248 #include <dev/ic/comreg.h>
    249 #include <dev/ic/comvar.h>
    250 #endif
    251 
    252 #if defined(CPU_XSCALE)
    253 #include "lcd.h"
    254 #endif
    255 
    256 #ifndef CONSPEED
    257 #define CONSPEED B115200	/* It's a setting of the default of u-boot */
    258 #endif
    259 #ifndef CONMODE
    260 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    261 #endif
    262 
    263 int comcnspeed = CONSPEED;
    264 int comcnmode = CONMODE;
    265 
    266 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    267 static char console[16];
    268 #endif
    269 
    270 const struct tifb_panel_info *tifb_panel_info = NULL;
    271 /* Use TPS65217 White LED Driver */
    272 bool use_tps65217_wled = false;
    273 
    274 extern void gxio_config(void);
    275 extern void gxio_config_expansion(char *);
    276 
    277 
    278 static inline pd_entry_t *
    279 read_ttb(void)
    280 {
    281 	long ttb;
    282 
    283 	__asm volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
    284 
    285 	return (pd_entry_t *)(ttb & ~((1<<14)-1));
    286 }
    287 
    288 /*
    289  * Static device mappings. These peripheral registers are mapped at
    290  * fixed virtual addresses very early in initarm() so that we can use
    291  * them while booting the kernel, and stay at the same address
    292  * throughout whole kernel's life time.
    293  *
    294  * We use this table twice; once with bootstrap page table, and once
    295  * with kernel's page table which we build up in initarm().
    296  *
    297  * Since we map these registers into the bootstrap page table using
    298  * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
    299  * registers segment-aligned and segment-rounded in order to avoid
    300  * using the 2nd page tables.
    301  */
    302 
    303 #define	_A(a)	((a) & ~L1_S_OFFSET)
    304 #define	_S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
    305 
    306 static const struct pmap_devmap gumstix_devmap[] = {
    307 #if defined(GUMSTIX)
    308 	{
    309 		GUMSTIX_GPIO_VBASE,
    310 		_A(PXA2X0_GPIO_BASE),
    311 		_S(PXA250_GPIO_SIZE),
    312 		VM_PROT_READ | VM_PROT_WRITE,
    313 		PTE_NOCACHE,
    314 	},
    315 	{
    316 		GUMSTIX_CLKMAN_VBASE,
    317 		_A(PXA2X0_CLKMAN_BASE),
    318 		_S(PXA2X0_CLKMAN_SIZE),
    319 		VM_PROT_READ | VM_PROT_WRITE,
    320 		PTE_NOCACHE,
    321 	},
    322 	{
    323 		GUMSTIX_INTCTL_VBASE,
    324 		_A(PXA2X0_INTCTL_BASE),
    325 		_S(PXA2X0_INTCTL_SIZE),
    326 		VM_PROT_READ | VM_PROT_WRITE,
    327 		PTE_NOCACHE,
    328 	},
    329 	{
    330 		GUMSTIX_FFUART_VBASE,
    331 		_A(PXA2X0_FFUART_BASE),
    332 		_S(4 * COM_NPORTS),
    333 		VM_PROT_READ | VM_PROT_WRITE,
    334 		PTE_NOCACHE,
    335 	},
    336 	{
    337 		GUMSTIX_STUART_VBASE,
    338 		_A(PXA2X0_STUART_BASE),
    339 		_S(4 * COM_NPORTS),
    340 		VM_PROT_READ | VM_PROT_WRITE,
    341 		PTE_NOCACHE,
    342 	},
    343 	{
    344 		GUMSTIX_BTUART_VBASE,
    345 		_A(PXA2X0_BTUART_BASE),
    346 		_S(4 * COM_NPORTS),
    347 		VM_PROT_READ | VM_PROT_WRITE,
    348 		PTE_NOCACHE,
    349 	},
    350 	{
    351 		GUMSTIX_HWUART_VBASE,
    352 		_A(PXA2X0_HWUART_BASE),
    353 		_S(4 * COM_NPORTS),
    354 		VM_PROT_READ | VM_PROT_WRITE,
    355 		PTE_NOCACHE,
    356 	},
    357 	{
    358 		GUMSTIX_LCDC_VBASE,
    359 		_A(PXA2X0_LCDC_BASE),
    360 		_S(4 * COM_NPORTS),
    361 		VM_PROT_READ | VM_PROT_WRITE,
    362 		PTE_NOCACHE,
    363 	},
    364 #elif defined(OVERO)
    365 	{	/* SCM, PRCM */
    366 		OVERO_L4_CORE_VBASE,
    367 		_A(OMAP3530_L4_CORE_BASE),
    368 		_S(L1_S_SIZE),		/* No need 16MB.  Use only first 1MB */
    369 		VM_PROT_READ | VM_PROT_WRITE,
    370 		PTE_NOCACHE
    371 	},
    372 	{	/* Console, GPIO[2-6] */
    373 		OVERO_L4_PERIPHERAL_VBASE,
    374 		_A(OMAP3530_L4_PERIPHERAL_BASE),
    375 		_S(OMAP3530_L4_PERIPHERAL_SIZE),
    376 		VM_PROT_READ | VM_PROT_WRITE,
    377 		PTE_NOCACHE
    378 	},
    379 	{	/* GPIO1 */
    380 		OVERO_L4_WAKEUP_VBASE,
    381 		_A(OMAP3530_L4_WAKEUP_BASE),
    382 		_S(OMAP3530_L4_WAKEUP_SIZE),
    383 		VM_PROT_READ | VM_PROT_WRITE,
    384 		PTE_NOCACHE
    385 	},
    386 	{
    387 		OVERO_GPMC_VBASE,
    388 		_A(GPMC_BASE),
    389 		_S(GPMC_SIZE),
    390 		VM_PROT_READ | VM_PROT_WRITE,
    391 		PTE_NOCACHE
    392 	},
    393 #elif defined(DUOVERO)
    394 	{
    395 		DUOVERO_L4_CM_VBASE,
    396 		_A(OMAP4430_L4_CORE_BASE + 0x100000),
    397 		_S(L1_S_SIZE),
    398 		VM_PROT_READ | VM_PROT_WRITE,
    399 		PTE_NOCACHE
    400 	},
    401 	{	/* Console, SCU, L2CC, GPIO[2-6] */
    402 		DUOVERO_L4_PERIPHERAL_VBASE,
    403 		_A(OMAP4430_L4_PERIPHERAL_BASE),
    404 		_S(L1_S_SIZE * 3),
    405 		VM_PROT_READ | VM_PROT_WRITE,
    406 		PTE_NOCACHE
    407 	},
    408 	{	/* PRCM, GPIO1 */
    409 		DUOVERO_L4_WAKEUP_VBASE,
    410 		_A(OMAP4430_L4_WAKEUP_BASE),
    411 		_S(OMAP4430_L4_WAKEUP_SIZE),
    412 		VM_PROT_READ | VM_PROT_WRITE,
    413 		PTE_NOCACHE
    414 	},
    415 	{
    416 		DUOVERO_GPMC_VBASE,
    417 		_A(GPMC_BASE),
    418 		_S(GPMC_SIZE),
    419 		VM_PROT_READ | VM_PROT_WRITE,
    420 		PTE_NOCACHE
    421 	},
    422 #elif defined(PEPPER)
    423 	{
    424 		/* CM, Control Module, GPIO0, Console */
    425 		PEPPER_PRCM_VBASE,
    426 		_A(OMAP2_CM_BASE),
    427 		_S(L1_S_SIZE),
    428 		VM_PROT_READ | VM_PROT_WRITE,
    429 		PTE_NOCACHE
    430 	},
    431 	{
    432 		/* GPIO[1-3] */
    433 		PEPPER_L4_PERIPHERAL_VBASE,
    434 		_A(TI_AM335X_L4_PERIPHERAL_BASE),
    435 		_S(L1_S_SIZE),
    436 		VM_PROT_READ | VM_PROT_WRITE,
    437 		PTE_NOCACHE
    438 	},
    439 #endif
    440 	{ 0, 0, 0, 0, 0 }
    441 };
    442 
    443 #undef	_A
    444 #undef	_S
    445 
    446 
    447 /*
    448  * u_int initarm(...)
    449  *
    450  * Initial entry point on startup. This gets called before main() is
    451  * entered.
    452  * It should be responsible for setting up everything that must be
    453  * in place when main is called.
    454  * This includes
    455  *   Taking a copy of the boot configuration structure.
    456  *   Initialising the physical console so characters can be printed.
    457  *   Setting up page tables for the kernel
    458  *   Relocating the kernel to the bottom of physical memory
    459  */
    460 u_int
    461 initarm(void *arg)
    462 {
    463 	extern char KERNEL_BASE_phys[];
    464 	extern uint32_t *u_boot_args[];
    465 	extern uint32_t ram_size;
    466 	enum { r0 = 0, r1 = 1, r2 = 2, r3 = 3 }; /* args from u-boot */
    467 
    468 	/*
    469 	 * We mapped PA == VA in gumstix_start.S.
    470 	 * Also mapped SDRAM to KERNEL_BASE first 64Mbyte only with cachable.
    471 	 *
    472 	 * Gumstix (basix, connex, verdex, verdex-pro):
    473 	 * Physical Address Range     Description
    474 	 * -----------------------    ----------------------------------
    475 	 * 0x00000000 - 0x00ffffff    flash Memory   (16MB or 4MB)
    476 	 * 0x40000000 - 0x480fffff    Processor Registers
    477 	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB or 128MB)
    478 	 * 0xc0000000 - 0xc3ffffff    KERNEL_BASE
    479 	 *
    480 	 * Overo:
    481 	 * Physical Address Range     Description
    482 	 * -----------------------    ----------------------------------
    483 	 * 0x80000000 - 0x9fffffff    SDRAM Bank 0
    484 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    485 	 *
    486 	 * DuoVero, Pepper:
    487 	 * Physical Address Range     Description
    488 	 * -----------------------    ----------------------------------
    489 	 * 0x80000000 - 0xbfffffff    SDRAM Bank 0
    490 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    491 	 */
    492 
    493 #if defined(CPU_XSCALE)
    494 	extern vaddr_t xscale_cache_clean_addr;
    495 	xscale_cache_clean_addr = 0xff000000U;
    496 
    497 	cpu_reset_address = NULL;
    498 #elif defined(OMAP2)
    499 	cpu_reset_address = omap_reset;
    500 
    501 	find_cpu_clock();
    502 #endif
    503 
    504 	/*
    505 	 * Heads up ... Setup the CPU / MMU / TLB functions
    506 	 */
    507 	if (set_cpufuncs())
    508 		panic("cpu not recognized!");
    509 
    510 	/* map some peripheral registers at static I/O area */
    511 	pmap_devmap_bootstrap((vaddr_t)read_ttb(), gumstix_devmap);
    512 
    513 #if defined(CPU_XSCALE)
    514 	/* start 32.768kHz OSC */
    515 	ioreg_write(GUMSTIX_CLKMAN_VBASE + CLKMAN_OSCC, OSCC_OON);
    516 
    517 	/* Get ready for splfoo() */
    518 	pxa2x0_intr_bootstrap(GUMSTIX_INTCTL_VBASE);
    519 
    520 	/* setup GPIO for {FF,ST,HW}UART. */
    521 	pxa2x0_gpio_bootstrap(GUMSTIX_GPIO_VBASE);
    522 
    523 	pxa2x0_clkman_bootstrap(GUMSTIX_CLKMAN_VBASE);
    524 #endif
    525 
    526 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    527 
    528 	/* configure MUX, GPIO and CLK. */
    529 	gxio_config();
    530 
    531 #ifndef GUMSTIX_NETBSD_ARGS_CONSOLE
    532 	consinit();
    533 #endif
    534 #ifdef KGDB
    535 	kgdb_port_init();
    536 #endif
    537 
    538 	/*
    539 	 * Examine the boot args string for options we need to know about
    540 	 * now.
    541 	 */
    542 #if defined(GUMSTIX)
    543 #define SDRAM_START	0xa0000000UL
    544 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    545 #define SDRAM_START	0x80000000UL
    546 #endif
    547 	if ((uint32_t)u_boot_args[r0] < SDRAM_START ||
    548 	    (uint32_t)u_boot_args[r0] >= SDRAM_START + ram_size)
    549 		/* Maybe r0 is 'argc'.  We are booted by command 'go'. */
    550 		process_kernel_args((int)u_boot_args[r0],
    551 		    (char **)u_boot_args[r1]);
    552 	else
    553 		/*
    554 		 * Maybe r3 is 'boot args string' of 'bootm'.  This string is
    555 		 * linely.
    556 		 */
    557 		process_kernel_args_liner((char *)u_boot_args[r3]);
    558 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    559 	consinit();
    560 #endif
    561 
    562 	/* Talk to the user */
    563 #define BDSTR(s)	_BDSTR(s)
    564 #define _BDSTR(s)	#s
    565 	printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
    566 
    567 	/* Read system serial */
    568 #if defined(GUMSTIX)
    569 	read_system_serial();
    570 #endif
    571 
    572 #ifdef VERBOSE_INIT_ARM
    573 	printf("initarm: Configuring system ...\n");
    574 #endif
    575 
    576 #if defined(OMAP_4430)
    577 	const bus_space_tag_t iot = &omap_bs_tag;
    578 	bus_space_handle_t ioh;
    579 
    580 #if NARML2CC > 0
    581 	/*
    582 	 * Initialize L2-Cache parameters
    583 	 */
    584 
    585 	if (bus_space_map(iot, OMAP4_L2CC_BASE, OMAP4_L2CC_SIZE, 0, &ioh) != 0)
    586 		panic("OMAP4_L2CC_BASE map failed\n");
    587 	arml2cc_init(iot, ioh, 0);
    588 #endif
    589 
    590 #ifdef MULTIPROCESSOR
    591 	if (bus_space_map(iot, OMAP4_SCU_BASE, SCU_SIZE, 0, &ioh) != 0)
    592 		panic("OMAP4_SCU_BASE map failed\n");
    593 	arm_cpu_max =
    594 	    1 + (bus_space_read_4(iot, ioh, SCU_CFG) & SCU_CFG_CPUMAX);
    595 #endif
    596 #endif
    597 
    598 	/* Fake bootconfig structure for the benefit of pmap.c */
    599 	/* XXX must make the memory description h/w independent */
    600 	bootconfig.dramblocks = 1;
    601 	bootconfig.dram[0].address = SDRAM_START;
    602 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
    603 
    604 	KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
    605 
    606 	arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
    607 	    (uintptr_t) KERNEL_BASE_phys);
    608 	arm32_kernel_vm_init(KERNEL_VM_BASE,
    609 #if defined(CPU_XSCALE)
    610 	    ARM_VECTORS_LOW,
    611 #elif defined(CPU_CORTEX)
    612 	    ARM_VECTORS_HIGH,
    613 #endif
    614 	    0, gumstix_devmap, true);
    615 
    616 	evbarm_device_register = gumstix_device_register;
    617 
    618 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
    619 }
    620 
    621 #if defined(GUMSTIX)
    622 static void
    623 read_system_serial(void)
    624 {
    625 #define GUMSTIX_SYSTEM_SERIAL_ADDR	0
    626 #define GUMSTIX_SYSTEM_SERIAL_SIZE	8
    627 #define FLASH_OFFSET_INTEL_PROTECTION	0x81
    628 #define FLASH_OFFSET_USER_PROTECTION	0x85
    629 #define FLASH_CMD_READ_ID		0x90
    630 #define FLASH_CMD_RESET			0xff
    631 	int i;
    632 	char system_serial[GUMSTIX_SYSTEM_SERIAL_SIZE], *src;
    633 	char x;
    634 
    635 	src = (char *)(FLASH_OFFSET_USER_PROTECTION * 2 /*word*/);
    636 	*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    637 	memcpy(system_serial,
    638 	    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    639 	*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    640 
    641 	for (i = 1, x = system_serial[0]; i < sizeof (system_serial); i++)
    642 		x &= system_serial[i];
    643 	if (x == 0xff) {
    644 		src = (char *)(FLASH_OFFSET_INTEL_PROTECTION * 2 /*word*/);
    645 		*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    646 		memcpy(system_serial,
    647 		    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    648 		*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    649 
    650 		/*
    651 		 * XXXX: Don't need ???
    652 		 * gumstix_serial_hash(system_serial);
    653 		 */
    654 	}
    655 	system_serial_high = system_serial[0] << 24 | system_serial[1] << 16 |
    656 	    system_serial[2] << 8 | system_serial[3];
    657 	system_serial_low = system_serial[4] << 24 | system_serial[5] << 16 |
    658 	    system_serial[6] << 8 | system_serial[7];
    659 
    660 	printf("system serial: 0x");
    661 	for (i = 0; i < sizeof (system_serial); i++)
    662 		printf("%02x", system_serial[i]);
    663 	printf("\n");
    664 }
    665 #endif
    666 
    667 #if defined(OMAP2)
    668 static void
    669 omap_reset(void)
    670 {
    671 
    672 #if defined(TI_AM335X)
    673 	vaddr_t prm_base = (PEPPER_PRCM_VBASE + AM335X_PRCM_PRM_DEVICE);
    674 
    675 	*(volatile uint32_t *)(prm_base + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW;
    676 #elif defined(OMAP_4430)
    677 	*(volatile uint32_t *)(DUOVERO_L4_WAKEUP_VBASE + OMAP4_PRM_RSTCTRL) =
    678 	    OMAP4_PRM_RSTCTRL_WARM;
    679 #endif
    680 
    681 #if NPRCM > 0
    682 	prcm_cold_reset();
    683 #endif
    684 }
    685 
    686 static void
    687 find_cpu_clock(void)
    688 {
    689 	const vaddr_t prm_base __unused = OMAP2_PRM_BASE;
    690 	const vaddr_t cm_base = OMAP2_CM_BASE;
    691 
    692 #if defined(OMAP_3530)
    693 
    694 	const uint32_t prm_clksel =
    695 	    *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL);
    696 	static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS;
    697 	const uint32_t sys_clk =
    698 	    prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)];
    699 	const uint32_t dpll1 =
    700 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU);
    701 	const uint32_t dpll2 =
    702 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU);
    703 	const uint32_t m =
    704 	    __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT);
    705 	const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV);
    706 	const uint32_t m2 =
    707 	    __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV);
    708 
    709 	/*
    710 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    711 	 */
    712 	curcpu()->ci_data.cpu_cc_freq =
    713 	    ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT;
    714 	omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT;
    715 
    716 #elif defined(OMAP_4430)
    717 
    718 	const uint32_t prm_clksel =
    719 	    *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL);
    720 	static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS;
    721 	const uint32_t sys_clk =
    722 	    cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)];
    723 	const uint32_t dpll1 =
    724 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU);
    725 	const uint32_t dpll2 =
    726 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU);
    727 	const uint32_t m =
    728 	    __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT);
    729 	const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV);
    730 	const uint32_t m2 =
    731 	    __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV);
    732 
    733 	/*
    734 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    735 	 */
    736 	curcpu()->ci_data.cpu_cc_freq =
    737 	    ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2;
    738 	omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT;
    739 
    740 #elif defined(TI_AM335X)
    741 
    742 	prcm_bootstrap(cm_base);
    743 	am335x_sys_clk(TI_AM335X_CTLMOD_BASE);
    744 	am335x_cpu_clk();
    745 
    746 #endif
    747 }
    748 #endif
    749 
    750 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    751 static const char busheader_name[] = "busheader=";
    752 #endif
    753 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    754     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    755 static const char expansion_name[] = "expansion=";
    756 #endif
    757 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    758 static const char console_name[] = "console=";
    759 #endif
    760 static void
    761 process_kernel_args(int argc, char *argv[])
    762 {
    763 	int gxio_configured = 0, i, j;
    764 
    765 	boothowto = 0;
    766 
    767 	for (i = 1, j = 0; i < argc; i++) {
    768 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    769 		if (!strncmp(argv[i], busheader_name, strlen(busheader_name))) {
    770 			/* Configure for GPIOs of busheader side */
    771 			gxio_config_expansion(argv[i] + strlen(busheader_name));
    772 			gxio_configured = 1;
    773 			continue;
    774 		}
    775 #endif
    776 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    777     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    778 		if (!strncmp(argv[i], expansion_name, strlen(expansion_name))) {
    779 			/* Configure expansion */
    780 			gxio_config_expansion(argv[i] + strlen(expansion_name));
    781 			gxio_configured = 1;
    782 			continue;
    783 		}
    784 #endif
    785 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    786 		if (!strncmp(argv[i], console_name, strlen(console_name))) {
    787 			strncpy(console, argv[i] + strlen(console_name),
    788 			    sizeof(console));
    789 			consinit();
    790 		}
    791 #endif
    792 		if (j == bootargs_len) {
    793 			*(bootargs + j) = '\0';
    794 			continue;
    795 		}
    796 		if (j != 0)
    797 			*(bootargs + j++) = ' ';
    798 		strncpy(bootargs + j, argv[i], bootargs_len - j);
    799 		bootargs[bootargs_len] = '\0';
    800 		j += strlen(argv[i]);
    801 	}
    802 	boot_args = bootargs;
    803 
    804 	parse_mi_bootargs(boot_args);
    805 
    806 	if (!gxio_configured)
    807 		gxio_config_expansion(NULL);
    808 }
    809 
    810 static void
    811 process_kernel_args_liner(char *args)
    812 {
    813 	int i = 0;
    814 	char *p = NULL;
    815 
    816 	boothowto = 0;
    817 
    818 	strncpy(bootargs, args, sizeof(bootargs));
    819 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    820     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    821 	{
    822 		char *q;
    823 
    824 		if ((p = strstr(bootargs, expansion_name)))
    825 			q = p + strlen(expansion_name);
    826 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    827 		else if ((p = strstr(bootargs, busheader_name)))
    828 			q = p + strlen(busheader_name);
    829 #endif
    830 		if (p) {
    831 			char expansion[256], c;
    832 
    833 			i = 0;
    834 			do {
    835 				c = *(q + i);
    836 				if (c == ' ')
    837 					c = '\0';
    838 				expansion[i++] = c;
    839 			} while (c != '\0' && i < sizeof(expansion));
    840 			gxio_config_expansion(expansion);
    841 			strcpy(p, q + i);
    842 		}
    843 	}
    844 #endif
    845 	if (p == NULL)
    846 		gxio_config_expansion(NULL);
    847 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    848 	p = strstr(bootargs, console_name);
    849 	if (p != NULL) {
    850 		char c;
    851 
    852 		i = 0;
    853 		do {
    854 			c = *(p + strlen(console_name) + i);
    855 			if (c == ' ')
    856 				c = '\0';
    857 			console[i++] = c;
    858 		} while (c != '\0' && i < sizeof(console));
    859 		consinit();
    860 		strcpy(p, p + strlen(console_name) + i);
    861 	}
    862 #endif
    863 	boot_args = bootargs;
    864 
    865 	parse_mi_bootargs(boot_args);
    866 }
    867 
    868 #ifdef KGDB
    869 #ifndef KGDB_DEVNAME
    870 #define KGDB_DEVNAME	"ffuart"
    871 #endif
    872 const char kgdb_devname[] = KGDB_DEVNAME;
    873 
    874 #ifndef KGDB_DEVRATE
    875 #define KGDB_DEVRATE	CONSPEED
    876 #endif
    877 int kgdb_devrate = KGDB_DEVRATE;
    878 
    879 #if (NCOM > 0)
    880 #ifndef KGDB_DEVMODE
    881 #define KGDB_DEVMODE	CONMODE
    882 #endif
    883 int comkgdbmode = KGDB_DEVMODE;
    884 #endif /* NCOM */
    885 
    886 #endif /* KGDB */
    887 
    888 
    889 void
    890 consinit(void)
    891 {
    892 	static int consinit_called = 0;
    893 
    894 	if (consinit_called != 0)
    895 		return;
    896 
    897 	consinit_called = 1;
    898 
    899 #if NCOM > 0
    900 
    901 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    902 	/* Maybe passed Linux's bootargs 'console=ttyS?,<speed>...' */
    903 	if (strncmp(console, "ttyS", 4) == 0 && console[5] == ',') {
    904 		int i;
    905 
    906 		comcnspeed = 0;
    907 		for (i = 6; i < strlen(console) && isdigit(console[i]); i++)
    908 			comcnspeed = comcnspeed * 10 + (console[i] - '0');
    909 	}
    910 #endif
    911 
    912 #if defined(GUMSTIX)
    913 
    914 #ifdef FFUARTCONSOLE
    915 #ifdef KGDB
    916 	if (strcmp(kgdb_devname, "ffuart") == 0){
    917 		/* port is reserved for kgdb */
    918 	} else
    919 #endif
    920 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    921 	if (console[0] == '\0' || strcasecmp(console, "ffuart") == 0 ||
    922 	    strncmp(console, "ttyS0,", 6) == 0)
    923 #endif
    924 	{
    925 		int rv;
    926 
    927 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
    928 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    929 		if (rv == 0) {
    930 			pxa2x0_clkman_config(CKEN_FFUART, 1);
    931 			return;
    932 		}
    933 	}
    934 #endif /* FFUARTCONSOLE */
    935 
    936 #ifdef STUARTCONSOLE
    937 #ifdef KGDB
    938 	if (strcmp(kgdb_devname, "stuart") == 0) {
    939 		/* port is reserved for kgdb */
    940 	} else
    941 #endif
    942 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    943 	if (console[0] == '\0' || strcasecmp(console, "stuart") == 0)
    944 #endif
    945 	{
    946 		int rv;
    947 
    948 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_STUART_BASE,
    949 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    950 		if (rv == 0) {
    951 			pxa2x0_clkman_config(CKEN_STUART, 1);
    952 			return;
    953 		}
    954 	}
    955 #endif /* STUARTCONSOLE */
    956 
    957 #ifdef BTUARTCONSOLE
    958 #ifdef KGDB
    959 	if (strcmp(kgdb_devname, "btuart") == 0) {
    960 		/* port is reserved for kgdb */
    961 	} else
    962 #endif
    963 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    964 	if (console[0] == '\0' || strcasecmp(console, "btuart") == 0)
    965 #endif
    966 	{
    967 		int rv;
    968 
    969 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
    970 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    971 		if (rv == 0) {
    972 			pxa2x0_clkman_config(CKEN_BTUART, 1);
    973 			return;
    974 		}
    975 	}
    976 #endif /* BTUARTCONSOLE */
    977 
    978 #ifdef HWUARTCONSOLE
    979 #ifdef KGDB
    980 	if (strcmp(kgdb_devname, "hwuart") == 0) {
    981 		/* port is reserved for kgdb */
    982 	} else
    983 #endif
    984 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    985 	if (console[0] == '\0' || strcasecmp(console, "hwuart") == 0)
    986 #endif
    987 	{
    988 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_HWUART_BASE,
    989 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    990 		if (rv == 0) {
    991 			pxa2x0_clkman_config(CKEN_HWUART, 1);
    992 			return;
    993 		}
    994 	}
    995 #endif /* HWUARTCONSOLE */
    996 
    997 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    998 
    999 	if (comcnattach(&omap_a4x_bs_tag, CONSADDR, comcnspeed,
   1000 	    OMAP_COM_FREQ, COM_TYPE_NORMAL, comcnmode) == 0)
   1001 		return;
   1002 
   1003 #endif /* GUMSTIX or OVERO */
   1004 
   1005 #endif /* NCOM */
   1006 
   1007 #if NLCD > 0
   1008 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
   1009 	if (console[0] == '\0' || strcasecmp(console, "lcd") == 0)
   1010 #endif
   1011 	{
   1012 		gxlcd_cnattach();
   1013 	}
   1014 #endif
   1015 }
   1016 
   1017 #ifdef KGDB
   1018 static void
   1019 kgdb_port_init(void)
   1020 {
   1021 #if (NCOM > 0) && defined(COM_PXA2X0)
   1022 	paddr_t paddr = 0;
   1023 	int cken = 0;
   1024 
   1025 	if (0 == strcmp(kgdb_devname, "ffuart")) {
   1026 		paddr = PXA2X0_FFUART_BASE;
   1027 		cken = CKEN_FFUART;
   1028 	} else if (0 == strcmp(kgdb_devname, "stuart")) {
   1029 		paddr = PXA2X0_STUART_BASE;
   1030 		cken = CKEN_STUART;
   1031 	} else if (0 == strcmp(kgdb_devname, "btuart")) {
   1032 		paddr = PXA2X0_BTUART_BASE;
   1033 		cken = CKEN_BTUART;
   1034 	} else if (0 == strcmp(kgdb_devname, "hwuart")) {
   1035 		paddr = PXA2X0_HWUART_BASE;
   1036 		cken = CKEN_HWUART;
   1037 	}
   1038 
   1039 	if (paddr &&
   1040 	    0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
   1041 		kgdb_devrate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
   1042 
   1043 		pxa2x0_clkman_config(cken, 1);
   1044 	}
   1045 
   1046 #endif
   1047 }
   1048 #endif
   1049 
   1050 static void
   1051 gumstix_device_register(device_t dev, void *aux)
   1052 {
   1053 	prop_dictionary_t dict = device_properties(dev);
   1054 
   1055 	if (device_is_a(dev, "arma9tmr") ||
   1056 	    device_is_a(dev, "a9wdt")) {
   1057 		/*
   1058 		 * We need to tell the A9 Global/Watchdog Timer
   1059 		 * what frequency it runs at.
   1060 		 */
   1061 
   1062 		/*
   1063 		 * This clock always runs at (arm_clk div 2) and only goes
   1064 		 * to timers that are part of the A9 MP core subsystem.
   1065 		 */
   1066 		prop_dictionary_set_uint32(dict, "frequency",
   1067 		    curcpu()->ci_data.cpu_cc_freq / 2);
   1068 	}
   1069 	if (device_is_a(dev, "armperiph")) {
   1070 		if (device_is_a(device_parent(dev), "mainbus")) {
   1071 #if defined(OMAP2)
   1072 			/*
   1073 			 * XXX KLUDGE ALERT XXX
   1074 			 * The iot mainbus supplies is completely wrong since
   1075 			 * it scales addresses by 2.  The simpliest remedy is
   1076 			 * to replace with our bus space used for the armcore
   1077 			 * registers (which armperiph uses).
   1078 			 */
   1079 			struct mainbus_attach_args * const mb = aux;
   1080 			mb->mb_iot = &omap_bs_tag;
   1081 #endif
   1082 		}
   1083 	}
   1084 	if (device_is_a(dev, "ehci")) {
   1085 #if defined(OVERO)
   1086 		prop_dictionary_set_uint16(dict, "nports", 2);
   1087 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1088 		prop_dictionary_set_cstring(dict, "port0-mode", "none");
   1089 		prop_dictionary_set_int16(dict, "port0-gpio", -1);
   1090 		prop_dictionary_set_cstring(dict, "port1-mode", "phy");
   1091 		prop_dictionary_set_int16(dict, "port1-gpio", 183);
   1092 		prop_dictionary_set_bool(dict, "port1-gpioval", true);
   1093 #elif defined(DUOVERO)
   1094 		prop_dictionary_set_uint16(dict, "nports", 1);
   1095 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1096 		prop_dictionary_set_cstring(dict, "port0-mode", "phy");
   1097 		prop_dictionary_set_int16(dict, "port0-gpio", 62);
   1098 		prop_dictionary_set_bool(dict, "port0-gpioval", false);
   1099 		prop_dictionary_set_bool(dict, "port0-extclk", true);
   1100 #endif
   1101 		prop_dictionary_set_uint16(dict, "dpll5-m", 443);
   1102 		prop_dictionary_set_uint16(dict, "dpll5-n", 11);
   1103 		prop_dictionary_set_uint16(dict, "dpll5-m2", 4);
   1104 	}
   1105 	if (device_is_a(dev, "ohci")) {
   1106 		if (prop_dictionary_set_bool(dict,
   1107 		    "Ganged-power-mask-on-port1", 1) == false) {
   1108 			printf("WARNING: unable to set power-mask for port1"
   1109 			    " property for %s\n", device_xname(dev));
   1110 		}
   1111 		if (prop_dictionary_set_bool(dict,
   1112 		    "Ganged-power-mask-on-port2", 1) == false) {
   1113 			printf("WARNING: unable to set power-mask for port2"
   1114 			    " property for %s\n", device_xname(dev));
   1115 		}
   1116 		if (prop_dictionary_set_bool(dict,
   1117 		    "Ganged-power-mask-on-port3", 1) == false) {
   1118 			printf("WARNING: unable to set power-mask for port3"
   1119 			    " property for %s\n", device_xname(dev));
   1120 		}
   1121 	}
   1122 	if (device_is_a(dev, "omapmputmr")) {
   1123 		struct obio_attach_args *obio = aux;
   1124 
   1125 		switch (obio->obio_addr) {
   1126 		case 0x49032000:	/* GPTIMER2 */
   1127 		case 0x49034000:	/* GPTIMER3 */
   1128 		case 0x49036000:	/* GPTIMER4 */
   1129 		case 0x49038000:	/* GPTIMER5 */
   1130 		case 0x4903a000:	/* GPTIMER6 */
   1131 		case 0x4903c000:	/* GPTIMER7 */
   1132 		case 0x4903e000:	/* GPTIMER8 */
   1133 		case 0x49040000:	/* GPTIMER9 */
   1134 #if defined(OVERO)
   1135 			{
   1136 			/* Ensure enable PRCM.CM_[FI]CLKEN_PER[3:10]. */
   1137 			const int en =
   1138 			    1 << (((obio->obio_addr >> 13) & 0x3f) - 0x16);
   1139 
   1140 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5000,
   1141 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5000) | en);
   1142 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5010,
   1143 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5010) | en);
   1144 			}
   1145 #endif
   1146 			break;
   1147 		}
   1148 	}
   1149 	if (device_is_a(dev, "sdhc")) {
   1150 		bool dualvolt = false;
   1151 
   1152 #if defined(OVERO) || defined(DUOVERO)
   1153 		if (device_is_a(device_parent(dev), "obio")) {
   1154 			struct obio_attach_args *obio = aux;
   1155 
   1156 #if defined(OVERO)
   1157 			if (obio->obio_addr == SDMMC2_BASE_3530)
   1158 				dualvolt = true;
   1159 #elif defined(DUOVERO)
   1160 			if (obio->obio_addr == SDMMC5_BASE_4430)
   1161 				dualvolt = true;
   1162 #endif
   1163 		}
   1164 #endif
   1165 #if defined(PEPPER)
   1166 		if (device_is_a(device_parent(dev), "mainbus")) {
   1167 			struct mainbus_attach_args * const mb = aux;
   1168 
   1169 			if (mb->mb_iobase == SDMMC3_BASE_TIAM335X)
   1170 				dualvolt = true;
   1171 		}
   1172 #endif
   1173 		prop_dictionary_set_bool(dict, "dual-volt", dualvolt);
   1174 	}
   1175 	if (device_is_a(dev, "tifb")) {
   1176 		prop_data_t panel_info;
   1177 
   1178 		panel_info = prop_data_create_data_nocopy(tifb_panel_info,
   1179 		    sizeof(struct tifb_panel_info));
   1180 		KASSERT(panel_info != NULL);
   1181 		prop_dictionary_set(dict, "panel-info", panel_info);
   1182 		prop_object_release(panel_info);
   1183 
   1184 #if defined(OMAP2)
   1185 		/* enable LCD */
   1186 		omap2_gpio_ctl(59, GPIO_PIN_OUTPUT);
   1187 		omap2_gpio_write(59, 0);	/* reset */
   1188 		delay(100);
   1189 		omap2_gpio_write(59, 1);
   1190 #endif
   1191 	}
   1192 	if (device_is_a(dev, "tps65217pmic")) {
   1193 #if defined(TI_AM335X)
   1194 		extern const char *mpu_supply;
   1195 
   1196 		mpu_supply = "DCDC3";
   1197 #endif
   1198 
   1199 		if (use_tps65217_wled) {
   1200 			prop_dictionary_set_int32(dict, "isel", 1);
   1201 			prop_dictionary_set_int32(dict, "fdim", 200);
   1202 			prop_dictionary_set_int32(dict, "brightness", 80);
   1203 		}
   1204 	}
   1205 }
   1206