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gumstix_machdep.c revision 1.58.12.3
      1 /*	$NetBSD: gumstix_machdep.c,v 1.58.12.3 2018/09/30 01:45:41 pgoyette Exp $ */
      2 /*
      3  * Copyright (C) 2005, 2006, 2007  WIDE Project and SOUM Corporation.
      4  * All rights reserved.
      5  *
      6  * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM
      7  * Corporation.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the project nor the name of SOUM Corporation
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS''
     22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 /*
     34  * Copyright (c) 2002, 2003, 2004, 2005  Genetec Corporation.
     35  * All rights reserved.
     36  *
     37  * Written by Hiroyuki Bessho for Genetec Corporation.
     38  *
     39  * Redistribution and use in source and binary forms, with or without
     40  * modification, are permitted provided that the following conditions
     41  * are met:
     42  * 1. Redistributions of source code must retain the above copyright
     43  *    notice, this list of conditions and the following disclaimer.
     44  * 2. Redistributions in binary form must reproduce the above copyright
     45  *    notice, this list of conditions and the following disclaimer in the
     46  *    documentation and/or other materials provided with the distribution.
     47  * 3. The name of Genetec Corporation may not be used to endorse or
     48  *    promote products derived from this software without specific prior
     49  *    written permission.
     50  *
     51  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     52  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     53  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     54  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     55  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     56  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     57  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     58  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     59  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     60  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     61  * POSSIBILITY OF SUCH DAMAGE.
     62  *
     63  * Machine dependent functions for kernel setup for Genetec G4250EBX
     64  * evaluation board.
     65  *
     66  * Based on iq80310_machhdep.c
     67  */
     68 /*
     69  * Copyright (c) 2001 Wasabi Systems, Inc.
     70  * All rights reserved.
     71  *
     72  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     73  *
     74  * Redistribution and use in source and binary forms, with or without
     75  * modification, are permitted provided that the following conditions
     76  * are met:
     77  * 1. Redistributions of source code must retain the above copyright
     78  *    notice, this list of conditions and the following disclaimer.
     79  * 2. Redistributions in binary form must reproduce the above copyright
     80  *    notice, this list of conditions and the following disclaimer in the
     81  *    documentation and/or other materials provided with the distribution.
     82  * 3. All advertising materials mentioning features or use of this software
     83  *    must display the following acknowledgement:
     84  *	This product includes software developed for the NetBSD Project by
     85  *	Wasabi Systems, Inc.
     86  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     87  *    or promote products derived from this software without specific prior
     88  *    written permission.
     89  *
     90  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     91  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     92  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     93  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     94  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     95  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     96  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     97  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     98  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     99  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    100  * POSSIBILITY OF SUCH DAMAGE.
    101  */
    102 
    103 /*
    104  * Copyright (c) 1997,1998 Mark Brinicombe.
    105  * Copyright (c) 1997,1998 Causality Limited.
    106  * All rights reserved.
    107  *
    108  * Redistribution and use in source and binary forms, with or without
    109  * modification, are permitted provided that the following conditions
    110  * are met:
    111  * 1. Redistributions of source code must retain the above copyright
    112  *    notice, this list of conditions and the following disclaimer.
    113  * 2. Redistributions in binary form must reproduce the above copyright
    114  *    notice, this list of conditions and the following disclaimer in the
    115  *    documentation and/or other materials provided with the distribution.
    116  * 3. All advertising materials mentioning features or use of this software
    117  *    must display the following acknowledgement:
    118  *	This product includes software developed by Mark Brinicombe
    119  *	for the NetBSD Project.
    120  * 4. The name of the company nor the name of the author may be used to
    121  *    endorse or promote products derived from this software without specific
    122  *    prior written permission.
    123  *
    124  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
    125  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    126  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    127  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
    128  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    129  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    130  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    131  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    132  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    133  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    134  * SUCH DAMAGE.
    135  *
    136  * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
    137  * boards using RedBoot firmware.
    138  */
    139 
    140 #include "opt_arm_debug.h"
    141 #include "opt_com.h"
    142 #include "opt_console.h"
    143 #include "opt_cputypes.h"
    144 #include "opt_evbarm_boardtype.h"
    145 #include "opt_gumstix.h"
    146 #include "opt_kgdb.h"
    147 #include "opt_multiprocessor.h"
    148 #include "opt_pmap_debug.h"
    149 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    150 #include "opt_omap.h"
    151 
    152 #if defined(DUOVERO)
    153 #include "arml2cc.h"
    154 #endif
    155 #include "prcm.h"
    156 #endif
    157 
    158 #include <sys/param.h>
    159 #include <sys/conf.h>
    160 #include <sys/device.h>
    161 #include <sys/exec.h>
    162 #include <sys/kernel.h>
    163 #include <sys/proc.h>
    164 #include <sys/reboot.h>
    165 #include <sys/systm.h>
    166 #include <sys/termios.h>
    167 #include <sys/bus.h>
    168 #include <sys/cpu.h>
    169 #include <sys/gpio.h>
    170 
    171 #include <prop/proplib.h>
    172 
    173 #include <uvm/uvm_extern.h>
    174 
    175 #include <arm/mainbus/mainbus.h>	/* don't reorder */
    176 
    177 #include <machine/autoconf.h>		/* don't reorder */
    178 #include <machine/bootconfig.h>
    179 #include <arm/locore.h>
    180 
    181 #include <arm/arm32/machdep.h>
    182 #if NARML2CC > 0
    183 #include <arm/cortex/pl310_var.h>
    184 #endif
    185 #include <arm/cortex/scu_reg.h>
    186 #include <arm/omap/omap2_obiovar.h>
    187 #include <arm/omap/am335x_prcm.h>
    188 #include <arm/omap/omap2_gpio.h>
    189 #include <arm/omap/omap2_gpmcreg.h>
    190 #include <arm/omap/omap2_prcm.h>
    191 #if defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    192 #include <arm/omap/omap2_reg.h>		/* Must required "opt_omap.h" */
    193 #endif
    194 #include <arm/omap/omap3_sdmmcreg.h>
    195 #include <arm/omap/omap_var.h>
    196 #include <arm/omap/omap_com.h>
    197 #include <arm/omap/tifbvar.h>
    198 #include <arm/xscale/pxa2x0reg.h>
    199 #include <arm/xscale/pxa2x0var.h>
    200 #include <arm/xscale/pxa2x0_gpio.h>
    201 #include <evbarm/gumstix/gumstixreg.h>
    202 #include <evbarm/gumstix/gumstixvar.h>
    203 
    204 #include <dev/cons.h>
    205 
    206 #ifdef KGDB
    207 #include <sys/kgdb.h>
    208 #endif
    209 
    210 /*
    211  * The range 0xc1000000 - 0xfd000000 is available for kernel VM space
    212  * Core-logic registers and I/O mappings occupy
    213  *
    214  *    0xfd000000 - 0xfd800000	on gumstix
    215  *    0xc0000000 - 0xc0400000	on overo, duovero and pepper
    216  */
    217 #ifndef KERNEL_VM_BASE
    218 #define	KERNEL_VM_BASE		0xc8000000
    219 #endif
    220 #define KERNEL_VM_SIZE		0x35000000
    221 
    222 BootConfig bootconfig;		/* Boot config storage */
    223 static char bootargs[MAX_BOOT_STRING];
    224 const size_t bootargs_len = sizeof(bootargs) - 1;	/* without nul */
    225 char *boot_args = NULL;
    226 
    227 uint32_t system_serial_high;
    228 uint32_t system_serial_low;
    229 
    230 /* Prototypes */
    231 #if defined(GUMSTIX)
    232 static void	read_system_serial(void);
    233 #endif
    234 #if defined(OMAP2)
    235 static void	omap_reset(void);
    236 static void	find_cpu_clock(void);
    237 #endif
    238 static void	process_kernel_args(int, char *[]);
    239 static void	process_kernel_args_liner(char *);
    240 #ifdef KGDB
    241 static void	kgdb_port_init(void);
    242 #endif
    243 static void	gumstix_device_register(device_t, void *);
    244 
    245 bs_protos(bs_notimpl);
    246 
    247 #include "com.h"
    248 #if NCOM > 0
    249 #include <dev/ic/comreg.h>
    250 #include <dev/ic/comvar.h>
    251 #endif
    252 
    253 #if defined(CPU_XSCALE)
    254 #include "lcd.h"
    255 #endif
    256 
    257 #ifndef CONSPEED
    258 #define CONSPEED B115200	/* It's a setting of the default of u-boot */
    259 #endif
    260 #ifndef CONMODE
    261 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    262 #endif
    263 
    264 int comcnspeed = CONSPEED;
    265 int comcnmode = CONMODE;
    266 
    267 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    268 static char console[16];
    269 #endif
    270 
    271 const struct tifb_panel_info *tifb_panel_info = NULL;
    272 /* Use TPS65217 White LED Driver */
    273 bool use_tps65217_wled = false;
    274 
    275 extern void gxio_config(void);
    276 extern void gxio_config_expansion(char *);
    277 
    278 
    279 static inline pd_entry_t *
    280 read_ttb(void)
    281 {
    282 	long ttb;
    283 
    284 	__asm volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
    285 
    286 	return (pd_entry_t *)(ttb & ~((1<<14)-1));
    287 }
    288 
    289 /*
    290  * Static device mappings. These peripheral registers are mapped at
    291  * fixed virtual addresses very early in initarm() so that we can use
    292  * them while booting the kernel, and stay at the same address
    293  * throughout whole kernel's life time.
    294  *
    295  * We use this table twice; once with bootstrap page table, and once
    296  * with kernel's page table which we build up in initarm().
    297  *
    298  * Since we map these registers into the bootstrap page table using
    299  * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
    300  * registers segment-aligned and segment-rounded in order to avoid
    301  * using the 2nd page tables.
    302  */
    303 
    304 #define	_A(a)	((a) & ~L1_S_OFFSET)
    305 #define	_S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
    306 
    307 static const struct pmap_devmap gumstix_devmap[] = {
    308 #if defined(GUMSTIX)
    309 	{
    310 		GUMSTIX_GPIO_VBASE,
    311 		_A(PXA2X0_GPIO_BASE),
    312 		_S(PXA250_GPIO_SIZE),
    313 		VM_PROT_READ | VM_PROT_WRITE,
    314 		PTE_NOCACHE,
    315 	},
    316 	{
    317 		GUMSTIX_CLKMAN_VBASE,
    318 		_A(PXA2X0_CLKMAN_BASE),
    319 		_S(PXA2X0_CLKMAN_SIZE),
    320 		VM_PROT_READ | VM_PROT_WRITE,
    321 		PTE_NOCACHE,
    322 	},
    323 	{
    324 		GUMSTIX_INTCTL_VBASE,
    325 		_A(PXA2X0_INTCTL_BASE),
    326 		_S(PXA2X0_INTCTL_SIZE),
    327 		VM_PROT_READ | VM_PROT_WRITE,
    328 		PTE_NOCACHE,
    329 	},
    330 	{
    331 		GUMSTIX_FFUART_VBASE,
    332 		_A(PXA2X0_FFUART_BASE),
    333 		_S(4 * COM_NPORTS),
    334 		VM_PROT_READ | VM_PROT_WRITE,
    335 		PTE_NOCACHE,
    336 	},
    337 	{
    338 		GUMSTIX_STUART_VBASE,
    339 		_A(PXA2X0_STUART_BASE),
    340 		_S(4 * COM_NPORTS),
    341 		VM_PROT_READ | VM_PROT_WRITE,
    342 		PTE_NOCACHE,
    343 	},
    344 	{
    345 		GUMSTIX_BTUART_VBASE,
    346 		_A(PXA2X0_BTUART_BASE),
    347 		_S(4 * COM_NPORTS),
    348 		VM_PROT_READ | VM_PROT_WRITE,
    349 		PTE_NOCACHE,
    350 	},
    351 	{
    352 		GUMSTIX_HWUART_VBASE,
    353 		_A(PXA2X0_HWUART_BASE),
    354 		_S(4 * COM_NPORTS),
    355 		VM_PROT_READ | VM_PROT_WRITE,
    356 		PTE_NOCACHE,
    357 	},
    358 	{
    359 		GUMSTIX_LCDC_VBASE,
    360 		_A(PXA2X0_LCDC_BASE),
    361 		_S(4 * COM_NPORTS),
    362 		VM_PROT_READ | VM_PROT_WRITE,
    363 		PTE_NOCACHE,
    364 	},
    365 #elif defined(OVERO)
    366 	{	/* SCM, PRCM */
    367 		OVERO_L4_CORE_VBASE,
    368 		_A(OMAP3530_L4_CORE_BASE),
    369 		_S(L1_S_SIZE),		/* No need 16MB.  Use only first 1MB */
    370 		VM_PROT_READ | VM_PROT_WRITE,
    371 		PTE_NOCACHE
    372 	},
    373 	{	/* Console, GPIO[2-6] */
    374 		OVERO_L4_PERIPHERAL_VBASE,
    375 		_A(OMAP3530_L4_PERIPHERAL_BASE),
    376 		_S(OMAP3530_L4_PERIPHERAL_SIZE),
    377 		VM_PROT_READ | VM_PROT_WRITE,
    378 		PTE_NOCACHE
    379 	},
    380 	{	/* GPIO1 */
    381 		OVERO_L4_WAKEUP_VBASE,
    382 		_A(OMAP3530_L4_WAKEUP_BASE),
    383 		_S(OMAP3530_L4_WAKEUP_SIZE),
    384 		VM_PROT_READ | VM_PROT_WRITE,
    385 		PTE_NOCACHE
    386 	},
    387 	{
    388 		OVERO_GPMC_VBASE,
    389 		_A(GPMC_BASE),
    390 		_S(GPMC_SIZE),
    391 		VM_PROT_READ | VM_PROT_WRITE,
    392 		PTE_NOCACHE
    393 	},
    394 #elif defined(DUOVERO)
    395 	{
    396 		DUOVERO_L4_CM_VBASE,
    397 		_A(OMAP4430_L4_CORE_BASE + 0x100000),
    398 		_S(L1_S_SIZE),
    399 		VM_PROT_READ | VM_PROT_WRITE,
    400 		PTE_NOCACHE
    401 	},
    402 	{	/* Console, SCU, L2CC, GPIO[2-6] */
    403 		DUOVERO_L4_PERIPHERAL_VBASE,
    404 		_A(OMAP4430_L4_PERIPHERAL_BASE),
    405 		_S(L1_S_SIZE * 3),
    406 		VM_PROT_READ | VM_PROT_WRITE,
    407 		PTE_NOCACHE
    408 	},
    409 	{	/* PRCM, GPIO1 */
    410 		DUOVERO_L4_WAKEUP_VBASE,
    411 		_A(OMAP4430_L4_WAKEUP_BASE),
    412 		_S(OMAP4430_L4_WAKEUP_SIZE),
    413 		VM_PROT_READ | VM_PROT_WRITE,
    414 		PTE_NOCACHE
    415 	},
    416 	{
    417 		DUOVERO_GPMC_VBASE,
    418 		_A(GPMC_BASE),
    419 		_S(GPMC_SIZE),
    420 		VM_PROT_READ | VM_PROT_WRITE,
    421 		PTE_NOCACHE
    422 	},
    423 #elif defined(PEPPER)
    424 	{
    425 		/* CM, Control Module, GPIO0, Console */
    426 		PEPPER_PRCM_VBASE,
    427 		_A(OMAP2_CM_BASE),
    428 		_S(L1_S_SIZE),
    429 		VM_PROT_READ | VM_PROT_WRITE,
    430 		PTE_NOCACHE
    431 	},
    432 	{
    433 		/* GPIO[1-3] */
    434 		PEPPER_L4_PERIPHERAL_VBASE,
    435 		_A(TI_AM335X_L4_PERIPHERAL_BASE),
    436 		_S(L1_S_SIZE),
    437 		VM_PROT_READ | VM_PROT_WRITE,
    438 		PTE_NOCACHE
    439 	},
    440 #endif
    441 	{ 0, 0, 0, 0, 0 }
    442 };
    443 
    444 #undef	_A
    445 #undef	_S
    446 
    447 
    448 /*
    449  * u_int initarm(...)
    450  *
    451  * Initial entry point on startup. This gets called before main() is
    452  * entered.
    453  * It should be responsible for setting up everything that must be
    454  * in place when main is called.
    455  * This includes
    456  *   Taking a copy of the boot configuration structure.
    457  *   Initialising the physical console so characters can be printed.
    458  *   Setting up page tables for the kernel
    459  *   Relocating the kernel to the bottom of physical memory
    460  */
    461 u_int
    462 initarm(void *arg)
    463 {
    464 	extern char KERNEL_BASE_phys[];
    465 	extern uint32_t *u_boot_args[];
    466 	extern uint32_t ram_size;
    467 	enum { r0 = 0, r1 = 1, r2 = 2, r3 = 3 }; /* args from u-boot */
    468 
    469 	/*
    470 	 * We mapped PA == VA in gumstix_start.S.
    471 	 * Also mapped SDRAM to KERNEL_BASE first 64Mbyte only with cachable.
    472 	 *
    473 	 * Gumstix (basix, connex, verdex, verdex-pro):
    474 	 * Physical Address Range     Description
    475 	 * -----------------------    ----------------------------------
    476 	 * 0x00000000 - 0x00ffffff    flash Memory   (16MB or 4MB)
    477 	 * 0x40000000 - 0x480fffff    Processor Registers
    478 	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB or 128MB)
    479 	 * 0xc0000000 - 0xc3ffffff    KERNEL_BASE
    480 	 *
    481 	 * Overo:
    482 	 * Physical Address Range     Description
    483 	 * -----------------------    ----------------------------------
    484 	 * 0x80000000 - 0x9fffffff    SDRAM Bank 0
    485 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    486 	 *
    487 	 * DuoVero, Pepper:
    488 	 * Physical Address Range     Description
    489 	 * -----------------------    ----------------------------------
    490 	 * 0x80000000 - 0xbfffffff    SDRAM Bank 0
    491 	 * 0x80000000 - 0x83ffffff    KERNEL_BASE
    492 	 */
    493 
    494 #if defined(CPU_XSCALE)
    495 	extern vaddr_t xscale_cache_clean_addr;
    496 	xscale_cache_clean_addr = 0xff000000U;
    497 
    498 	cpu_reset_address = NULL;
    499 #elif defined(OMAP2)
    500 	cpu_reset_address = omap_reset;
    501 
    502 	find_cpu_clock();
    503 #endif
    504 
    505 	/*
    506 	 * Heads up ... Setup the CPU / MMU / TLB functions
    507 	 */
    508 	if (set_cpufuncs())
    509 		panic("cpu not recognized!");
    510 
    511 	/* map some peripheral registers at static I/O area */
    512 	pmap_devmap_bootstrap((vaddr_t)read_ttb(), gumstix_devmap);
    513 
    514 #if defined(CPU_XSCALE)
    515 	/* start 32.768kHz OSC */
    516 	ioreg_write(GUMSTIX_CLKMAN_VBASE + CLKMAN_OSCC, OSCC_OON);
    517 
    518 	/* Get ready for splfoo() */
    519 	pxa2x0_intr_bootstrap(GUMSTIX_INTCTL_VBASE);
    520 
    521 	/* setup GPIO for {FF,ST,HW}UART. */
    522 	pxa2x0_gpio_bootstrap(GUMSTIX_GPIO_VBASE);
    523 
    524 	pxa2x0_clkman_bootstrap(GUMSTIX_CLKMAN_VBASE);
    525 #endif
    526 
    527 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    528 
    529 	/* configure MUX, GPIO and CLK. */
    530 	gxio_config();
    531 
    532 #ifndef GUMSTIX_NETBSD_ARGS_CONSOLE
    533 	consinit();
    534 #endif
    535 #ifdef KGDB
    536 	kgdb_port_init();
    537 #endif
    538 
    539 	/*
    540 	 * Examine the boot args string for options we need to know about
    541 	 * now.
    542 	 */
    543 #if defined(GUMSTIX)
    544 #define SDRAM_START	0xa0000000UL
    545 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    546 #define SDRAM_START	0x80000000UL
    547 #endif
    548 	if ((uint32_t)u_boot_args[r0] < SDRAM_START ||
    549 	    (uint32_t)u_boot_args[r0] >= SDRAM_START + ram_size)
    550 		/* Maybe r0 is 'argc'.  We are booted by command 'go'. */
    551 		process_kernel_args((int)u_boot_args[r0],
    552 		    (char **)u_boot_args[r1]);
    553 	else
    554 		/*
    555 		 * Maybe r3 is 'boot args string' of 'bootm'.  This string is
    556 		 * linely.
    557 		 */
    558 		process_kernel_args_liner((char *)u_boot_args[r3]);
    559 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    560 	consinit();
    561 #endif
    562 
    563 	/* Talk to the user */
    564 #define BDSTR(s)	_BDSTR(s)
    565 #define _BDSTR(s)	#s
    566 	printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
    567 
    568 	/* Read system serial */
    569 #if defined(GUMSTIX)
    570 	read_system_serial();
    571 #endif
    572 
    573 #ifdef VERBOSE_INIT_ARM
    574 	printf("initarm: Configuring system ...\n");
    575 #endif
    576 
    577 #if defined(OMAP_4430)
    578 	const bus_space_tag_t iot = &omap_bs_tag;
    579 	bus_space_handle_t ioh;
    580 
    581 #if NARML2CC > 0
    582 	/*
    583 	 * Initialize L2-Cache parameters
    584 	 */
    585 
    586 	if (bus_space_map(iot, OMAP4_L2CC_BASE, OMAP4_L2CC_SIZE, 0, &ioh) != 0)
    587 		panic("OMAP4_L2CC_BASE map failed\n");
    588 	arml2cc_init(iot, ioh, 0);
    589 #endif
    590 
    591 #ifdef MULTIPROCESSOR
    592 	if (bus_space_map(iot, OMAP4_SCU_BASE, SCU_SIZE, 0, &ioh) != 0)
    593 		panic("OMAP4_SCU_BASE map failed\n");
    594 	arm_cpu_max =
    595 	    1 + (bus_space_read_4(iot, ioh, SCU_CFG) & SCU_CFG_CPUMAX);
    596 #endif
    597 #endif
    598 
    599 	/* Fake bootconfig structure for the benefit of pmap.c */
    600 	/* XXX must make the memory description h/w independent */
    601 	bootconfig.dramblocks = 1;
    602 	bootconfig.dram[0].address = SDRAM_START;
    603 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
    604 
    605 	KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
    606 
    607 	arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
    608 	    (uintptr_t) KERNEL_BASE_phys);
    609 	arm32_kernel_vm_init(KERNEL_VM_BASE,
    610 #if defined(CPU_XSCALE)
    611 	    ARM_VECTORS_LOW,
    612 #elif defined(CPU_CORTEX)
    613 	    ARM_VECTORS_HIGH,
    614 #endif
    615 	    0, gumstix_devmap, true);
    616 
    617 	evbarm_device_register = gumstix_device_register;
    618 
    619 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
    620 }
    621 
    622 #if defined(GUMSTIX)
    623 static void
    624 read_system_serial(void)
    625 {
    626 #define GUMSTIX_SYSTEM_SERIAL_ADDR	0
    627 #define GUMSTIX_SYSTEM_SERIAL_SIZE	8
    628 #define FLASH_OFFSET_INTEL_PROTECTION	0x81
    629 #define FLASH_OFFSET_USER_PROTECTION	0x85
    630 #define FLASH_CMD_READ_ID		0x90
    631 #define FLASH_CMD_RESET			0xff
    632 	int i;
    633 	char system_serial[GUMSTIX_SYSTEM_SERIAL_SIZE], *src;
    634 	char x;
    635 
    636 	src = (char *)(FLASH_OFFSET_USER_PROTECTION * 2 /*word*/);
    637 	*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    638 	memcpy(system_serial,
    639 	    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    640 	*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    641 
    642 	for (i = 1, x = system_serial[0]; i < sizeof (system_serial); i++)
    643 		x &= system_serial[i];
    644 	if (x == 0xff) {
    645 		src = (char *)(FLASH_OFFSET_INTEL_PROTECTION * 2 /*word*/);
    646 		*(volatile uint16_t *)0 = FLASH_CMD_READ_ID;
    647 		memcpy(system_serial,
    648 		    src + GUMSTIX_SYSTEM_SERIAL_ADDR, sizeof (system_serial));
    649 		*(volatile uint16_t *)0 = FLASH_CMD_RESET;
    650 
    651 		/*
    652 		 * XXXX: Don't need ???
    653 		 * gumstix_serial_hash(system_serial);
    654 		 */
    655 	}
    656 	system_serial_high = system_serial[0] << 24 | system_serial[1] << 16 |
    657 	    system_serial[2] << 8 | system_serial[3];
    658 	system_serial_low = system_serial[4] << 24 | system_serial[5] << 16 |
    659 	    system_serial[6] << 8 | system_serial[7];
    660 
    661 	printf("system serial: 0x");
    662 	for (i = 0; i < sizeof (system_serial); i++)
    663 		printf("%02x", system_serial[i]);
    664 	printf("\n");
    665 }
    666 #endif
    667 
    668 #if defined(OMAP2)
    669 static void
    670 omap_reset(void)
    671 {
    672 
    673 #if defined(TI_AM335X)
    674 	vaddr_t prm_base = (PEPPER_PRCM_VBASE + AM335X_PRCM_PRM_DEVICE);
    675 
    676 	*(volatile uint32_t *)(prm_base + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW;
    677 #elif defined(OMAP_4430)
    678 	*(volatile uint32_t *)(DUOVERO_L4_WAKEUP_VBASE + OMAP4_PRM_RSTCTRL) =
    679 	    OMAP4_PRM_RSTCTRL_WARM;
    680 #endif
    681 
    682 #if NPRCM > 0
    683 	prcm_cold_reset();
    684 #endif
    685 }
    686 
    687 static void
    688 find_cpu_clock(void)
    689 {
    690 	const vaddr_t prm_base __unused = OMAP2_PRM_BASE;
    691 	const vaddr_t cm_base = OMAP2_CM_BASE;
    692 
    693 #if defined(OMAP_3530)
    694 
    695 	const uint32_t prm_clksel =
    696 	    *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL);
    697 	static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS;
    698 	const uint32_t sys_clk =
    699 	    prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)];
    700 	const uint32_t dpll1 =
    701 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU);
    702 	const uint32_t dpll2 =
    703 	    *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU);
    704 	const uint32_t m =
    705 	    __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT);
    706 	const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV);
    707 	const uint32_t m2 =
    708 	    __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV);
    709 
    710 	/*
    711 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    712 	 */
    713 	curcpu()->ci_data.cpu_cc_freq =
    714 	    ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT;
    715 	omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT;
    716 
    717 #elif defined(OMAP_4430)
    718 
    719 	const uint32_t prm_clksel =
    720 	    *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL);
    721 	static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS;
    722 	const uint32_t sys_clk =
    723 	    cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)];
    724 	const uint32_t dpll1 =
    725 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU);
    726 	const uint32_t dpll2 =
    727 	    *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU);
    728 	const uint32_t m =
    729 	    __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT);
    730 	const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV);
    731 	const uint32_t m2 =
    732 	    __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV);
    733 
    734 	/*
    735 	 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
    736 	 */
    737 	curcpu()->ci_data.cpu_cc_freq =
    738 	    ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2;
    739 	omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT;
    740 
    741 #elif defined(TI_AM335X)
    742 
    743 	prcm_bootstrap(cm_base);
    744 	am335x_sys_clk(TI_AM335X_CTLMOD_BASE);
    745 	am335x_cpu_clk();
    746 
    747 #endif
    748 }
    749 #endif
    750 
    751 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    752 static const char busheader_name[] = "busheader=";
    753 #endif
    754 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    755     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    756 static const char expansion_name[] = "expansion=";
    757 #endif
    758 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    759 static const char console_name[] = "console=";
    760 #endif
    761 static void
    762 process_kernel_args(int argc, char *argv[])
    763 {
    764 	int gxio_configured = 0, i, j;
    765 
    766 	boothowto = 0;
    767 
    768 	for (i = 1, j = 0; i < argc; i++) {
    769 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    770 		if (!strncmp(argv[i], busheader_name, strlen(busheader_name))) {
    771 			/* Configure for GPIOs of busheader side */
    772 			gxio_config_expansion(argv[i] + strlen(busheader_name));
    773 			gxio_configured = 1;
    774 			continue;
    775 		}
    776 #endif
    777 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    778     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    779 		if (!strncmp(argv[i], expansion_name, strlen(expansion_name))) {
    780 			/* Configure expansion */
    781 			gxio_config_expansion(argv[i] + strlen(expansion_name));
    782 			gxio_configured = 1;
    783 			continue;
    784 		}
    785 #endif
    786 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    787 		if (!strncmp(argv[i], console_name, strlen(console_name))) {
    788 			strncpy(console, argv[i] + strlen(console_name),
    789 			    sizeof(console));
    790 			consinit();
    791 		}
    792 #endif
    793 		if (j == bootargs_len) {
    794 			*(bootargs + j) = '\0';
    795 			continue;
    796 		}
    797 		if (j != 0)
    798 			*(bootargs + j++) = ' ';
    799 		strncpy(bootargs + j, argv[i], bootargs_len - j);
    800 		bootargs[bootargs_len] = '\0';
    801 		j += strlen(argv[i]);
    802 	}
    803 	boot_args = bootargs;
    804 
    805 	parse_mi_bootargs(boot_args);
    806 
    807 	if (!gxio_configured)
    808 		gxio_config_expansion(NULL);
    809 }
    810 
    811 static void
    812 process_kernel_args_liner(char *args)
    813 {
    814 	int i = 0;
    815 	char *p = NULL;
    816 
    817 	boothowto = 0;
    818 
    819 	strncpy(bootargs, args, sizeof(bootargs));
    820 #if defined(GUMSTIX_NETBSD_ARGS_BUSHEADER) || \
    821     defined(GUMSTIX_NETBSD_ARGS_EXPANSION)
    822 	{
    823 		char *q;
    824 
    825 		if ((p = strstr(bootargs, expansion_name)))
    826 			q = p + strlen(expansion_name);
    827 #ifdef GUMSTIX_NETBSD_ARGS_BUSHEADER
    828 		else if ((p = strstr(bootargs, busheader_name)))
    829 			q = p + strlen(busheader_name);
    830 #endif
    831 		if (p) {
    832 			char expansion[256], c;
    833 
    834 			i = 0;
    835 			do {
    836 				c = *(q + i);
    837 				if (c == ' ')
    838 					c = '\0';
    839 				expansion[i++] = c;
    840 			} while (c != '\0' && i < sizeof(expansion));
    841 			gxio_config_expansion(expansion);
    842 			strcpy(p, q + i);
    843 		}
    844 	}
    845 #endif
    846 	if (p == NULL)
    847 		gxio_config_expansion(NULL);
    848 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    849 	p = strstr(bootargs, console_name);
    850 	if (p != NULL) {
    851 		char c;
    852 
    853 		i = 0;
    854 		do {
    855 			c = *(p + strlen(console_name) + i);
    856 			if (c == ' ')
    857 				c = '\0';
    858 			console[i++] = c;
    859 		} while (c != '\0' && i < sizeof(console));
    860 		consinit();
    861 		strcpy(p, p + strlen(console_name) + i);
    862 	}
    863 #endif
    864 	boot_args = bootargs;
    865 
    866 	parse_mi_bootargs(boot_args);
    867 }
    868 
    869 #ifdef KGDB
    870 #ifndef KGDB_DEVNAME
    871 #define KGDB_DEVNAME	"ffuart"
    872 #endif
    873 const char kgdb_devname[] = KGDB_DEVNAME;
    874 
    875 #ifndef KGDB_DEVRATE
    876 #define KGDB_DEVRATE	CONSPEED
    877 #endif
    878 int kgdb_devrate = KGDB_DEVRATE;
    879 
    880 #if (NCOM > 0)
    881 #ifndef KGDB_DEVMODE
    882 #define KGDB_DEVMODE	CONMODE
    883 #endif
    884 int comkgdbmode = KGDB_DEVMODE;
    885 #endif /* NCOM */
    886 
    887 #endif /* KGDB */
    888 
    889 
    890 void
    891 consinit(void)
    892 {
    893 	static int consinit_called = 0;
    894 
    895 	if (consinit_called != 0)
    896 		return;
    897 
    898 	consinit_called = 1;
    899 
    900 #if NCOM > 0
    901 
    902 #ifdef GUMSTIX_NETBSD_ARGS_CONSOLE
    903 	/* Maybe passed Linux's bootargs 'console=ttyS?,<speed>...' */
    904 	if (strncmp(console, "ttyS", 4) == 0 && console[5] == ',') {
    905 		int i;
    906 
    907 		comcnspeed = 0;
    908 		for (i = 6; i < strlen(console) && isdigit(console[i]); i++)
    909 			comcnspeed = comcnspeed * 10 + (console[i] - '0');
    910 	}
    911 #endif
    912 
    913 #if defined(GUMSTIX)
    914 
    915 #ifdef FFUARTCONSOLE
    916 #ifdef KGDB
    917 	if (strcmp(kgdb_devname, "ffuart") == 0){
    918 		/* port is reserved for kgdb */
    919 	} else
    920 #endif
    921 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    922 	if (console[0] == '\0' || strcasecmp(console, "ffuart") == 0 ||
    923 	    strncmp(console, "ttyS0,", 6) == 0)
    924 #endif
    925 	{
    926 		int rv;
    927 
    928 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE,
    929 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    930 		if (rv == 0) {
    931 			pxa2x0_clkman_config(CKEN_FFUART, 1);
    932 			return;
    933 		}
    934 	}
    935 #endif /* FFUARTCONSOLE */
    936 
    937 #ifdef STUARTCONSOLE
    938 #ifdef KGDB
    939 	if (strcmp(kgdb_devname, "stuart") == 0) {
    940 		/* port is reserved for kgdb */
    941 	} else
    942 #endif
    943 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    944 	if (console[0] == '\0' || strcasecmp(console, "stuart") == 0)
    945 #endif
    946 	{
    947 		int rv;
    948 
    949 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_STUART_BASE,
    950 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    951 		if (rv == 0) {
    952 			pxa2x0_clkman_config(CKEN_STUART, 1);
    953 			return;
    954 		}
    955 	}
    956 #endif /* STUARTCONSOLE */
    957 
    958 #ifdef BTUARTCONSOLE
    959 #ifdef KGDB
    960 	if (strcmp(kgdb_devname, "btuart") == 0) {
    961 		/* port is reserved for kgdb */
    962 	} else
    963 #endif
    964 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    965 	if (console[0] == '\0' || strcasecmp(console, "btuart") == 0)
    966 #endif
    967 	{
    968 		int rv;
    969 
    970 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
    971 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    972 		if (rv == 0) {
    973 			pxa2x0_clkman_config(CKEN_BTUART, 1);
    974 			return;
    975 		}
    976 	}
    977 #endif /* BTUARTCONSOLE */
    978 
    979 #ifdef HWUARTCONSOLE
    980 #ifdef KGDB
    981 	if (strcmp(kgdb_devname, "hwuart") == 0) {
    982 		/* port is reserved for kgdb */
    983 	} else
    984 #endif
    985 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
    986 	if (console[0] == '\0' || strcasecmp(console, "hwuart") == 0)
    987 #endif
    988 	{
    989 		rv = comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_HWUART_BASE,
    990 		    comcnspeed, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comcnmode);
    991 		if (rv == 0) {
    992 			pxa2x0_clkman_config(CKEN_HWUART, 1);
    993 			return;
    994 		}
    995 	}
    996 #endif /* HWUARTCONSOLE */
    997 
    998 #elif defined(OVERO) || defined(DUOVERO) || defined(PEPPER)
    999 
   1000 	if (comcnattach(&omap_a4x_bs_tag, CONSADDR, comcnspeed,
   1001 	    OMAP_COM_FREQ, COM_TYPE_NORMAL, comcnmode) == 0)
   1002 		return;
   1003 
   1004 #endif /* GUMSTIX or OVERO */
   1005 
   1006 #endif /* NCOM */
   1007 
   1008 #if NLCD > 0
   1009 #if defined(GUMSTIX_NETBSD_ARGS_CONSOLE)
   1010 	if (console[0] == '\0' || strcasecmp(console, "lcd") == 0)
   1011 #endif
   1012 	{
   1013 		gxlcd_cnattach();
   1014 	}
   1015 #endif
   1016 }
   1017 
   1018 #ifdef KGDB
   1019 static void
   1020 kgdb_port_init(void)
   1021 {
   1022 #if (NCOM > 0) && defined(COM_PXA2X0)
   1023 	paddr_t paddr = 0;
   1024 	int cken = 0;
   1025 
   1026 	if (0 == strcmp(kgdb_devname, "ffuart")) {
   1027 		paddr = PXA2X0_FFUART_BASE;
   1028 		cken = CKEN_FFUART;
   1029 	} else if (0 == strcmp(kgdb_devname, "stuart")) {
   1030 		paddr = PXA2X0_STUART_BASE;
   1031 		cken = CKEN_STUART;
   1032 	} else if (0 == strcmp(kgdb_devname, "btuart")) {
   1033 		paddr = PXA2X0_BTUART_BASE;
   1034 		cken = CKEN_BTUART;
   1035 	} else if (0 == strcmp(kgdb_devname, "hwuart")) {
   1036 		paddr = PXA2X0_HWUART_BASE;
   1037 		cken = CKEN_HWUART;
   1038 	}
   1039 
   1040 	if (paddr &&
   1041 	    0 == com_kgdb_attach(&pxa2x0_a4x_bs_tag, paddr,
   1042 		kgdb_devrate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
   1043 
   1044 		pxa2x0_clkman_config(cken, 1);
   1045 	}
   1046 
   1047 #endif
   1048 }
   1049 #endif
   1050 
   1051 static void
   1052 gumstix_device_register(device_t dev, void *aux)
   1053 {
   1054 	prop_dictionary_t dict = device_properties(dev);
   1055 
   1056 	if (device_is_a(dev, "arma9tmr") ||
   1057 	    device_is_a(dev, "a9wdt")) {
   1058 		/*
   1059 		 * We need to tell the A9 Global/Watchdog Timer
   1060 		 * what frequency it runs at.
   1061 		 */
   1062 
   1063 		/*
   1064 		 * This clock always runs at (arm_clk div 2) and only goes
   1065 		 * to timers that are part of the A9 MP core subsystem.
   1066 		 */
   1067 		prop_dictionary_set_uint32(dict, "frequency",
   1068 		    curcpu()->ci_data.cpu_cc_freq / 2);
   1069 	}
   1070 	if (device_is_a(dev, "armperiph")) {
   1071 		if (device_is_a(device_parent(dev), "mainbus")) {
   1072 #if defined(OMAP2)
   1073 			/*
   1074 			 * XXX KLUDGE ALERT XXX
   1075 			 * The iot mainbus supplies is completely wrong since
   1076 			 * it scales addresses by 2.  The simpliest remedy is
   1077 			 * to replace with our bus space used for the armcore
   1078 			 * registers (which armperiph uses).
   1079 			 */
   1080 			struct mainbus_attach_args * const mb = aux;
   1081 			mb->mb_iot = &omap_bs_tag;
   1082 #endif
   1083 		}
   1084 	}
   1085 	if (device_is_a(dev, "ehci")) {
   1086 #if defined(OVERO)
   1087 		prop_dictionary_set_uint16(dict, "nports", 2);
   1088 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1089 		prop_dictionary_set_cstring(dict, "port0-mode", "none");
   1090 		prop_dictionary_set_int16(dict, "port0-gpio", -1);
   1091 		prop_dictionary_set_cstring(dict, "port1-mode", "phy");
   1092 		prop_dictionary_set_int16(dict, "port1-gpio", 183);
   1093 		prop_dictionary_set_bool(dict, "port1-gpioval", true);
   1094 #elif defined(DUOVERO)
   1095 		prop_dictionary_set_uint16(dict, "nports", 1);
   1096 		prop_dictionary_set_bool(dict, "phy-reset", true);
   1097 		prop_dictionary_set_cstring(dict, "port0-mode", "phy");
   1098 		prop_dictionary_set_int16(dict, "port0-gpio", 62);
   1099 		prop_dictionary_set_bool(dict, "port0-gpioval", false);
   1100 		prop_dictionary_set_bool(dict, "port0-extclk", true);
   1101 #endif
   1102 		prop_dictionary_set_uint16(dict, "dpll5-m", 443);
   1103 		prop_dictionary_set_uint16(dict, "dpll5-n", 11);
   1104 		prop_dictionary_set_uint16(dict, "dpll5-m2", 4);
   1105 	}
   1106 	if (device_is_a(dev, "ohci")) {
   1107 		if (prop_dictionary_set_bool(dict,
   1108 		    "Ganged-power-mask-on-port1", 1) == false) {
   1109 			printf("WARNING: unable to set power-mask for port1"
   1110 			    " property for %s\n", device_xname(dev));
   1111 		}
   1112 		if (prop_dictionary_set_bool(dict,
   1113 		    "Ganged-power-mask-on-port2", 1) == false) {
   1114 			printf("WARNING: unable to set power-mask for port2"
   1115 			    " property for %s\n", device_xname(dev));
   1116 		}
   1117 		if (prop_dictionary_set_bool(dict,
   1118 		    "Ganged-power-mask-on-port3", 1) == false) {
   1119 			printf("WARNING: unable to set power-mask for port3"
   1120 			    " property for %s\n", device_xname(dev));
   1121 		}
   1122 	}
   1123 	if (device_is_a(dev, "omapmputmr")) {
   1124 		struct obio_attach_args *obio = aux;
   1125 
   1126 		switch (obio->obio_addr) {
   1127 		case 0x49032000:	/* GPTIMER2 */
   1128 		case 0x49034000:	/* GPTIMER3 */
   1129 		case 0x49036000:	/* GPTIMER4 */
   1130 		case 0x49038000:	/* GPTIMER5 */
   1131 		case 0x4903a000:	/* GPTIMER6 */
   1132 		case 0x4903c000:	/* GPTIMER7 */
   1133 		case 0x4903e000:	/* GPTIMER8 */
   1134 		case 0x49040000:	/* GPTIMER9 */
   1135 #if defined(OVERO)
   1136 			{
   1137 			/* Ensure enable PRCM.CM_[FI]CLKEN_PER[3:10]. */
   1138 			const int en =
   1139 			    1 << (((obio->obio_addr >> 13) & 0x3f) - 0x16);
   1140 
   1141 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5000,
   1142 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5000) | en);
   1143 			ioreg_write(OVERO_L4_CORE_VBASE + 0x5010,
   1144 			    ioreg_read(OVERO_L4_CORE_VBASE + 0x5010) | en);
   1145 			}
   1146 #endif
   1147 			break;
   1148 		}
   1149 	}
   1150 	if (device_is_a(dev, "sdhc")) {
   1151 		bool dualvolt = false;
   1152 
   1153 #if defined(OVERO) || defined(DUOVERO)
   1154 		if (device_is_a(device_parent(dev), "obio")) {
   1155 			struct obio_attach_args *obio = aux;
   1156 
   1157 #if defined(OVERO)
   1158 			if (obio->obio_addr == SDMMC2_BASE_3530)
   1159 				dualvolt = true;
   1160 #elif defined(DUOVERO)
   1161 			if (obio->obio_addr == SDMMC5_BASE_4430)
   1162 				dualvolt = true;
   1163 #endif
   1164 		}
   1165 #endif
   1166 #if defined(PEPPER)
   1167 		if (device_is_a(device_parent(dev), "mainbus")) {
   1168 			struct mainbus_attach_args * const mb = aux;
   1169 
   1170 			if (mb->mb_iobase == SDMMC3_BASE_TIAM335X)
   1171 				dualvolt = true;
   1172 		}
   1173 #endif
   1174 		prop_dictionary_set_bool(dict, "dual-volt", dualvolt);
   1175 	}
   1176 	if (device_is_a(dev, "tifb")) {
   1177 		prop_data_t panel_info;
   1178 
   1179 		panel_info = prop_data_create_data_nocopy(tifb_panel_info,
   1180 		    sizeof(struct tifb_panel_info));
   1181 		KASSERT(panel_info != NULL);
   1182 		prop_dictionary_set(dict, "panel-info", panel_info);
   1183 		prop_object_release(panel_info);
   1184 
   1185 #if defined(OMAP2)
   1186 		/* enable LCD */
   1187 		omap2_gpio_ctl(59, GPIO_PIN_OUTPUT);
   1188 		omap2_gpio_write(59, 0);	/* reset */
   1189 		delay(100);
   1190 		omap2_gpio_write(59, 1);
   1191 #endif
   1192 	}
   1193 	if (device_is_a(dev, "tps65217pmic")) {
   1194 #if defined(TI_AM335X)
   1195 		extern const char *mpu_supply;
   1196 
   1197 		mpu_supply = "DCDC3";
   1198 #endif
   1199 
   1200 		if (use_tps65217_wled) {
   1201 			prop_dictionary_set_int32(dict, "isel", 1);
   1202 			prop_dictionary_set_int32(dict, "fdim", 200);
   1203 			prop_dictionary_set_int32(dict, "brightness", 80);
   1204 		}
   1205 	}
   1206 }
   1207