1 1.16 skrll /* $NetBSD: gumstix_start.S,v 1.16 2019/05/18 08:49:24 skrll Exp $ */ 2 1.1 kiyohara /* 3 1.1 kiyohara * Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation. 4 1.1 kiyohara * All rights reserved. 5 1.1 kiyohara * 6 1.1 kiyohara * Written by Takashi Kiyohara and Susumu Miki for WIDE Project and SOUM 7 1.1 kiyohara * Corporation. 8 1.1 kiyohara * 9 1.1 kiyohara * Redistribution and use in source and binary forms, with or without 10 1.1 kiyohara * modification, are permitted provided that the following conditions 11 1.1 kiyohara * are met: 12 1.1 kiyohara * 1. Redistributions of source code must retain the above copyright 13 1.1 kiyohara * notice, this list of conditions and the following disclaimer. 14 1.1 kiyohara * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 kiyohara * notice, this list of conditions and the following disclaimer in the 16 1.1 kiyohara * documentation and/or other materials provided with the distribution. 17 1.1 kiyohara * 3. Neither the name of the project nor the name of SOUM Corporation 18 1.1 kiyohara * may be used to endorse or promote products derived from this software 19 1.1 kiyohara * without specific prior written permission. 20 1.1 kiyohara * 21 1.1 kiyohara * THIS SOFTWARE IS PROVIDED BY THE PROJECT and SOUM CORPORATION ``AS IS'' 22 1.1 kiyohara * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 1.1 kiyohara * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 1.1 kiyohara * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE PROJECT AND SOUM CORPORATION 25 1.1 kiyohara * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 1.1 kiyohara * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 1.1 kiyohara * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 1.1 kiyohara * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 1.1 kiyohara * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 1.1 kiyohara * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 1.1 kiyohara * POSSIBILITY OF SUCH DAMAGE. 32 1.1 kiyohara */ 33 1.1 kiyohara /* 34 1.1 kiyohara * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved. 35 1.1 kiyohara * Written by Hiroyuki Bessho for Genetec Corporation. 36 1.1 kiyohara * 37 1.1 kiyohara * Redistribution and use in source and binary forms, with or without 38 1.1 kiyohara * modification, are permitted provided that the following conditions 39 1.1 kiyohara * are met: 40 1.1 kiyohara * 1. Redistributions of source code must retain the above copyright 41 1.1 kiyohara * notice, this list of conditions and the following disclaimer. 42 1.1 kiyohara * 2. Redistributions in binary form must reproduce the above copyright 43 1.1 kiyohara * notice, this list of conditions and the following disclaimer in the 44 1.1 kiyohara * documentation and/or other materials provided with the distribution. 45 1.4 kiyohara * 3. The name of Genetec Corporation may not be used to endorse or 46 1.1 kiyohara * promote products derived from this software without specific prior 47 1.1 kiyohara * written permission. 48 1.1 kiyohara * 49 1.1 kiyohara * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 50 1.1 kiyohara * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 51 1.1 kiyohara * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 52 1.1 kiyohara * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 53 1.1 kiyohara * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 54 1.1 kiyohara * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 55 1.1 kiyohara * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 56 1.1 kiyohara * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 57 1.1 kiyohara * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 58 1.1 kiyohara * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 59 1.1 kiyohara * POSSIBILITY OF SUCH DAMAGE. 60 1.1 kiyohara */ 61 1.1 kiyohara 62 1.7 kiyohara #include "opt_cputypes.h" 63 1.7 kiyohara #include "opt_gumstix.h" 64 1.14 kiyohara #include "opt_multiprocessor.h" 65 1.7 kiyohara 66 1.1 kiyohara #include <machine/asm.h> 67 1.1 kiyohara #include <arm/armreg.h> 68 1.9 matt #include "assym.h" 69 1.9 matt 70 1.14 kiyohara 71 1.16 skrll RCSID("$NetBSD: gumstix_start.S,v 1.16 2019/05/18 08:49:24 skrll Exp $") 72 1.1 kiyohara 73 1.1 kiyohara /* 74 1.1 kiyohara * CPWAIT -- Canonical method to wait for CP15 update. 75 1.1 kiyohara * NOTE: Clobbers the specified temp reg. 76 1.1 kiyohara * copied from arm/arm/cpufunc_asm_xscale.S 77 1.1 kiyohara * XXX: better be in a common header file. 78 1.1 kiyohara */ 79 1.14 kiyohara #if defined(CPU_XSCALE) 80 1.7 kiyohara #define CPWAIT_BRANCH \ 81 1.1 kiyohara sub pc, pc, #4 82 1.7 kiyohara #else 83 1.7 kiyohara #define CPWAIT_BRANCH 84 1.7 kiyohara #endif 85 1.1 kiyohara 86 1.7 kiyohara #define CPWAIT(tmp) \ 87 1.7 kiyohara mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ; \ 88 1.7 kiyohara mov tmp, tmp /* wait for it to complete */ ; \ 89 1.1 kiyohara CPWAIT_BRANCH /* branch to next insn */ 90 1.6 kiyohara 91 1.1 kiyohara /* 92 1.1 kiyohara * Kernel start routine for GUMSTIX 93 1.1 kiyohara * this code is excuted at the very first after the kernel is loaded 94 1.1 kiyohara * by U-Boot. 95 1.1 kiyohara */ 96 1.1 kiyohara .text 97 1.1 kiyohara 98 1.1 kiyohara .global _C_LABEL(gumstix_start) 99 1.1 kiyohara _C_LABEL(gumstix_start): 100 1.7 kiyohara /* 101 1.7 kiyohara * gumstix's loader is U-boot. it's running on RAM 102 1.7 kiyohara */ 103 1.7 kiyohara 104 1.7 kiyohara /* Our page table might be cached. Disable D-cache beforehand. */ 105 1.14 kiyohara mrc p15, 0, ip, c1, c0, 0 106 1.14 kiyohara bic ip, ip, #CPU_CONTROL_DC_ENABLE 107 1.14 kiyohara mcr p15, 0, ip, c1, c0, 0 108 1.7 kiyohara 109 1.1 kiyohara /* 110 1.1 kiyohara * Kernel is loaded in SDRAM (0xa0200000..), and is expected to run 111 1.16 skrll * in VA 0xc0200000.. 112 1.1 kiyohara */ 113 1.7 kiyohara 114 1.1 kiyohara /* save u-boot's args */ 115 1.16 skrll adr ip, uboot_args 116 1.1 kiyohara nop 117 1.1 kiyohara nop 118 1.1 kiyohara nop 119 1.14 kiyohara stmia ip!, {r0, r1, r2, r3} 120 1.1 kiyohara nop 121 1.1 kiyohara nop 122 1.1 kiyohara nop 123 1.1 kiyohara 124 1.14 kiyohara /* Calculate RAM size, like vendor's u-boot. */ 125 1.14 kiyohara adr ip, ram_size 126 1.14 kiyohara ldr r0, [ip] 127 1.14 kiyohara 128 1.7 kiyohara mrc p15, 0, r1, c0, c0, 0 129 1.7 kiyohara and r1, r1, #CPU_ID_XSCALE_COREGEN_MASK 130 1.7 kiyohara cmp r1, #0x4000 131 1.7 kiyohara bne 3f /* goto 3f, if basix or connex */ 132 1.6 kiyohara 0: 133 1.7 kiyohara /* check memory size, if verdex or verdex-pro */ 134 1.14 kiyohara add r3, ip, r0 135 1.6 kiyohara ldr r1, [r3] 136 1.6 kiyohara cmp r0, r1 137 1.6 kiyohara beq 2f 138 1.6 kiyohara 1: 139 1.7 kiyohara add r0, r0, r0 /* r0 <<= 1 */ 140 1.14 kiyohara str r0, [ip] 141 1.6 kiyohara b 0b 142 1.6 kiyohara 2: 143 1.7 kiyohara mvn r1, r1 /* r1 ^= 0xffffffff */ 144 1.6 kiyohara str r1, [r3] 145 1.14 kiyohara ldr r2, [ip] 146 1.6 kiyohara cmp r1, r2 147 1.6 kiyohara beq 3f 148 1.7 kiyohara str r0, [r3] /* restore */ 149 1.6 kiyohara b 1b 150 1.6 kiyohara 3: 151 1.14 kiyohara str r0, [ip] 152 1.6 kiyohara 153 1.7 kiyohara /* Build page table from scratch */ 154 1.7 kiyohara ldr r0, Lstartup_pagetable /* pagetable */ 155 1.14 kiyohara adr ip, mmu_init_table 156 1.6 kiyohara b 5f 157 1.1 kiyohara 158 1.6 kiyohara 4: 159 1.10 matt str r3, [r0, r2, lsl #2] 160 1.10 matt add r2, r2, #1 161 1.1 kiyohara add r3, r3, #(L1_S_SIZE) 162 1.1 kiyohara adds r1, r1, #-1 163 1.6 kiyohara bhi 4b 164 1.6 kiyohara 5: 165 1.14 kiyohara ldmia ip!, {r1, r2, r3} /* # of sections, PA|attr, VA */ 166 1.10 matt lsr r2, r2, #L1_S_SHIFT 167 1.1 kiyohara cmp r1, #0 168 1.6 kiyohara bne 4b 169 1.1 kiyohara 170 1.15 skrll mov r1, r0 171 1.14 kiyohara mcr p15, 0, r1, c2, c0, 0 /* Set TTB */ 172 1.14 kiyohara mcr p15, 0, r1, c8, c7, 0 /* Flush TLB */ 173 1.13 kiyohara 174 1.7 kiyohara /* 175 1.7 kiyohara * Set the Domain Access register. Very important! 176 1.7 kiyohara * startup_pagetable puts to domain 0 now. 177 1.7 kiyohara */ 178 1.7 kiyohara #define KERNEL_DOMAIN(x) ((x) << (PMAP_DOMAIN_KERNEL << 1)) 179 1.14 kiyohara mov r1, #(KERNEL_DOMAIN(DOMAIN_CLIENT) | DOMAIN_CLIENT) 180 1.14 kiyohara mcr p15, 0, r1, c3, c0, 0 181 1.1 kiyohara 182 1.7 kiyohara /* Enable MMU and etc. */ 183 1.14 kiyohara mrc p15, 0, r1, c1, c0, 0 184 1.7 kiyohara #if defined(CPU_XSCALE_PXA250) || defined(CPU_XSCALE_PXA270) 185 1.14 kiyohara orr r1, r1, #CPU_CONTROL_SYST_ENABLE 186 1.7 kiyohara #endif 187 1.14 kiyohara orr r1, r1, #CPU_CONTROL_MMU_ENABLE 188 1.14 kiyohara mcr p15, 0, r1, c1, c0, 0 189 1.7 kiyohara /* 190 1.7 kiyohara * Ensure that the coprocessor has finished turning on the MMU. 191 1.7 kiyohara */ 192 1.14 kiyohara CPWAIT(r3) 193 1.14 kiyohara 194 1.1 kiyohara 195 1.1 kiyohara /* Jump to kernel code in TRUE VA */ 196 1.10 matt ldr r0, Lstart 197 1.10 matt bx r0 198 1.1 kiyohara 199 1.1 kiyohara Lstart: 200 1.1 kiyohara .word start 201 1.1 kiyohara 202 1.14 kiyohara 203 1.16 skrll .globl _C_LABEL(uboot_args) 204 1.16 skrll uboot_args: 205 1.14 kiyohara .space 16 /* r0, r1, r2, r3 */ 206 1.14 kiyohara 207 1.14 kiyohara .globl _C_LABEL(ram_size) 208 1.14 kiyohara ram_size: 209 1.14 kiyohara .word 0x04000000 /* 64Mbyte */ 210 1.14 kiyohara 211 1.14 kiyohara 212 1.1 kiyohara #ifndef STARTUP_PAGETABLE_ADDR 213 1.1 kiyohara #define STARTUP_PAGETABLE_ADDR 0xa0000000 /* aligned 16kByte */ 214 1.1 kiyohara #endif 215 1.2 kiyohara Lstartup_pagetable: 216 1.2 kiyohara .word STARTUP_PAGETABLE_ADDR 217 1.2 kiyohara 218 1.2 kiyohara 219 1.7 kiyohara #define MMU_INIT(va, pa, n_sec, attr) \ 220 1.7 kiyohara .word n_sec ; \ 221 1.10 matt .word (va) ; \ 222 1.7 kiyohara .word (pa) | (attr) ; 223 1.3 kiyohara 224 1.6 kiyohara mmu_init_table: 225 1.14 kiyohara 226 1.1 kiyohara /* fill all table VA==PA */ 227 1.1 kiyohara MMU_INIT(0x00000000, 0x00000000, 228 1.9 matt 1 << (32 - L1_S_SHIFT), L1_S_PROTO | L1_S_AP_KRW) 229 1.7 kiyohara 230 1.7 kiyohara #define SDRAM_START 0xa0000000 231 1.3 kiyohara 232 1.7 kiyohara /* map SDRAM VA==PA, write-back cacheable (first 64M only)*/ 233 1.3 kiyohara MMU_INIT(SDRAM_START, SDRAM_START, 234 1.9 matt 64, L1_S_PROTO | L1_S_C | L1_S_AP_KRW) 235 1.3 kiyohara 236 1.1 kiyohara /* map VA 0xc0000000..0xc3ffffff to PA 0xa0000000..0xa3ffffff */ 237 1.3 kiyohara MMU_INIT(0xc0000000, SDRAM_START, 238 1.9 matt 64, L1_S_PROTO | L1_S_C | L1_S_AP_KRW) 239 1.7 kiyohara 240 1.1 kiyohara 241 1.7 kiyohara MMU_INIT(0, 0, 0, 0) /* end of table */ 242 1.14 kiyohara 243 1.14 kiyohara #undef MMU_INIT 244 1.14 kiyohara 245