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      1  1.15     skrll /*	$NetBSD: ifpga_io.c,v 1.15 2023/04/21 14:58:34 skrll Exp $ */
      2   1.1  rearnsha 
      3   1.1  rearnsha /*
      4   1.1  rearnsha  * Copyright (c) 1997 Causality Limited
      5   1.1  rearnsha  * Copyright (c) 1997 Mark Brinicombe.
      6   1.1  rearnsha  * All rights reserved.
      7   1.1  rearnsha  *
      8   1.1  rearnsha  * Redistribution and use in source and binary forms, with or without
      9   1.1  rearnsha  * modification, are permitted provided that the following conditions
     10   1.1  rearnsha  * are met:
     11   1.1  rearnsha  * 1. Redistributions of source code must retain the above copyright
     12   1.1  rearnsha  *    notice, this list of conditions and the following disclaimer.
     13   1.1  rearnsha  * 2. Redistributions in binary form must reproduce the above copyright
     14   1.1  rearnsha  *    notice, this list of conditions and the following disclaimer in the
     15   1.1  rearnsha  *    documentation and/or other materials provided with the distribution.
     16   1.1  rearnsha  * 3. All advertising materials mentioning features or use of this software
     17   1.1  rearnsha  *    must display the following acknowledgement:
     18   1.1  rearnsha  *	This product includes software developed by Mark Brinicombe
     19   1.1  rearnsha  *	for the NetBSD Project.
     20   1.1  rearnsha  * 4. The name of the company nor the name of the author may be used to
     21   1.1  rearnsha  *    endorse or promote products derived from this software without specific
     22   1.1  rearnsha  *    prior written permission.
     23   1.1  rearnsha  *
     24   1.1  rearnsha  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     25   1.1  rearnsha  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     26   1.1  rearnsha  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27   1.1  rearnsha  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     28   1.1  rearnsha  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     29   1.1  rearnsha  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     30   1.1  rearnsha  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31   1.1  rearnsha  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32   1.1  rearnsha  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33   1.1  rearnsha  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34   1.1  rearnsha  * SUCH DAMAGE.
     35  1.15     skrll  *
     36   1.1  rearnsha  * From arm/footbridge/footbridge_io.c
     37   1.1  rearnsha  */
     38   1.1  rearnsha 
     39   1.1  rearnsha /*
     40   1.1  rearnsha  * bus_space I/O functions for IFPGA
     41   1.1  rearnsha  */
     42   1.6     lukem 
     43   1.6     lukem #include <sys/cdefs.h>
     44  1.15     skrll __KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v 1.15 2023/04/21 14:58:34 skrll Exp $");
     45   1.1  rearnsha 
     46   1.1  rearnsha #include <sys/param.h>
     47   1.1  rearnsha #include <sys/systm.h>
     48  1.10    dyoung #include <sys/bus.h>
     49   1.1  rearnsha #include <uvm/uvm_extern.h>
     50   1.4   thorpej 
     51   1.4   thorpej #include <evbarm/ifpga/ifpgavar.h>
     52  1.12     skrll #include <evbarm/ifpga/ifpgamem.h>
     53   1.1  rearnsha 
     54   1.1  rearnsha /* Proto types for all the bus_space structure functions */
     55   1.1  rearnsha 
     56   1.1  rearnsha bs_protos(ifpga);
     57   1.2   thorpej bs_protos(generic);
     58   1.2   thorpej bs_protos(generic_armv4);
     59   1.1  rearnsha bs_protos(bs_notimpl);
     60   1.1  rearnsha bs_map_proto(ifpga_mem);
     61   1.1  rearnsha bs_unmap_proto(ifpga_mem);
     62   1.1  rearnsha 
     63   1.1  rearnsha /* Declare the ifpga bus space tag */
     64   1.1  rearnsha 
     65   1.1  rearnsha struct bus_space ifpga_bs_tag = {
     66   1.1  rearnsha 	/* cookie */
     67  1.13       ryo 	.bs_cookie = (void *) 0,		/* Physical base address */
     68   1.1  rearnsha 
     69   1.1  rearnsha 	/* mapping/unmapping */
     70  1.13       ryo 	.bs_map = ifpga_bs_map,
     71  1.13       ryo 	.bs_unmap = ifpga_bs_unmap,
     72  1.13       ryo 	.bs_subregion = ifpga_bs_subregion,
     73   1.1  rearnsha 
     74   1.1  rearnsha 	/* allocation/deallocation */
     75  1.13       ryo 	.bs_alloc = ifpga_bs_alloc,
     76  1.13       ryo 	.bs_free = ifpga_bs_free,
     77   1.1  rearnsha 
     78   1.1  rearnsha 	/* get kernel virtual address */
     79  1.13       ryo 	.bs_vaddr = ifpga_bs_vaddr,
     80   1.1  rearnsha 
     81   1.1  rearnsha 	/* mmap */
     82  1.13       ryo 	.bs_mmap = bs_notimpl_bs_mmap,
     83   1.1  rearnsha 
     84   1.1  rearnsha 	/* barrier */
     85  1.13       ryo 	.bs_barrier = ifpga_bs_barrier,
     86   1.1  rearnsha 
     87   1.1  rearnsha 	/* read (single) */
     88  1.13       ryo 	.bs_r_1 = generic_bs_r_1,
     89  1.13       ryo 	.bs_r_2 = generic_armv4_bs_r_2,
     90  1.13       ryo 	.bs_r_4 = generic_bs_r_4,
     91  1.13       ryo 	.bs_r_8 = bs_notimpl_bs_r_8,
     92   1.1  rearnsha 
     93   1.1  rearnsha 	/* read multiple */
     94  1.13       ryo 	.bs_rm_1 = generic_bs_rm_1,
     95  1.13       ryo 	.bs_rm_2 = generic_armv4_bs_rm_2,
     96  1.13       ryo 	.bs_rm_4 = generic_bs_rm_4,
     97  1.13       ryo 	.bs_rm_8 = bs_notimpl_bs_rm_8,
     98   1.1  rearnsha 
     99   1.1  rearnsha 	/* read region */
    100  1.13       ryo 	.bs_rr_1 = bs_notimpl_bs_rr_1,
    101  1.13       ryo 	.bs_rr_2 = generic_armv4_bs_rr_2,
    102  1.13       ryo 	.bs_rr_4 = generic_bs_rr_4,
    103  1.13       ryo 	.bs_rr_8 = bs_notimpl_bs_rr_8,
    104   1.1  rearnsha 
    105   1.1  rearnsha 	/* write (single) */
    106  1.13       ryo 	.bs_w_1 = generic_bs_w_1,
    107  1.13       ryo 	.bs_w_2 = generic_armv4_bs_w_2,
    108  1.13       ryo 	.bs_w_4 = generic_bs_w_4,
    109  1.13       ryo 	.bs_w_8 = bs_notimpl_bs_w_8,
    110   1.1  rearnsha 
    111   1.1  rearnsha 	/* write multiple */
    112  1.13       ryo 	.bs_wm_1 = generic_bs_wm_1,
    113  1.13       ryo 	.bs_wm_2 = generic_armv4_bs_wm_2,
    114  1.13       ryo 	.bs_wm_4 = generic_bs_wm_4,
    115  1.13       ryo 	.bs_wm_8 = bs_notimpl_bs_wm_8,
    116   1.1  rearnsha 
    117   1.1  rearnsha 	/* write region */
    118  1.13       ryo 	.bs_wr_1 = bs_notimpl_bs_wr_1,
    119  1.13       ryo 	.bs_wr_2 = generic_armv4_bs_wr_2,
    120  1.13       ryo 	.bs_wr_4 = generic_bs_wr_4,
    121  1.13       ryo 	.bs_wr_8 = bs_notimpl_bs_wr_8,
    122   1.1  rearnsha 
    123   1.1  rearnsha 	/* set multiple */
    124  1.13       ryo 	.bs_sm_1 = bs_notimpl_bs_sm_1,
    125  1.13       ryo 	.bs_sm_2 = bs_notimpl_bs_sm_2,
    126  1.13       ryo 	.bs_sm_4 = bs_notimpl_bs_sm_4,
    127  1.13       ryo 	.bs_sm_8 = bs_notimpl_bs_sm_8,
    128   1.1  rearnsha 
    129   1.1  rearnsha 	/* set region */
    130  1.13       ryo 	.bs_sr_1 = bs_notimpl_bs_sr_1,
    131  1.13       ryo 	.bs_sr_2 = generic_armv4_bs_sr_2,
    132  1.13       ryo 	.bs_sr_4 = bs_notimpl_bs_sr_4,
    133  1.13       ryo 	.bs_sr_8 = bs_notimpl_bs_sr_8,
    134   1.1  rearnsha 
    135   1.1  rearnsha 	/* copy */
    136  1.13       ryo 	.bs_c_1 = bs_notimpl_bs_c_1,
    137  1.13       ryo 	.bs_c_2 = generic_armv4_bs_c_2,
    138  1.13       ryo 	.bs_c_4 = bs_notimpl_bs_c_4,
    139  1.13       ryo 	.bs_c_8 = bs_notimpl_bs_c_8,
    140   1.1  rearnsha };
    141   1.1  rearnsha 
    142  1.12     skrll /* This is a preinitialized version of ifpga_bs_tag */
    143  1.12     skrll 
    144  1.12     skrll struct bus_space ifpga_common_bs_tag = {
    145  1.12     skrll 	/* cookie */
    146  1.13       ryo 	.bs_cookie = (void *) IFPGA_IO_BASE,	/* Physical base address */
    147  1.12     skrll 
    148  1.12     skrll 	/* mapping/unmapping */
    149  1.13       ryo 	.bs_map = ifpga_mem_bs_map,
    150  1.13       ryo 	.bs_unmap = ifpga_mem_bs_unmap,
    151  1.13       ryo 	.bs_subregion = ifpga_bs_subregion,
    152  1.12     skrll 
    153  1.12     skrll 	/* allocation/deallocation */
    154  1.13       ryo 	.bs_alloc = ifpga_bs_alloc,
    155  1.13       ryo 	.bs_free = ifpga_bs_free,
    156  1.12     skrll 
    157  1.12     skrll 	/* get kernel virtual address */
    158  1.13       ryo 	.bs_vaddr = ifpga_bs_vaddr,
    159  1.12     skrll 
    160  1.12     skrll 	/* mmap */
    161  1.13       ryo 	.bs_mmap = bs_notimpl_bs_mmap,
    162  1.12     skrll 
    163  1.12     skrll 	/* barrier */
    164  1.13       ryo 	.bs_barrier = ifpga_bs_barrier,
    165  1.12     skrll 
    166  1.12     skrll 	/* read (single) */
    167  1.13       ryo 	.bs_r_1 = generic_bs_r_1,
    168  1.13       ryo 	.bs_r_2 = generic_armv4_bs_r_2,
    169  1.13       ryo 	.bs_r_4 = generic_bs_r_4,
    170  1.13       ryo 	.bs_r_8 = bs_notimpl_bs_r_8,
    171  1.12     skrll 
    172  1.12     skrll 	/* read multiple */
    173  1.13       ryo 	.bs_rm_1 = generic_bs_rm_1,
    174  1.13       ryo 	.bs_rm_2 = generic_armv4_bs_rm_2,
    175  1.13       ryo 	.bs_rm_4 = generic_bs_rm_4,
    176  1.13       ryo 	.bs_rm_8 = bs_notimpl_bs_rm_8,
    177  1.12     skrll 
    178  1.12     skrll 	/* read region */
    179  1.13       ryo 	.bs_rr_1 = bs_notimpl_bs_rr_1,
    180  1.13       ryo 	.bs_rr_2 = generic_armv4_bs_rr_2,
    181  1.13       ryo 	.bs_rr_4 = generic_bs_rr_4,
    182  1.13       ryo 	.bs_rr_8 = bs_notimpl_bs_rr_8,
    183  1.12     skrll 
    184  1.12     skrll 	/* write (single) */
    185  1.13       ryo 	.bs_w_1 = generic_bs_w_1,
    186  1.13       ryo 	.bs_w_2 = generic_armv4_bs_w_2,
    187  1.13       ryo 	.bs_w_4 = generic_bs_w_4,
    188  1.13       ryo 	.bs_w_8 = bs_notimpl_bs_w_8,
    189  1.12     skrll 
    190  1.12     skrll 	/* write multiple */
    191  1.13       ryo 	.bs_wm_1 = generic_bs_wm_1,
    192  1.13       ryo 	.bs_wm_2 = generic_armv4_bs_wm_2,
    193  1.13       ryo 	.bs_wm_4 = generic_bs_wm_4,
    194  1.13       ryo 	.bs_wm_8 = bs_notimpl_bs_wm_8,
    195  1.12     skrll 
    196  1.12     skrll 	/* write region */
    197  1.13       ryo 	.bs_wr_1 = bs_notimpl_bs_wr_1,
    198  1.13       ryo 	.bs_wr_2 = generic_armv4_bs_wr_2,
    199  1.13       ryo 	.bs_wr_4 = generic_bs_wr_4,
    200  1.13       ryo 	.bs_wr_8 = bs_notimpl_bs_wr_8,
    201  1.12     skrll 
    202  1.12     skrll 	/* set multiple */
    203  1.13       ryo 	.bs_sm_1 = bs_notimpl_bs_sm_1,
    204  1.13       ryo 	.bs_sm_2 = bs_notimpl_bs_sm_2,
    205  1.13       ryo 	.bs_sm_4 = bs_notimpl_bs_sm_4,
    206  1.13       ryo 	.bs_sm_8 = bs_notimpl_bs_sm_8,
    207  1.12     skrll 
    208  1.12     skrll 	/* set region */
    209  1.13       ryo 	.bs_sr_1 = bs_notimpl_bs_sr_1,
    210  1.13       ryo 	.bs_sr_2 = generic_armv4_bs_sr_2,
    211  1.13       ryo 	.bs_sr_4 = bs_notimpl_bs_sr_4,
    212  1.13       ryo 	.bs_sr_8 = bs_notimpl_bs_sr_8,
    213  1.12     skrll 
    214  1.12     skrll 	/* copy */
    215  1.13       ryo 	.bs_c_1 = bs_notimpl_bs_c_1,
    216  1.13       ryo 	.bs_c_2 = generic_armv4_bs_c_2,
    217  1.13       ryo 	.bs_c_4 = bs_notimpl_bs_c_4,
    218  1.13       ryo 	.bs_c_8 = bs_notimpl_bs_c_8,
    219  1.12     skrll };
    220  1.12     skrll 
    221  1.11      matt void
    222  1.11      matt ifpga_create_io_bs_tag(struct bus_space *t, void *cookie)
    223   1.1  rearnsha {
    224   1.1  rearnsha 	*t = ifpga_bs_tag;
    225   1.1  rearnsha 	t->bs_cookie = cookie;
    226   1.1  rearnsha }
    227   1.1  rearnsha 
    228  1.11      matt void
    229  1.11      matt ifpga_create_mem_bs_tag(struct bus_space *t, void *cookie)
    230   1.1  rearnsha {
    231   1.1  rearnsha 	*t = ifpga_bs_tag;
    232   1.1  rearnsha 	t->bs_map = ifpga_mem_bs_map;
    233   1.1  rearnsha 	t->bs_unmap = ifpga_mem_bs_unmap;
    234   1.1  rearnsha 	t->bs_cookie = cookie;
    235   1.1  rearnsha }
    236   1.1  rearnsha 
    237   1.1  rearnsha /* bus space functions */
    238   1.1  rearnsha 
    239   1.1  rearnsha int
    240   1.9       dsl ifpga_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
    241   1.1  rearnsha {
    242  1.12     skrll 	/* The cookie is the base address for the I/O area */
    243  1.12     skrll 	*bshp = bpa + (bus_addr_t)t;
    244   1.1  rearnsha 	return 0;
    245   1.1  rearnsha }
    246   1.1  rearnsha 
    247   1.1  rearnsha int
    248   1.9       dsl ifpga_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable, bus_space_handle_t *bshp)
    249   1.1  rearnsha {
    250   1.1  rearnsha 	bus_addr_t startpa, endpa;
    251   1.1  rearnsha 	vaddr_t va;
    252  1.12     skrll 	const struct pmap_devmap *pd;
    253  1.12     skrll 	bus_addr_t pa = bpa + (bus_addr_t) t;
    254  1.12     skrll 
    255  1.12     skrll 	if ((pd = pmap_devmap_find_pa(pa, size)) != NULL) {
    256  1.12     skrll 		/* Device was statically mapped. */
    257  1.12     skrll 		*bshp = pd->pd_va + (pa - pd->pd_pa);
    258  1.12     skrll 		return 0;
    259  1.12     skrll 	}
    260   1.1  rearnsha 
    261  1.14    andvar 	/* Round the allocation to page boundaries */
    262   1.1  rearnsha 	startpa = trunc_page(bpa);
    263   1.1  rearnsha 	endpa = round_page(bpa + size);
    264   1.1  rearnsha 
    265   1.1  rearnsha 	/* Get some VM.  */
    266   1.8      yamt 	va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
    267   1.8      yamt 	    UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
    268   1.1  rearnsha 	if (va == 0)
    269   1.1  rearnsha 		return ENOMEM;
    270   1.1  rearnsha 
    271   1.1  rearnsha 	/* Store the bus space handle */
    272   1.1  rearnsha 	*bshp = va + (bpa & PGOFSET);
    273   1.1  rearnsha 
    274   1.1  rearnsha 	/* Now map the pages */
    275   1.1  rearnsha 	/* The cookie is the physical base address for the I/O area */
    276   1.1  rearnsha 	while (startpa < endpa) {
    277  1.15     skrll 		/* XXX pmap_kenter_pa maps pages cacheable -- not what
    278   1.1  rearnsha 		   we want.  */
    279   1.1  rearnsha 		pmap_enter(pmap_kernel(), va, (bus_addr_t)t + startpa,
    280   1.1  rearnsha 			   VM_PROT_READ | VM_PROT_WRITE, 0);
    281   1.5   thorpej 		va += PAGE_SIZE;
    282   1.5   thorpej 		startpa += PAGE_SIZE;
    283   1.1  rearnsha 	}
    284   1.1  rearnsha 	pmap_update(pmap_kernel());
    285   1.1  rearnsha 
    286   1.1  rearnsha 	return 0;
    287   1.1  rearnsha }
    288   1.1  rearnsha 
    289   1.1  rearnsha int
    290  1.11      matt ifpga_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
    291  1.11      matt 	bus_size_t alignment, bus_size_t boundary, int cacheable,
    292  1.11      matt 	bus_addr_t *bpap, bus_space_handle_t *bshp)
    293   1.1  rearnsha {
    294   1.3    provos 	panic("ifpga_alloc(): Help!");
    295   1.1  rearnsha }
    296   1.1  rearnsha 
    297   1.1  rearnsha 
    298   1.1  rearnsha void
    299   1.9       dsl ifpga_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
    300   1.1  rearnsha {
    301   1.1  rearnsha 	/* Nothing to do for an io map.  */
    302   1.1  rearnsha }
    303   1.1  rearnsha 
    304   1.1  rearnsha void
    305   1.9       dsl ifpga_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
    306   1.1  rearnsha {
    307   1.1  rearnsha 	vaddr_t startva, endva;
    308   1.1  rearnsha 
    309  1.12     skrll 	if (pmap_devmap_find_va(bsh, size) != NULL) {
    310  1.12     skrll 		/* Device was statically mapped; nothing to do. */
    311  1.12     skrll 		return;
    312  1.12     skrll 	}
    313  1.12     skrll 
    314   1.1  rearnsha 	startva = trunc_page(bsh);
    315   1.1  rearnsha 	endva = round_page(bsh + size);
    316   1.1  rearnsha 
    317   1.7      yamt 	pmap_remove(pmap_kernel(), startva, endva);
    318   1.7      yamt 	pmap_update(pmap_kernel());
    319   1.7      yamt 	uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY);
    320   1.1  rearnsha }
    321   1.1  rearnsha 
    322  1.15     skrll void
    323   1.9       dsl ifpga_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
    324   1.1  rearnsha {
    325   1.1  rearnsha 
    326   1.3    provos 	panic("ifpga_free(): Help!");
    327   1.1  rearnsha 	/* ifpga_bs_unmap() does all that we need to do. */
    328   1.1  rearnsha /*	ifpga_bs_unmap(t, bsh, size);*/
    329   1.1  rearnsha }
    330   1.1  rearnsha 
    331   1.1  rearnsha int
    332   1.9       dsl ifpga_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
    333   1.1  rearnsha {
    334   1.1  rearnsha 
    335   1.1  rearnsha 	*nbshp = bsh + (offset << ((int)t));
    336   1.1  rearnsha 	return (0);
    337   1.1  rearnsha }
    338   1.1  rearnsha 
    339   1.1  rearnsha void *
    340   1.9       dsl ifpga_bs_vaddr(void *t, bus_space_handle_t bsh)
    341   1.1  rearnsha {
    342   1.1  rearnsha 
    343   1.1  rearnsha 	return ((void *)bsh);
    344   1.1  rearnsha }
    345   1.1  rearnsha 
    346   1.1  rearnsha void
    347   1.9       dsl ifpga_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags)
    348   1.1  rearnsha {
    349  1.15     skrll }
    350