ifpga_io.c revision 1.1.4.2 1 /* $NetBSD: ifpga_io.c,v 1.1.4.2 2002/01/10 19:42:05 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1997 Causality Limited
5 * Copyright (c) 1997 Mark Brinicombe.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * From arm/footbridge/footbridge_io.c
37 */
38
39 /*
40 * bus_space I/O functions for IFPGA
41 */
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <machine/bus.h>
46 #include <uvm/uvm_extern.h>
47
48 /* Proto types for all the bus_space structure functions */
49
50 bs_protos(ifpga);
51 bs_protos(bs_notimpl);
52 bs_map_proto(ifpga_mem);
53 bs_unmap_proto(ifpga_mem);
54
55 /* Declare the ifpga bus space tag */
56
57 struct bus_space ifpga_bs_tag = {
58 /* cookie */
59 (void *) 0, /* Physical base address */
60
61 /* mapping/unmapping */
62 ifpga_bs_map,
63 ifpga_bs_unmap,
64 ifpga_bs_subregion,
65
66 /* allocation/deallocation */
67 ifpga_bs_alloc,
68 ifpga_bs_free,
69
70 /* get kernel virtual address */
71 ifpga_bs_vaddr,
72
73 /* mmap */
74 bs_notimpl_bs_mmap,
75
76 /* barrier */
77 ifpga_bs_barrier,
78
79 /* read (single) */
80 ifpga_bs_r_1,
81 ifpga_bs_r_2,
82 ifpga_bs_r_4,
83 bs_notimpl_bs_r_8,
84
85 /* read multiple */
86 ifpga_bs_rm_1,
87 ifpga_bs_rm_2,
88 ifpga_bs_rm_4,
89 bs_notimpl_bs_rm_8,
90
91 /* read region */
92 bs_notimpl_bs_rr_1,
93 ifpga_bs_rr_2,
94 ifpga_bs_rr_4,
95 bs_notimpl_bs_rr_8,
96
97 /* write (single) */
98 ifpga_bs_w_1,
99 ifpga_bs_w_2,
100 ifpga_bs_w_4,
101 bs_notimpl_bs_w_8,
102
103 /* write multiple */
104 ifpga_bs_wm_1,
105 ifpga_bs_wm_2,
106 ifpga_bs_wm_4,
107 bs_notimpl_bs_wm_8,
108
109 /* write region */
110 bs_notimpl_bs_wr_1,
111 ifpga_bs_wr_2,
112 ifpga_bs_wr_4,
113 bs_notimpl_bs_wr_8,
114
115 /* set multiple */
116 bs_notimpl_bs_sm_1,
117 bs_notimpl_bs_sm_2,
118 bs_notimpl_bs_sm_4,
119 bs_notimpl_bs_sm_8,
120
121 /* set region */
122 bs_notimpl_bs_sr_1,
123 ifpga_bs_sr_2,
124 bs_notimpl_bs_sr_4,
125 bs_notimpl_bs_sr_8,
126
127 /* copy */
128 bs_notimpl_bs_c_1,
129 ifpga_bs_c_2,
130 bs_notimpl_bs_c_4,
131 bs_notimpl_bs_c_8,
132 };
133
134 void ifpga_create_io_bs_tag(t, cookie)
135 struct bus_space *t;
136 void *cookie;
137 {
138 *t = ifpga_bs_tag;
139 t->bs_cookie = cookie;
140 }
141
142 void ifpga_create_mem_bs_tag(t, cookie)
143 struct bus_space *t;
144 void *cookie;
145 {
146 *t = ifpga_bs_tag;
147 t->bs_map = ifpga_mem_bs_map;
148 t->bs_unmap = ifpga_mem_bs_unmap;
149 t->bs_cookie = cookie;
150 }
151
152 /* bus space functions */
153
154 int
155 ifpga_bs_map(t, bpa, size, cacheable, bshp)
156 void *t;
157 bus_addr_t bpa;
158 bus_size_t size;
159 int cacheable;
160 bus_space_handle_t *bshp;
161 {
162 /* The cookie is the base address for the I/O area */
163 *bshp = bpa + (bus_addr_t)t;
164 return 0;
165 }
166
167 int
168 ifpga_mem_bs_map(t, bpa, size, cacheable, bshp)
169 void *t;
170 bus_addr_t bpa;
171 bus_size_t size;
172 int cacheable;
173 bus_space_handle_t *bshp;
174 {
175 bus_addr_t startpa, endpa;
176 vaddr_t va;
177
178 /* Round the allocation to page boundries */
179 startpa = trunc_page(bpa);
180 endpa = round_page(bpa + size);
181
182 /* Get some VM. */
183 va = uvm_km_valloc(kernel_map, endpa - startpa);
184 if (va == 0)
185 return ENOMEM;
186
187 /* Store the bus space handle */
188 *bshp = va + (bpa & PGOFSET);
189
190 /* Now map the pages */
191 /* The cookie is the physical base address for the I/O area */
192 while (startpa < endpa) {
193 /* XXX pmap_kenter_pa maps pages cacheable -- not what
194 we want. */
195 pmap_enter(pmap_kernel(), va, (bus_addr_t)t + startpa,
196 VM_PROT_READ | VM_PROT_WRITE, 0);
197 va += NBPG;
198 startpa += NBPG;
199 }
200 pmap_update(pmap_kernel());
201
202 return 0;
203 }
204
205 int
206 ifpga_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
207 bpap, bshp)
208 void *t;
209 bus_addr_t rstart, rend;
210 bus_size_t size, alignment, boundary;
211 int cacheable;
212 bus_addr_t *bpap;
213 bus_space_handle_t *bshp;
214 {
215 panic("ifpga_alloc(): Help!\n");
216 }
217
218
219 void
220 ifpga_bs_unmap(t, bsh, size)
221 void *t;
222 bus_space_handle_t bsh;
223 bus_size_t size;
224 {
225 /* Nothing to do for an io map. */
226 }
227
228 void
229 ifpga_mem_bs_unmap(t, bsh, size)
230 void *t;
231 bus_space_handle_t bsh;
232 bus_size_t size;
233 {
234 vaddr_t startva, endva;
235
236 startva = trunc_page(bsh);
237 endva = round_page(bsh + size);
238
239 uvm_km_free(kernel_map, startva, endva - startva);
240 }
241
242 void
243 ifpga_bs_free(t, bsh, size)
244 void *t;
245 bus_space_handle_t bsh;
246 bus_size_t size;
247 {
248
249 panic("ifpga_free(): Help!\n");
250 /* ifpga_bs_unmap() does all that we need to do. */
251 /* ifpga_bs_unmap(t, bsh, size);*/
252 }
253
254 int
255 ifpga_bs_subregion(t, bsh, offset, size, nbshp)
256 void *t;
257 bus_space_handle_t bsh;
258 bus_size_t offset, size;
259 bus_space_handle_t *nbshp;
260 {
261
262 *nbshp = bsh + (offset << ((int)t));
263 return (0);
264 }
265
266 void *
267 ifpga_bs_vaddr(t, bsh)
268 void *t;
269 bus_space_handle_t bsh;
270 {
271
272 return ((void *)bsh);
273 }
274
275 void
276 ifpga_bs_barrier(t, bsh, offset, len, flags)
277 void *t;
278 bus_space_handle_t bsh;
279 bus_size_t offset, len;
280 int flags;
281 {
282 }
283