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ifpga_io.c revision 1.1.4.3
      1 /*	$NetBSD: ifpga_io.c,v 1.1.4.3 2002/06/23 17:35:39 jdolecek Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1997 Causality Limited
      5  * Copyright (c) 1997 Mark Brinicombe.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Mark Brinicombe
     19  *	for the NetBSD Project.
     20  * 4. The name of the company nor the name of the author may be used to
     21  *    endorse or promote products derived from this software without specific
     22  *    prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  * From arm/footbridge/footbridge_io.c
     37  */
     38 
     39 /*
     40  * bus_space I/O functions for IFPGA
     41  */
     42 
     43 #include <sys/param.h>
     44 #include <sys/systm.h>
     45 #include <machine/bus.h>
     46 #include <uvm/uvm_extern.h>
     47 
     48 /* Proto types for all the bus_space structure functions */
     49 
     50 bs_protos(ifpga);
     51 bs_protos(generic);
     52 bs_protos(generic_armv4);
     53 bs_protos(bs_notimpl);
     54 bs_map_proto(ifpga_mem);
     55 bs_unmap_proto(ifpga_mem);
     56 
     57 /* Declare the ifpga bus space tag */
     58 
     59 struct bus_space ifpga_bs_tag = {
     60 	/* cookie */
     61 	(void *) 0,			/* Physical base address */
     62 
     63 	/* mapping/unmapping */
     64 	ifpga_bs_map,
     65 	ifpga_bs_unmap,
     66 	ifpga_bs_subregion,
     67 
     68 	/* allocation/deallocation */
     69 	ifpga_bs_alloc,
     70 	ifpga_bs_free,
     71 
     72 	/* get kernel virtual address */
     73 	ifpga_bs_vaddr,
     74 
     75 	/* mmap */
     76 	bs_notimpl_bs_mmap,
     77 
     78 	/* barrier */
     79 	ifpga_bs_barrier,
     80 
     81 	/* read (single) */
     82 	generic_bs_r_1,
     83 	generic_armv4_bs_r_2,
     84 	generic_bs_r_4,
     85 	bs_notimpl_bs_r_8,
     86 
     87 	/* read multiple */
     88 	generic_bs_rm_1,
     89 	generic_armv4_bs_rm_2,
     90 	generic_bs_rm_4,
     91 	bs_notimpl_bs_rm_8,
     92 
     93 	/* read region */
     94 	bs_notimpl_bs_rr_1,
     95 	generic_armv4_bs_rr_2,
     96 	generic_bs_rr_4,
     97 	bs_notimpl_bs_rr_8,
     98 
     99 	/* write (single) */
    100 	generic_bs_w_1,
    101 	generic_armv4_bs_w_2,
    102 	generic_bs_w_4,
    103 	bs_notimpl_bs_w_8,
    104 
    105 	/* write multiple */
    106 	generic_bs_wm_1,
    107 	generic_armv4_bs_wm_2,
    108 	generic_bs_wm_4,
    109 	bs_notimpl_bs_wm_8,
    110 
    111 	/* write region */
    112 	bs_notimpl_bs_wr_1,
    113 	generic_armv4_bs_wr_2,
    114 	generic_bs_wr_4,
    115 	bs_notimpl_bs_wr_8,
    116 
    117 	/* set multiple */
    118 	bs_notimpl_bs_sm_1,
    119 	bs_notimpl_bs_sm_2,
    120 	bs_notimpl_bs_sm_4,
    121 	bs_notimpl_bs_sm_8,
    122 
    123 	/* set region */
    124 	bs_notimpl_bs_sr_1,
    125 	generic_armv4_bs_sr_2,
    126 	bs_notimpl_bs_sr_4,
    127 	bs_notimpl_bs_sr_8,
    128 
    129 	/* copy */
    130 	bs_notimpl_bs_c_1,
    131 	generic_armv4_bs_c_2,
    132 	bs_notimpl_bs_c_4,
    133 	bs_notimpl_bs_c_8,
    134 };
    135 
    136 void ifpga_create_io_bs_tag(t, cookie)
    137 	struct bus_space *t;
    138 	void *cookie;
    139 {
    140 	*t = ifpga_bs_tag;
    141 	t->bs_cookie = cookie;
    142 }
    143 
    144 void ifpga_create_mem_bs_tag(t, cookie)
    145 	struct bus_space *t;
    146 	void *cookie;
    147 {
    148 	*t = ifpga_bs_tag;
    149 	t->bs_map = ifpga_mem_bs_map;
    150 	t->bs_unmap = ifpga_mem_bs_unmap;
    151 	t->bs_cookie = cookie;
    152 }
    153 
    154 /* bus space functions */
    155 
    156 int
    157 ifpga_bs_map(t, bpa, size, cacheable, bshp)
    158 	void *t;
    159 	bus_addr_t bpa;
    160 	bus_size_t size;
    161 	int cacheable;
    162 	bus_space_handle_t *bshp;
    163 {
    164         /* The cookie is the base address for the I/O area */
    165         *bshp = bpa + (bus_addr_t)t;
    166 	return 0;
    167 }
    168 
    169 int
    170 ifpga_mem_bs_map(t, bpa, size, cacheable, bshp)
    171 	void *t;
    172 	bus_addr_t bpa;
    173 	bus_size_t size;
    174 	int cacheable;
    175 	bus_space_handle_t *bshp;
    176 {
    177 	bus_addr_t startpa, endpa;
    178 	vaddr_t va;
    179 
    180 	/* Round the allocation to page boundries */
    181 	startpa = trunc_page(bpa);
    182 	endpa = round_page(bpa + size);
    183 
    184 	/* Get some VM.  */
    185 	va = uvm_km_valloc(kernel_map, endpa - startpa);
    186 	if (va == 0)
    187 		return ENOMEM;
    188 
    189 	/* Store the bus space handle */
    190 	*bshp = va + (bpa & PGOFSET);
    191 
    192 	/* Now map the pages */
    193 	/* The cookie is the physical base address for the I/O area */
    194 	while (startpa < endpa) {
    195 		/* XXX pmap_kenter_pa maps pages cacheable -- not what
    196 		   we want.  */
    197 		pmap_enter(pmap_kernel(), va, (bus_addr_t)t + startpa,
    198 			   VM_PROT_READ | VM_PROT_WRITE, 0);
    199 		va += NBPG;
    200 		startpa += NBPG;
    201 	}
    202 	pmap_update(pmap_kernel());
    203 
    204 	return 0;
    205 }
    206 
    207 int
    208 ifpga_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
    209     bpap, bshp)
    210 	void *t;
    211 	bus_addr_t rstart, rend;
    212 	bus_size_t size, alignment, boundary;
    213 	int cacheable;
    214 	bus_addr_t *bpap;
    215 	bus_space_handle_t *bshp;
    216 {
    217 	panic("ifpga_alloc(): Help!\n");
    218 }
    219 
    220 
    221 void
    222 ifpga_bs_unmap(t, bsh, size)
    223 	void *t;
    224 	bus_space_handle_t bsh;
    225 	bus_size_t size;
    226 {
    227 	/* Nothing to do for an io map.  */
    228 }
    229 
    230 void
    231 ifpga_mem_bs_unmap(t, bsh, size)
    232 	void *t;
    233 	bus_space_handle_t bsh;
    234 	bus_size_t size;
    235 {
    236 	vaddr_t startva, endva;
    237 
    238 	startva = trunc_page(bsh);
    239 	endva = round_page(bsh + size);
    240 
    241 	uvm_km_free(kernel_map, startva, endva - startva);
    242 }
    243 
    244 void
    245 ifpga_bs_free(t, bsh, size)
    246 	void *t;
    247 	bus_space_handle_t bsh;
    248 	bus_size_t size;
    249 {
    250 
    251 	panic("ifpga_free(): Help!\n");
    252 	/* ifpga_bs_unmap() does all that we need to do. */
    253 /*	ifpga_bs_unmap(t, bsh, size);*/
    254 }
    255 
    256 int
    257 ifpga_bs_subregion(t, bsh, offset, size, nbshp)
    258 	void *t;
    259 	bus_space_handle_t bsh;
    260 	bus_size_t offset, size;
    261 	bus_space_handle_t *nbshp;
    262 {
    263 
    264 	*nbshp = bsh + (offset << ((int)t));
    265 	return (0);
    266 }
    267 
    268 void *
    269 ifpga_bs_vaddr(t, bsh)
    270 	void *t;
    271 	bus_space_handle_t bsh;
    272 {
    273 
    274 	return ((void *)bsh);
    275 }
    276 
    277 void
    278 ifpga_bs_barrier(t, bsh, offset, len, flags)
    279 	void *t;
    280 	bus_space_handle_t bsh;
    281 	bus_size_t offset, len;
    282 	int flags;
    283 {
    284 }
    285