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ifpga_io.c revision 1.6.10.1
      1 /*	$NetBSD: ifpga_io.c,v 1.6.10.1 2005/02/13 10:44:40 yamt Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1997 Causality Limited
      5  * Copyright (c) 1997 Mark Brinicombe.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Mark Brinicombe
     19  *	for the NetBSD Project.
     20  * 4. The name of the company nor the name of the author may be used to
     21  *    endorse or promote products derived from this software without specific
     22  *    prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  * From arm/footbridge/footbridge_io.c
     37  */
     38 
     39 /*
     40  * bus_space I/O functions for IFPGA
     41  */
     42 
     43 #include <sys/cdefs.h>
     44 __KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v 1.6.10.1 2005/02/13 10:44:40 yamt Exp $");
     45 
     46 #include <sys/param.h>
     47 #include <sys/systm.h>
     48 #include <machine/bus.h>
     49 #include <uvm/uvm_extern.h>
     50 
     51 #include <evbarm/ifpga/ifpgavar.h>
     52 
     53 /* Proto types for all the bus_space structure functions */
     54 
     55 bs_protos(ifpga);
     56 bs_protos(generic);
     57 bs_protos(generic_armv4);
     58 bs_protos(bs_notimpl);
     59 bs_map_proto(ifpga_mem);
     60 bs_unmap_proto(ifpga_mem);
     61 
     62 /* Declare the ifpga bus space tag */
     63 
     64 struct bus_space ifpga_bs_tag = {
     65 	/* cookie */
     66 	(void *) 0,			/* Physical base address */
     67 
     68 	/* mapping/unmapping */
     69 	ifpga_bs_map,
     70 	ifpga_bs_unmap,
     71 	ifpga_bs_subregion,
     72 
     73 	/* allocation/deallocation */
     74 	ifpga_bs_alloc,
     75 	ifpga_bs_free,
     76 
     77 	/* get kernel virtual address */
     78 	ifpga_bs_vaddr,
     79 
     80 	/* mmap */
     81 	bs_notimpl_bs_mmap,
     82 
     83 	/* barrier */
     84 	ifpga_bs_barrier,
     85 
     86 	/* read (single) */
     87 	generic_bs_r_1,
     88 	generic_armv4_bs_r_2,
     89 	generic_bs_r_4,
     90 	bs_notimpl_bs_r_8,
     91 
     92 	/* read multiple */
     93 	generic_bs_rm_1,
     94 	generic_armv4_bs_rm_2,
     95 	generic_bs_rm_4,
     96 	bs_notimpl_bs_rm_8,
     97 
     98 	/* read region */
     99 	bs_notimpl_bs_rr_1,
    100 	generic_armv4_bs_rr_2,
    101 	generic_bs_rr_4,
    102 	bs_notimpl_bs_rr_8,
    103 
    104 	/* write (single) */
    105 	generic_bs_w_1,
    106 	generic_armv4_bs_w_2,
    107 	generic_bs_w_4,
    108 	bs_notimpl_bs_w_8,
    109 
    110 	/* write multiple */
    111 	generic_bs_wm_1,
    112 	generic_armv4_bs_wm_2,
    113 	generic_bs_wm_4,
    114 	bs_notimpl_bs_wm_8,
    115 
    116 	/* write region */
    117 	bs_notimpl_bs_wr_1,
    118 	generic_armv4_bs_wr_2,
    119 	generic_bs_wr_4,
    120 	bs_notimpl_bs_wr_8,
    121 
    122 	/* set multiple */
    123 	bs_notimpl_bs_sm_1,
    124 	bs_notimpl_bs_sm_2,
    125 	bs_notimpl_bs_sm_4,
    126 	bs_notimpl_bs_sm_8,
    127 
    128 	/* set region */
    129 	bs_notimpl_bs_sr_1,
    130 	generic_armv4_bs_sr_2,
    131 	bs_notimpl_bs_sr_4,
    132 	bs_notimpl_bs_sr_8,
    133 
    134 	/* copy */
    135 	bs_notimpl_bs_c_1,
    136 	generic_armv4_bs_c_2,
    137 	bs_notimpl_bs_c_4,
    138 	bs_notimpl_bs_c_8,
    139 };
    140 
    141 void ifpga_create_io_bs_tag(t, cookie)
    142 	struct bus_space *t;
    143 	void *cookie;
    144 {
    145 	*t = ifpga_bs_tag;
    146 	t->bs_cookie = cookie;
    147 }
    148 
    149 void ifpga_create_mem_bs_tag(t, cookie)
    150 	struct bus_space *t;
    151 	void *cookie;
    152 {
    153 	*t = ifpga_bs_tag;
    154 	t->bs_map = ifpga_mem_bs_map;
    155 	t->bs_unmap = ifpga_mem_bs_unmap;
    156 	t->bs_cookie = cookie;
    157 }
    158 
    159 /* bus space functions */
    160 
    161 int
    162 ifpga_bs_map(t, bpa, size, cacheable, bshp)
    163 	void *t;
    164 	bus_addr_t bpa;
    165 	bus_size_t size;
    166 	int cacheable;
    167 	bus_space_handle_t *bshp;
    168 {
    169         /* The cookie is the base address for the I/O area */
    170         *bshp = bpa + (bus_addr_t)t;
    171 	return 0;
    172 }
    173 
    174 int
    175 ifpga_mem_bs_map(t, bpa, size, cacheable, bshp)
    176 	void *t;
    177 	bus_addr_t bpa;
    178 	bus_size_t size;
    179 	int cacheable;
    180 	bus_space_handle_t *bshp;
    181 {
    182 	bus_addr_t startpa, endpa;
    183 	vaddr_t va;
    184 
    185 	/* Round the allocation to page boundries */
    186 	startpa = trunc_page(bpa);
    187 	endpa = round_page(bpa + size);
    188 
    189 	/* Get some VM.  */
    190 	va = uvm_km_alloc(kernel_map, endpa - startpa, 0, UVM_KMF_VAONLY);
    191 	if (va == 0)
    192 		return ENOMEM;
    193 
    194 	/* Store the bus space handle */
    195 	*bshp = va + (bpa & PGOFSET);
    196 
    197 	/* Now map the pages */
    198 	/* The cookie is the physical base address for the I/O area */
    199 	while (startpa < endpa) {
    200 		/* XXX pmap_kenter_pa maps pages cacheable -- not what
    201 		   we want.  */
    202 		pmap_enter(pmap_kernel(), va, (bus_addr_t)t + startpa,
    203 			   VM_PROT_READ | VM_PROT_WRITE, 0);
    204 		va += PAGE_SIZE;
    205 		startpa += PAGE_SIZE;
    206 	}
    207 	pmap_update(pmap_kernel());
    208 
    209 	return 0;
    210 }
    211 
    212 int
    213 ifpga_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
    214     bpap, bshp)
    215 	void *t;
    216 	bus_addr_t rstart, rend;
    217 	bus_size_t size, alignment, boundary;
    218 	int cacheable;
    219 	bus_addr_t *bpap;
    220 	bus_space_handle_t *bshp;
    221 {
    222 	panic("ifpga_alloc(): Help!");
    223 }
    224 
    225 
    226 void
    227 ifpga_bs_unmap(t, bsh, size)
    228 	void *t;
    229 	bus_space_handle_t bsh;
    230 	bus_size_t size;
    231 {
    232 	/* Nothing to do for an io map.  */
    233 }
    234 
    235 void
    236 ifpga_mem_bs_unmap(t, bsh, size)
    237 	void *t;
    238 	bus_space_handle_t bsh;
    239 	bus_size_t size;
    240 {
    241 	vaddr_t startva, endva;
    242 
    243 	startva = trunc_page(bsh);
    244 	endva = round_page(bsh + size);
    245 
    246 	pmap_remove(pmap_kernel(), startva, endva);
    247 	pmap_update(pmap_kernel());
    248 	uvm_km_free(kernel_map, startva, endva - startva, UVM_KMF_VAONLY);
    249 }
    250 
    251 void
    252 ifpga_bs_free(t, bsh, size)
    253 	void *t;
    254 	bus_space_handle_t bsh;
    255 	bus_size_t size;
    256 {
    257 
    258 	panic("ifpga_free(): Help!");
    259 	/* ifpga_bs_unmap() does all that we need to do. */
    260 /*	ifpga_bs_unmap(t, bsh, size);*/
    261 }
    262 
    263 int
    264 ifpga_bs_subregion(t, bsh, offset, size, nbshp)
    265 	void *t;
    266 	bus_space_handle_t bsh;
    267 	bus_size_t offset, size;
    268 	bus_space_handle_t *nbshp;
    269 {
    270 
    271 	*nbshp = bsh + (offset << ((int)t));
    272 	return (0);
    273 }
    274 
    275 void *
    276 ifpga_bs_vaddr(t, bsh)
    277 	void *t;
    278 	bus_space_handle_t bsh;
    279 {
    280 
    281 	return ((void *)bsh);
    282 }
    283 
    284 void
    285 ifpga_bs_barrier(t, bsh, offset, len, flags)
    286 	void *t;
    287 	bus_space_handle_t bsh;
    288 	bus_size_t offset, len;
    289 	int flags;
    290 {
    291 }
    292