ifpga_pci.c revision 1.1.2.2 1 1.1.2.2 nathanw /* $NetBSD: ifpga_pci.c,v 1.1.2.2 2002/02/28 04:09:09 nathanw Exp $ */
2 1.1.2.2 nathanw
3 1.1.2.2 nathanw /*
4 1.1.2.2 nathanw * Copyright (c) 2001 ARM Ltd
5 1.1.2.2 nathanw * All rights reserved.
6 1.1.2.2 nathanw *
7 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.1.2.2 nathanw * modification, are permitted provided that the following conditions
9 1.1.2.2 nathanw * are met:
10 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer.
12 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.1.2.2 nathanw * 3. The name of the company may not be used to endorse or promote
16 1.1.2.2 nathanw * products derived from this software without specific prior written
17 1.1.2.2 nathanw * permission.
18 1.1.2.2 nathanw *
19 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1.2.2 nathanw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1.2.2 nathanw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 1.1.2.2 nathanw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 1.1.2.2 nathanw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 1.1.2.2 nathanw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1.2.2 nathanw * SUCH DAMAGE.
30 1.1.2.2 nathanw *
31 1.1.2.2 nathanw * Copyright (c) 1997,1998 Mark Brinicombe.
32 1.1.2.2 nathanw * Copyright (c) 1997,1998 Causality Limited
33 1.1.2.2 nathanw * All rights reserved.
34 1.1.2.2 nathanw *
35 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without
36 1.1.2.2 nathanw * modification, are permitted provided that the following conditions
37 1.1.2.2 nathanw * are met:
38 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
39 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer.
40 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
41 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
42 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution.
43 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
44 1.1.2.2 nathanw * must display the following acknowledgement:
45 1.1.2.2 nathanw * This product includes software developed by Mark Brinicombe
46 1.1.2.2 nathanw * for the NetBSD Project.
47 1.1.2.2 nathanw * 4. The name of the company nor the name of the author may be used to
48 1.1.2.2 nathanw * endorse or promote products derived from this software without specific
49 1.1.2.2 nathanw * prior written permission.
50 1.1.2.2 nathanw *
51 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
52 1.1.2.2 nathanw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
53 1.1.2.2 nathanw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 1.1.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
55 1.1.2.2 nathanw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
56 1.1.2.2 nathanw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
57 1.1.2.2 nathanw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
58 1.1.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
59 1.1.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
60 1.1.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
61 1.1.2.2 nathanw * SUCH DAMAGE.
62 1.1.2.2 nathanw */
63 1.1.2.2 nathanw
64 1.1.2.2 nathanw #include <sys/param.h>
65 1.1.2.2 nathanw #include <sys/systm.h>
66 1.1.2.2 nathanw #include <sys/conf.h>
67 1.1.2.2 nathanw #include <sys/malloc.h>
68 1.1.2.2 nathanw #include <sys/device.h>
69 1.1.2.2 nathanw
70 1.1.2.2 nathanw #define _ARM32_BUS_DMA_PRIVATE
71 1.1.2.2 nathanw #include <evbarm/integrator/int_bus_dma.h>
72 1.1.2.2 nathanw
73 1.1.2.2 nathanw #include <machine/intr.h>
74 1.1.2.2 nathanw #include <evbarm/ifpga/irqhandler.h> /* XXX XXX XXX */
75 1.1.2.2 nathanw
76 1.1.2.2 nathanw #include <dev/pci/pcireg.h>
77 1.1.2.2 nathanw #include <dev/pci/pcivar.h>
78 1.1.2.2 nathanw
79 1.1.2.2 nathanw #include <evbarm/ifpga/ifpgareg.h>
80 1.1.2.2 nathanw #include <evbarm/ifpga/ifpgamem.h>
81 1.1.2.2 nathanw #include <evbarm/ifpga/ifpga_pcivar.h>
82 1.1.2.2 nathanw #include <evbarm/dev/v360reg.h>
83 1.1.2.2 nathanw
84 1.1.2.2 nathanw
85 1.1.2.2 nathanw void ifpga_pci_attach_hook (struct device *, struct device *,
86 1.1.2.2 nathanw struct pcibus_attach_args *);
87 1.1.2.2 nathanw int ifpga_pci_bus_maxdevs (void *, int);
88 1.1.2.2 nathanw pcitag_t ifpga_pci_make_tag (void *, int, int, int);
89 1.1.2.2 nathanw void ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *,
90 1.1.2.2 nathanw int *);
91 1.1.2.2 nathanw pcireg_t ifpga_pci_conf_read (void *, pcitag_t, int);
92 1.1.2.2 nathanw void ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t);
93 1.1.2.2 nathanw int ifpga_pci_intr_map (struct pci_attach_args *,
94 1.1.2.2 nathanw pci_intr_handle_t *);
95 1.1.2.2 nathanw const char *ifpga_pci_intr_string (void *, pci_intr_handle_t);
96 1.1.2.2 nathanw const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t);
97 1.1.2.2 nathanw void *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int,
98 1.1.2.2 nathanw int (*)(void *), void *);
99 1.1.2.2 nathanw void ifpga_pci_intr_disestablish (void *, void *);
100 1.1.2.2 nathanw
101 1.1.2.2 nathanw struct arm32_pci_chipset ifpga_pci_chipset = {
102 1.1.2.2 nathanw NULL, /* conf_v */
103 1.1.2.2 nathanw ifpga_pci_attach_hook,
104 1.1.2.2 nathanw ifpga_pci_bus_maxdevs,
105 1.1.2.2 nathanw ifpga_pci_make_tag,
106 1.1.2.2 nathanw ifpga_pci_decompose_tag,
107 1.1.2.2 nathanw ifpga_pci_conf_read,
108 1.1.2.2 nathanw ifpga_pci_conf_write,
109 1.1.2.2 nathanw NULL, /* intr_v */
110 1.1.2.2 nathanw ifpga_pci_intr_map,
111 1.1.2.2 nathanw ifpga_pci_intr_string,
112 1.1.2.2 nathanw ifpga_pci_intr_evcnt,
113 1.1.2.2 nathanw ifpga_pci_intr_establish,
114 1.1.2.2 nathanw ifpga_pci_intr_disestablish
115 1.1.2.2 nathanw };
116 1.1.2.2 nathanw
117 1.1.2.2 nathanw /*
118 1.1.2.2 nathanw * Use the integrator-specific bus_dma routines.
119 1.1.2.2 nathanw */
120 1.1.2.2 nathanw struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = {
121 1.1.2.2 nathanw 0,
122 1.1.2.2 nathanw 0,
123 1.1.2.2 nathanw _bus_dmamap_create,
124 1.1.2.2 nathanw _bus_dmamap_destroy,
125 1.1.2.2 nathanw integrator_bus_dmamap_load,
126 1.1.2.2 nathanw integrator_bus_dmamap_load_mbuf,
127 1.1.2.2 nathanw integrator_bus_dmamap_load_uio,
128 1.1.2.2 nathanw _bus_dmamap_load_raw,
129 1.1.2.2 nathanw _bus_dmamap_unload,
130 1.1.2.2 nathanw _bus_dmamap_sync,
131 1.1.2.2 nathanw integrator_bus_dmamem_alloc,
132 1.1.2.2 nathanw integrator_bus_dmamem_free,
133 1.1.2.2 nathanw integrator_bus_dmamem_map,
134 1.1.2.2 nathanw _bus_dmamem_unmap,
135 1.1.2.2 nathanw integrator_bus_dmamem_mmap,
136 1.1.2.2 nathanw };
137 1.1.2.2 nathanw
138 1.1.2.2 nathanw /*
139 1.1.2.2 nathanw * Currently we only support 12 devices as we select directly in the
140 1.1.2.2 nathanw * type 0 config cycle
141 1.1.2.2 nathanw * (See conf_{read,write} for more detail
142 1.1.2.2 nathanw */
143 1.1.2.2 nathanw #define MAX_PCI_DEVICES 21
144 1.1.2.2 nathanw
145 1.1.2.2 nathanw /*static int
146 1.1.2.2 nathanw pci_intr(void *arg)
147 1.1.2.2 nathanw {
148 1.1.2.2 nathanw printf("pci int %x\n", (int)arg);
149 1.1.2.2 nathanw return 0;
150 1.1.2.2 nathanw }*/
151 1.1.2.2 nathanw
152 1.1.2.2 nathanw
153 1.1.2.2 nathanw void
154 1.1.2.2 nathanw ifpga_pci_attach_hook(struct device *parent, struct device *self,
155 1.1.2.2 nathanw struct pcibus_attach_args *pba)
156 1.1.2.2 nathanw {
157 1.1.2.2 nathanw #ifdef PCI_DEBUG
158 1.1.2.2 nathanw printf("ifpga_pci_attach_hook()\n");
159 1.1.2.2 nathanw #endif
160 1.1.2.2 nathanw }
161 1.1.2.2 nathanw
162 1.1.2.2 nathanw int
163 1.1.2.2 nathanw ifpga_pci_bus_maxdevs(void *pcv, int busno)
164 1.1.2.2 nathanw {
165 1.1.2.2 nathanw #ifdef PCI_DEBUG
166 1.1.2.2 nathanw printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno);
167 1.1.2.2 nathanw #endif
168 1.1.2.2 nathanw return MAX_PCI_DEVICES;
169 1.1.2.2 nathanw }
170 1.1.2.2 nathanw
171 1.1.2.2 nathanw pcitag_t
172 1.1.2.2 nathanw ifpga_pci_make_tag(void *pcv, int bus, int device, int function)
173 1.1.2.2 nathanw {
174 1.1.2.2 nathanw #ifdef PCI_DEBUG
175 1.1.2.2 nathanw printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n",
176 1.1.2.2 nathanw pcv, bus, device, function);
177 1.1.2.2 nathanw #endif
178 1.1.2.2 nathanw return (bus << 16) | (device << 11) | (function << 8);
179 1.1.2.2 nathanw }
180 1.1.2.2 nathanw
181 1.1.2.2 nathanw void
182 1.1.2.2 nathanw ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep,
183 1.1.2.2 nathanw int *functionp)
184 1.1.2.2 nathanw {
185 1.1.2.2 nathanw #ifdef PCI_DEBUG
186 1.1.2.2 nathanw printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, "
187 1.1.2.2 nathanw "fp=%p)\n", pcv, tag, busp, devicep, functionp);
188 1.1.2.2 nathanw #endif
189 1.1.2.2 nathanw
190 1.1.2.2 nathanw if (busp != NULL)
191 1.1.2.2 nathanw *busp = (tag >> 16) & 0xff;
192 1.1.2.2 nathanw if (devicep != NULL)
193 1.1.2.2 nathanw *devicep = (tag >> 11) & 0x1f;
194 1.1.2.2 nathanw if (functionp != NULL)
195 1.1.2.2 nathanw *functionp = (tag >> 8) & 0x7;
196 1.1.2.2 nathanw }
197 1.1.2.2 nathanw
198 1.1.2.2 nathanw pcireg_t
199 1.1.2.2 nathanw ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg)
200 1.1.2.2 nathanw {
201 1.1.2.2 nathanw pcireg_t data;
202 1.1.2.2 nathanw struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv;
203 1.1.2.2 nathanw int bus, device, function;
204 1.1.2.2 nathanw u_int address;
205 1.1.2.2 nathanw
206 1.1.2.2 nathanw ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function);
207 1.1.2.2 nathanw
208 1.1.2.2 nathanw /* Reset the appertures so that we can talk to the register space. */
209 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
210 1.1.2.2 nathanw IFPGA_PCI_APP0_512MB_BASE);
211 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
212 1.1.2.2 nathanw IFPGA_PCI_APP1_CONF_BASE);
213 1.1.2.2 nathanw
214 1.1.2.2 nathanw if (bus == 0) {
215 1.1.2.2 nathanw address = (1 << (device + 11)) | reg;
216 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
217 1.1.2.2 nathanw IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00));
218 1.1.2.2 nathanw
219 1.1.2.2 nathanw /* Read the value from the bus... */
220 1.1.2.2 nathanw data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh,
221 1.1.2.2 nathanw address & 0x00ffffff);
222 1.1.2.2 nathanw
223 1.1.2.2 nathanw } else {
224 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
225 1.1.2.2 nathanw IFPGA_PCI_APP1_CONF_T1_MAP);
226 1.1.2.2 nathanw
227 1.1.2.2 nathanw /* Read the value from the bus... */
228 1.1.2.2 nathanw data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh,
229 1.1.2.2 nathanw tag | reg);
230 1.1.2.2 nathanw }
231 1.1.2.2 nathanw /* ... and put the memory spaces back again. */
232 1.1.2.2 nathanw
233 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
234 1.1.2.2 nathanw IFPGA_PCI_APP1_256MB_BASE);
235 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
236 1.1.2.2 nathanw IFPGA_PCI_APP1_256MB_MAP);
237 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
238 1.1.2.2 nathanw IFPGA_PCI_APP0_256MB_BASE);
239 1.1.2.2 nathanw #ifdef PCI_DEBUG
240 1.1.2.2 nathanw printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n",
241 1.1.2.2 nathanw pcv, tag, reg, data);
242 1.1.2.2 nathanw #endif
243 1.1.2.2 nathanw return data;
244 1.1.2.2 nathanw }
245 1.1.2.2 nathanw
246 1.1.2.2 nathanw void
247 1.1.2.2 nathanw ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data)
248 1.1.2.2 nathanw {
249 1.1.2.2 nathanw struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv;
250 1.1.2.2 nathanw int bus, device, function;
251 1.1.2.2 nathanw u_int address;
252 1.1.2.2 nathanw
253 1.1.2.2 nathanw #ifdef PCI_DEBUG
254 1.1.2.2 nathanw printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n",
255 1.1.2.2 nathanw pcv, tag, reg, data);
256 1.1.2.2 nathanw #endif
257 1.1.2.2 nathanw
258 1.1.2.2 nathanw ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function);
259 1.1.2.2 nathanw
260 1.1.2.2 nathanw /* Reset the appertures so that we can talk to the register space. */
261 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
262 1.1.2.2 nathanw IFPGA_PCI_APP0_512MB_BASE);
263 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
264 1.1.2.2 nathanw IFPGA_PCI_APP1_CONF_BASE);
265 1.1.2.2 nathanw
266 1.1.2.2 nathanw if (bus == 0) {
267 1.1.2.2 nathanw address = (1 << (device + 11)) | reg;
268 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
269 1.1.2.2 nathanw IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00));
270 1.1.2.2 nathanw
271 1.1.2.2 nathanw /* Read the value from the bus... */
272 1.1.2.2 nathanw bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh,
273 1.1.2.2 nathanw address & 0x00ffffff, data);
274 1.1.2.2 nathanw
275 1.1.2.2 nathanw } else {
276 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
277 1.1.2.2 nathanw IFPGA_PCI_APP1_CONF_T1_MAP);
278 1.1.2.2 nathanw
279 1.1.2.2 nathanw /* Read the value from the bus... */
280 1.1.2.2 nathanw bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg,
281 1.1.2.2 nathanw data);
282 1.1.2.2 nathanw }
283 1.1.2.2 nathanw /* ... and put the memory spaces back again. */
284 1.1.2.2 nathanw
285 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
286 1.1.2.2 nathanw IFPGA_PCI_APP1_256MB_BASE);
287 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
288 1.1.2.2 nathanw IFPGA_PCI_APP1_256MB_MAP);
289 1.1.2.2 nathanw bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
290 1.1.2.2 nathanw IFPGA_PCI_APP0_256MB_BASE);
291 1.1.2.2 nathanw }
292 1.1.2.2 nathanw
293 1.1.2.2 nathanw int
294 1.1.2.2 nathanw ifpga_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
295 1.1.2.2 nathanw {
296 1.1.2.2 nathanw int line = pa->pa_intrline;
297 1.1.2.2 nathanw
298 1.1.2.2 nathanw #ifdef PCI_DEBUG
299 1.1.2.2 nathanw int pin = pa->pa_intrpin;
300 1.1.2.2 nathanw void *pcv = pa->pa_pc;
301 1.1.2.2 nathanw pcitag_t intrtag = pa->pa_intrtag;
302 1.1.2.2 nathanw int bus, device, function;
303 1.1.2.2 nathanw
304 1.1.2.2 nathanw ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function);
305 1.1.2.2 nathanw printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d "
306 1.1.2.2 nathanw "dev=%d\n", pcv, intrtag, pin, line, device);
307 1.1.2.2 nathanw #endif
308 1.1.2.2 nathanw
309 1.1.2.2 nathanw
310 1.1.2.2 nathanw #ifdef PCI_DEBUG
311 1.1.2.2 nathanw printf("pin %d, line %d mapped to int %d\n", pin, line, line);
312 1.1.2.2 nathanw #endif
313 1.1.2.2 nathanw
314 1.1.2.2 nathanw *ihp = line;
315 1.1.2.2 nathanw return 0;
316 1.1.2.2 nathanw }
317 1.1.2.2 nathanw
318 1.1.2.2 nathanw const char *
319 1.1.2.2 nathanw ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih)
320 1.1.2.2 nathanw {
321 1.1.2.2 nathanw static char irqstr[12]; /* 6 + 1 + NULL + sanity */
322 1.1.2.2 nathanw
323 1.1.2.2 nathanw #ifdef PCI_DEBUG
324 1.1.2.2 nathanw printf("ifpga_pci_intr_string(pcv=0x%p, ih=0x%lx)\n", pcv, ih);
325 1.1.2.2 nathanw #endif
326 1.1.2.2 nathanw if (ih == 0)
327 1.1.2.2 nathanw panic("ifpga_pci_intr_string: bogus handle 0x%lx\n", ih);
328 1.1.2.2 nathanw
329 1.1.2.2 nathanw sprintf(irqstr, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0);
330 1.1.2.2 nathanw return irqstr;
331 1.1.2.2 nathanw }
332 1.1.2.2 nathanw
333 1.1.2.2 nathanw const struct evcnt *
334 1.1.2.2 nathanw ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih)
335 1.1.2.2 nathanw {
336 1.1.2.2 nathanw
337 1.1.2.2 nathanw /* XXX for now, no evcnt parent reported */
338 1.1.2.2 nathanw return NULL;
339 1.1.2.2 nathanw }
340 1.1.2.2 nathanw
341 1.1.2.2 nathanw void *
342 1.1.2.2 nathanw ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level,
343 1.1.2.2 nathanw int (*func) (void *), void *arg)
344 1.1.2.2 nathanw {
345 1.1.2.2 nathanw void *intr;
346 1.1.2.2 nathanw int length;
347 1.1.2.2 nathanw char *string;
348 1.1.2.2 nathanw
349 1.1.2.2 nathanw #ifdef PCI_DEBUG
350 1.1.2.2 nathanw printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, "
351 1.1.2.2 nathanw "func=%p, arg=%p)\n", pcv, ih, level, func, arg);
352 1.1.2.2 nathanw #endif
353 1.1.2.2 nathanw
354 1.1.2.2 nathanw /* Copy the interrupt string to a private buffer */
355 1.1.2.2 nathanw length = strlen(ifpga_pci_intr_string(pcv, ih));
356 1.1.2.2 nathanw string = malloc(length + 1, M_DEVBUF, M_WAITOK);
357 1.1.2.2 nathanw strcpy(string, ifpga_pci_intr_string(pcv, ih));
358 1.1.2.2 nathanw intr = intr_claim(ih, level, string, func, arg);
359 1.1.2.2 nathanw
360 1.1.2.2 nathanw return intr;
361 1.1.2.2 nathanw }
362 1.1.2.2 nathanw
363 1.1.2.2 nathanw void
364 1.1.2.2 nathanw ifpga_pci_intr_disestablish(void *pcv, void *cookie)
365 1.1.2.2 nathanw {
366 1.1.2.2 nathanw #ifdef PCI_DEBUG
367 1.1.2.2 nathanw printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n",
368 1.1.2.2 nathanw pcv, cookie);
369 1.1.2.2 nathanw #endif
370 1.1.2.2 nathanw /* XXXX Need to free the string */
371 1.1.2.2 nathanw
372 1.1.2.2 nathanw intr_release(cookie);
373 1.1.2.2 nathanw }
374