ifpga_pci.c revision 1.1.4.4
1 /* $NetBSD: ifpga_pci.c,v 1.1.4.4 2002/09/06 08:34:02 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1997,1998 Mark Brinicombe. 32 * Copyright (c) 1997,1998 Causality Limited 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. All advertising materials mentioning features or use of this software 44 * must display the following acknowledgement: 45 * This product includes software developed by Mark Brinicombe 46 * for the NetBSD Project. 47 * 4. The name of the company nor the name of the author may be used to 48 * endorse or promote products derived from this software without specific 49 * prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 52 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 53 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 59 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 60 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 61 * SUCH DAMAGE. 62 */ 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/conf.h> 67 #include <sys/malloc.h> 68 #include <sys/device.h> 69 70 #define _ARM32_BUS_DMA_PRIVATE 71 #include <evbarm/integrator/int_bus_dma.h> 72 73 #include <machine/intr.h> 74 #include <evbarm/ifpga/irqhandler.h> /* XXX XXX XXX */ 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 79 #include <evbarm/ifpga/ifpgareg.h> 80 #include <evbarm/ifpga/ifpgamem.h> 81 #include <evbarm/ifpga/ifpga_pcivar.h> 82 #include <evbarm/dev/v360reg.h> 83 84 85 void ifpga_pci_attach_hook (struct device *, struct device *, 86 struct pcibus_attach_args *); 87 int ifpga_pci_bus_maxdevs (void *, int); 88 pcitag_t ifpga_pci_make_tag (void *, int, int, int); 89 void ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *, 90 int *); 91 pcireg_t ifpga_pci_conf_read (void *, pcitag_t, int); 92 void ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t); 93 int ifpga_pci_intr_map (struct pci_attach_args *, 94 pci_intr_handle_t *); 95 const char *ifpga_pci_intr_string (void *, pci_intr_handle_t); 96 const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t); 97 void *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int, 98 int (*)(void *), void *); 99 void ifpga_pci_intr_disestablish (void *, void *); 100 101 struct arm32_pci_chipset ifpga_pci_chipset = { 102 NULL, /* conf_v */ 103 ifpga_pci_attach_hook, 104 ifpga_pci_bus_maxdevs, 105 ifpga_pci_make_tag, 106 ifpga_pci_decompose_tag, 107 ifpga_pci_conf_read, 108 ifpga_pci_conf_write, 109 NULL, /* intr_v */ 110 ifpga_pci_intr_map, 111 ifpga_pci_intr_string, 112 ifpga_pci_intr_evcnt, 113 ifpga_pci_intr_establish, 114 ifpga_pci_intr_disestablish 115 }; 116 117 /* 118 * Use the integrator-specific bus_dma routines. 119 */ 120 struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = { 121 0, 122 0, 123 _bus_dmamap_create, 124 _bus_dmamap_destroy, 125 _bus_dmamap_load, 126 _bus_dmamap_load_mbuf, 127 _bus_dmamap_load_uio, 128 _bus_dmamap_load_raw, 129 _bus_dmamap_unload, 130 _bus_dmamap_sync, /* pre */ 131 NULL, /* post */ 132 _bus_dmamem_alloc, 133 _bus_dmamem_free, 134 _bus_dmamem_map, 135 _bus_dmamem_unmap, 136 _bus_dmamem_mmap, 137 }; 138 139 /* 140 * Currently we only support 12 devices as we select directly in the 141 * type 0 config cycle 142 * (See conf_{read,write} for more detail 143 */ 144 #define MAX_PCI_DEVICES 21 145 146 /*static int 147 pci_intr(void *arg) 148 { 149 printf("pci int %x\n", (int)arg); 150 return 0; 151 }*/ 152 153 154 void 155 ifpga_pci_attach_hook(struct device *parent, struct device *self, 156 struct pcibus_attach_args *pba) 157 { 158 #ifdef PCI_DEBUG 159 printf("ifpga_pci_attach_hook()\n"); 160 #endif 161 } 162 163 int 164 ifpga_pci_bus_maxdevs(void *pcv, int busno) 165 { 166 #ifdef PCI_DEBUG 167 printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno); 168 #endif 169 return MAX_PCI_DEVICES; 170 } 171 172 pcitag_t 173 ifpga_pci_make_tag(void *pcv, int bus, int device, int function) 174 { 175 #ifdef PCI_DEBUG 176 printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n", 177 pcv, bus, device, function); 178 #endif 179 return (bus << 16) | (device << 11) | (function << 8); 180 } 181 182 void 183 ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, 184 int *functionp) 185 { 186 #ifdef PCI_DEBUG 187 printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, " 188 "fp=%p)\n", pcv, tag, busp, devicep, functionp); 189 #endif 190 191 if (busp != NULL) 192 *busp = (tag >> 16) & 0xff; 193 if (devicep != NULL) 194 *devicep = (tag >> 11) & 0x1f; 195 if (functionp != NULL) 196 *functionp = (tag >> 8) & 0x7; 197 } 198 199 pcireg_t 200 ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg) 201 { 202 pcireg_t data; 203 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 204 int bus, device, function; 205 u_int address; 206 207 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 208 209 /* Reset the appertures so that we can talk to the register space. */ 210 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 211 IFPGA_PCI_APP0_512MB_BASE); 212 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 213 IFPGA_PCI_APP1_CONF_BASE); 214 215 if (bus == 0) { 216 address = (1 << (device + 11)) | reg; 217 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 218 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 219 220 /* Read the value from the bus... */ 221 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 222 address & 0x00ffffff); 223 224 } else { 225 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 226 IFPGA_PCI_APP1_CONF_T1_MAP); 227 228 /* Read the value from the bus... */ 229 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 230 tag | reg); 231 } 232 /* ... and put the memory spaces back again. */ 233 234 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 235 IFPGA_PCI_APP1_256MB_BASE); 236 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 237 IFPGA_PCI_APP1_256MB_MAP); 238 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 239 IFPGA_PCI_APP0_256MB_BASE); 240 #ifdef PCI_DEBUG 241 printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n", 242 pcv, tag, reg, data); 243 #endif 244 return data; 245 } 246 247 void 248 ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data) 249 { 250 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 251 int bus, device, function; 252 u_int address; 253 254 #ifdef PCI_DEBUG 255 printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n", 256 pcv, tag, reg, data); 257 #endif 258 259 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 260 261 /* Reset the appertures so that we can talk to the register space. */ 262 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 263 IFPGA_PCI_APP0_512MB_BASE); 264 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 265 IFPGA_PCI_APP1_CONF_BASE); 266 267 if (bus == 0) { 268 address = (1 << (device + 11)) | reg; 269 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 270 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 271 272 /* Read the value from the bus... */ 273 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, 274 address & 0x00ffffff, data); 275 276 } else { 277 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 278 IFPGA_PCI_APP1_CONF_T1_MAP); 279 280 /* Read the value from the bus... */ 281 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg, 282 data); 283 } 284 /* ... and put the memory spaces back again. */ 285 286 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 287 IFPGA_PCI_APP1_256MB_BASE); 288 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 289 IFPGA_PCI_APP1_256MB_MAP); 290 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 291 IFPGA_PCI_APP0_256MB_BASE); 292 } 293 294 int 295 ifpga_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 296 { 297 int line = pa->pa_intrline; 298 299 #ifdef PCI_DEBUG 300 int pin = pa->pa_intrpin; 301 void *pcv = pa->pa_pc; 302 pcitag_t intrtag = pa->pa_intrtag; 303 int bus, device, function; 304 305 ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function); 306 printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d " 307 "dev=%d\n", pcv, intrtag, pin, line, device); 308 #endif 309 310 311 #ifdef PCI_DEBUG 312 printf("pin %d, line %d mapped to int %d\n", pin, line, line); 313 #endif 314 315 *ihp = line; 316 return 0; 317 } 318 319 const char * 320 ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih) 321 { 322 static char irqstr[12]; /* 6 + 1 + NULL + sanity */ 323 324 #ifdef PCI_DEBUG 325 printf("ifpga_pci_intr_string(pcv=0x%p, ih=0x%lx)\n", pcv, ih); 326 #endif 327 if (ih == 0) 328 panic("ifpga_pci_intr_string: bogus handle 0x%lx\n", ih); 329 330 sprintf(irqstr, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0); 331 return irqstr; 332 } 333 334 const struct evcnt * 335 ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih) 336 { 337 338 /* XXX for now, no evcnt parent reported */ 339 return NULL; 340 } 341 342 void * 343 ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level, 344 int (*func) (void *), void *arg) 345 { 346 void *intr; 347 int length; 348 char *string; 349 350 #ifdef PCI_DEBUG 351 printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, " 352 "func=%p, arg=%p)\n", pcv, ih, level, func, arg); 353 #endif 354 355 /* Copy the interrupt string to a private buffer */ 356 length = strlen(ifpga_pci_intr_string(pcv, ih)); 357 string = malloc(length + 1, M_DEVBUF, M_WAITOK); 358 strcpy(string, ifpga_pci_intr_string(pcv, ih)); 359 intr = intr_claim(ih, level, string, func, arg); 360 361 return intr; 362 } 363 364 void 365 ifpga_pci_intr_disestablish(void *pcv, void *cookie) 366 { 367 #ifdef PCI_DEBUG 368 printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n", 369 pcv, cookie); 370 #endif 371 /* XXXX Need to free the string */ 372 373 intr_release(cookie); 374 } 375
Indexes created Sun Oct 19 02:09:48 GMT 2025