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ifpgavar.h revision 1.7 
      1 /*	$NetBSD: ifpgavar.h,v 1.7 2013/02/19 10:57:10 skrll Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2001 ARM Ltd
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of the company may not be used to endorse or promote
     16  *    products derived from this software without specific prior written
     17  *    permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _IFPGAVAR_H_
     33 #define _IFPGAVAR_H_
     34 
     35 #include <sys/bus.h>
     36 
     37 /* We statically map the UARTS at boot so that we can access the console
     38    before we've probed for the IFPGA. */
     39 #define UART0_BOOT_BASE		0xfde00000
     40 #define UART1_BOOT_BASE		0xfdf00000
     41 
     42 #define IFPGA_UART0		0x06000000	/* Uart 0 */
     43 #define IFPGA_UART1		0x07000000	/* Uart 1 */
     44 
     45 /* SMC91C111 network module. */
     46 #define IFPGA_SMC911_BASE	0xb8000000
     47 
     48 typedef paddr_t ifpga_addr_t;
     49 
     50 struct ifpga_softc {
     51 	bus_space_tag_t		sc_iot;		/* Bus tag */
     52 	bus_space_handle_t	sc_sc_ioh;	/* System Controller handle */
     53 	bus_space_handle_t	sc_cm_ioh;	/* Core Module handle */
     54 	bus_space_handle_t	sc_tmr_ioh;	/* Timers handle */
     55 	bus_space_handle_t	sc_irq_ioh;	/* IRQ controller handle */
     56 
     57 	/* Clock variables.  */
     58 	int			sc_statclock_count;
     59 	int			sc_clock_count;
     60 	int			sc_clock_ticks_per_256us;
     61 	void *			sc_clockintr;
     62 	void *			sc_statclockintr;
     63 };
     64 
     65 #define cf_iobase			cf_loc[IFPGACF_OFFSET]
     66 #define cf_irq				cf_loc[IFPGACF_IRQ]
     67 
     68 #define IRQUNK		IFPGACF_IRQ_DEFAULT
     69 
     70 struct ifpga_attach_args {
     71 	char *ifa_name;			/* Device name */
     72 	bus_space_tag_t    ifa_iot;	/* Bus space tag for io */
     73 	bus_space_handle_t ifa_sc_ioh;	/* System controller handle */
     74 
     75 	ifpga_addr_t	   ifa_addr;	/* Address of device.  */
     76 	int		   ifa_irq;	/* IRQ to use.  */
     77 	/*
     78 	 * Other data extracted from the system should go here.  Eg UART clock
     79 	 * rates.
     80 	 */
     81 };
     82 
     83 /* There are roughly 32 interrupt sources.  */
     84 #define NIRQ		32
     85 struct intrhand {
     86 	TAILQ_ENTRY(intrhand) ih_list;	/* link on intrq list */
     87 	int (*ih_func)(void *);		/* handler */
     88 	void *ih_arg;			/* arg for handler */
     89 	int ih_ipl;			/* IPL_* */
     90 	int ih_irq;			/* IRQ number */
     91 };
     92 
     93 #define IRQNAMESIZE	sizeof("tmr 0 hard")
     94 
     95 struct intrq {
     96 	TAILQ_HEAD(, intrhand) iq_list;	/* handler list */
     97 	struct evcnt iq_ev;		/* event counter */
     98 	int iq_mask;			/* IRQs to mask while handling */
     99 	int iq_levels;			/* IPL_*'s this IRQ has */
    100 	int iq_ist;			/* share type */
    101 };
    102 
    103 
    104 void ifpga_intr_init(void);
    105 void ifpga_intr_postinit(void);
    106 void *ifpga_intr_establish(int, int, int (*)(void *), void *);
    107 void ifpga_intr_disestablish(void *);
    108 
    109 void ifpga_create_io_bs_tag(struct bus_space *, void *);
    110 void ifpga_create_mem_bs_tag(struct bus_space *, void *);
    111 
    112 void ifpga_reset(void);
    113 
    114 #endif /* _IFPGAVAR_H */
    115