plcom_ifpga.c revision 1.1.2.3
1 1.1.2.3 nathanw /* $NetBSD: plcom_ifpga.c,v 1.1.2.3 2002/10/18 02:36:28 nathanw Exp $ */ 2 1.1.2.2 nathanw 3 1.1.2.2 nathanw /* 4 1.1.2.2 nathanw * Copyright (c) 2001 ARM Ltd 5 1.1.2.2 nathanw * All rights reserved. 6 1.1.2.2 nathanw * 7 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 9 1.1.2.2 nathanw * are met: 10 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 15 1.1.2.2 nathanw * 3. The name of the company may not be used to endorse or promote 16 1.1.2.2 nathanw * products derived from this software without specific prior written 17 1.1.2.2 nathanw * permission. 18 1.1.2.2 nathanw * 19 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 1.1.2.2 nathanw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 1.1.2.2 nathanw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 1.1.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 1.1.2.2 nathanw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 1.1.2.2 nathanw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 1.1.2.2 nathanw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 1.1.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 1.1.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 1.1.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 1.1.2.2 nathanw * SUCH DAMAGE. 30 1.1.2.2 nathanw */ 31 1.1.2.2 nathanw 32 1.1.2.2 nathanw /* Interface to plcom (PL010) serial driver. */ 33 1.1.2.2 nathanw 34 1.1.2.2 nathanw #include <sys/types.h> 35 1.1.2.2 nathanw #include <sys/device.h> 36 1.1.2.2 nathanw #include <sys/systm.h> 37 1.1.2.2 nathanw #include <sys/param.h> 38 1.1.2.2 nathanw #include <sys/malloc.h> 39 1.1.2.2 nathanw 40 1.1.2.2 nathanw #include <sys/termios.h> 41 1.1.2.2 nathanw 42 1.1.2.2 nathanw #include <machine/intr.h> 43 1.1.2.2 nathanw #include <evbarm/ifpga/irqhandler.h> /* XXX XXX XXX */ 44 1.1.2.2 nathanw #include <machine/bus.h> 45 1.1.2.2 nathanw 46 1.1.2.2 nathanw #include <evbarm/dev/plcomreg.h> 47 1.1.2.2 nathanw #include <evbarm/dev/plcomvar.h> 48 1.1.2.2 nathanw 49 1.1.2.2 nathanw #include <evbarm/ifpga/plcom_ifpgavar.h> 50 1.1.2.2 nathanw 51 1.1.2.2 nathanw #include <evbarm/ifpga/ifpgareg.h> 52 1.1.2.2 nathanw #include <evbarm/ifpga/ifpgavar.h> 53 1.1.2.2 nathanw 54 1.1.2.2 nathanw static int plcom_ifpga_match(struct device *, struct cfdata *, void *); 55 1.1.2.2 nathanw static void plcom_ifpga_attach(struct device *, struct device *, void *); 56 1.1.2.2 nathanw static void plcom_ifpga_set_mcr(void *, int, u_int); 57 1.1.2.2 nathanw 58 1.1.2.3 nathanw CFATTACH_DECL(plcom_ifpga, sizeof(struct plcom_softc), 59 1.1.2.3 nathanw plcom_ifpga_match, plcom_ifpga_attach, NULL, NULL); 60 1.1.2.2 nathanw 61 1.1.2.2 nathanw static int 62 1.1.2.2 nathanw plcom_ifpga_match(struct device *parent, struct cfdata *cf, void *aux) 63 1.1.2.2 nathanw { 64 1.1.2.3 nathanw return 1; 65 1.1.2.2 nathanw } 66 1.1.2.2 nathanw 67 1.1.2.2 nathanw static void 68 1.1.2.2 nathanw plcom_ifpga_attach(struct device *parent, struct device *self, void *aux) 69 1.1.2.2 nathanw { 70 1.1.2.2 nathanw struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)self; 71 1.1.2.2 nathanw struct plcom_softc *sc = &isc->sc_plcom; 72 1.1.2.2 nathanw struct ifpga_attach_args *ifa = aux; 73 1.1.2.2 nathanw char *irqname; 74 1.1.2.2 nathanw 75 1.1.2.2 nathanw isc->sc_iot = ifa->ifa_iot; 76 1.1.2.2 nathanw isc->sc_ioh = ifa->ifa_sc_ioh; 77 1.1.2.2 nathanw sc->sc_iounit = sc->sc_dev.dv_unit; 78 1.1.2.2 nathanw sc->sc_frequency = IFPGA_UART_CLK; 79 1.1.2.2 nathanw sc->sc_iot = ifa->ifa_iot; 80 1.1.2.2 nathanw sc->sc_hwflags = 0; 81 1.1.2.2 nathanw sc->sc_swflags = 0; 82 1.1.2.2 nathanw sc->sc_set_mcr = plcom_ifpga_set_mcr; 83 1.1.2.2 nathanw sc->sc_set_mcr_arg = (void *)isc; 84 1.1.2.2 nathanw 85 1.1.2.2 nathanw if (bus_space_map(ifa->ifa_iot, ifa->ifa_addr, PLCOM_UART_SIZE, 0, 86 1.1.2.2 nathanw &sc->sc_ioh)) { 87 1.1.2.2 nathanw printf("%s: unable to map device\n", sc->sc_dev.dv_xname); 88 1.1.2.2 nathanw return; 89 1.1.2.2 nathanw } 90 1.1.2.2 nathanw 91 1.1.2.2 nathanw plcom_attach_subr(sc); 92 1.1.2.2 nathanw irqname = malloc(sizeof("uart") + 2, M_DEVBUF, M_WAITOK); 93 1.1.2.2 nathanw sprintf(irqname, "uart%d", sc->sc_dev.dv_unit); 94 1.1.2.2 nathanw isc->sc_ih = intr_claim(ifa->ifa_irq, IPL_SERIAL, irqname, plcomintr, 95 1.1.2.2 nathanw sc); 96 1.1.2.2 nathanw if (isc->sc_ih == NULL) 97 1.1.2.3 nathanw panic("%s: cannot install interrupt handler", 98 1.1.2.2 nathanw sc->sc_dev.dv_xname); 99 1.1.2.2 nathanw } 100 1.1.2.2 nathanw 101 1.1.2.2 nathanw static void plcom_ifpga_set_mcr(void *aux, int unit, u_int mcr) 102 1.1.2.2 nathanw { 103 1.1.2.2 nathanw struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)aux; 104 1.1.2.2 nathanw u_int set, clr; 105 1.1.2.2 nathanw 106 1.1.2.2 nathanw set = clr = 0; 107 1.1.2.2 nathanw 108 1.1.2.2 nathanw switch (unit) { 109 1.1.2.2 nathanw case 0: 110 1.1.2.2 nathanw if (mcr & MCR_RTS) 111 1.1.2.2 nathanw set |= IFPGA_SC_CTRL_UART0RTS; 112 1.1.2.2 nathanw else 113 1.1.2.2 nathanw clr |= IFPGA_SC_CTRL_UART0RTS; 114 1.1.2.2 nathanw if (mcr & MCR_DTR) 115 1.1.2.2 nathanw set |= IFPGA_SC_CTRL_UART0DTR; 116 1.1.2.2 nathanw else 117 1.1.2.2 nathanw clr |= IFPGA_SC_CTRL_UART0DTR; 118 1.1.2.2 nathanw case 1: 119 1.1.2.2 nathanw if (mcr & MCR_RTS) 120 1.1.2.2 nathanw set |= IFPGA_SC_CTRL_UART1RTS; 121 1.1.2.2 nathanw else 122 1.1.2.2 nathanw clr |= IFPGA_SC_CTRL_UART1RTS; 123 1.1.2.2 nathanw if (mcr & MCR_DTR) 124 1.1.2.2 nathanw set |= IFPGA_SC_CTRL_UART1DTR; 125 1.1.2.2 nathanw else 126 1.1.2.2 nathanw clr |= IFPGA_SC_CTRL_UART1DTR; 127 1.1.2.2 nathanw default: 128 1.1.2.2 nathanw return; 129 1.1.2.2 nathanw } 130 1.1.2.2 nathanw 131 1.1.2.2 nathanw if (set) 132 1.1.2.2 nathanw bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLS, 133 1.1.2.2 nathanw set); 134 1.1.2.2 nathanw if (clr) 135 1.1.2.2 nathanw bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLC, 136 1.1.2.2 nathanw clr); 137 1.1.2.2 nathanw } 138
Indexes created Mon Oct 27 20:09:55 GMT 2025