plcom_ifpga.c revision 1.13 1 1.13 skrll /* $NetBSD: plcom_ifpga.c,v 1.13 2012/05/20 10:28:44 skrll Exp $ */
2 1.1 rearnsha
3 1.1 rearnsha /*
4 1.1 rearnsha * Copyright (c) 2001 ARM Ltd
5 1.1 rearnsha * All rights reserved.
6 1.1 rearnsha *
7 1.1 rearnsha * Redistribution and use in source and binary forms, with or without
8 1.1 rearnsha * modification, are permitted provided that the following conditions
9 1.1 rearnsha * are met:
10 1.1 rearnsha * 1. Redistributions of source code must retain the above copyright
11 1.1 rearnsha * notice, this list of conditions and the following disclaimer.
12 1.1 rearnsha * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 rearnsha * notice, this list of conditions and the following disclaimer in the
14 1.1 rearnsha * documentation and/or other materials provided with the distribution.
15 1.1 rearnsha * 3. The name of the company may not be used to endorse or promote
16 1.1 rearnsha * products derived from this software without specific prior written
17 1.1 rearnsha * permission.
18 1.1 rearnsha *
19 1.1 rearnsha * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 1.1 rearnsha * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 1.1 rearnsha * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 rearnsha * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 1.1 rearnsha * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 1.1 rearnsha * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 1.1 rearnsha * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1 rearnsha * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1 rearnsha * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1 rearnsha * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1 rearnsha * SUCH DAMAGE.
30 1.1 rearnsha */
31 1.1 rearnsha
32 1.1 rearnsha /* Interface to plcom (PL010) serial driver. */
33 1.7 lukem
34 1.7 lukem #include <sys/cdefs.h>
35 1.13 skrll __KERNEL_RCSID(0, "$NetBSD: plcom_ifpga.c,v 1.13 2012/05/20 10:28:44 skrll Exp $");
36 1.1 rearnsha
37 1.1 rearnsha #include <sys/types.h>
38 1.1 rearnsha #include <sys/device.h>
39 1.1 rearnsha #include <sys/systm.h>
40 1.1 rearnsha #include <sys/param.h>
41 1.1 rearnsha #include <sys/malloc.h>
42 1.1 rearnsha
43 1.1 rearnsha #include <sys/termios.h>
44 1.1 rearnsha
45 1.1 rearnsha #include <machine/intr.h>
46 1.11 dyoung #include <sys/bus.h>
47 1.1 rearnsha
48 1.1 rearnsha #include <evbarm/dev/plcomreg.h>
49 1.1 rearnsha #include <evbarm/dev/plcomvar.h>
50 1.1 rearnsha
51 1.1 rearnsha #include <evbarm/ifpga/plcom_ifpgavar.h>
52 1.1 rearnsha
53 1.1 rearnsha #include <evbarm/ifpga/ifpgareg.h>
54 1.1 rearnsha #include <evbarm/ifpga/ifpgavar.h>
55 1.1 rearnsha
56 1.13 skrll static int plcom_ifpga_match(device_t, cfdata_t, void *);
57 1.13 skrll static void plcom_ifpga_attach(device_t, device_t, void *);
58 1.1 rearnsha static void plcom_ifpga_set_mcr(void *, int, u_int);
59 1.1 rearnsha
60 1.13 skrll CFATTACH_DECL_NEW(plcom_ifpga, sizeof(struct plcom_ifpga_softc),
61 1.6 thorpej plcom_ifpga_match, plcom_ifpga_attach, NULL, NULL);
62 1.1 rearnsha
63 1.1 rearnsha static int
64 1.13 skrll plcom_ifpga_match(device_t parent, cfdata_t cf, void *aux)
65 1.1 rearnsha {
66 1.3 thorpej return 1;
67 1.1 rearnsha }
68 1.1 rearnsha
69 1.1 rearnsha static void
70 1.13 skrll plcom_ifpga_attach(device_t parent, device_t self, void *aux)
71 1.1 rearnsha {
72 1.13 skrll struct plcom_ifpga_softc *isc = device_private(self);
73 1.1 rearnsha struct plcom_softc *sc = &isc->sc_plcom;
74 1.1 rearnsha struct ifpga_attach_args *ifa = aux;
75 1.1 rearnsha
76 1.1 rearnsha isc->sc_iot = ifa->ifa_iot;
77 1.1 rearnsha isc->sc_ioh = ifa->ifa_sc_ioh;
78 1.13 skrll sc->sc_dev = self;
79 1.13 skrll sc->sc_iounit = device_unit(sc->sc_dev);
80 1.1 rearnsha sc->sc_frequency = IFPGA_UART_CLK;
81 1.1 rearnsha sc->sc_iot = ifa->ifa_iot;
82 1.1 rearnsha sc->sc_hwflags = 0;
83 1.1 rearnsha sc->sc_swflags = 0;
84 1.1 rearnsha sc->sc_set_mcr = plcom_ifpga_set_mcr;
85 1.1 rearnsha sc->sc_set_mcr_arg = (void *)isc;
86 1.1 rearnsha
87 1.1 rearnsha if (bus_space_map(ifa->ifa_iot, ifa->ifa_addr, PLCOM_UART_SIZE, 0,
88 1.1 rearnsha &sc->sc_ioh)) {
89 1.13 skrll printf("%s: unable to map device\n", device_xname(sc->sc_dev));
90 1.1 rearnsha return;
91 1.1 rearnsha }
92 1.1 rearnsha
93 1.1 rearnsha plcom_attach_subr(sc);
94 1.8 rearnsha isc->sc_ih = ifpga_intr_establish(ifa->ifa_irq, IPL_SERIAL, plcomintr,
95 1.1 rearnsha sc);
96 1.1 rearnsha if (isc->sc_ih == NULL)
97 1.4 provos panic("%s: cannot install interrupt handler",
98 1.13 skrll device_xname(sc->sc_dev));
99 1.1 rearnsha }
100 1.1 rearnsha
101 1.1 rearnsha static void plcom_ifpga_set_mcr(void *aux, int unit, u_int mcr)
102 1.1 rearnsha {
103 1.1 rearnsha struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)aux;
104 1.1 rearnsha u_int set, clr;
105 1.1 rearnsha
106 1.1 rearnsha set = clr = 0;
107 1.1 rearnsha
108 1.1 rearnsha switch (unit) {
109 1.1 rearnsha case 0:
110 1.12 skrll if (mcr & PL01X_MCR_RTS)
111 1.1 rearnsha set |= IFPGA_SC_CTRL_UART0RTS;
112 1.1 rearnsha else
113 1.1 rearnsha clr |= IFPGA_SC_CTRL_UART0RTS;
114 1.12 skrll if (mcr & PL01X_MCR_DTR)
115 1.1 rearnsha set |= IFPGA_SC_CTRL_UART0DTR;
116 1.1 rearnsha else
117 1.1 rearnsha clr |= IFPGA_SC_CTRL_UART0DTR;
118 1.1 rearnsha case 1:
119 1.12 skrll if (mcr & PL01X_MCR_RTS)
120 1.1 rearnsha set |= IFPGA_SC_CTRL_UART1RTS;
121 1.1 rearnsha else
122 1.1 rearnsha clr |= IFPGA_SC_CTRL_UART1RTS;
123 1.12 skrll if (mcr & PL01X_MCR_DTR)
124 1.1 rearnsha set |= IFPGA_SC_CTRL_UART1DTR;
125 1.1 rearnsha else
126 1.1 rearnsha clr |= IFPGA_SC_CTRL_UART1DTR;
127 1.1 rearnsha default:
128 1.1 rearnsha return;
129 1.1 rearnsha }
130 1.1 rearnsha
131 1.1 rearnsha if (set)
132 1.1 rearnsha bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLS,
133 1.1 rearnsha set);
134 1.1 rearnsha if (clr)
135 1.1 rearnsha bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLC,
136 1.1 rearnsha clr);
137 1.1 rearnsha }
138