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plcom_ifpga.c revision 1.4 
      1 /*      $NetBSD: plcom_ifpga.c,v 1.4 2002/09/27 15:35:59 provos Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2001 ARM Ltd
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of the company may not be used to endorse or promote
     16  *    products derived from this software without specific prior written
     17  *    permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  */
     31 
     32 /* Interface to plcom (PL010) serial driver. */
     33 
     34 #include <sys/types.h>
     35 #include <sys/device.h>
     36 #include <sys/systm.h>
     37 #include <sys/param.h>
     38 #include <sys/malloc.h>
     39 
     40 #include <sys/termios.h>
     41 
     42 #include <machine/intr.h>
     43 #include <evbarm/ifpga/irqhandler.h>	/* XXX XXX XXX */
     44 #include <machine/bus.h>
     45 
     46 #include <evbarm/dev/plcomreg.h>
     47 #include <evbarm/dev/plcomvar.h>
     48 
     49 #include <evbarm/ifpga/plcom_ifpgavar.h>
     50 
     51 #include <evbarm/ifpga/ifpgareg.h>
     52 #include <evbarm/ifpga/ifpgavar.h>
     53 
     54 static int  plcom_ifpga_match(struct device *, struct cfdata *, void *);
     55 static void plcom_ifpga_attach(struct device *, struct device *, void *);
     56 static void plcom_ifpga_set_mcr(void *, int, u_int);
     57 
     58 struct cfattach plcom_ifpga_ca = {
     59 	sizeof(struct plcom_softc), plcom_ifpga_match, plcom_ifpga_attach
     60 };
     61 
     62 static int
     63 plcom_ifpga_match(struct device *parent, struct cfdata *cf, void *aux)
     64 {
     65 	return 1;
     66 }
     67 
     68 static void
     69 plcom_ifpga_attach(struct device *parent, struct device *self, void *aux)
     70 {
     71 	struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)self;
     72 	struct plcom_softc *sc = &isc->sc_plcom;
     73 	struct ifpga_attach_args *ifa = aux;
     74 	char *irqname;
     75 
     76 	isc->sc_iot = ifa->ifa_iot;
     77 	isc->sc_ioh = ifa->ifa_sc_ioh;
     78 	sc->sc_iounit = sc->sc_dev.dv_unit;
     79 	sc->sc_frequency = IFPGA_UART_CLK;
     80 	sc->sc_iot = ifa->ifa_iot;
     81 	sc->sc_hwflags = 0;
     82 	sc->sc_swflags = 0;
     83 	sc->sc_set_mcr = plcom_ifpga_set_mcr;
     84 	sc->sc_set_mcr_arg = (void *)isc;
     85 
     86 	if (bus_space_map(ifa->ifa_iot, ifa->ifa_addr, PLCOM_UART_SIZE, 0,
     87 	    &sc->sc_ioh)) {
     88 		printf("%s: unable to map device\n", sc->sc_dev.dv_xname);
     89 		return;
     90 	}
     91 
     92 	plcom_attach_subr(sc);
     93 	irqname = malloc(sizeof("uart") + 2, M_DEVBUF, M_WAITOK);
     94 	sprintf(irqname, "uart%d", sc->sc_dev.dv_unit);
     95 	isc->sc_ih = intr_claim(ifa->ifa_irq, IPL_SERIAL, irqname, plcomintr,
     96 	    sc);
     97 	if (isc->sc_ih == NULL)
     98 		panic("%s: cannot install interrupt handler",
     99 		    sc->sc_dev.dv_xname);
    100 }
    101 
    102 static void plcom_ifpga_set_mcr(void *aux, int unit, u_int mcr)
    103 {
    104 	struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)aux;
    105 	u_int set, clr;
    106 
    107 	set = clr = 0;
    108 
    109 	switch (unit) {
    110 	case 0:
    111 		if (mcr & MCR_RTS)
    112 			set |= IFPGA_SC_CTRL_UART0RTS;
    113 		else
    114 			clr |= IFPGA_SC_CTRL_UART0RTS;
    115 		if (mcr & MCR_DTR)
    116 			set |= IFPGA_SC_CTRL_UART0DTR;
    117 		else
    118 			clr |= IFPGA_SC_CTRL_UART0DTR;
    119 	case 1:
    120 		if (mcr & MCR_RTS)
    121 			set |= IFPGA_SC_CTRL_UART1RTS;
    122 		else
    123 			clr |= IFPGA_SC_CTRL_UART1RTS;
    124 		if (mcr & MCR_DTR)
    125 			set |= IFPGA_SC_CTRL_UART1DTR;
    126 		else
    127 			clr |= IFPGA_SC_CTRL_UART1DTR;
    128 	default:
    129 		return;
    130 	}
    131 
    132 	if (set)
    133 		bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLS,
    134 		    set);
    135 	if (clr)
    136 		bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLC,
    137 		    clr);
    138 }
    139