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plcom_ifpga.c revision 1.7 
      1 /*      $NetBSD: plcom_ifpga.c,v 1.7 2003/07/15 00:24:59 lukem Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2001 ARM Ltd
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of the company may not be used to endorse or promote
     16  *    products derived from this software without specific prior written
     17  *    permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  */
     31 
     32 /* Interface to plcom (PL010) serial driver. */
     33 
     34 #include <sys/cdefs.h>
     35 __KERNEL_RCSID(0, "$NetBSD: plcom_ifpga.c,v 1.7 2003/07/15 00:24:59 lukem Exp $");
     36 
     37 #include <sys/types.h>
     38 #include <sys/device.h>
     39 #include <sys/systm.h>
     40 #include <sys/param.h>
     41 #include <sys/malloc.h>
     42 
     43 #include <sys/termios.h>
     44 
     45 #include <machine/intr.h>
     46 #include <evbarm/ifpga/irqhandler.h>	/* XXX XXX XXX */
     47 #include <machine/bus.h>
     48 
     49 #include <evbarm/dev/plcomreg.h>
     50 #include <evbarm/dev/plcomvar.h>
     51 
     52 #include <evbarm/ifpga/plcom_ifpgavar.h>
     53 
     54 #include <evbarm/ifpga/ifpgareg.h>
     55 #include <evbarm/ifpga/ifpgavar.h>
     56 
     57 static int  plcom_ifpga_match(struct device *, struct cfdata *, void *);
     58 static void plcom_ifpga_attach(struct device *, struct device *, void *);
     59 static void plcom_ifpga_set_mcr(void *, int, u_int);
     60 
     61 CFATTACH_DECL(plcom_ifpga, sizeof(struct plcom_softc),
     62     plcom_ifpga_match, plcom_ifpga_attach, NULL, NULL);
     63 
     64 static int
     65 plcom_ifpga_match(struct device *parent, struct cfdata *cf, void *aux)
     66 {
     67 	return 1;
     68 }
     69 
     70 static void
     71 plcom_ifpga_attach(struct device *parent, struct device *self, void *aux)
     72 {
     73 	struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)self;
     74 	struct plcom_softc *sc = &isc->sc_plcom;
     75 	struct ifpga_attach_args *ifa = aux;
     76 	char *irqname;
     77 
     78 	isc->sc_iot = ifa->ifa_iot;
     79 	isc->sc_ioh = ifa->ifa_sc_ioh;
     80 	sc->sc_iounit = sc->sc_dev.dv_unit;
     81 	sc->sc_frequency = IFPGA_UART_CLK;
     82 	sc->sc_iot = ifa->ifa_iot;
     83 	sc->sc_hwflags = 0;
     84 	sc->sc_swflags = 0;
     85 	sc->sc_set_mcr = plcom_ifpga_set_mcr;
     86 	sc->sc_set_mcr_arg = (void *)isc;
     87 
     88 	if (bus_space_map(ifa->ifa_iot, ifa->ifa_addr, PLCOM_UART_SIZE, 0,
     89 	    &sc->sc_ioh)) {
     90 		printf("%s: unable to map device\n", sc->sc_dev.dv_xname);
     91 		return;
     92 	}
     93 
     94 	plcom_attach_subr(sc);
     95 	irqname = malloc(sizeof("uart") + 2, M_DEVBUF, M_WAITOK);
     96 	sprintf(irqname, "uart%d", sc->sc_dev.dv_unit);
     97 	isc->sc_ih = intr_claim(ifa->ifa_irq, IPL_SERIAL, irqname, plcomintr,
     98 	    sc);
     99 	if (isc->sc_ih == NULL)
    100 		panic("%s: cannot install interrupt handler",
    101 		    sc->sc_dev.dv_xname);
    102 }
    103 
    104 static void plcom_ifpga_set_mcr(void *aux, int unit, u_int mcr)
    105 {
    106 	struct plcom_ifpga_softc *isc = (struct plcom_ifpga_softc *)aux;
    107 	u_int set, clr;
    108 
    109 	set = clr = 0;
    110 
    111 	switch (unit) {
    112 	case 0:
    113 		if (mcr & MCR_RTS)
    114 			set |= IFPGA_SC_CTRL_UART0RTS;
    115 		else
    116 			clr |= IFPGA_SC_CTRL_UART0RTS;
    117 		if (mcr & MCR_DTR)
    118 			set |= IFPGA_SC_CTRL_UART0DTR;
    119 		else
    120 			clr |= IFPGA_SC_CTRL_UART0DTR;
    121 	case 1:
    122 		if (mcr & MCR_RTS)
    123 			set |= IFPGA_SC_CTRL_UART1RTS;
    124 		else
    125 			clr |= IFPGA_SC_CTRL_UART1RTS;
    126 		if (mcr & MCR_DTR)
    127 			set |= IFPGA_SC_CTRL_UART1DTR;
    128 		else
    129 			clr |= IFPGA_SC_CTRL_UART1DTR;
    130 	default:
    131 		return;
    132 	}
    133 
    134 	if (set)
    135 		bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLS,
    136 		    set);
    137 	if (clr)
    138 		bus_space_write_1(isc->sc_iot, isc->sc_ioh, IFPGA_SC_CTRLC,
    139 		    clr);
    140 }
    141